qdio_main.c 45 KB

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  1. /*
  2. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  3. *
  4. * Copyright IBM Corp. 2000, 2008
  5. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  6. * Jan Glauber <jang@linux.vnet.ibm.com>
  7. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/init.h>
  11. #include <linux/kernel.h>
  12. #include <linux/timer.h>
  13. #include <linux/delay.h>
  14. #include <linux/gfp.h>
  15. #include <linux/io.h>
  16. #include <linux/atomic.h>
  17. #include <asm/debug.h>
  18. #include <asm/qdio.h>
  19. #include <asm/ipl.h>
  20. #include "cio.h"
  21. #include "css.h"
  22. #include "device.h"
  23. #include "qdio.h"
  24. #include "qdio_debug.h"
  25. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  26. "Jan Glauber <jang@linux.vnet.ibm.com>");
  27. MODULE_DESCRIPTION("QDIO base support");
  28. MODULE_LICENSE("GPL");
  29. static inline int do_siga_sync(unsigned long schid,
  30. unsigned int out_mask, unsigned int in_mask,
  31. unsigned int fc)
  32. {
  33. register unsigned long __fc asm ("0") = fc;
  34. register unsigned long __schid asm ("1") = schid;
  35. register unsigned long out asm ("2") = out_mask;
  36. register unsigned long in asm ("3") = in_mask;
  37. int cc;
  38. asm volatile(
  39. " siga 0\n"
  40. " ipm %0\n"
  41. " srl %0,28\n"
  42. : "=d" (cc)
  43. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  44. return cc;
  45. }
  46. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  47. unsigned int fc)
  48. {
  49. register unsigned long __fc asm ("0") = fc;
  50. register unsigned long __schid asm ("1") = schid;
  51. register unsigned long __mask asm ("2") = mask;
  52. int cc;
  53. asm volatile(
  54. " siga 0\n"
  55. " ipm %0\n"
  56. " srl %0,28\n"
  57. : "=d" (cc)
  58. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
  59. return cc;
  60. }
  61. /**
  62. * do_siga_output - perform SIGA-w/wt function
  63. * @schid: subchannel id or in case of QEBSM the subchannel token
  64. * @mask: which output queues to process
  65. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  66. * @fc: function code to perform
  67. *
  68. * Returns condition code.
  69. * Note: For IQDC unicast queues only the highest priority queue is processed.
  70. */
  71. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  72. unsigned int *bb, unsigned int fc,
  73. unsigned long aob)
  74. {
  75. register unsigned long __fc asm("0") = fc;
  76. register unsigned long __schid asm("1") = schid;
  77. register unsigned long __mask asm("2") = mask;
  78. register unsigned long __aob asm("3") = aob;
  79. int cc;
  80. asm volatile(
  81. " siga 0\n"
  82. " ipm %0\n"
  83. " srl %0,28\n"
  84. : "=d" (cc), "+d" (__fc), "+d" (__aob)
  85. : "d" (__schid), "d" (__mask)
  86. : "cc");
  87. *bb = __fc >> 31;
  88. return cc;
  89. }
  90. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  91. {
  92. /* all done or next buffer state different */
  93. if (ccq == 0 || ccq == 32)
  94. return 0;
  95. /* no buffer processed */
  96. if (ccq == 97)
  97. return 1;
  98. /* not all buffers processed */
  99. if (ccq == 96)
  100. return 2;
  101. /* notify devices immediately */
  102. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  103. return -EIO;
  104. }
  105. /**
  106. * qdio_do_eqbs - extract buffer states for QEBSM
  107. * @q: queue to manipulate
  108. * @state: state of the extracted buffers
  109. * @start: buffer number to start at
  110. * @count: count of buffers to examine
  111. * @auto_ack: automatically acknowledge buffers
  112. *
  113. * Returns the number of successfully extracted equal buffer states.
  114. * Stops processing if a state is different from the last buffers state.
  115. */
  116. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  117. int start, int count, int auto_ack)
  118. {
  119. int rc, tmp_count = count, tmp_start = start, nr = q->nr;
  120. unsigned int ccq = 0;
  121. qperf_inc(q, eqbs);
  122. if (!q->is_input_q)
  123. nr += q->irq_ptr->nr_input_qs;
  124. again:
  125. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  126. auto_ack);
  127. rc = qdio_check_ccq(q, ccq);
  128. if (!rc)
  129. return count - tmp_count;
  130. if (rc == 1) {
  131. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  132. goto again;
  133. }
  134. if (rc == 2) {
  135. qperf_inc(q, eqbs_partial);
  136. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
  137. tmp_count);
  138. return count - tmp_count;
  139. }
  140. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  141. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  142. q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE,
  143. q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
  144. return 0;
  145. }
  146. /**
  147. * qdio_do_sqbs - set buffer states for QEBSM
  148. * @q: queue to manipulate
  149. * @state: new state of the buffers
  150. * @start: first buffer number to change
  151. * @count: how many buffers to change
  152. *
  153. * Returns the number of successfully changed buffers.
  154. * Does retrying until the specified count of buffer states is set or an
  155. * error occurs.
  156. */
  157. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  158. int count)
  159. {
  160. unsigned int ccq = 0;
  161. int tmp_count = count, tmp_start = start;
  162. int nr = q->nr;
  163. int rc;
  164. if (!count)
  165. return 0;
  166. qperf_inc(q, sqbs);
  167. if (!q->is_input_q)
  168. nr += q->irq_ptr->nr_input_qs;
  169. again:
  170. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  171. rc = qdio_check_ccq(q, ccq);
  172. if (!rc) {
  173. WARN_ON_ONCE(tmp_count);
  174. return count - tmp_count;
  175. }
  176. if (rc == 1 || rc == 2) {
  177. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  178. qperf_inc(q, sqbs_partial);
  179. goto again;
  180. }
  181. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  182. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  183. q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE,
  184. q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
  185. return 0;
  186. }
  187. /*
  188. * Returns number of examined buffers and their common state in *state.
  189. * Requested number of buffers-to-examine must be > 0.
  190. */
  191. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  192. unsigned char *state, unsigned int count,
  193. int auto_ack, int merge_pending)
  194. {
  195. unsigned char __state = 0;
  196. int i;
  197. if (is_qebsm(q))
  198. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  199. /* get initial state: */
  200. __state = q->slsb.val[bufnr];
  201. if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
  202. __state = SLSB_P_OUTPUT_EMPTY;
  203. for (i = 1; i < count; i++) {
  204. bufnr = next_buf(bufnr);
  205. /* merge PENDING into EMPTY: */
  206. if (merge_pending &&
  207. q->slsb.val[bufnr] == SLSB_P_OUTPUT_PENDING &&
  208. __state == SLSB_P_OUTPUT_EMPTY)
  209. continue;
  210. /* stop if next state differs from initial state: */
  211. if (q->slsb.val[bufnr] != __state)
  212. break;
  213. }
  214. *state = __state;
  215. return i;
  216. }
  217. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  218. unsigned char *state, int auto_ack)
  219. {
  220. return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
  221. }
  222. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  223. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  224. unsigned char state, int count)
  225. {
  226. int i;
  227. if (is_qebsm(q))
  228. return qdio_do_sqbs(q, state, bufnr, count);
  229. for (i = 0; i < count; i++) {
  230. xchg(&q->slsb.val[bufnr], state);
  231. bufnr = next_buf(bufnr);
  232. }
  233. return count;
  234. }
  235. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  236. unsigned char state)
  237. {
  238. return set_buf_states(q, bufnr, state, 1);
  239. }
  240. /* set slsb states to initial state */
  241. static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  242. {
  243. struct qdio_q *q;
  244. int i;
  245. for_each_input_queue(irq_ptr, q, i)
  246. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  247. QDIO_MAX_BUFFERS_PER_Q);
  248. for_each_output_queue(irq_ptr, q, i)
  249. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  250. QDIO_MAX_BUFFERS_PER_Q);
  251. }
  252. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  253. unsigned int input)
  254. {
  255. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  256. unsigned int fc = QDIO_SIGA_SYNC;
  257. int cc;
  258. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  259. qperf_inc(q, siga_sync);
  260. if (is_qebsm(q)) {
  261. schid = q->irq_ptr->sch_token;
  262. fc |= QDIO_SIGA_QEBSM_FLAG;
  263. }
  264. cc = do_siga_sync(schid, output, input, fc);
  265. if (unlikely(cc))
  266. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  267. return (cc) ? -EIO : 0;
  268. }
  269. static inline int qdio_siga_sync_q(struct qdio_q *q)
  270. {
  271. if (q->is_input_q)
  272. return qdio_siga_sync(q, 0, q->mask);
  273. else
  274. return qdio_siga_sync(q, q->mask, 0);
  275. }
  276. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
  277. unsigned long aob)
  278. {
  279. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  280. unsigned int fc = QDIO_SIGA_WRITE;
  281. u64 start_time = 0;
  282. int retries = 0, cc;
  283. unsigned long laob = 0;
  284. WARN_ON_ONCE(aob && ((queue_type(q) != QDIO_IQDIO_QFMT) ||
  285. !q->u.out.use_cq));
  286. if (q->u.out.use_cq && aob != 0) {
  287. fc = QDIO_SIGA_WRITEQ;
  288. laob = aob;
  289. }
  290. if (is_qebsm(q)) {
  291. schid = q->irq_ptr->sch_token;
  292. fc |= QDIO_SIGA_QEBSM_FLAG;
  293. }
  294. again:
  295. cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
  296. /* hipersocket busy condition */
  297. if (unlikely(*busy_bit)) {
  298. retries++;
  299. if (!start_time) {
  300. start_time = get_tod_clock_fast();
  301. goto again;
  302. }
  303. if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE)
  304. goto again;
  305. }
  306. if (retries) {
  307. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  308. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  309. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  310. }
  311. return cc;
  312. }
  313. static inline int qdio_siga_input(struct qdio_q *q)
  314. {
  315. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  316. unsigned int fc = QDIO_SIGA_READ;
  317. int cc;
  318. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  319. qperf_inc(q, siga_read);
  320. if (is_qebsm(q)) {
  321. schid = q->irq_ptr->sch_token;
  322. fc |= QDIO_SIGA_QEBSM_FLAG;
  323. }
  324. cc = do_siga_input(schid, q->mask, fc);
  325. if (unlikely(cc))
  326. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  327. return (cc) ? -EIO : 0;
  328. }
  329. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  330. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  331. static inline void qdio_sync_queues(struct qdio_q *q)
  332. {
  333. /* PCI capable outbound queues will also be scanned so sync them too */
  334. if (pci_out_supported(q))
  335. qdio_siga_sync_all(q);
  336. else
  337. qdio_siga_sync_q(q);
  338. }
  339. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  340. unsigned char *state)
  341. {
  342. if (need_siga_sync(q))
  343. qdio_siga_sync_q(q);
  344. return get_buf_states(q, bufnr, state, 1, 0, 0);
  345. }
  346. static inline void qdio_stop_polling(struct qdio_q *q)
  347. {
  348. if (!q->u.in.polling)
  349. return;
  350. q->u.in.polling = 0;
  351. qperf_inc(q, stop_polling);
  352. /* show the card that we are not polling anymore */
  353. if (is_qebsm(q)) {
  354. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  355. q->u.in.ack_count);
  356. q->u.in.ack_count = 0;
  357. } else
  358. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  359. }
  360. static inline void account_sbals(struct qdio_q *q, unsigned int count)
  361. {
  362. int pos;
  363. q->q_stats.nr_sbal_total += count;
  364. if (count == QDIO_MAX_BUFFERS_MASK) {
  365. q->q_stats.nr_sbals[7]++;
  366. return;
  367. }
  368. pos = ilog2(count);
  369. q->q_stats.nr_sbals[pos]++;
  370. }
  371. static void process_buffer_error(struct qdio_q *q, int count)
  372. {
  373. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  374. SLSB_P_OUTPUT_NOT_INIT;
  375. q->qdio_error = QDIO_ERROR_SLSB_STATE;
  376. /* special handling for no target buffer empty */
  377. if ((!q->is_input_q &&
  378. (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
  379. qperf_inc(q, target_full);
  380. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  381. q->first_to_check);
  382. goto set;
  383. }
  384. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  385. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  386. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  387. DBF_ERROR("F14:%2x F15:%2x",
  388. q->sbal[q->first_to_check]->element[14].sflags,
  389. q->sbal[q->first_to_check]->element[15].sflags);
  390. set:
  391. /*
  392. * Interrupts may be avoided as long as the error is present
  393. * so change the buffer state immediately to avoid starvation.
  394. */
  395. set_buf_states(q, q->first_to_check, state, count);
  396. }
  397. static inline void inbound_primed(struct qdio_q *q, int count)
  398. {
  399. int new;
  400. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  401. /* for QEBSM the ACK was already set by EQBS */
  402. if (is_qebsm(q)) {
  403. if (!q->u.in.polling) {
  404. q->u.in.polling = 1;
  405. q->u.in.ack_count = count;
  406. q->u.in.ack_start = q->first_to_check;
  407. return;
  408. }
  409. /* delete the previous ACK's */
  410. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  411. q->u.in.ack_count);
  412. q->u.in.ack_count = count;
  413. q->u.in.ack_start = q->first_to_check;
  414. return;
  415. }
  416. /*
  417. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  418. * or by the next inbound run.
  419. */
  420. new = add_buf(q->first_to_check, count - 1);
  421. if (q->u.in.polling) {
  422. /* reset the previous ACK but first set the new one */
  423. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  424. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  425. } else {
  426. q->u.in.polling = 1;
  427. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  428. }
  429. q->u.in.ack_start = new;
  430. count--;
  431. if (!count)
  432. return;
  433. /* need to change ALL buffers to get more interrupts */
  434. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  435. }
  436. static int get_inbound_buffer_frontier(struct qdio_q *q)
  437. {
  438. int count, stop;
  439. unsigned char state = 0;
  440. q->timestamp = get_tod_clock_fast();
  441. /*
  442. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  443. * would return 0.
  444. */
  445. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  446. stop = add_buf(q->first_to_check, count);
  447. if (q->first_to_check == stop)
  448. goto out;
  449. /*
  450. * No siga sync here, as a PCI or we after a thin interrupt
  451. * already sync'ed the queues.
  452. */
  453. count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
  454. if (!count)
  455. goto out;
  456. switch (state) {
  457. case SLSB_P_INPUT_PRIMED:
  458. inbound_primed(q, count);
  459. q->first_to_check = add_buf(q->first_to_check, count);
  460. if (atomic_sub_return(count, &q->nr_buf_used) == 0)
  461. qperf_inc(q, inbound_queue_full);
  462. if (q->irq_ptr->perf_stat_enabled)
  463. account_sbals(q, count);
  464. break;
  465. case SLSB_P_INPUT_ERROR:
  466. process_buffer_error(q, count);
  467. q->first_to_check = add_buf(q->first_to_check, count);
  468. atomic_sub(count, &q->nr_buf_used);
  469. if (q->irq_ptr->perf_stat_enabled)
  470. account_sbals_error(q, count);
  471. break;
  472. case SLSB_CU_INPUT_EMPTY:
  473. case SLSB_P_INPUT_NOT_INIT:
  474. case SLSB_P_INPUT_ACK:
  475. if (q->irq_ptr->perf_stat_enabled)
  476. q->q_stats.nr_sbal_nop++;
  477. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  478. break;
  479. default:
  480. WARN_ON_ONCE(1);
  481. }
  482. out:
  483. return q->first_to_check;
  484. }
  485. static int qdio_inbound_q_moved(struct qdio_q *q)
  486. {
  487. int bufnr;
  488. bufnr = get_inbound_buffer_frontier(q);
  489. if (bufnr != q->last_move) {
  490. q->last_move = bufnr;
  491. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  492. q->u.in.timestamp = get_tod_clock();
  493. return 1;
  494. } else
  495. return 0;
  496. }
  497. static inline int qdio_inbound_q_done(struct qdio_q *q)
  498. {
  499. unsigned char state = 0;
  500. if (!atomic_read(&q->nr_buf_used))
  501. return 1;
  502. if (need_siga_sync(q))
  503. qdio_siga_sync_q(q);
  504. get_buf_state(q, q->first_to_check, &state, 0);
  505. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  506. /* more work coming */
  507. return 0;
  508. if (is_thinint_irq(q->irq_ptr))
  509. return 1;
  510. /* don't poll under z/VM */
  511. if (MACHINE_IS_VM)
  512. return 1;
  513. /*
  514. * At this point we know, that inbound first_to_check
  515. * has (probably) not moved (see qdio_inbound_processing).
  516. */
  517. if (get_tod_clock_fast() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  518. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  519. q->first_to_check);
  520. return 1;
  521. } else
  522. return 0;
  523. }
  524. static inline int contains_aobs(struct qdio_q *q)
  525. {
  526. return !q->is_input_q && q->u.out.use_cq;
  527. }
  528. static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
  529. {
  530. unsigned char state = 0;
  531. int j, b = start;
  532. if (!contains_aobs(q))
  533. return;
  534. for (j = 0; j < count; ++j) {
  535. get_buf_state(q, b, &state, 0);
  536. if (state == SLSB_P_OUTPUT_PENDING) {
  537. struct qaob *aob = q->u.out.aobs[b];
  538. if (aob == NULL)
  539. continue;
  540. q->u.out.sbal_state[b].flags |=
  541. QDIO_OUTBUF_STATE_FLAG_PENDING;
  542. q->u.out.aobs[b] = NULL;
  543. } else if (state == SLSB_P_OUTPUT_EMPTY) {
  544. q->u.out.sbal_state[b].aob = NULL;
  545. }
  546. b = next_buf(b);
  547. }
  548. }
  549. static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
  550. int bufnr)
  551. {
  552. unsigned long phys_aob = 0;
  553. if (!q->use_cq)
  554. return 0;
  555. if (!q->aobs[bufnr]) {
  556. struct qaob *aob = qdio_allocate_aob();
  557. q->aobs[bufnr] = aob;
  558. }
  559. if (q->aobs[bufnr]) {
  560. q->sbal_state[bufnr].aob = q->aobs[bufnr];
  561. q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
  562. phys_aob = virt_to_phys(q->aobs[bufnr]);
  563. WARN_ON_ONCE(phys_aob & 0xFF);
  564. }
  565. q->sbal_state[bufnr].flags = 0;
  566. return phys_aob;
  567. }
  568. static void qdio_kick_handler(struct qdio_q *q)
  569. {
  570. int start = q->first_to_kick;
  571. int end = q->first_to_check;
  572. int count;
  573. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  574. return;
  575. count = sub_buf(end, start);
  576. if (q->is_input_q) {
  577. qperf_inc(q, inbound_handler);
  578. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  579. } else {
  580. qperf_inc(q, outbound_handler);
  581. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  582. start, count);
  583. }
  584. qdio_handle_aobs(q, start, count);
  585. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  586. q->irq_ptr->int_parm);
  587. /* for the next time */
  588. q->first_to_kick = end;
  589. q->qdio_error = 0;
  590. }
  591. static void __qdio_inbound_processing(struct qdio_q *q)
  592. {
  593. qperf_inc(q, tasklet_inbound);
  594. if (!qdio_inbound_q_moved(q))
  595. return;
  596. qdio_kick_handler(q);
  597. if (!qdio_inbound_q_done(q)) {
  598. /* means poll time is not yet over */
  599. qperf_inc(q, tasklet_inbound_resched);
  600. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  601. tasklet_schedule(&q->tasklet);
  602. return;
  603. }
  604. }
  605. qdio_stop_polling(q);
  606. /*
  607. * We need to check again to not lose initiative after
  608. * resetting the ACK state.
  609. */
  610. if (!qdio_inbound_q_done(q)) {
  611. qperf_inc(q, tasklet_inbound_resched2);
  612. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  613. tasklet_schedule(&q->tasklet);
  614. }
  615. }
  616. void qdio_inbound_processing(unsigned long data)
  617. {
  618. struct qdio_q *q = (struct qdio_q *)data;
  619. __qdio_inbound_processing(q);
  620. }
  621. static int get_outbound_buffer_frontier(struct qdio_q *q)
  622. {
  623. int count, stop;
  624. unsigned char state = 0;
  625. q->timestamp = get_tod_clock_fast();
  626. if (need_siga_sync(q))
  627. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  628. !pci_out_supported(q)) ||
  629. (queue_type(q) == QDIO_IQDIO_QFMT &&
  630. multicast_outbound(q)))
  631. qdio_siga_sync_q(q);
  632. /*
  633. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  634. * would return 0.
  635. */
  636. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  637. stop = add_buf(q->first_to_check, count);
  638. if (q->first_to_check == stop)
  639. goto out;
  640. count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
  641. if (!count)
  642. goto out;
  643. switch (state) {
  644. case SLSB_P_OUTPUT_EMPTY:
  645. /* the adapter got it */
  646. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  647. "out empty:%1d %02x", q->nr, count);
  648. atomic_sub(count, &q->nr_buf_used);
  649. q->first_to_check = add_buf(q->first_to_check, count);
  650. if (q->irq_ptr->perf_stat_enabled)
  651. account_sbals(q, count);
  652. break;
  653. case SLSB_P_OUTPUT_ERROR:
  654. process_buffer_error(q, count);
  655. q->first_to_check = add_buf(q->first_to_check, count);
  656. atomic_sub(count, &q->nr_buf_used);
  657. if (q->irq_ptr->perf_stat_enabled)
  658. account_sbals_error(q, count);
  659. break;
  660. case SLSB_CU_OUTPUT_PRIMED:
  661. /* the adapter has not fetched the output yet */
  662. if (q->irq_ptr->perf_stat_enabled)
  663. q->q_stats.nr_sbal_nop++;
  664. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  665. q->nr);
  666. break;
  667. case SLSB_P_OUTPUT_NOT_INIT:
  668. case SLSB_P_OUTPUT_HALTED:
  669. break;
  670. default:
  671. WARN_ON_ONCE(1);
  672. }
  673. out:
  674. return q->first_to_check;
  675. }
  676. /* all buffers processed? */
  677. static inline int qdio_outbound_q_done(struct qdio_q *q)
  678. {
  679. return atomic_read(&q->nr_buf_used) == 0;
  680. }
  681. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  682. {
  683. int bufnr;
  684. bufnr = get_outbound_buffer_frontier(q);
  685. if (bufnr != q->last_move) {
  686. q->last_move = bufnr;
  687. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  688. return 1;
  689. } else
  690. return 0;
  691. }
  692. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
  693. {
  694. int retries = 0, cc;
  695. unsigned int busy_bit;
  696. if (!need_siga_out(q))
  697. return 0;
  698. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  699. retry:
  700. qperf_inc(q, siga_write);
  701. cc = qdio_siga_output(q, &busy_bit, aob);
  702. switch (cc) {
  703. case 0:
  704. break;
  705. case 2:
  706. if (busy_bit) {
  707. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  708. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  709. goto retry;
  710. }
  711. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  712. cc = -EBUSY;
  713. } else {
  714. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  715. cc = -ENOBUFS;
  716. }
  717. break;
  718. case 1:
  719. case 3:
  720. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  721. cc = -EIO;
  722. break;
  723. }
  724. if (retries) {
  725. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  726. DBF_ERROR("count:%u", retries);
  727. }
  728. return cc;
  729. }
  730. static void __qdio_outbound_processing(struct qdio_q *q)
  731. {
  732. qperf_inc(q, tasklet_outbound);
  733. WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
  734. if (qdio_outbound_q_moved(q))
  735. qdio_kick_handler(q);
  736. if (queue_type(q) == QDIO_ZFCP_QFMT)
  737. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  738. goto sched;
  739. if (q->u.out.pci_out_enabled)
  740. return;
  741. /*
  742. * Now we know that queue type is either qeth without pci enabled
  743. * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
  744. * is noticed and outbound_handler is called after some time.
  745. */
  746. if (qdio_outbound_q_done(q))
  747. del_timer(&q->u.out.timer);
  748. else
  749. if (!timer_pending(&q->u.out.timer))
  750. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  751. return;
  752. sched:
  753. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  754. return;
  755. tasklet_schedule(&q->tasklet);
  756. }
  757. /* outbound tasklet */
  758. void qdio_outbound_processing(unsigned long data)
  759. {
  760. struct qdio_q *q = (struct qdio_q *)data;
  761. __qdio_outbound_processing(q);
  762. }
  763. void qdio_outbound_timer(unsigned long data)
  764. {
  765. struct qdio_q *q = (struct qdio_q *)data;
  766. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  767. return;
  768. tasklet_schedule(&q->tasklet);
  769. }
  770. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  771. {
  772. struct qdio_q *out;
  773. int i;
  774. if (!pci_out_supported(q))
  775. return;
  776. for_each_output_queue(q->irq_ptr, out, i)
  777. if (!qdio_outbound_q_done(out))
  778. tasklet_schedule(&out->tasklet);
  779. }
  780. static void __tiqdio_inbound_processing(struct qdio_q *q)
  781. {
  782. qperf_inc(q, tasklet_inbound);
  783. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  784. qdio_sync_queues(q);
  785. /*
  786. * The interrupt could be caused by a PCI request. Check the
  787. * PCI capable outbound queues.
  788. */
  789. qdio_check_outbound_after_thinint(q);
  790. if (!qdio_inbound_q_moved(q))
  791. return;
  792. qdio_kick_handler(q);
  793. if (!qdio_inbound_q_done(q)) {
  794. qperf_inc(q, tasklet_inbound_resched);
  795. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  796. tasklet_schedule(&q->tasklet);
  797. return;
  798. }
  799. }
  800. qdio_stop_polling(q);
  801. /*
  802. * We need to check again to not lose initiative after
  803. * resetting the ACK state.
  804. */
  805. if (!qdio_inbound_q_done(q)) {
  806. qperf_inc(q, tasklet_inbound_resched2);
  807. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  808. tasklet_schedule(&q->tasklet);
  809. }
  810. }
  811. void tiqdio_inbound_processing(unsigned long data)
  812. {
  813. struct qdio_q *q = (struct qdio_q *)data;
  814. __tiqdio_inbound_processing(q);
  815. }
  816. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  817. enum qdio_irq_states state)
  818. {
  819. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  820. irq_ptr->state = state;
  821. mb();
  822. }
  823. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  824. {
  825. if (irb->esw.esw0.erw.cons) {
  826. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  827. DBF_ERROR_HEX(irb, 64);
  828. DBF_ERROR_HEX(irb->ecw, 64);
  829. }
  830. }
  831. /* PCI interrupt handler */
  832. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  833. {
  834. int i;
  835. struct qdio_q *q;
  836. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  837. return;
  838. for_each_input_queue(irq_ptr, q, i) {
  839. if (q->u.in.queue_start_poll) {
  840. /* skip if polling is enabled or already in work */
  841. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  842. &q->u.in.queue_irq_state)) {
  843. qperf_inc(q, int_discarded);
  844. continue;
  845. }
  846. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  847. q->irq_ptr->int_parm);
  848. } else {
  849. tasklet_schedule(&q->tasklet);
  850. }
  851. }
  852. if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
  853. return;
  854. for_each_output_queue(irq_ptr, q, i) {
  855. if (qdio_outbound_q_done(q))
  856. continue;
  857. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  858. qdio_siga_sync_q(q);
  859. tasklet_schedule(&q->tasklet);
  860. }
  861. }
  862. static void qdio_handle_activate_check(struct ccw_device *cdev,
  863. unsigned long intparm, int cstat, int dstat)
  864. {
  865. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  866. struct qdio_q *q;
  867. int count;
  868. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  869. DBF_ERROR("intp :%lx", intparm);
  870. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  871. if (irq_ptr->nr_input_qs) {
  872. q = irq_ptr->input_qs[0];
  873. } else if (irq_ptr->nr_output_qs) {
  874. q = irq_ptr->output_qs[0];
  875. } else {
  876. dump_stack();
  877. goto no_handler;
  878. }
  879. count = sub_buf(q->first_to_check, q->first_to_kick);
  880. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
  881. q->nr, q->first_to_kick, count, irq_ptr->int_parm);
  882. no_handler:
  883. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  884. /*
  885. * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
  886. * Therefore we call the LGR detection function here.
  887. */
  888. lgr_info_log();
  889. }
  890. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  891. int dstat)
  892. {
  893. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  894. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  895. if (cstat)
  896. goto error;
  897. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  898. goto error;
  899. if (!(dstat & DEV_STAT_DEV_END))
  900. goto error;
  901. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  902. return;
  903. error:
  904. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  905. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  906. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  907. }
  908. /* qdio interrupt handler */
  909. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  910. struct irb *irb)
  911. {
  912. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  913. int cstat, dstat;
  914. if (!intparm || !irq_ptr) {
  915. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  916. return;
  917. }
  918. if (irq_ptr->perf_stat_enabled)
  919. irq_ptr->perf_stat.qdio_int++;
  920. if (IS_ERR(irb)) {
  921. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  922. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  923. wake_up(&cdev->private->wait_q);
  924. return;
  925. }
  926. qdio_irq_check_sense(irq_ptr, irb);
  927. cstat = irb->scsw.cmd.cstat;
  928. dstat = irb->scsw.cmd.dstat;
  929. switch (irq_ptr->state) {
  930. case QDIO_IRQ_STATE_INACTIVE:
  931. qdio_establish_handle_irq(cdev, cstat, dstat);
  932. break;
  933. case QDIO_IRQ_STATE_CLEANUP:
  934. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  935. break;
  936. case QDIO_IRQ_STATE_ESTABLISHED:
  937. case QDIO_IRQ_STATE_ACTIVE:
  938. if (cstat & SCHN_STAT_PCI) {
  939. qdio_int_handler_pci(irq_ptr);
  940. return;
  941. }
  942. if (cstat || dstat)
  943. qdio_handle_activate_check(cdev, intparm, cstat,
  944. dstat);
  945. break;
  946. case QDIO_IRQ_STATE_STOPPED:
  947. break;
  948. default:
  949. WARN_ON_ONCE(1);
  950. }
  951. wake_up(&cdev->private->wait_q);
  952. }
  953. /**
  954. * qdio_get_ssqd_desc - get qdio subchannel description
  955. * @cdev: ccw device to get description for
  956. * @data: where to store the ssqd
  957. *
  958. * Returns 0 or an error code. The results of the chsc are stored in the
  959. * specified structure.
  960. */
  961. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  962. struct qdio_ssqd_desc *data)
  963. {
  964. if (!cdev || !cdev->private)
  965. return -EINVAL;
  966. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  967. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  968. }
  969. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  970. static void qdio_shutdown_queues(struct ccw_device *cdev)
  971. {
  972. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  973. struct qdio_q *q;
  974. int i;
  975. for_each_input_queue(irq_ptr, q, i)
  976. tasklet_kill(&q->tasklet);
  977. for_each_output_queue(irq_ptr, q, i) {
  978. del_timer(&q->u.out.timer);
  979. tasklet_kill(&q->tasklet);
  980. }
  981. }
  982. /**
  983. * qdio_shutdown - shut down a qdio subchannel
  984. * @cdev: associated ccw device
  985. * @how: use halt or clear to shutdown
  986. */
  987. int qdio_shutdown(struct ccw_device *cdev, int how)
  988. {
  989. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  990. int rc;
  991. unsigned long flags;
  992. if (!irq_ptr)
  993. return -ENODEV;
  994. WARN_ON_ONCE(irqs_disabled());
  995. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  996. mutex_lock(&irq_ptr->setup_mutex);
  997. /*
  998. * Subchannel was already shot down. We cannot prevent being called
  999. * twice since cio may trigger a shutdown asynchronously.
  1000. */
  1001. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1002. mutex_unlock(&irq_ptr->setup_mutex);
  1003. return 0;
  1004. }
  1005. /*
  1006. * Indicate that the device is going down. Scheduling the queue
  1007. * tasklets is forbidden from here on.
  1008. */
  1009. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  1010. tiqdio_remove_input_queues(irq_ptr);
  1011. qdio_shutdown_queues(cdev);
  1012. qdio_shutdown_debug_entries(irq_ptr);
  1013. /* cleanup subchannel */
  1014. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1015. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  1016. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  1017. else
  1018. /* default behaviour is halt */
  1019. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  1020. if (rc) {
  1021. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  1022. DBF_ERROR("rc:%4d", rc);
  1023. goto no_cleanup;
  1024. }
  1025. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  1026. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1027. wait_event_interruptible_timeout(cdev->private->wait_q,
  1028. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  1029. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  1030. 10 * HZ);
  1031. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1032. no_cleanup:
  1033. qdio_shutdown_thinint(irq_ptr);
  1034. /* restore interrupt handler */
  1035. if ((void *)cdev->handler == (void *)qdio_int_handler)
  1036. cdev->handler = irq_ptr->orig_handler;
  1037. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1038. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1039. mutex_unlock(&irq_ptr->setup_mutex);
  1040. if (rc)
  1041. return rc;
  1042. return 0;
  1043. }
  1044. EXPORT_SYMBOL_GPL(qdio_shutdown);
  1045. /**
  1046. * qdio_free - free data structures for a qdio subchannel
  1047. * @cdev: associated ccw device
  1048. */
  1049. int qdio_free(struct ccw_device *cdev)
  1050. {
  1051. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1052. if (!irq_ptr)
  1053. return -ENODEV;
  1054. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  1055. DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned");
  1056. mutex_lock(&irq_ptr->setup_mutex);
  1057. irq_ptr->debug_area = NULL;
  1058. cdev->private->qdio_data = NULL;
  1059. mutex_unlock(&irq_ptr->setup_mutex);
  1060. qdio_release_memory(irq_ptr);
  1061. return 0;
  1062. }
  1063. EXPORT_SYMBOL_GPL(qdio_free);
  1064. /**
  1065. * qdio_allocate - allocate qdio queues and associated data
  1066. * @init_data: initialization data
  1067. */
  1068. int qdio_allocate(struct qdio_initialize *init_data)
  1069. {
  1070. struct qdio_irq *irq_ptr;
  1071. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  1072. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1073. (init_data->no_output_qs && !init_data->output_handler))
  1074. return -EINVAL;
  1075. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1076. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1077. return -EINVAL;
  1078. if ((!init_data->input_sbal_addr_array) ||
  1079. (!init_data->output_sbal_addr_array))
  1080. return -EINVAL;
  1081. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1082. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1083. if (!irq_ptr)
  1084. goto out_err;
  1085. mutex_init(&irq_ptr->setup_mutex);
  1086. if (qdio_allocate_dbf(init_data, irq_ptr))
  1087. goto out_rel;
  1088. /*
  1089. * Allocate a page for the chsc calls in qdio_establish.
  1090. * Must be pre-allocated since a zfcp recovery will call
  1091. * qdio_establish. In case of low memory and swap on a zfcp disk
  1092. * we may not be able to allocate memory otherwise.
  1093. */
  1094. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1095. if (!irq_ptr->chsc_page)
  1096. goto out_rel;
  1097. /* qdr is used in ccw1.cda which is u32 */
  1098. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1099. if (!irq_ptr->qdr)
  1100. goto out_rel;
  1101. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1102. init_data->no_output_qs))
  1103. goto out_rel;
  1104. init_data->cdev->private->qdio_data = irq_ptr;
  1105. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1106. return 0;
  1107. out_rel:
  1108. qdio_release_memory(irq_ptr);
  1109. out_err:
  1110. return -ENOMEM;
  1111. }
  1112. EXPORT_SYMBOL_GPL(qdio_allocate);
  1113. static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
  1114. {
  1115. struct qdio_q *q = irq_ptr->input_qs[0];
  1116. int i, use_cq = 0;
  1117. if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
  1118. use_cq = 1;
  1119. for_each_output_queue(irq_ptr, q, i) {
  1120. if (use_cq) {
  1121. if (qdio_enable_async_operation(&q->u.out) < 0) {
  1122. use_cq = 0;
  1123. continue;
  1124. }
  1125. } else
  1126. qdio_disable_async_operation(&q->u.out);
  1127. }
  1128. DBF_EVENT("use_cq:%d", use_cq);
  1129. }
  1130. /**
  1131. * qdio_establish - establish queues on a qdio subchannel
  1132. * @init_data: initialization data
  1133. */
  1134. int qdio_establish(struct qdio_initialize *init_data)
  1135. {
  1136. struct qdio_irq *irq_ptr;
  1137. struct ccw_device *cdev = init_data->cdev;
  1138. unsigned long saveflags;
  1139. int rc;
  1140. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1141. irq_ptr = cdev->private->qdio_data;
  1142. if (!irq_ptr)
  1143. return -ENODEV;
  1144. if (cdev->private->state != DEV_STATE_ONLINE)
  1145. return -EINVAL;
  1146. mutex_lock(&irq_ptr->setup_mutex);
  1147. qdio_setup_irq(init_data);
  1148. rc = qdio_establish_thinint(irq_ptr);
  1149. if (rc) {
  1150. mutex_unlock(&irq_ptr->setup_mutex);
  1151. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1152. return rc;
  1153. }
  1154. /* establish q */
  1155. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1156. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1157. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1158. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1159. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1160. ccw_device_set_options_mask(cdev, 0);
  1161. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1162. if (rc) {
  1163. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1164. DBF_ERROR("rc:%4x", rc);
  1165. }
  1166. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1167. if (rc) {
  1168. mutex_unlock(&irq_ptr->setup_mutex);
  1169. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1170. return rc;
  1171. }
  1172. wait_event_interruptible_timeout(cdev->private->wait_q,
  1173. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1174. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1175. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1176. mutex_unlock(&irq_ptr->setup_mutex);
  1177. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1178. return -EIO;
  1179. }
  1180. qdio_setup_ssqd_info(irq_ptr);
  1181. qdio_detect_hsicq(irq_ptr);
  1182. /* qebsm is now setup if available, initialize buffer states */
  1183. qdio_init_buf_states(irq_ptr);
  1184. mutex_unlock(&irq_ptr->setup_mutex);
  1185. qdio_print_subchannel_info(irq_ptr, cdev);
  1186. qdio_setup_debug_entries(irq_ptr, cdev);
  1187. return 0;
  1188. }
  1189. EXPORT_SYMBOL_GPL(qdio_establish);
  1190. /**
  1191. * qdio_activate - activate queues on a qdio subchannel
  1192. * @cdev: associated cdev
  1193. */
  1194. int qdio_activate(struct ccw_device *cdev)
  1195. {
  1196. struct qdio_irq *irq_ptr;
  1197. int rc;
  1198. unsigned long saveflags;
  1199. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1200. irq_ptr = cdev->private->qdio_data;
  1201. if (!irq_ptr)
  1202. return -ENODEV;
  1203. if (cdev->private->state != DEV_STATE_ONLINE)
  1204. return -EINVAL;
  1205. mutex_lock(&irq_ptr->setup_mutex);
  1206. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1207. rc = -EBUSY;
  1208. goto out;
  1209. }
  1210. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1211. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1212. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1213. irq_ptr->ccw.cda = 0;
  1214. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1215. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1216. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1217. 0, DOIO_DENY_PREFETCH);
  1218. if (rc) {
  1219. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1220. DBF_ERROR("rc:%4x", rc);
  1221. }
  1222. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1223. if (rc)
  1224. goto out;
  1225. if (is_thinint_irq(irq_ptr))
  1226. tiqdio_add_input_queues(irq_ptr);
  1227. /* wait for subchannel to become active */
  1228. msleep(5);
  1229. switch (irq_ptr->state) {
  1230. case QDIO_IRQ_STATE_STOPPED:
  1231. case QDIO_IRQ_STATE_ERR:
  1232. rc = -EIO;
  1233. break;
  1234. default:
  1235. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1236. rc = 0;
  1237. }
  1238. out:
  1239. mutex_unlock(&irq_ptr->setup_mutex);
  1240. return rc;
  1241. }
  1242. EXPORT_SYMBOL_GPL(qdio_activate);
  1243. static inline int buf_in_between(int bufnr, int start, int count)
  1244. {
  1245. int end = add_buf(start, count);
  1246. if (end > start) {
  1247. if (bufnr >= start && bufnr < end)
  1248. return 1;
  1249. else
  1250. return 0;
  1251. }
  1252. /* wrap-around case */
  1253. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1254. (bufnr < end))
  1255. return 1;
  1256. else
  1257. return 0;
  1258. }
  1259. /**
  1260. * handle_inbound - reset processed input buffers
  1261. * @q: queue containing the buffers
  1262. * @callflags: flags
  1263. * @bufnr: first buffer to process
  1264. * @count: how many buffers are emptied
  1265. */
  1266. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1267. int bufnr, int count)
  1268. {
  1269. int diff;
  1270. qperf_inc(q, inbound_call);
  1271. if (!q->u.in.polling)
  1272. goto set;
  1273. /* protect against stop polling setting an ACK for an emptied slsb */
  1274. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1275. /* overwriting everything, just delete polling status */
  1276. q->u.in.polling = 0;
  1277. q->u.in.ack_count = 0;
  1278. goto set;
  1279. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1280. if (is_qebsm(q)) {
  1281. /* partial overwrite, just update ack_start */
  1282. diff = add_buf(bufnr, count);
  1283. diff = sub_buf(diff, q->u.in.ack_start);
  1284. q->u.in.ack_count -= diff;
  1285. if (q->u.in.ack_count <= 0) {
  1286. q->u.in.polling = 0;
  1287. q->u.in.ack_count = 0;
  1288. goto set;
  1289. }
  1290. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1291. }
  1292. else
  1293. /* the only ACK will be deleted, so stop polling */
  1294. q->u.in.polling = 0;
  1295. }
  1296. set:
  1297. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1298. atomic_add(count, &q->nr_buf_used);
  1299. if (need_siga_in(q))
  1300. return qdio_siga_input(q);
  1301. return 0;
  1302. }
  1303. /**
  1304. * handle_outbound - process filled outbound buffers
  1305. * @q: queue containing the buffers
  1306. * @callflags: flags
  1307. * @bufnr: first buffer to process
  1308. * @count: how many buffers are filled
  1309. */
  1310. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1311. int bufnr, int count)
  1312. {
  1313. unsigned char state = 0;
  1314. int used, rc = 0;
  1315. qperf_inc(q, outbound_call);
  1316. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1317. used = atomic_add_return(count, &q->nr_buf_used);
  1318. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1319. qperf_inc(q, outbound_queue_full);
  1320. if (callflags & QDIO_FLAG_PCI_OUT) {
  1321. q->u.out.pci_out_enabled = 1;
  1322. qperf_inc(q, pci_request_int);
  1323. } else
  1324. q->u.out.pci_out_enabled = 0;
  1325. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1326. unsigned long phys_aob = 0;
  1327. /* One SIGA-W per buffer required for unicast HSI */
  1328. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1329. phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
  1330. rc = qdio_kick_outbound_q(q, phys_aob);
  1331. } else if (need_siga_sync(q)) {
  1332. rc = qdio_siga_sync_q(q);
  1333. } else {
  1334. /* try to fast requeue buffers */
  1335. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1336. if (state != SLSB_CU_OUTPUT_PRIMED)
  1337. rc = qdio_kick_outbound_q(q, 0);
  1338. else
  1339. qperf_inc(q, fast_requeue);
  1340. }
  1341. /* in case of SIGA errors we must process the error immediately */
  1342. if (used >= q->u.out.scan_threshold || rc)
  1343. tasklet_schedule(&q->tasklet);
  1344. else
  1345. /* free the SBALs in case of no further traffic */
  1346. if (!timer_pending(&q->u.out.timer))
  1347. mod_timer(&q->u.out.timer, jiffies + HZ);
  1348. return rc;
  1349. }
  1350. /**
  1351. * do_QDIO - process input or output buffers
  1352. * @cdev: associated ccw_device for the qdio subchannel
  1353. * @callflags: input or output and special flags from the program
  1354. * @q_nr: queue number
  1355. * @bufnr: buffer number
  1356. * @count: how many buffers to process
  1357. */
  1358. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1359. int q_nr, unsigned int bufnr, unsigned int count)
  1360. {
  1361. struct qdio_irq *irq_ptr;
  1362. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1363. return -EINVAL;
  1364. irq_ptr = cdev->private->qdio_data;
  1365. if (!irq_ptr)
  1366. return -ENODEV;
  1367. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1368. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1369. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1370. return -EIO;
  1371. if (!count)
  1372. return 0;
  1373. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1374. return handle_inbound(irq_ptr->input_qs[q_nr],
  1375. callflags, bufnr, count);
  1376. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1377. return handle_outbound(irq_ptr->output_qs[q_nr],
  1378. callflags, bufnr, count);
  1379. return -EINVAL;
  1380. }
  1381. EXPORT_SYMBOL_GPL(do_QDIO);
  1382. /**
  1383. * qdio_start_irq - process input buffers
  1384. * @cdev: associated ccw_device for the qdio subchannel
  1385. * @nr: input queue number
  1386. *
  1387. * Return codes
  1388. * 0 - success
  1389. * 1 - irqs not started since new data is available
  1390. */
  1391. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1392. {
  1393. struct qdio_q *q;
  1394. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1395. if (!irq_ptr)
  1396. return -ENODEV;
  1397. q = irq_ptr->input_qs[nr];
  1398. clear_nonshared_ind(irq_ptr);
  1399. qdio_stop_polling(q);
  1400. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1401. /*
  1402. * We need to check again to not lose initiative after
  1403. * resetting the ACK state.
  1404. */
  1405. if (test_nonshared_ind(irq_ptr))
  1406. goto rescan;
  1407. if (!qdio_inbound_q_done(q))
  1408. goto rescan;
  1409. return 0;
  1410. rescan:
  1411. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1412. &q->u.in.queue_irq_state))
  1413. return 0;
  1414. else
  1415. return 1;
  1416. }
  1417. EXPORT_SYMBOL(qdio_start_irq);
  1418. /**
  1419. * qdio_get_next_buffers - process input buffers
  1420. * @cdev: associated ccw_device for the qdio subchannel
  1421. * @nr: input queue number
  1422. * @bufnr: first filled buffer number
  1423. * @error: buffers are in error state
  1424. *
  1425. * Return codes
  1426. * < 0 - error
  1427. * = 0 - no new buffers found
  1428. * > 0 - number of processed buffers
  1429. */
  1430. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1431. int *error)
  1432. {
  1433. struct qdio_q *q;
  1434. int start, end;
  1435. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1436. if (!irq_ptr)
  1437. return -ENODEV;
  1438. q = irq_ptr->input_qs[nr];
  1439. /*
  1440. * Cannot rely on automatic sync after interrupt since queues may
  1441. * also be examined without interrupt.
  1442. */
  1443. if (need_siga_sync(q))
  1444. qdio_sync_queues(q);
  1445. /* check the PCI capable outbound queues. */
  1446. qdio_check_outbound_after_thinint(q);
  1447. if (!qdio_inbound_q_moved(q))
  1448. return 0;
  1449. /* Note: upper-layer MUST stop processing immediately here ... */
  1450. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1451. return -EIO;
  1452. start = q->first_to_kick;
  1453. end = q->first_to_check;
  1454. *bufnr = start;
  1455. *error = q->qdio_error;
  1456. /* for the next time */
  1457. q->first_to_kick = end;
  1458. q->qdio_error = 0;
  1459. return sub_buf(end, start);
  1460. }
  1461. EXPORT_SYMBOL(qdio_get_next_buffers);
  1462. /**
  1463. * qdio_stop_irq - disable interrupt processing for the device
  1464. * @cdev: associated ccw_device for the qdio subchannel
  1465. * @nr: input queue number
  1466. *
  1467. * Return codes
  1468. * 0 - interrupts were already disabled
  1469. * 1 - interrupts successfully disabled
  1470. */
  1471. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1472. {
  1473. struct qdio_q *q;
  1474. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1475. if (!irq_ptr)
  1476. return -ENODEV;
  1477. q = irq_ptr->input_qs[nr];
  1478. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1479. &q->u.in.queue_irq_state))
  1480. return 0;
  1481. else
  1482. return 1;
  1483. }
  1484. EXPORT_SYMBOL(qdio_stop_irq);
  1485. /**
  1486. * qdio_pnso_brinfo() - perform network subchannel op #0 - bridge info.
  1487. * @schid: Subchannel ID.
  1488. * @cnc: Boolean Change-Notification Control
  1489. * @response: Response code will be stored at this address
  1490. * @cb: Callback function will be executed for each element
  1491. * of the address list
  1492. * @priv: Pointer passed from the caller to qdio_pnso_brinfo()
  1493. * @type: Type of the address entry passed to the callback
  1494. * @entry: Entry containg the address of the specified type
  1495. * @priv: Pointer to pass to the callback function.
  1496. *
  1497. * Performs "Store-network-bridging-information list" operation and calls
  1498. * the callback function for every entry in the list. If "change-
  1499. * notification-control" is set, further changes in the address list
  1500. * will be reported via the IPA command.
  1501. */
  1502. int qdio_pnso_brinfo(struct subchannel_id schid,
  1503. int cnc, u16 *response,
  1504. void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
  1505. void *entry),
  1506. void *priv)
  1507. {
  1508. struct chsc_pnso_area *rr;
  1509. int rc;
  1510. u32 prev_instance = 0;
  1511. int isfirstblock = 1;
  1512. int i, size, elems;
  1513. rr = (struct chsc_pnso_area *)get_zeroed_page(GFP_KERNEL);
  1514. if (rr == NULL)
  1515. return -ENOMEM;
  1516. do {
  1517. /* on the first iteration, naihdr.resume_token will be zero */
  1518. rc = chsc_pnso_brinfo(schid, rr, rr->naihdr.resume_token, cnc);
  1519. if (rc != 0 && rc != -EBUSY)
  1520. goto out;
  1521. if (rr->response.code != 1) {
  1522. rc = -EIO;
  1523. continue;
  1524. } else
  1525. rc = 0;
  1526. if (cb == NULL)
  1527. continue;
  1528. size = rr->naihdr.naids;
  1529. elems = (rr->response.length -
  1530. sizeof(struct chsc_header) -
  1531. sizeof(struct chsc_brinfo_naihdr)) /
  1532. size;
  1533. if (!isfirstblock && (rr->naihdr.instance != prev_instance)) {
  1534. /* Inform the caller that they need to scrap */
  1535. /* the data that was already reported via cb */
  1536. rc = -EAGAIN;
  1537. break;
  1538. }
  1539. isfirstblock = 0;
  1540. prev_instance = rr->naihdr.instance;
  1541. for (i = 0; i < elems; i++)
  1542. switch (size) {
  1543. case sizeof(struct qdio_brinfo_entry_l3_ipv6):
  1544. (*cb)(priv, l3_ipv6_addr,
  1545. &rr->entries.l3_ipv6[i]);
  1546. break;
  1547. case sizeof(struct qdio_brinfo_entry_l3_ipv4):
  1548. (*cb)(priv, l3_ipv4_addr,
  1549. &rr->entries.l3_ipv4[i]);
  1550. break;
  1551. case sizeof(struct qdio_brinfo_entry_l2):
  1552. (*cb)(priv, l2_addr_lnid,
  1553. &rr->entries.l2[i]);
  1554. break;
  1555. default:
  1556. WARN_ON_ONCE(1);
  1557. rc = -EIO;
  1558. goto out;
  1559. }
  1560. } while (rr->response.code == 0x0107 || /* channel busy */
  1561. (rr->response.code == 1 && /* list stored */
  1562. /* resume token is non-zero => list incomplete */
  1563. (rr->naihdr.resume_token.t1 || rr->naihdr.resume_token.t2)));
  1564. (*response) = rr->response.code;
  1565. out:
  1566. free_page((unsigned long)rr);
  1567. return rc;
  1568. }
  1569. EXPORT_SYMBOL_GPL(qdio_pnso_brinfo);
  1570. static int __init init_QDIO(void)
  1571. {
  1572. int rc;
  1573. rc = qdio_debug_init();
  1574. if (rc)
  1575. return rc;
  1576. rc = qdio_setup_init();
  1577. if (rc)
  1578. goto out_debug;
  1579. rc = tiqdio_allocate_memory();
  1580. if (rc)
  1581. goto out_cache;
  1582. rc = tiqdio_register_thinints();
  1583. if (rc)
  1584. goto out_ti;
  1585. return 0;
  1586. out_ti:
  1587. tiqdio_free_memory();
  1588. out_cache:
  1589. qdio_setup_exit();
  1590. out_debug:
  1591. qdio_debug_exit();
  1592. return rc;
  1593. }
  1594. static void __exit exit_QDIO(void)
  1595. {
  1596. tiqdio_unregister_thinints();
  1597. tiqdio_free_memory();
  1598. qdio_setup_exit();
  1599. qdio_debug_exit();
  1600. }
  1601. module_init(init_QDIO);
  1602. module_exit(exit_QDIO);