ctcm_fsms.h 8.0 KB

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  1. /*
  2. * Copyright IBM Corp. 2001, 2007
  3. * Authors: Fritz Elfert (felfert@millenux.com)
  4. * Peter Tiedemann (ptiedem@de.ibm.com)
  5. * MPC additions :
  6. * Belinda Thompson (belindat@us.ibm.com)
  7. * Andy Richter (richtera@us.ibm.com)
  8. */
  9. #ifndef _CTCM_FSMS_H_
  10. #define _CTCM_FSMS_H_
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/slab.h>
  15. #include <linux/errno.h>
  16. #include <linux/types.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/timer.h>
  19. #include <linux/bitops.h>
  20. #include <linux/signal.h>
  21. #include <linux/string.h>
  22. #include <linux/ip.h>
  23. #include <linux/if_arp.h>
  24. #include <linux/tcp.h>
  25. #include <linux/skbuff.h>
  26. #include <linux/ctype.h>
  27. #include <net/dst.h>
  28. #include <linux/io.h>
  29. #include <asm/ccwdev.h>
  30. #include <asm/ccwgroup.h>
  31. #include <linux/uaccess.h>
  32. #include <asm/idals.h>
  33. #include "fsm.h"
  34. #include "ctcm_main.h"
  35. /*
  36. * Definitions for the channel statemachine(s) for ctc and ctcmpc
  37. *
  38. * To allow better kerntyping, prefix-less definitions for channel states
  39. * and channel events have been replaced :
  40. * ch_event... -> ctc_ch_event...
  41. * CH_EVENT... -> CTC_EVENT...
  42. * ch_state... -> ctc_ch_state...
  43. * CH_STATE... -> CTC_STATE...
  44. */
  45. /*
  46. * Events of the channel statemachine(s) for ctc and ctcmpc
  47. */
  48. enum ctc_ch_events {
  49. /*
  50. * Events, representing return code of
  51. * I/O operations (ccw_device_start, ccw_device_halt et al.)
  52. */
  53. CTC_EVENT_IO_SUCCESS,
  54. CTC_EVENT_IO_EBUSY,
  55. CTC_EVENT_IO_ENODEV,
  56. CTC_EVENT_IO_UNKNOWN,
  57. CTC_EVENT_ATTNBUSY,
  58. CTC_EVENT_ATTN,
  59. CTC_EVENT_BUSY,
  60. /*
  61. * Events, representing unit-check
  62. */
  63. CTC_EVENT_UC_RCRESET,
  64. CTC_EVENT_UC_RSRESET,
  65. CTC_EVENT_UC_TXTIMEOUT,
  66. CTC_EVENT_UC_TXPARITY,
  67. CTC_EVENT_UC_HWFAIL,
  68. CTC_EVENT_UC_RXPARITY,
  69. CTC_EVENT_UC_ZERO,
  70. CTC_EVENT_UC_UNKNOWN,
  71. /*
  72. * Events, representing subchannel-check
  73. */
  74. CTC_EVENT_SC_UNKNOWN,
  75. /*
  76. * Events, representing machine checks
  77. */
  78. CTC_EVENT_MC_FAIL,
  79. CTC_EVENT_MC_GOOD,
  80. /*
  81. * Event, representing normal IRQ
  82. */
  83. CTC_EVENT_IRQ,
  84. CTC_EVENT_FINSTAT,
  85. /*
  86. * Event, representing timer expiry.
  87. */
  88. CTC_EVENT_TIMER,
  89. /*
  90. * Events, representing commands from upper levels.
  91. */
  92. CTC_EVENT_START,
  93. CTC_EVENT_STOP,
  94. CTC_NR_EVENTS,
  95. /*
  96. * additional MPC events
  97. */
  98. CTC_EVENT_SEND_XID = CTC_NR_EVENTS,
  99. CTC_EVENT_RSWEEP_TIMER,
  100. /*
  101. * MUST be always the last element!!
  102. */
  103. CTC_MPC_NR_EVENTS,
  104. };
  105. /*
  106. * States of the channel statemachine(s) for ctc and ctcmpc.
  107. */
  108. enum ctc_ch_states {
  109. /*
  110. * Channel not assigned to any device,
  111. * initial state, direction invalid
  112. */
  113. CTC_STATE_IDLE,
  114. /*
  115. * Channel assigned but not operating
  116. */
  117. CTC_STATE_STOPPED,
  118. CTC_STATE_STARTWAIT,
  119. CTC_STATE_STARTRETRY,
  120. CTC_STATE_SETUPWAIT,
  121. CTC_STATE_RXINIT,
  122. CTC_STATE_TXINIT,
  123. CTC_STATE_RX,
  124. CTC_STATE_TX,
  125. CTC_STATE_RXIDLE,
  126. CTC_STATE_TXIDLE,
  127. CTC_STATE_RXERR,
  128. CTC_STATE_TXERR,
  129. CTC_STATE_TERM,
  130. CTC_STATE_DTERM,
  131. CTC_STATE_NOTOP,
  132. CTC_NR_STATES, /* MUST be the last element of non-expanded states */
  133. /*
  134. * additional MPC states
  135. */
  136. CH_XID0_PENDING = CTC_NR_STATES,
  137. CH_XID0_INPROGRESS,
  138. CH_XID7_PENDING,
  139. CH_XID7_PENDING1,
  140. CH_XID7_PENDING2,
  141. CH_XID7_PENDING3,
  142. CH_XID7_PENDING4,
  143. CTC_MPC_NR_STATES, /* MUST be the last element of expanded mpc states */
  144. };
  145. extern const char *ctc_ch_event_names[];
  146. extern const char *ctc_ch_state_names[];
  147. void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg);
  148. void ctcm_purge_skb_queue(struct sk_buff_head *q);
  149. void fsm_action_nop(fsm_instance *fi, int event, void *arg);
  150. /*
  151. * ----- non-static actions for ctcm channel statemachine -----
  152. *
  153. */
  154. void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg);
  155. /*
  156. * ----- FSM (state/event/action) of the ctcm channel statemachine -----
  157. */
  158. extern const fsm_node ch_fsm[];
  159. extern int ch_fsm_len;
  160. /*
  161. * ----- non-static actions for ctcmpc channel statemachine ----
  162. *
  163. */
  164. /* shared :
  165. void ctcm_chx_txidle(fsm_instance * fi, int event, void *arg);
  166. */
  167. void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg);
  168. /*
  169. * ----- FSM (state/event/action) of the ctcmpc channel statemachine -----
  170. */
  171. extern const fsm_node ctcmpc_ch_fsm[];
  172. extern int mpc_ch_fsm_len;
  173. /*
  174. * Definitions for the device interface statemachine for ctc and mpc
  175. */
  176. /*
  177. * States of the device interface statemachine.
  178. */
  179. enum dev_states {
  180. DEV_STATE_STOPPED,
  181. DEV_STATE_STARTWAIT_RXTX,
  182. DEV_STATE_STARTWAIT_RX,
  183. DEV_STATE_STARTWAIT_TX,
  184. DEV_STATE_STOPWAIT_RXTX,
  185. DEV_STATE_STOPWAIT_RX,
  186. DEV_STATE_STOPWAIT_TX,
  187. DEV_STATE_RUNNING,
  188. /*
  189. * MUST be always the last element!!
  190. */
  191. CTCM_NR_DEV_STATES
  192. };
  193. extern const char *dev_state_names[];
  194. /*
  195. * Events of the device interface statemachine.
  196. * ctcm and ctcmpc
  197. */
  198. enum dev_events {
  199. DEV_EVENT_START,
  200. DEV_EVENT_STOP,
  201. DEV_EVENT_RXUP,
  202. DEV_EVENT_TXUP,
  203. DEV_EVENT_RXDOWN,
  204. DEV_EVENT_TXDOWN,
  205. DEV_EVENT_RESTART,
  206. /*
  207. * MUST be always the last element!!
  208. */
  209. CTCM_NR_DEV_EVENTS
  210. };
  211. extern const char *dev_event_names[];
  212. /*
  213. * Actions for the device interface statemachine.
  214. * ctc and ctcmpc
  215. */
  216. /*
  217. static void dev_action_start(fsm_instance * fi, int event, void *arg);
  218. static void dev_action_stop(fsm_instance * fi, int event, void *arg);
  219. static void dev_action_restart(fsm_instance *fi, int event, void *arg);
  220. static void dev_action_chup(fsm_instance * fi, int event, void *arg);
  221. static void dev_action_chdown(fsm_instance * fi, int event, void *arg);
  222. */
  223. /*
  224. * The (state/event/action) fsm table of the device interface statemachine.
  225. * ctcm and ctcmpc
  226. */
  227. extern const fsm_node dev_fsm[];
  228. extern int dev_fsm_len;
  229. /*
  230. * Definitions for the MPC Group statemachine
  231. */
  232. /*
  233. * MPC Group Station FSM States
  234. State Name When In This State
  235. ====================== =======================================
  236. MPCG_STATE_RESET Initial State When Driver Loaded
  237. We receive and send NOTHING
  238. MPCG_STATE_INOP INOP Received.
  239. Group level non-recoverable error
  240. MPCG_STATE_READY XID exchanges for at least 1 write and
  241. 1 read channel have completed.
  242. Group is ready for data transfer.
  243. States from ctc_mpc_alloc_channel
  244. ==============================================================
  245. MPCG_STATE_XID2INITW Awaiting XID2(0) Initiation
  246. ATTN from other side will start
  247. XID negotiations.
  248. Y-side protocol only.
  249. MPCG_STATE_XID2INITX XID2(0) negotiations are in progress.
  250. At least 1, but not all, XID2(0)'s
  251. have been received from partner.
  252. MPCG_STATE_XID7INITW XID2(0) complete
  253. No XID2(7)'s have yet been received.
  254. XID2(7) negotiations pending.
  255. MPCG_STATE_XID7INITX XID2(7) negotiations in progress.
  256. At least 1, but not all, XID2(7)'s
  257. have been received from partner.
  258. MPCG_STATE_XID7INITF XID2(7) negotiations complete.
  259. Transitioning to READY.
  260. MPCG_STATE_READY Ready for Data Transfer.
  261. States from ctc_mpc_establish_connectivity call
  262. ==============================================================
  263. MPCG_STATE_XID0IOWAIT Initiating XID2(0) negotiations.
  264. X-side protocol only.
  265. ATTN-BUSY from other side will convert
  266. this to Y-side protocol and the
  267. ctc_mpc_alloc_channel flow will begin.
  268. MPCG_STATE_XID0IOWAIX XID2(0) negotiations are in progress.
  269. At least 1, but not all, XID2(0)'s
  270. have been received from partner.
  271. MPCG_STATE_XID7INITI XID2(0) complete
  272. No XID2(7)'s have yet been received.
  273. XID2(7) negotiations pending.
  274. MPCG_STATE_XID7INITZ XID2(7) negotiations in progress.
  275. At least 1, but not all, XID2(7)'s
  276. have been received from partner.
  277. MPCG_STATE_XID7INITF XID2(7) negotiations complete.
  278. Transitioning to READY.
  279. MPCG_STATE_READY Ready for Data Transfer.
  280. */
  281. enum mpcg_events {
  282. MPCG_EVENT_INOP,
  283. MPCG_EVENT_DISCONC,
  284. MPCG_EVENT_XID0DO,
  285. MPCG_EVENT_XID2,
  286. MPCG_EVENT_XID2DONE,
  287. MPCG_EVENT_XID7DONE,
  288. MPCG_EVENT_TIMER,
  289. MPCG_EVENT_DOIO,
  290. MPCG_NR_EVENTS,
  291. };
  292. enum mpcg_states {
  293. MPCG_STATE_RESET,
  294. MPCG_STATE_INOP,
  295. MPCG_STATE_XID2INITW,
  296. MPCG_STATE_XID2INITX,
  297. MPCG_STATE_XID7INITW,
  298. MPCG_STATE_XID7INITX,
  299. MPCG_STATE_XID0IOWAIT,
  300. MPCG_STATE_XID0IOWAIX,
  301. MPCG_STATE_XID7INITI,
  302. MPCG_STATE_XID7INITZ,
  303. MPCG_STATE_XID7INITF,
  304. MPCG_STATE_FLOWC,
  305. MPCG_STATE_READY,
  306. MPCG_NR_STATES,
  307. };
  308. #endif
  309. /* --- This is the END my friend --- */