aic7770.c 9.6 KB

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  1. /*
  2. * Product specific probe and attach routines for:
  3. * 27/284X and aic7770 motherboard SCSI controllers
  4. *
  5. * Copyright (c) 1994-1998, 2000, 2001 Justin T. Gibbs.
  6. * All rights reserved.
  7. *
  8. * Redistribution and use in source and binary forms, with or without
  9. * modification, are permitted provided that the following conditions
  10. * are met:
  11. * 1. Redistributions of source code must retain the above copyright
  12. * notice, this list of conditions, and the following disclaimer,
  13. * without modification.
  14. * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  15. * substantially similar to the "NO WARRANTY" disclaimer below
  16. * ("Disclaimer") and any redistribution must be conditioned upon
  17. * including a substantially similar Disclaimer requirement for further
  18. * binary redistribution.
  19. * 3. Neither the names of the above-listed copyright holders nor the names
  20. * of any contributors may be used to endorse or promote products derived
  21. * from this software without specific prior written permission.
  22. *
  23. * Alternatively, this software may be distributed under the terms of the
  24. * GNU General Public License ("GPL") version 2 as published by the Free
  25. * Software Foundation.
  26. *
  27. * NO WARRANTY
  28. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  29. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  30. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  31. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  32. * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  33. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  34. * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  36. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  37. * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38. * POSSIBILITY OF SUCH DAMAGES.
  39. *
  40. * $Id: //depot/aic7xxx/aic7xxx/aic7770.c#32 $
  41. *
  42. * $FreeBSD$
  43. */
  44. #ifdef __linux__
  45. #include "aic7xxx_osm.h"
  46. #include "aic7xxx_inline.h"
  47. #include "aic7xxx_93cx6.h"
  48. #else
  49. #include <dev/aic7xxx/aic7xxx_osm.h>
  50. #include <dev/aic7xxx/aic7xxx_inline.h>
  51. #include <dev/aic7xxx/aic7xxx_93cx6.h>
  52. #endif
  53. #define ID_AIC7770 0x04907770
  54. #define ID_AHA_274x 0x04907771
  55. #define ID_AHA_284xB 0x04907756 /* BIOS enabled */
  56. #define ID_AHA_284x 0x04907757 /* BIOS disabled*/
  57. #define ID_OLV_274x 0x04907782 /* Olivetti OEM */
  58. #define ID_OLV_274xD 0x04907783 /* Olivetti OEM (Differential) */
  59. static int aic7770_chip_init(struct ahc_softc *ahc);
  60. static int aha2840_load_seeprom(struct ahc_softc *ahc);
  61. static ahc_device_setup_t ahc_aic7770_VL_setup;
  62. static ahc_device_setup_t ahc_aic7770_EISA_setup;
  63. static ahc_device_setup_t ahc_aic7770_setup;
  64. struct aic7770_identity aic7770_ident_table[] =
  65. {
  66. {
  67. ID_AHA_274x,
  68. 0xFFFFFFFF,
  69. "Adaptec 274X SCSI adapter",
  70. ahc_aic7770_EISA_setup
  71. },
  72. {
  73. ID_AHA_284xB,
  74. 0xFFFFFFFE,
  75. "Adaptec 284X SCSI adapter",
  76. ahc_aic7770_VL_setup
  77. },
  78. {
  79. ID_AHA_284x,
  80. 0xFFFFFFFE,
  81. "Adaptec 284X SCSI adapter (BIOS Disabled)",
  82. ahc_aic7770_VL_setup
  83. },
  84. {
  85. ID_OLV_274x,
  86. 0xFFFFFFFF,
  87. "Adaptec (Olivetti OEM) 274X SCSI adapter",
  88. ahc_aic7770_EISA_setup
  89. },
  90. {
  91. ID_OLV_274xD,
  92. 0xFFFFFFFF,
  93. "Adaptec (Olivetti OEM) 274X Differential SCSI adapter",
  94. ahc_aic7770_EISA_setup
  95. },
  96. /* Generic chip probes for devices we don't know 'exactly' */
  97. {
  98. ID_AIC7770,
  99. 0xFFFFFFFF,
  100. "Adaptec aic7770 SCSI adapter",
  101. ahc_aic7770_EISA_setup
  102. }
  103. };
  104. const int ahc_num_aic7770_devs = ARRAY_SIZE(aic7770_ident_table);
  105. struct aic7770_identity *
  106. aic7770_find_device(uint32_t id)
  107. {
  108. struct aic7770_identity *entry;
  109. int i;
  110. for (i = 0; i < ahc_num_aic7770_devs; i++) {
  111. entry = &aic7770_ident_table[i];
  112. if (entry->full_id == (id & entry->id_mask))
  113. return (entry);
  114. }
  115. return (NULL);
  116. }
  117. int
  118. aic7770_config(struct ahc_softc *ahc, struct aic7770_identity *entry, u_int io)
  119. {
  120. int error;
  121. int have_seeprom;
  122. u_int hostconf;
  123. u_int irq;
  124. u_int intdef;
  125. error = entry->setup(ahc);
  126. have_seeprom = 0;
  127. if (error != 0)
  128. return (error);
  129. error = aic7770_map_registers(ahc, io);
  130. if (error != 0)
  131. return (error);
  132. /*
  133. * Before we continue probing the card, ensure that
  134. * its interrupts are *disabled*. We don't want
  135. * a misstep to hang the machine in an interrupt
  136. * storm.
  137. */
  138. ahc_intr_enable(ahc, FALSE);
  139. ahc->description = entry->name;
  140. error = ahc_softc_init(ahc);
  141. if (error != 0)
  142. return (error);
  143. ahc->bus_chip_init = aic7770_chip_init;
  144. error = ahc_reset(ahc, /*reinit*/FALSE);
  145. if (error != 0)
  146. return (error);
  147. /* Make sure we have a valid interrupt vector */
  148. intdef = ahc_inb(ahc, INTDEF);
  149. irq = intdef & VECTOR;
  150. switch (irq) {
  151. case 9:
  152. case 10:
  153. case 11:
  154. case 12:
  155. case 14:
  156. case 15:
  157. break;
  158. default:
  159. printk("aic7770_config: invalid irq setting %d\n", intdef);
  160. return (ENXIO);
  161. }
  162. if ((intdef & EDGE_TRIG) != 0)
  163. ahc->flags |= AHC_EDGE_INTERRUPT;
  164. switch (ahc->chip & (AHC_EISA|AHC_VL)) {
  165. case AHC_EISA:
  166. {
  167. u_int biosctrl;
  168. u_int scsiconf;
  169. u_int scsiconf1;
  170. biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL);
  171. scsiconf = ahc_inb(ahc, SCSICONF);
  172. scsiconf1 = ahc_inb(ahc, SCSICONF + 1);
  173. /* Get the primary channel information */
  174. if ((biosctrl & CHANNEL_B_PRIMARY) != 0)
  175. ahc->flags |= 1;
  176. if ((biosctrl & BIOSMODE) == BIOSDISABLED) {
  177. ahc->flags |= AHC_USEDEFAULTS;
  178. } else {
  179. if ((ahc->features & AHC_WIDE) != 0) {
  180. ahc->our_id = scsiconf1 & HWSCSIID;
  181. if (scsiconf & TERM_ENB)
  182. ahc->flags |= AHC_TERM_ENB_A;
  183. } else {
  184. ahc->our_id = scsiconf & HSCSIID;
  185. ahc->our_id_b = scsiconf1 & HSCSIID;
  186. if (scsiconf & TERM_ENB)
  187. ahc->flags |= AHC_TERM_ENB_A;
  188. if (scsiconf1 & TERM_ENB)
  189. ahc->flags |= AHC_TERM_ENB_B;
  190. }
  191. }
  192. if ((ahc_inb(ahc, HA_274_BIOSGLOBAL) & HA_274_EXTENDED_TRANS))
  193. ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B;
  194. break;
  195. }
  196. case AHC_VL:
  197. {
  198. have_seeprom = aha2840_load_seeprom(ahc);
  199. break;
  200. }
  201. default:
  202. break;
  203. }
  204. if (have_seeprom == 0) {
  205. kfree(ahc->seep_config);
  206. ahc->seep_config = NULL;
  207. }
  208. /*
  209. * Ensure autoflush is enabled
  210. */
  211. ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS);
  212. /* Setup the FIFO threshold and the bus off time */
  213. hostconf = ahc_inb(ahc, HOSTCONF);
  214. ahc_outb(ahc, BUSSPD, hostconf & DFTHRSH);
  215. ahc_outb(ahc, BUSTIME, (hostconf << 2) & BOFF);
  216. ahc->bus_softc.aic7770_softc.busspd = hostconf & DFTHRSH;
  217. ahc->bus_softc.aic7770_softc.bustime = (hostconf << 2) & BOFF;
  218. /*
  219. * Generic aic7xxx initialization.
  220. */
  221. error = ahc_init(ahc);
  222. if (error != 0)
  223. return (error);
  224. error = aic7770_map_int(ahc, irq);
  225. if (error != 0)
  226. return (error);
  227. ahc->init_level++;
  228. /*
  229. * Enable the board's BUS drivers
  230. */
  231. ahc_outb(ahc, BCTL, ENABLE);
  232. return (0);
  233. }
  234. static int
  235. aic7770_chip_init(struct ahc_softc *ahc)
  236. {
  237. ahc_outb(ahc, BUSSPD, ahc->bus_softc.aic7770_softc.busspd);
  238. ahc_outb(ahc, BUSTIME, ahc->bus_softc.aic7770_softc.bustime);
  239. ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS);
  240. ahc_outb(ahc, BCTL, ENABLE);
  241. return (ahc_chip_init(ahc));
  242. }
  243. /*
  244. * Read the 284x SEEPROM.
  245. */
  246. static int
  247. aha2840_load_seeprom(struct ahc_softc *ahc)
  248. {
  249. struct seeprom_descriptor sd;
  250. struct seeprom_config *sc;
  251. int have_seeprom;
  252. uint8_t scsi_conf;
  253. sd.sd_ahc = ahc;
  254. sd.sd_control_offset = SEECTL_2840;
  255. sd.sd_status_offset = STATUS_2840;
  256. sd.sd_dataout_offset = STATUS_2840;
  257. sd.sd_chip = C46;
  258. sd.sd_MS = 0;
  259. sd.sd_RDY = EEPROM_TF;
  260. sd.sd_CS = CS_2840;
  261. sd.sd_CK = CK_2840;
  262. sd.sd_DO = DO_2840;
  263. sd.sd_DI = DI_2840;
  264. sc = ahc->seep_config;
  265. if (bootverbose)
  266. printk("%s: Reading SEEPROM...", ahc_name(ahc));
  267. have_seeprom = ahc_read_seeprom(&sd, (uint16_t *)sc,
  268. /*start_addr*/0, sizeof(*sc)/2);
  269. if (have_seeprom) {
  270. if (ahc_verify_cksum(sc) == 0) {
  271. if(bootverbose)
  272. printk ("checksum error\n");
  273. have_seeprom = 0;
  274. } else if (bootverbose) {
  275. printk("done.\n");
  276. }
  277. }
  278. if (!have_seeprom) {
  279. if (bootverbose)
  280. printk("%s: No SEEPROM available\n", ahc_name(ahc));
  281. ahc->flags |= AHC_USEDEFAULTS;
  282. } else {
  283. /*
  284. * Put the data we've collected down into SRAM
  285. * where ahc_init will find it.
  286. */
  287. int i;
  288. int max_targ;
  289. uint16_t discenable;
  290. max_targ = (ahc->features & AHC_WIDE) != 0 ? 16 : 8;
  291. discenable = 0;
  292. for (i = 0; i < max_targ; i++){
  293. uint8_t target_settings;
  294. target_settings = (sc->device_flags[i] & CFXFER) << 4;
  295. if (sc->device_flags[i] & CFSYNCH)
  296. target_settings |= SOFS;
  297. if (sc->device_flags[i] & CFWIDEB)
  298. target_settings |= WIDEXFER;
  299. if (sc->device_flags[i] & CFDISC)
  300. discenable |= (0x01 << i);
  301. ahc_outb(ahc, TARG_SCSIRATE + i, target_settings);
  302. }
  303. ahc_outb(ahc, DISC_DSB, ~(discenable & 0xff));
  304. ahc_outb(ahc, DISC_DSB + 1, ~((discenable >> 8) & 0xff));
  305. ahc->our_id = sc->brtime_id & CFSCSIID;
  306. scsi_conf = (ahc->our_id & 0x7);
  307. if (sc->adapter_control & CFSPARITY)
  308. scsi_conf |= ENSPCHK;
  309. if (sc->adapter_control & CFRESETB)
  310. scsi_conf |= RESET_SCSI;
  311. if (sc->bios_control & CF284XEXTEND)
  312. ahc->flags |= AHC_EXTENDED_TRANS_A;
  313. /* Set SCSICONF info */
  314. ahc_outb(ahc, SCSICONF, scsi_conf);
  315. if (sc->adapter_control & CF284XSTERM)
  316. ahc->flags |= AHC_TERM_ENB_A;
  317. }
  318. return (have_seeprom);
  319. }
  320. static int
  321. ahc_aic7770_VL_setup(struct ahc_softc *ahc)
  322. {
  323. int error;
  324. error = ahc_aic7770_setup(ahc);
  325. ahc->chip |= AHC_VL;
  326. return (error);
  327. }
  328. static int
  329. ahc_aic7770_EISA_setup(struct ahc_softc *ahc)
  330. {
  331. int error;
  332. error = ahc_aic7770_setup(ahc);
  333. ahc->chip |= AHC_EISA;
  334. return (error);
  335. }
  336. static int
  337. ahc_aic7770_setup(struct ahc_softc *ahc)
  338. {
  339. ahc->channel = 'A';
  340. ahc->channel_b = 'B';
  341. ahc->chip = AHC_AIC7770;
  342. ahc->features = AHC_AIC7770_FE;
  343. ahc->bugs |= AHC_TMODE_WIDEODD_BUG;
  344. ahc->flags |= AHC_PAGESCBS;
  345. ahc->instruction_ram_size = 448;
  346. return (0);
  347. }