dtc.h 2.1 KB

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  1. /*
  2. * DTC controller, taken from T128 driver by...
  3. * Copyright 1993, Drew Eckhardt
  4. * Visionary Computing
  5. * (Unix and Linux consulting and custom programming)
  6. * drew@colorado.edu
  7. * +1 (303) 440-4894
  8. */
  9. #ifndef DTC3280_H
  10. #define DTC3280_H
  11. #define DTCDEBUG 0
  12. #define DTCDEBUG_INIT 0x1
  13. #define DTCDEBUG_TRANSFER 0x2
  14. #ifndef CMD_PER_LUN
  15. #define CMD_PER_LUN 2
  16. #endif
  17. #ifndef CAN_QUEUE
  18. #define CAN_QUEUE 32
  19. #endif
  20. #define NCR5380_implementation_fields \
  21. void __iomem *base
  22. #define NCR5380_local_declare() \
  23. void __iomem *base
  24. #define NCR5380_setup(instance) \
  25. base = ((struct NCR5380_hostdata *)(instance)->hostdata)->base
  26. #define DTC_address(reg) (base + DTC_5380_OFFSET + reg)
  27. #define dbNCR5380_read(reg) \
  28. (rval=readb(DTC_address(reg)), \
  29. (((unsigned char) printk("DTC : read register %d at addr %p is: %02x\n"\
  30. , (reg), DTC_address(reg), rval)), rval ) )
  31. #define dbNCR5380_write(reg, value) do { \
  32. printk("DTC : write %02x to register %d at address %p\n", \
  33. (value), (reg), DTC_address(reg)); \
  34. writeb(value, DTC_address(reg));} while(0)
  35. #if !(DTCDEBUG & DTCDEBUG_TRANSFER)
  36. #define NCR5380_read(reg) (readb(DTC_address(reg)))
  37. #define NCR5380_write(reg, value) (writeb(value, DTC_address(reg)))
  38. #else
  39. #define NCR5380_read(reg) (readb(DTC_address(reg)))
  40. #define xNCR5380_read(reg) \
  41. (((unsigned char) printk("DTC : read register %d at address %p\n"\
  42. , (reg), DTC_address(reg))), readb(DTC_address(reg)))
  43. #define NCR5380_write(reg, value) do { \
  44. printk("DTC : write %02x to register %d at address %p\n", \
  45. (value), (reg), DTC_address(reg)); \
  46. writeb(value, DTC_address(reg));} while(0)
  47. #endif
  48. #define NCR5380_intr dtc_intr
  49. #define NCR5380_queue_command dtc_queue_command
  50. #define NCR5380_abort dtc_abort
  51. #define NCR5380_bus_reset dtc_bus_reset
  52. #define NCR5380_info dtc_info
  53. #define NCR5380_show_info dtc_show_info
  54. #define NCR5380_write_info dtc_write_info
  55. /* 15 12 11 10
  56. 1001 1100 0000 0000 */
  57. #define DTC_IRQS 0x9c00
  58. #endif /* DTC3280_H */