qla_iocb.c 75 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2014 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_target.h"
  9. #include <linux/blkdev.h>
  10. #include <linux/delay.h>
  11. #include <scsi/scsi_tcq.h>
  12. static void qla25xx_set_que(srb_t *, struct rsp_que **);
  13. /**
  14. * qla2x00_get_cmd_direction() - Determine control_flag data direction.
  15. * @cmd: SCSI command
  16. *
  17. * Returns the proper CF_* direction based on CDB.
  18. */
  19. static inline uint16_t
  20. qla2x00_get_cmd_direction(srb_t *sp)
  21. {
  22. uint16_t cflags;
  23. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  24. struct scsi_qla_host *vha = sp->fcport->vha;
  25. cflags = 0;
  26. /* Set transfer direction */
  27. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  28. cflags = CF_WRITE;
  29. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  30. vha->qla_stats.output_requests++;
  31. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  32. cflags = CF_READ;
  33. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  34. vha->qla_stats.input_requests++;
  35. }
  36. return (cflags);
  37. }
  38. /**
  39. * qla2x00_calc_iocbs_32() - Determine number of Command Type 2 and
  40. * Continuation Type 0 IOCBs to allocate.
  41. *
  42. * @dsds: number of data segment decriptors needed
  43. *
  44. * Returns the number of IOCB entries needed to store @dsds.
  45. */
  46. uint16_t
  47. qla2x00_calc_iocbs_32(uint16_t dsds)
  48. {
  49. uint16_t iocbs;
  50. iocbs = 1;
  51. if (dsds > 3) {
  52. iocbs += (dsds - 3) / 7;
  53. if ((dsds - 3) % 7)
  54. iocbs++;
  55. }
  56. return (iocbs);
  57. }
  58. /**
  59. * qla2x00_calc_iocbs_64() - Determine number of Command Type 3 and
  60. * Continuation Type 1 IOCBs to allocate.
  61. *
  62. * @dsds: number of data segment decriptors needed
  63. *
  64. * Returns the number of IOCB entries needed to store @dsds.
  65. */
  66. uint16_t
  67. qla2x00_calc_iocbs_64(uint16_t dsds)
  68. {
  69. uint16_t iocbs;
  70. iocbs = 1;
  71. if (dsds > 2) {
  72. iocbs += (dsds - 2) / 5;
  73. if ((dsds - 2) % 5)
  74. iocbs++;
  75. }
  76. return (iocbs);
  77. }
  78. /**
  79. * qla2x00_prep_cont_type0_iocb() - Initialize a Continuation Type 0 IOCB.
  80. * @ha: HA context
  81. *
  82. * Returns a pointer to the Continuation Type 0 IOCB packet.
  83. */
  84. static inline cont_entry_t *
  85. qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha)
  86. {
  87. cont_entry_t *cont_pkt;
  88. struct req_que *req = vha->req;
  89. /* Adjust ring index. */
  90. req->ring_index++;
  91. if (req->ring_index == req->length) {
  92. req->ring_index = 0;
  93. req->ring_ptr = req->ring;
  94. } else {
  95. req->ring_ptr++;
  96. }
  97. cont_pkt = (cont_entry_t *)req->ring_ptr;
  98. /* Load packet defaults. */
  99. *((uint32_t *)(&cont_pkt->entry_type)) = cpu_to_le32(CONTINUE_TYPE);
  100. return (cont_pkt);
  101. }
  102. /**
  103. * qla2x00_prep_cont_type1_iocb() - Initialize a Continuation Type 1 IOCB.
  104. * @ha: HA context
  105. *
  106. * Returns a pointer to the continuation type 1 IOCB packet.
  107. */
  108. static inline cont_a64_entry_t *
  109. qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req)
  110. {
  111. cont_a64_entry_t *cont_pkt;
  112. /* Adjust ring index. */
  113. req->ring_index++;
  114. if (req->ring_index == req->length) {
  115. req->ring_index = 0;
  116. req->ring_ptr = req->ring;
  117. } else {
  118. req->ring_ptr++;
  119. }
  120. cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
  121. /* Load packet defaults. */
  122. *((uint32_t *)(&cont_pkt->entry_type)) = IS_QLAFX00(vha->hw) ?
  123. cpu_to_le32(CONTINUE_A64_TYPE_FX00) :
  124. cpu_to_le32(CONTINUE_A64_TYPE);
  125. return (cont_pkt);
  126. }
  127. static inline int
  128. qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
  129. {
  130. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  131. uint8_t guard = scsi_host_get_guard(cmd->device->host);
  132. /* We always use DIFF Bundling for best performance */
  133. *fw_prot_opts = 0;
  134. /* Translate SCSI opcode to a protection opcode */
  135. switch (scsi_get_prot_op(cmd)) {
  136. case SCSI_PROT_READ_STRIP:
  137. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  138. break;
  139. case SCSI_PROT_WRITE_INSERT:
  140. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  141. break;
  142. case SCSI_PROT_READ_INSERT:
  143. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  144. break;
  145. case SCSI_PROT_WRITE_STRIP:
  146. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  147. break;
  148. case SCSI_PROT_READ_PASS:
  149. case SCSI_PROT_WRITE_PASS:
  150. if (guard & SHOST_DIX_GUARD_IP)
  151. *fw_prot_opts |= PO_MODE_DIF_TCP_CKSUM;
  152. else
  153. *fw_prot_opts |= PO_MODE_DIF_PASS;
  154. break;
  155. default: /* Normal Request */
  156. *fw_prot_opts |= PO_MODE_DIF_PASS;
  157. break;
  158. }
  159. return scsi_prot_sg_count(cmd);
  160. }
  161. /*
  162. * qla2x00_build_scsi_iocbs_32() - Build IOCB command utilizing 32bit
  163. * capable IOCB types.
  164. *
  165. * @sp: SRB command to process
  166. * @cmd_pkt: Command type 2 IOCB
  167. * @tot_dsds: Total number of segments to transfer
  168. */
  169. void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
  170. uint16_t tot_dsds)
  171. {
  172. uint16_t avail_dsds;
  173. uint32_t *cur_dsd;
  174. scsi_qla_host_t *vha;
  175. struct scsi_cmnd *cmd;
  176. struct scatterlist *sg;
  177. int i;
  178. cmd = GET_CMD_SP(sp);
  179. /* Update entry type to indicate Command Type 2 IOCB */
  180. *((uint32_t *)(&cmd_pkt->entry_type)) =
  181. cpu_to_le32(COMMAND_TYPE);
  182. /* No data transfer */
  183. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  184. cmd_pkt->byte_count = cpu_to_le32(0);
  185. return;
  186. }
  187. vha = sp->fcport->vha;
  188. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  189. /* Three DSDs are available in the Command Type 2 IOCB */
  190. avail_dsds = 3;
  191. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  192. /* Load data segments */
  193. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  194. cont_entry_t *cont_pkt;
  195. /* Allocate additional continuation packets? */
  196. if (avail_dsds == 0) {
  197. /*
  198. * Seven DSDs are available in the Continuation
  199. * Type 0 IOCB.
  200. */
  201. cont_pkt = qla2x00_prep_cont_type0_iocb(vha);
  202. cur_dsd = (uint32_t *)&cont_pkt->dseg_0_address;
  203. avail_dsds = 7;
  204. }
  205. *cur_dsd++ = cpu_to_le32(sg_dma_address(sg));
  206. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  207. avail_dsds--;
  208. }
  209. }
  210. /**
  211. * qla2x00_build_scsi_iocbs_64() - Build IOCB command utilizing 64bit
  212. * capable IOCB types.
  213. *
  214. * @sp: SRB command to process
  215. * @cmd_pkt: Command type 3 IOCB
  216. * @tot_dsds: Total number of segments to transfer
  217. */
  218. void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
  219. uint16_t tot_dsds)
  220. {
  221. uint16_t avail_dsds;
  222. uint32_t *cur_dsd;
  223. scsi_qla_host_t *vha;
  224. struct scsi_cmnd *cmd;
  225. struct scatterlist *sg;
  226. int i;
  227. cmd = GET_CMD_SP(sp);
  228. /* Update entry type to indicate Command Type 3 IOCB */
  229. *((uint32_t *)(&cmd_pkt->entry_type)) = cpu_to_le32(COMMAND_A64_TYPE);
  230. /* No data transfer */
  231. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  232. cmd_pkt->byte_count = cpu_to_le32(0);
  233. return;
  234. }
  235. vha = sp->fcport->vha;
  236. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  237. /* Two DSDs are available in the Command Type 3 IOCB */
  238. avail_dsds = 2;
  239. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  240. /* Load data segments */
  241. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  242. dma_addr_t sle_dma;
  243. cont_a64_entry_t *cont_pkt;
  244. /* Allocate additional continuation packets? */
  245. if (avail_dsds == 0) {
  246. /*
  247. * Five DSDs are available in the Continuation
  248. * Type 1 IOCB.
  249. */
  250. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  251. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  252. avail_dsds = 5;
  253. }
  254. sle_dma = sg_dma_address(sg);
  255. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  256. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  257. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  258. avail_dsds--;
  259. }
  260. }
  261. /**
  262. * qla2x00_start_scsi() - Send a SCSI command to the ISP
  263. * @sp: command to send to the ISP
  264. *
  265. * Returns non-zero if a failure occurred, else zero.
  266. */
  267. int
  268. qla2x00_start_scsi(srb_t *sp)
  269. {
  270. int nseg;
  271. unsigned long flags;
  272. scsi_qla_host_t *vha;
  273. struct scsi_cmnd *cmd;
  274. uint32_t *clr_ptr;
  275. uint32_t index;
  276. uint32_t handle;
  277. cmd_entry_t *cmd_pkt;
  278. uint16_t cnt;
  279. uint16_t req_cnt;
  280. uint16_t tot_dsds;
  281. struct device_reg_2xxx __iomem *reg;
  282. struct qla_hw_data *ha;
  283. struct req_que *req;
  284. struct rsp_que *rsp;
  285. /* Setup device pointers. */
  286. vha = sp->fcport->vha;
  287. ha = vha->hw;
  288. reg = &ha->iobase->isp;
  289. cmd = GET_CMD_SP(sp);
  290. req = ha->req_q_map[0];
  291. rsp = ha->rsp_q_map[0];
  292. /* So we know we haven't pci_map'ed anything yet */
  293. tot_dsds = 0;
  294. /* Send marker if required */
  295. if (vha->marker_needed != 0) {
  296. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  297. QLA_SUCCESS) {
  298. return (QLA_FUNCTION_FAILED);
  299. }
  300. vha->marker_needed = 0;
  301. }
  302. /* Acquire ring specific lock */
  303. spin_lock_irqsave(&ha->hardware_lock, flags);
  304. /* Check for room in outstanding command list. */
  305. handle = req->current_outstanding_cmd;
  306. for (index = 1; index < req->num_outstanding_cmds; index++) {
  307. handle++;
  308. if (handle == req->num_outstanding_cmds)
  309. handle = 1;
  310. if (!req->outstanding_cmds[handle])
  311. break;
  312. }
  313. if (index == req->num_outstanding_cmds)
  314. goto queuing_error;
  315. /* Map the sg table so we have an accurate count of sg entries needed */
  316. if (scsi_sg_count(cmd)) {
  317. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  318. scsi_sg_count(cmd), cmd->sc_data_direction);
  319. if (unlikely(!nseg))
  320. goto queuing_error;
  321. } else
  322. nseg = 0;
  323. tot_dsds = nseg;
  324. /* Calculate the number of request entries needed. */
  325. req_cnt = ha->isp_ops->calc_req_entries(tot_dsds);
  326. if (req->cnt < (req_cnt + 2)) {
  327. cnt = RD_REG_WORD_RELAXED(ISP_REQ_Q_OUT(ha, reg));
  328. if (req->ring_index < cnt)
  329. req->cnt = cnt - req->ring_index;
  330. else
  331. req->cnt = req->length -
  332. (req->ring_index - cnt);
  333. /* If still no head room then bail out */
  334. if (req->cnt < (req_cnt + 2))
  335. goto queuing_error;
  336. }
  337. /* Build command packet */
  338. req->current_outstanding_cmd = handle;
  339. req->outstanding_cmds[handle] = sp;
  340. sp->handle = handle;
  341. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  342. req->cnt -= req_cnt;
  343. cmd_pkt = (cmd_entry_t *)req->ring_ptr;
  344. cmd_pkt->handle = handle;
  345. /* Zero out remaining portion of packet. */
  346. clr_ptr = (uint32_t *)cmd_pkt + 2;
  347. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  348. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  349. /* Set target ID and LUN number*/
  350. SET_TARGET_ID(ha, cmd_pkt->target, sp->fcport->loop_id);
  351. cmd_pkt->lun = cpu_to_le16(cmd->device->lun);
  352. cmd_pkt->control_flags = cpu_to_le16(CF_SIMPLE_TAG);
  353. /* Load SCSI command packet. */
  354. memcpy(cmd_pkt->scsi_cdb, cmd->cmnd, cmd->cmd_len);
  355. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  356. /* Build IOCB segments */
  357. ha->isp_ops->build_iocbs(sp, cmd_pkt, tot_dsds);
  358. /* Set total data segment count. */
  359. cmd_pkt->entry_count = (uint8_t)req_cnt;
  360. wmb();
  361. /* Adjust ring index. */
  362. req->ring_index++;
  363. if (req->ring_index == req->length) {
  364. req->ring_index = 0;
  365. req->ring_ptr = req->ring;
  366. } else
  367. req->ring_ptr++;
  368. sp->flags |= SRB_DMA_VALID;
  369. /* Set chip new ring index. */
  370. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), req->ring_index);
  371. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
  372. /* Manage unprocessed RIO/ZIO commands in response queue. */
  373. if (vha->flags.process_response_queue &&
  374. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  375. qla2x00_process_response_queue(rsp);
  376. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  377. return (QLA_SUCCESS);
  378. queuing_error:
  379. if (tot_dsds)
  380. scsi_dma_unmap(cmd);
  381. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  382. return (QLA_FUNCTION_FAILED);
  383. }
  384. /**
  385. * qla2x00_start_iocbs() - Execute the IOCB command
  386. */
  387. void
  388. qla2x00_start_iocbs(struct scsi_qla_host *vha, struct req_que *req)
  389. {
  390. struct qla_hw_data *ha = vha->hw;
  391. device_reg_t *reg = ISP_QUE_REG(ha, req->id);
  392. if (IS_P3P_TYPE(ha)) {
  393. qla82xx_start_iocbs(vha);
  394. } else {
  395. /* Adjust ring index. */
  396. req->ring_index++;
  397. if (req->ring_index == req->length) {
  398. req->ring_index = 0;
  399. req->ring_ptr = req->ring;
  400. } else
  401. req->ring_ptr++;
  402. /* Set chip new ring index. */
  403. if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
  404. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  405. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  406. } else if (IS_QLAFX00(ha)) {
  407. WRT_REG_DWORD(&reg->ispfx00.req_q_in, req->ring_index);
  408. RD_REG_DWORD_RELAXED(&reg->ispfx00.req_q_in);
  409. QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
  410. } else if (IS_FWI2_CAPABLE(ha)) {
  411. WRT_REG_DWORD(&reg->isp24.req_q_in, req->ring_index);
  412. RD_REG_DWORD_RELAXED(&reg->isp24.req_q_in);
  413. } else {
  414. WRT_REG_WORD(ISP_REQ_Q_IN(ha, &reg->isp),
  415. req->ring_index);
  416. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, &reg->isp));
  417. }
  418. }
  419. }
  420. /**
  421. * qla2x00_marker() - Send a marker IOCB to the firmware.
  422. * @ha: HA context
  423. * @loop_id: loop ID
  424. * @lun: LUN
  425. * @type: marker modifier
  426. *
  427. * Can be called from both normal and interrupt context.
  428. *
  429. * Returns non-zero if a failure occurred, else zero.
  430. */
  431. static int
  432. __qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  433. struct rsp_que *rsp, uint16_t loop_id,
  434. uint64_t lun, uint8_t type)
  435. {
  436. mrk_entry_t *mrk;
  437. struct mrk_entry_24xx *mrk24 = NULL;
  438. struct qla_hw_data *ha = vha->hw;
  439. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  440. req = ha->req_q_map[0];
  441. mrk = (mrk_entry_t *)qla2x00_alloc_iocbs(vha, NULL);
  442. if (mrk == NULL) {
  443. ql_log(ql_log_warn, base_vha, 0x3026,
  444. "Failed to allocate Marker IOCB.\n");
  445. return (QLA_FUNCTION_FAILED);
  446. }
  447. mrk->entry_type = MARKER_TYPE;
  448. mrk->modifier = type;
  449. if (type != MK_SYNC_ALL) {
  450. if (IS_FWI2_CAPABLE(ha)) {
  451. mrk24 = (struct mrk_entry_24xx *) mrk;
  452. mrk24->nport_handle = cpu_to_le16(loop_id);
  453. int_to_scsilun(lun, (struct scsi_lun *)&mrk24->lun);
  454. host_to_fcp_swap(mrk24->lun, sizeof(mrk24->lun));
  455. mrk24->vp_index = vha->vp_idx;
  456. mrk24->handle = MAKE_HANDLE(req->id, mrk24->handle);
  457. } else {
  458. SET_TARGET_ID(ha, mrk->target, loop_id);
  459. mrk->lun = cpu_to_le16((uint16_t)lun);
  460. }
  461. }
  462. wmb();
  463. qla2x00_start_iocbs(vha, req);
  464. return (QLA_SUCCESS);
  465. }
  466. int
  467. qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  468. struct rsp_que *rsp, uint16_t loop_id, uint64_t lun,
  469. uint8_t type)
  470. {
  471. int ret;
  472. unsigned long flags = 0;
  473. spin_lock_irqsave(&vha->hw->hardware_lock, flags);
  474. ret = __qla2x00_marker(vha, req, rsp, loop_id, lun, type);
  475. spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
  476. return (ret);
  477. }
  478. /*
  479. * qla2x00_issue_marker
  480. *
  481. * Issue marker
  482. * Caller CAN have hardware lock held as specified by ha_locked parameter.
  483. * Might release it, then reaquire.
  484. */
  485. int qla2x00_issue_marker(scsi_qla_host_t *vha, int ha_locked)
  486. {
  487. if (ha_locked) {
  488. if (__qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  489. MK_SYNC_ALL) != QLA_SUCCESS)
  490. return QLA_FUNCTION_FAILED;
  491. } else {
  492. if (qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  493. MK_SYNC_ALL) != QLA_SUCCESS)
  494. return QLA_FUNCTION_FAILED;
  495. }
  496. vha->marker_needed = 0;
  497. return QLA_SUCCESS;
  498. }
  499. static inline int
  500. qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
  501. uint16_t tot_dsds)
  502. {
  503. uint32_t *cur_dsd = NULL;
  504. scsi_qla_host_t *vha;
  505. struct qla_hw_data *ha;
  506. struct scsi_cmnd *cmd;
  507. struct scatterlist *cur_seg;
  508. uint32_t *dsd_seg;
  509. void *next_dsd;
  510. uint8_t avail_dsds;
  511. uint8_t first_iocb = 1;
  512. uint32_t dsd_list_len;
  513. struct dsd_dma *dsd_ptr;
  514. struct ct6_dsd *ctx;
  515. cmd = GET_CMD_SP(sp);
  516. /* Update entry type to indicate Command Type 3 IOCB */
  517. *((uint32_t *)(&cmd_pkt->entry_type)) = cpu_to_le32(COMMAND_TYPE_6);
  518. /* No data transfer */
  519. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  520. cmd_pkt->byte_count = cpu_to_le32(0);
  521. return 0;
  522. }
  523. vha = sp->fcport->vha;
  524. ha = vha->hw;
  525. /* Set transfer direction */
  526. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  527. cmd_pkt->control_flags = cpu_to_le16(CF_WRITE_DATA);
  528. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  529. vha->qla_stats.output_requests++;
  530. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  531. cmd_pkt->control_flags = cpu_to_le16(CF_READ_DATA);
  532. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  533. vha->qla_stats.input_requests++;
  534. }
  535. cur_seg = scsi_sglist(cmd);
  536. ctx = GET_CMD_CTX_SP(sp);
  537. while (tot_dsds) {
  538. avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ?
  539. QLA_DSDS_PER_IOCB : tot_dsds;
  540. tot_dsds -= avail_dsds;
  541. dsd_list_len = (avail_dsds + 1) * QLA_DSD_SIZE;
  542. dsd_ptr = list_first_entry(&ha->gbl_dsd_list,
  543. struct dsd_dma, list);
  544. next_dsd = dsd_ptr->dsd_addr;
  545. list_del(&dsd_ptr->list);
  546. ha->gbl_dsd_avail--;
  547. list_add_tail(&dsd_ptr->list, &ctx->dsd_list);
  548. ctx->dsd_use_cnt++;
  549. ha->gbl_dsd_inuse++;
  550. if (first_iocb) {
  551. first_iocb = 0;
  552. dsd_seg = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  553. *dsd_seg++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  554. *dsd_seg++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  555. cmd_pkt->fcp_data_dseg_len = cpu_to_le32(dsd_list_len);
  556. } else {
  557. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  558. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  559. *cur_dsd++ = cpu_to_le32(dsd_list_len);
  560. }
  561. cur_dsd = (uint32_t *)next_dsd;
  562. while (avail_dsds) {
  563. dma_addr_t sle_dma;
  564. sle_dma = sg_dma_address(cur_seg);
  565. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  566. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  567. *cur_dsd++ = cpu_to_le32(sg_dma_len(cur_seg));
  568. cur_seg = sg_next(cur_seg);
  569. avail_dsds--;
  570. }
  571. }
  572. /* Null termination */
  573. *cur_dsd++ = 0;
  574. *cur_dsd++ = 0;
  575. *cur_dsd++ = 0;
  576. cmd_pkt->control_flags |= CF_DATA_SEG_DESCR_ENABLE;
  577. return 0;
  578. }
  579. /*
  580. * qla24xx_calc_dsd_lists() - Determine number of DSD list required
  581. * for Command Type 6.
  582. *
  583. * @dsds: number of data segment decriptors needed
  584. *
  585. * Returns the number of dsd list needed to store @dsds.
  586. */
  587. static inline uint16_t
  588. qla24xx_calc_dsd_lists(uint16_t dsds)
  589. {
  590. uint16_t dsd_lists = 0;
  591. dsd_lists = (dsds/QLA_DSDS_PER_IOCB);
  592. if (dsds % QLA_DSDS_PER_IOCB)
  593. dsd_lists++;
  594. return dsd_lists;
  595. }
  596. /**
  597. * qla24xx_build_scsi_iocbs() - Build IOCB command utilizing Command Type 7
  598. * IOCB types.
  599. *
  600. * @sp: SRB command to process
  601. * @cmd_pkt: Command type 3 IOCB
  602. * @tot_dsds: Total number of segments to transfer
  603. */
  604. static inline void
  605. qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
  606. uint16_t tot_dsds)
  607. {
  608. uint16_t avail_dsds;
  609. uint32_t *cur_dsd;
  610. scsi_qla_host_t *vha;
  611. struct scsi_cmnd *cmd;
  612. struct scatterlist *sg;
  613. int i;
  614. cmd = GET_CMD_SP(sp);
  615. /* Update entry type to indicate Command Type 3 IOCB */
  616. *((uint32_t *)(&cmd_pkt->entry_type)) = cpu_to_le32(COMMAND_TYPE_7);
  617. /* No data transfer */
  618. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  619. cmd_pkt->byte_count = cpu_to_le32(0);
  620. return;
  621. }
  622. vha = sp->fcport->vha;
  623. /* Set transfer direction */
  624. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  625. cmd_pkt->task_mgmt_flags = cpu_to_le16(TMF_WRITE_DATA);
  626. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  627. vha->qla_stats.output_requests++;
  628. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  629. cmd_pkt->task_mgmt_flags = cpu_to_le16(TMF_READ_DATA);
  630. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  631. vha->qla_stats.input_requests++;
  632. }
  633. /* One DSD is available in the Command Type 3 IOCB */
  634. avail_dsds = 1;
  635. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  636. /* Load data segments */
  637. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  638. dma_addr_t sle_dma;
  639. cont_a64_entry_t *cont_pkt;
  640. /* Allocate additional continuation packets? */
  641. if (avail_dsds == 0) {
  642. /*
  643. * Five DSDs are available in the Continuation
  644. * Type 1 IOCB.
  645. */
  646. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  647. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  648. avail_dsds = 5;
  649. }
  650. sle_dma = sg_dma_address(sg);
  651. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  652. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  653. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  654. avail_dsds--;
  655. }
  656. }
  657. struct fw_dif_context {
  658. uint32_t ref_tag;
  659. uint16_t app_tag;
  660. uint8_t ref_tag_mask[4]; /* Validation/Replacement Mask*/
  661. uint8_t app_tag_mask[2]; /* Validation/Replacement Mask*/
  662. };
  663. /*
  664. * qla24xx_set_t10dif_tags_from_cmd - Extract Ref and App tags from SCSI command
  665. *
  666. */
  667. static inline void
  668. qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
  669. unsigned int protcnt)
  670. {
  671. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  672. switch (scsi_get_prot_type(cmd)) {
  673. case SCSI_PROT_DIF_TYPE0:
  674. /*
  675. * No check for ql2xenablehba_err_chk, as it would be an
  676. * I/O error if hba tag generation is not done.
  677. */
  678. pkt->ref_tag = cpu_to_le32((uint32_t)
  679. (0xffffffff & scsi_get_lba(cmd)));
  680. if (!qla2x00_hba_err_chk_enabled(sp))
  681. break;
  682. pkt->ref_tag_mask[0] = 0xff;
  683. pkt->ref_tag_mask[1] = 0xff;
  684. pkt->ref_tag_mask[2] = 0xff;
  685. pkt->ref_tag_mask[3] = 0xff;
  686. break;
  687. /*
  688. * For TYPE 2 protection: 16 bit GUARD + 32 bit REF tag has to
  689. * match LBA in CDB + N
  690. */
  691. case SCSI_PROT_DIF_TYPE2:
  692. pkt->app_tag = cpu_to_le16(0);
  693. pkt->app_tag_mask[0] = 0x0;
  694. pkt->app_tag_mask[1] = 0x0;
  695. pkt->ref_tag = cpu_to_le32((uint32_t)
  696. (0xffffffff & scsi_get_lba(cmd)));
  697. if (!qla2x00_hba_err_chk_enabled(sp))
  698. break;
  699. /* enable ALL bytes of the ref tag */
  700. pkt->ref_tag_mask[0] = 0xff;
  701. pkt->ref_tag_mask[1] = 0xff;
  702. pkt->ref_tag_mask[2] = 0xff;
  703. pkt->ref_tag_mask[3] = 0xff;
  704. break;
  705. /* For Type 3 protection: 16 bit GUARD only */
  706. case SCSI_PROT_DIF_TYPE3:
  707. pkt->ref_tag_mask[0] = pkt->ref_tag_mask[1] =
  708. pkt->ref_tag_mask[2] = pkt->ref_tag_mask[3] =
  709. 0x00;
  710. break;
  711. /*
  712. * For TYpe 1 protection: 16 bit GUARD tag, 32 bit REF tag, and
  713. * 16 bit app tag.
  714. */
  715. case SCSI_PROT_DIF_TYPE1:
  716. pkt->ref_tag = cpu_to_le32((uint32_t)
  717. (0xffffffff & scsi_get_lba(cmd)));
  718. pkt->app_tag = cpu_to_le16(0);
  719. pkt->app_tag_mask[0] = 0x0;
  720. pkt->app_tag_mask[1] = 0x0;
  721. if (!qla2x00_hba_err_chk_enabled(sp))
  722. break;
  723. /* enable ALL bytes of the ref tag */
  724. pkt->ref_tag_mask[0] = 0xff;
  725. pkt->ref_tag_mask[1] = 0xff;
  726. pkt->ref_tag_mask[2] = 0xff;
  727. pkt->ref_tag_mask[3] = 0xff;
  728. break;
  729. }
  730. }
  731. struct qla2_sgx {
  732. dma_addr_t dma_addr; /* OUT */
  733. uint32_t dma_len; /* OUT */
  734. uint32_t tot_bytes; /* IN */
  735. struct scatterlist *cur_sg; /* IN */
  736. /* for book keeping, bzero on initial invocation */
  737. uint32_t bytes_consumed;
  738. uint32_t num_bytes;
  739. uint32_t tot_partial;
  740. /* for debugging */
  741. uint32_t num_sg;
  742. srb_t *sp;
  743. };
  744. static int
  745. qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx,
  746. uint32_t *partial)
  747. {
  748. struct scatterlist *sg;
  749. uint32_t cumulative_partial, sg_len;
  750. dma_addr_t sg_dma_addr;
  751. if (sgx->num_bytes == sgx->tot_bytes)
  752. return 0;
  753. sg = sgx->cur_sg;
  754. cumulative_partial = sgx->tot_partial;
  755. sg_dma_addr = sg_dma_address(sg);
  756. sg_len = sg_dma_len(sg);
  757. sgx->dma_addr = sg_dma_addr + sgx->bytes_consumed;
  758. if ((cumulative_partial + (sg_len - sgx->bytes_consumed)) >= blk_sz) {
  759. sgx->dma_len = (blk_sz - cumulative_partial);
  760. sgx->tot_partial = 0;
  761. sgx->num_bytes += blk_sz;
  762. *partial = 0;
  763. } else {
  764. sgx->dma_len = sg_len - sgx->bytes_consumed;
  765. sgx->tot_partial += sgx->dma_len;
  766. *partial = 1;
  767. }
  768. sgx->bytes_consumed += sgx->dma_len;
  769. if (sg_len == sgx->bytes_consumed) {
  770. sg = sg_next(sg);
  771. sgx->num_sg++;
  772. sgx->cur_sg = sg;
  773. sgx->bytes_consumed = 0;
  774. }
  775. return 1;
  776. }
  777. int
  778. qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp,
  779. uint32_t *dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc)
  780. {
  781. void *next_dsd;
  782. uint8_t avail_dsds = 0;
  783. uint32_t dsd_list_len;
  784. struct dsd_dma *dsd_ptr;
  785. struct scatterlist *sg_prot;
  786. uint32_t *cur_dsd = dsd;
  787. uint16_t used_dsds = tot_dsds;
  788. uint32_t prot_int; /* protection interval */
  789. uint32_t partial;
  790. struct qla2_sgx sgx;
  791. dma_addr_t sle_dma;
  792. uint32_t sle_dma_len, tot_prot_dma_len = 0;
  793. struct scsi_cmnd *cmd;
  794. memset(&sgx, 0, sizeof(struct qla2_sgx));
  795. if (sp) {
  796. cmd = GET_CMD_SP(sp);
  797. prot_int = cmd->device->sector_size;
  798. sgx.tot_bytes = scsi_bufflen(cmd);
  799. sgx.cur_sg = scsi_sglist(cmd);
  800. sgx.sp = sp;
  801. sg_prot = scsi_prot_sglist(cmd);
  802. } else if (tc) {
  803. prot_int = tc->blk_sz;
  804. sgx.tot_bytes = tc->bufflen;
  805. sgx.cur_sg = tc->sg;
  806. sg_prot = tc->prot_sg;
  807. } else {
  808. BUG();
  809. return 1;
  810. }
  811. while (qla24xx_get_one_block_sg(prot_int, &sgx, &partial)) {
  812. sle_dma = sgx.dma_addr;
  813. sle_dma_len = sgx.dma_len;
  814. alloc_and_fill:
  815. /* Allocate additional continuation packets? */
  816. if (avail_dsds == 0) {
  817. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  818. QLA_DSDS_PER_IOCB : used_dsds;
  819. dsd_list_len = (avail_dsds + 1) * 12;
  820. used_dsds -= avail_dsds;
  821. /* allocate tracking DS */
  822. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  823. if (!dsd_ptr)
  824. return 1;
  825. /* allocate new list */
  826. dsd_ptr->dsd_addr = next_dsd =
  827. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  828. &dsd_ptr->dsd_list_dma);
  829. if (!next_dsd) {
  830. /*
  831. * Need to cleanup only this dsd_ptr, rest
  832. * will be done by sp_free_dma()
  833. */
  834. kfree(dsd_ptr);
  835. return 1;
  836. }
  837. if (sp) {
  838. list_add_tail(&dsd_ptr->list,
  839. &((struct crc_context *)
  840. sp->u.scmd.ctx)->dsd_list);
  841. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  842. } else {
  843. list_add_tail(&dsd_ptr->list,
  844. &(tc->ctx->dsd_list));
  845. tc->ctx_dsd_alloced = 1;
  846. }
  847. /* add new list to cmd iocb or last list */
  848. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  849. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  850. *cur_dsd++ = dsd_list_len;
  851. cur_dsd = (uint32_t *)next_dsd;
  852. }
  853. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  854. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  855. *cur_dsd++ = cpu_to_le32(sle_dma_len);
  856. avail_dsds--;
  857. if (partial == 0) {
  858. /* Got a full protection interval */
  859. sle_dma = sg_dma_address(sg_prot) + tot_prot_dma_len;
  860. sle_dma_len = 8;
  861. tot_prot_dma_len += sle_dma_len;
  862. if (tot_prot_dma_len == sg_dma_len(sg_prot)) {
  863. tot_prot_dma_len = 0;
  864. sg_prot = sg_next(sg_prot);
  865. }
  866. partial = 1; /* So as to not re-enter this block */
  867. goto alloc_and_fill;
  868. }
  869. }
  870. /* Null termination */
  871. *cur_dsd++ = 0;
  872. *cur_dsd++ = 0;
  873. *cur_dsd++ = 0;
  874. return 0;
  875. }
  876. int
  877. qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
  878. uint16_t tot_dsds, struct qla_tgt_cmd *tc)
  879. {
  880. void *next_dsd;
  881. uint8_t avail_dsds = 0;
  882. uint32_t dsd_list_len;
  883. struct dsd_dma *dsd_ptr;
  884. struct scatterlist *sg, *sgl;
  885. uint32_t *cur_dsd = dsd;
  886. int i;
  887. uint16_t used_dsds = tot_dsds;
  888. struct scsi_cmnd *cmd;
  889. if (sp) {
  890. cmd = GET_CMD_SP(sp);
  891. sgl = scsi_sglist(cmd);
  892. } else if (tc) {
  893. sgl = tc->sg;
  894. } else {
  895. BUG();
  896. return 1;
  897. }
  898. for_each_sg(sgl, sg, tot_dsds, i) {
  899. dma_addr_t sle_dma;
  900. /* Allocate additional continuation packets? */
  901. if (avail_dsds == 0) {
  902. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  903. QLA_DSDS_PER_IOCB : used_dsds;
  904. dsd_list_len = (avail_dsds + 1) * 12;
  905. used_dsds -= avail_dsds;
  906. /* allocate tracking DS */
  907. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  908. if (!dsd_ptr)
  909. return 1;
  910. /* allocate new list */
  911. dsd_ptr->dsd_addr = next_dsd =
  912. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  913. &dsd_ptr->dsd_list_dma);
  914. if (!next_dsd) {
  915. /*
  916. * Need to cleanup only this dsd_ptr, rest
  917. * will be done by sp_free_dma()
  918. */
  919. kfree(dsd_ptr);
  920. return 1;
  921. }
  922. if (sp) {
  923. list_add_tail(&dsd_ptr->list,
  924. &((struct crc_context *)
  925. sp->u.scmd.ctx)->dsd_list);
  926. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  927. } else {
  928. list_add_tail(&dsd_ptr->list,
  929. &(tc->ctx->dsd_list));
  930. tc->ctx_dsd_alloced = 1;
  931. }
  932. /* add new list to cmd iocb or last list */
  933. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  934. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  935. *cur_dsd++ = dsd_list_len;
  936. cur_dsd = (uint32_t *)next_dsd;
  937. }
  938. sle_dma = sg_dma_address(sg);
  939. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  940. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  941. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  942. avail_dsds--;
  943. }
  944. /* Null termination */
  945. *cur_dsd++ = 0;
  946. *cur_dsd++ = 0;
  947. *cur_dsd++ = 0;
  948. return 0;
  949. }
  950. int
  951. qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
  952. uint32_t *dsd, uint16_t tot_dsds, struct qla_tgt_cmd *tc)
  953. {
  954. void *next_dsd;
  955. uint8_t avail_dsds = 0;
  956. uint32_t dsd_list_len;
  957. struct dsd_dma *dsd_ptr;
  958. struct scatterlist *sg, *sgl;
  959. int i;
  960. struct scsi_cmnd *cmd;
  961. uint32_t *cur_dsd = dsd;
  962. uint16_t used_dsds = tot_dsds;
  963. struct scsi_qla_host *vha;
  964. if (sp) {
  965. cmd = GET_CMD_SP(sp);
  966. sgl = scsi_prot_sglist(cmd);
  967. vha = sp->fcport->vha;
  968. } else if (tc) {
  969. vha = tc->vha;
  970. sgl = tc->prot_sg;
  971. } else {
  972. BUG();
  973. return 1;
  974. }
  975. ql_dbg(ql_dbg_tgt, vha, 0xe021,
  976. "%s: enter\n", __func__);
  977. for_each_sg(sgl, sg, tot_dsds, i) {
  978. dma_addr_t sle_dma;
  979. /* Allocate additional continuation packets? */
  980. if (avail_dsds == 0) {
  981. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  982. QLA_DSDS_PER_IOCB : used_dsds;
  983. dsd_list_len = (avail_dsds + 1) * 12;
  984. used_dsds -= avail_dsds;
  985. /* allocate tracking DS */
  986. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  987. if (!dsd_ptr)
  988. return 1;
  989. /* allocate new list */
  990. dsd_ptr->dsd_addr = next_dsd =
  991. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  992. &dsd_ptr->dsd_list_dma);
  993. if (!next_dsd) {
  994. /*
  995. * Need to cleanup only this dsd_ptr, rest
  996. * will be done by sp_free_dma()
  997. */
  998. kfree(dsd_ptr);
  999. return 1;
  1000. }
  1001. if (sp) {
  1002. list_add_tail(&dsd_ptr->list,
  1003. &((struct crc_context *)
  1004. sp->u.scmd.ctx)->dsd_list);
  1005. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  1006. } else {
  1007. list_add_tail(&dsd_ptr->list,
  1008. &(tc->ctx->dsd_list));
  1009. tc->ctx_dsd_alloced = 1;
  1010. }
  1011. /* add new list to cmd iocb or last list */
  1012. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  1013. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  1014. *cur_dsd++ = dsd_list_len;
  1015. cur_dsd = (uint32_t *)next_dsd;
  1016. }
  1017. sle_dma = sg_dma_address(sg);
  1018. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1019. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1020. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1021. avail_dsds--;
  1022. }
  1023. /* Null termination */
  1024. *cur_dsd++ = 0;
  1025. *cur_dsd++ = 0;
  1026. *cur_dsd++ = 0;
  1027. return 0;
  1028. }
  1029. /**
  1030. * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
  1031. * Type 6 IOCB types.
  1032. *
  1033. * @sp: SRB command to process
  1034. * @cmd_pkt: Command type 3 IOCB
  1035. * @tot_dsds: Total number of segments to transfer
  1036. */
  1037. static inline int
  1038. qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
  1039. uint16_t tot_dsds, uint16_t tot_prot_dsds, uint16_t fw_prot_opts)
  1040. {
  1041. uint32_t *cur_dsd, *fcp_dl;
  1042. scsi_qla_host_t *vha;
  1043. struct scsi_cmnd *cmd;
  1044. uint32_t total_bytes = 0;
  1045. uint32_t data_bytes;
  1046. uint32_t dif_bytes;
  1047. uint8_t bundling = 1;
  1048. uint16_t blk_size;
  1049. uint8_t *clr_ptr;
  1050. struct crc_context *crc_ctx_pkt = NULL;
  1051. struct qla_hw_data *ha;
  1052. uint8_t additional_fcpcdb_len;
  1053. uint16_t fcp_cmnd_len;
  1054. struct fcp_cmnd *fcp_cmnd;
  1055. dma_addr_t crc_ctx_dma;
  1056. cmd = GET_CMD_SP(sp);
  1057. /* Update entry type to indicate Command Type CRC_2 IOCB */
  1058. *((uint32_t *)(&cmd_pkt->entry_type)) = cpu_to_le32(COMMAND_TYPE_CRC_2);
  1059. vha = sp->fcport->vha;
  1060. ha = vha->hw;
  1061. /* No data transfer */
  1062. data_bytes = scsi_bufflen(cmd);
  1063. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1064. cmd_pkt->byte_count = cpu_to_le32(0);
  1065. return QLA_SUCCESS;
  1066. }
  1067. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1068. /* Set transfer direction */
  1069. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  1070. cmd_pkt->control_flags =
  1071. cpu_to_le16(CF_WRITE_DATA);
  1072. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  1073. cmd_pkt->control_flags =
  1074. cpu_to_le16(CF_READ_DATA);
  1075. }
  1076. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1077. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP) ||
  1078. (scsi_get_prot_op(cmd) == SCSI_PROT_READ_STRIP) ||
  1079. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_INSERT))
  1080. bundling = 0;
  1081. /* Allocate CRC context from global pool */
  1082. crc_ctx_pkt = sp->u.scmd.ctx =
  1083. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma);
  1084. if (!crc_ctx_pkt)
  1085. goto crc_queuing_error;
  1086. /* Zero out CTX area. */
  1087. clr_ptr = (uint8_t *)crc_ctx_pkt;
  1088. memset(clr_ptr, 0, sizeof(*crc_ctx_pkt));
  1089. crc_ctx_pkt->crc_ctx_dma = crc_ctx_dma;
  1090. sp->flags |= SRB_CRC_CTX_DMA_VALID;
  1091. /* Set handle */
  1092. crc_ctx_pkt->handle = cmd_pkt->handle;
  1093. INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list);
  1094. qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *)
  1095. &crc_ctx_pkt->ref_tag, tot_prot_dsds);
  1096. cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma));
  1097. cmd_pkt->crc_context_address[1] = cpu_to_le32(MSD(crc_ctx_dma));
  1098. cmd_pkt->crc_context_len = CRC_CONTEXT_LEN_FW;
  1099. /* Determine SCSI command length -- align to 4 byte boundary */
  1100. if (cmd->cmd_len > 16) {
  1101. additional_fcpcdb_len = cmd->cmd_len - 16;
  1102. if ((cmd->cmd_len % 4) != 0) {
  1103. /* SCSI cmd > 16 bytes must be multiple of 4 */
  1104. goto crc_queuing_error;
  1105. }
  1106. fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  1107. } else {
  1108. additional_fcpcdb_len = 0;
  1109. fcp_cmnd_len = 12 + 16 + 4;
  1110. }
  1111. fcp_cmnd = &crc_ctx_pkt->fcp_cmnd;
  1112. fcp_cmnd->additional_cdb_len = additional_fcpcdb_len;
  1113. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1114. fcp_cmnd->additional_cdb_len |= 1;
  1115. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  1116. fcp_cmnd->additional_cdb_len |= 2;
  1117. int_to_scsilun(cmd->device->lun, &fcp_cmnd->lun);
  1118. memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  1119. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len);
  1120. cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32(
  1121. LSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1122. cmd_pkt->fcp_cmnd_dseg_address[1] = cpu_to_le32(
  1123. MSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1124. fcp_cmnd->task_management = 0;
  1125. fcp_cmnd->task_attribute = TSK_SIMPLE;
  1126. cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */
  1127. /* Compute dif len and adjust data len to incude protection */
  1128. dif_bytes = 0;
  1129. blk_size = cmd->device->sector_size;
  1130. dif_bytes = (data_bytes / blk_size) * 8;
  1131. switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
  1132. case SCSI_PROT_READ_INSERT:
  1133. case SCSI_PROT_WRITE_STRIP:
  1134. total_bytes = data_bytes;
  1135. data_bytes += dif_bytes;
  1136. break;
  1137. case SCSI_PROT_READ_STRIP:
  1138. case SCSI_PROT_WRITE_INSERT:
  1139. case SCSI_PROT_READ_PASS:
  1140. case SCSI_PROT_WRITE_PASS:
  1141. total_bytes = data_bytes + dif_bytes;
  1142. break;
  1143. default:
  1144. BUG();
  1145. }
  1146. if (!qla2x00_hba_err_chk_enabled(sp))
  1147. fw_prot_opts |= 0x10; /* Disable Guard tag checking */
  1148. /* HBA error checking enabled */
  1149. else if (IS_PI_UNINIT_CAPABLE(ha)) {
  1150. if ((scsi_get_prot_type(GET_CMD_SP(sp)) == SCSI_PROT_DIF_TYPE1)
  1151. || (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1152. SCSI_PROT_DIF_TYPE2))
  1153. fw_prot_opts |= BIT_10;
  1154. else if (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1155. SCSI_PROT_DIF_TYPE3)
  1156. fw_prot_opts |= BIT_11;
  1157. }
  1158. if (!bundling) {
  1159. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
  1160. } else {
  1161. /*
  1162. * Configure Bundling if we need to fetch interlaving
  1163. * protection PCI accesses
  1164. */
  1165. fw_prot_opts |= PO_ENABLE_DIF_BUNDLING;
  1166. crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
  1167. crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds -
  1168. tot_prot_dsds);
  1169. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.data_address;
  1170. }
  1171. /* Finish the common fields of CRC pkt */
  1172. crc_ctx_pkt->blk_size = cpu_to_le16(blk_size);
  1173. crc_ctx_pkt->prot_opts = cpu_to_le16(fw_prot_opts);
  1174. crc_ctx_pkt->byte_count = cpu_to_le32(data_bytes);
  1175. crc_ctx_pkt->guard_seed = cpu_to_le16(0);
  1176. /* Fibre channel byte count */
  1177. cmd_pkt->byte_count = cpu_to_le32(total_bytes);
  1178. fcp_dl = (uint32_t *)(crc_ctx_pkt->fcp_cmnd.cdb + 16 +
  1179. additional_fcpcdb_len);
  1180. *fcp_dl = htonl(total_bytes);
  1181. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1182. cmd_pkt->byte_count = cpu_to_le32(0);
  1183. return QLA_SUCCESS;
  1184. }
  1185. /* Walks data segments */
  1186. cmd_pkt->control_flags |= cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE);
  1187. if (!bundling && tot_prot_dsds) {
  1188. if (qla24xx_walk_and_build_sglist_no_difb(ha, sp,
  1189. cur_dsd, tot_dsds, NULL))
  1190. goto crc_queuing_error;
  1191. } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd,
  1192. (tot_dsds - tot_prot_dsds), NULL))
  1193. goto crc_queuing_error;
  1194. if (bundling && tot_prot_dsds) {
  1195. /* Walks dif segments */
  1196. cmd_pkt->control_flags |= cpu_to_le16(CF_DIF_SEG_DESCR_ENABLE);
  1197. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.dif_address;
  1198. if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd,
  1199. tot_prot_dsds, NULL))
  1200. goto crc_queuing_error;
  1201. }
  1202. return QLA_SUCCESS;
  1203. crc_queuing_error:
  1204. /* Cleanup will be performed by the caller */
  1205. return QLA_FUNCTION_FAILED;
  1206. }
  1207. /**
  1208. * qla24xx_start_scsi() - Send a SCSI command to the ISP
  1209. * @sp: command to send to the ISP
  1210. *
  1211. * Returns non-zero if a failure occurred, else zero.
  1212. */
  1213. int
  1214. qla24xx_start_scsi(srb_t *sp)
  1215. {
  1216. int nseg;
  1217. unsigned long flags;
  1218. uint32_t *clr_ptr;
  1219. uint32_t index;
  1220. uint32_t handle;
  1221. struct cmd_type_7 *cmd_pkt;
  1222. uint16_t cnt;
  1223. uint16_t req_cnt;
  1224. uint16_t tot_dsds;
  1225. struct req_que *req = NULL;
  1226. struct rsp_que *rsp = NULL;
  1227. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1228. struct scsi_qla_host *vha = sp->fcport->vha;
  1229. struct qla_hw_data *ha = vha->hw;
  1230. /* Setup device pointers. */
  1231. qla25xx_set_que(sp, &rsp);
  1232. req = vha->req;
  1233. /* So we know we haven't pci_map'ed anything yet */
  1234. tot_dsds = 0;
  1235. /* Send marker if required */
  1236. if (vha->marker_needed != 0) {
  1237. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1238. QLA_SUCCESS)
  1239. return QLA_FUNCTION_FAILED;
  1240. vha->marker_needed = 0;
  1241. }
  1242. /* Acquire ring specific lock */
  1243. spin_lock_irqsave(&ha->hardware_lock, flags);
  1244. /* Check for room in outstanding command list. */
  1245. handle = req->current_outstanding_cmd;
  1246. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1247. handle++;
  1248. if (handle == req->num_outstanding_cmds)
  1249. handle = 1;
  1250. if (!req->outstanding_cmds[handle])
  1251. break;
  1252. }
  1253. if (index == req->num_outstanding_cmds)
  1254. goto queuing_error;
  1255. /* Map the sg table so we have an accurate count of sg entries needed */
  1256. if (scsi_sg_count(cmd)) {
  1257. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1258. scsi_sg_count(cmd), cmd->sc_data_direction);
  1259. if (unlikely(!nseg))
  1260. goto queuing_error;
  1261. } else
  1262. nseg = 0;
  1263. tot_dsds = nseg;
  1264. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1265. if (req->cnt < (req_cnt + 2)) {
  1266. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  1267. RD_REG_DWORD_RELAXED(req->req_q_out);
  1268. if (req->ring_index < cnt)
  1269. req->cnt = cnt - req->ring_index;
  1270. else
  1271. req->cnt = req->length -
  1272. (req->ring_index - cnt);
  1273. if (req->cnt < (req_cnt + 2))
  1274. goto queuing_error;
  1275. }
  1276. /* Build command packet. */
  1277. req->current_outstanding_cmd = handle;
  1278. req->outstanding_cmds[handle] = sp;
  1279. sp->handle = handle;
  1280. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1281. req->cnt -= req_cnt;
  1282. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1283. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1284. /* Zero out remaining portion of packet. */
  1285. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1286. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1287. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1288. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1289. /* Set NPORT-ID and LUN number*/
  1290. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1291. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1292. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1293. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1294. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1295. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1296. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1297. cmd_pkt->task = TSK_SIMPLE;
  1298. /* Load SCSI command packet. */
  1299. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1300. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1301. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1302. /* Build IOCB segments */
  1303. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  1304. /* Set total data segment count. */
  1305. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1306. /* Specify response queue number where completion should happen */
  1307. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1308. wmb();
  1309. /* Adjust ring index. */
  1310. req->ring_index++;
  1311. if (req->ring_index == req->length) {
  1312. req->ring_index = 0;
  1313. req->ring_ptr = req->ring;
  1314. } else
  1315. req->ring_ptr++;
  1316. sp->flags |= SRB_DMA_VALID;
  1317. /* Set chip new ring index. */
  1318. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1319. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1320. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1321. if (vha->flags.process_response_queue &&
  1322. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1323. qla24xx_process_response_queue(vha, rsp);
  1324. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1325. return QLA_SUCCESS;
  1326. queuing_error:
  1327. if (tot_dsds)
  1328. scsi_dma_unmap(cmd);
  1329. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1330. return QLA_FUNCTION_FAILED;
  1331. }
  1332. /**
  1333. * qla24xx_dif_start_scsi() - Send a SCSI command to the ISP
  1334. * @sp: command to send to the ISP
  1335. *
  1336. * Returns non-zero if a failure occurred, else zero.
  1337. */
  1338. int
  1339. qla24xx_dif_start_scsi(srb_t *sp)
  1340. {
  1341. int nseg;
  1342. unsigned long flags;
  1343. uint32_t *clr_ptr;
  1344. uint32_t index;
  1345. uint32_t handle;
  1346. uint16_t cnt;
  1347. uint16_t req_cnt = 0;
  1348. uint16_t tot_dsds;
  1349. uint16_t tot_prot_dsds;
  1350. uint16_t fw_prot_opts = 0;
  1351. struct req_que *req = NULL;
  1352. struct rsp_que *rsp = NULL;
  1353. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1354. struct scsi_qla_host *vha = sp->fcport->vha;
  1355. struct qla_hw_data *ha = vha->hw;
  1356. struct cmd_type_crc_2 *cmd_pkt;
  1357. uint32_t status = 0;
  1358. #define QDSS_GOT_Q_SPACE BIT_0
  1359. /* Only process protection or >16 cdb in this routine */
  1360. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1361. if (cmd->cmd_len <= 16)
  1362. return qla24xx_start_scsi(sp);
  1363. }
  1364. /* Setup device pointers. */
  1365. qla25xx_set_que(sp, &rsp);
  1366. req = vha->req;
  1367. /* So we know we haven't pci_map'ed anything yet */
  1368. tot_dsds = 0;
  1369. /* Send marker if required */
  1370. if (vha->marker_needed != 0) {
  1371. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1372. QLA_SUCCESS)
  1373. return QLA_FUNCTION_FAILED;
  1374. vha->marker_needed = 0;
  1375. }
  1376. /* Acquire ring specific lock */
  1377. spin_lock_irqsave(&ha->hardware_lock, flags);
  1378. /* Check for room in outstanding command list. */
  1379. handle = req->current_outstanding_cmd;
  1380. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1381. handle++;
  1382. if (handle == req->num_outstanding_cmds)
  1383. handle = 1;
  1384. if (!req->outstanding_cmds[handle])
  1385. break;
  1386. }
  1387. if (index == req->num_outstanding_cmds)
  1388. goto queuing_error;
  1389. /* Compute number of required data segments */
  1390. /* Map the sg table so we have an accurate count of sg entries needed */
  1391. if (scsi_sg_count(cmd)) {
  1392. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1393. scsi_sg_count(cmd), cmd->sc_data_direction);
  1394. if (unlikely(!nseg))
  1395. goto queuing_error;
  1396. else
  1397. sp->flags |= SRB_DMA_VALID;
  1398. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1399. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1400. struct qla2_sgx sgx;
  1401. uint32_t partial;
  1402. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1403. sgx.tot_bytes = scsi_bufflen(cmd);
  1404. sgx.cur_sg = scsi_sglist(cmd);
  1405. sgx.sp = sp;
  1406. nseg = 0;
  1407. while (qla24xx_get_one_block_sg(
  1408. cmd->device->sector_size, &sgx, &partial))
  1409. nseg++;
  1410. }
  1411. } else
  1412. nseg = 0;
  1413. /* number of required data segments */
  1414. tot_dsds = nseg;
  1415. /* Compute number of required protection segments */
  1416. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1417. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1418. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1419. if (unlikely(!nseg))
  1420. goto queuing_error;
  1421. else
  1422. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1423. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1424. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1425. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1426. }
  1427. } else {
  1428. nseg = 0;
  1429. }
  1430. req_cnt = 1;
  1431. /* Total Data and protection sg segment(s) */
  1432. tot_prot_dsds = nseg;
  1433. tot_dsds += nseg;
  1434. if (req->cnt < (req_cnt + 2)) {
  1435. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  1436. RD_REG_DWORD_RELAXED(req->req_q_out);
  1437. if (req->ring_index < cnt)
  1438. req->cnt = cnt - req->ring_index;
  1439. else
  1440. req->cnt = req->length -
  1441. (req->ring_index - cnt);
  1442. if (req->cnt < (req_cnt + 2))
  1443. goto queuing_error;
  1444. }
  1445. status |= QDSS_GOT_Q_SPACE;
  1446. /* Build header part of command packet (excluding the OPCODE). */
  1447. req->current_outstanding_cmd = handle;
  1448. req->outstanding_cmds[handle] = sp;
  1449. sp->handle = handle;
  1450. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1451. req->cnt -= req_cnt;
  1452. /* Fill-in common area */
  1453. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1454. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1455. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1456. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1457. /* Set NPORT-ID and LUN number*/
  1458. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1459. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1460. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1461. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1462. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1463. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1464. /* Total Data and protection segment(s) */
  1465. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1466. /* Build IOCB segments and adjust for data protection segments */
  1467. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1468. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1469. QLA_SUCCESS)
  1470. goto queuing_error;
  1471. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1472. /* Specify response queue number where completion should happen */
  1473. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1474. cmd_pkt->timeout = cpu_to_le16(0);
  1475. wmb();
  1476. /* Adjust ring index. */
  1477. req->ring_index++;
  1478. if (req->ring_index == req->length) {
  1479. req->ring_index = 0;
  1480. req->ring_ptr = req->ring;
  1481. } else
  1482. req->ring_ptr++;
  1483. /* Set chip new ring index. */
  1484. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1485. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1486. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1487. if (vha->flags.process_response_queue &&
  1488. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1489. qla24xx_process_response_queue(vha, rsp);
  1490. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1491. return QLA_SUCCESS;
  1492. queuing_error:
  1493. if (status & QDSS_GOT_Q_SPACE) {
  1494. req->outstanding_cmds[handle] = NULL;
  1495. req->cnt += req_cnt;
  1496. }
  1497. /* Cleanup will be performed by the caller (queuecommand) */
  1498. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1499. return QLA_FUNCTION_FAILED;
  1500. }
  1501. static void qla25xx_set_que(srb_t *sp, struct rsp_que **rsp)
  1502. {
  1503. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1504. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1505. int affinity = cmd->request->cpu;
  1506. if (ha->flags.cpu_affinity_enabled && affinity >= 0 &&
  1507. affinity < ha->max_rsp_queues - 1)
  1508. *rsp = ha->rsp_q_map[affinity + 1];
  1509. else
  1510. *rsp = ha->rsp_q_map[0];
  1511. }
  1512. /* Generic Control-SRB manipulation functions. */
  1513. /* hardware_lock assumed to be held. */
  1514. void *
  1515. qla2x00_alloc_iocbs_ready(scsi_qla_host_t *vha, srb_t *sp)
  1516. {
  1517. if (qla2x00_reset_active(vha))
  1518. return NULL;
  1519. return qla2x00_alloc_iocbs(vha, sp);
  1520. }
  1521. void *
  1522. qla2x00_alloc_iocbs(scsi_qla_host_t *vha, srb_t *sp)
  1523. {
  1524. struct qla_hw_data *ha = vha->hw;
  1525. struct req_que *req = ha->req_q_map[0];
  1526. device_reg_t *reg = ISP_QUE_REG(ha, req->id);
  1527. uint32_t index, handle;
  1528. request_t *pkt;
  1529. uint16_t cnt, req_cnt;
  1530. pkt = NULL;
  1531. req_cnt = 1;
  1532. handle = 0;
  1533. if (!sp)
  1534. goto skip_cmd_array;
  1535. /* Check for room in outstanding command list. */
  1536. handle = req->current_outstanding_cmd;
  1537. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1538. handle++;
  1539. if (handle == req->num_outstanding_cmds)
  1540. handle = 1;
  1541. if (!req->outstanding_cmds[handle])
  1542. break;
  1543. }
  1544. if (index == req->num_outstanding_cmds) {
  1545. ql_log(ql_log_warn, vha, 0x700b,
  1546. "No room on outstanding cmd array.\n");
  1547. goto queuing_error;
  1548. }
  1549. /* Prep command array. */
  1550. req->current_outstanding_cmd = handle;
  1551. req->outstanding_cmds[handle] = sp;
  1552. sp->handle = handle;
  1553. /* Adjust entry-counts as needed. */
  1554. if (sp->type != SRB_SCSI_CMD)
  1555. req_cnt = sp->iocbs;
  1556. skip_cmd_array:
  1557. /* Check for room on request queue. */
  1558. if (req->cnt < req_cnt + 2) {
  1559. if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha))
  1560. cnt = RD_REG_DWORD(&reg->isp25mq.req_q_out);
  1561. else if (IS_P3P_TYPE(ha))
  1562. cnt = RD_REG_DWORD(&reg->isp82.req_q_out);
  1563. else if (IS_FWI2_CAPABLE(ha))
  1564. cnt = RD_REG_DWORD(&reg->isp24.req_q_out);
  1565. else if (IS_QLAFX00(ha))
  1566. cnt = RD_REG_DWORD(&reg->ispfx00.req_q_out);
  1567. else
  1568. cnt = qla2x00_debounce_register(
  1569. ISP_REQ_Q_OUT(ha, &reg->isp));
  1570. if (req->ring_index < cnt)
  1571. req->cnt = cnt - req->ring_index;
  1572. else
  1573. req->cnt = req->length -
  1574. (req->ring_index - cnt);
  1575. }
  1576. if (req->cnt < req_cnt + 2)
  1577. goto queuing_error;
  1578. /* Prep packet */
  1579. req->cnt -= req_cnt;
  1580. pkt = req->ring_ptr;
  1581. memset(pkt, 0, REQUEST_ENTRY_SIZE);
  1582. if (IS_QLAFX00(ha)) {
  1583. WRT_REG_BYTE((void __iomem *)&pkt->entry_count, req_cnt);
  1584. WRT_REG_WORD((void __iomem *)&pkt->handle, handle);
  1585. } else {
  1586. pkt->entry_count = req_cnt;
  1587. pkt->handle = handle;
  1588. }
  1589. queuing_error:
  1590. return pkt;
  1591. }
  1592. static void
  1593. qla24xx_login_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1594. {
  1595. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1596. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1597. logio->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
  1598. if (lio->u.logio.flags & SRB_LOGIN_COND_PLOGI)
  1599. logio->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
  1600. if (lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI)
  1601. logio->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
  1602. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1603. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1604. logio->port_id[1] = sp->fcport->d_id.b.area;
  1605. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1606. logio->vp_index = sp->fcport->vha->vp_idx;
  1607. }
  1608. static void
  1609. qla2x00_login_iocb(srb_t *sp, struct mbx_entry *mbx)
  1610. {
  1611. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1612. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1613. uint16_t opts;
  1614. mbx->entry_type = MBX_IOCB_TYPE;
  1615. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1616. mbx->mb0 = cpu_to_le16(MBC_LOGIN_FABRIC_PORT);
  1617. opts = lio->u.logio.flags & SRB_LOGIN_COND_PLOGI ? BIT_0 : 0;
  1618. opts |= lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI ? BIT_1 : 0;
  1619. if (HAS_EXTENDED_IDS(ha)) {
  1620. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1621. mbx->mb10 = cpu_to_le16(opts);
  1622. } else {
  1623. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | opts);
  1624. }
  1625. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1626. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1627. sp->fcport->d_id.b.al_pa);
  1628. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1629. }
  1630. static void
  1631. qla24xx_logout_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1632. {
  1633. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1634. logio->control_flags =
  1635. cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1636. if (!sp->fcport->tgt_session ||
  1637. !sp->fcport->tgt_session->keep_nport_handle)
  1638. logio->control_flags |= cpu_to_le16(LCF_FREE_NPORT);
  1639. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1640. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1641. logio->port_id[1] = sp->fcport->d_id.b.area;
  1642. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1643. logio->vp_index = sp->fcport->vha->vp_idx;
  1644. }
  1645. static void
  1646. qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)
  1647. {
  1648. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1649. mbx->entry_type = MBX_IOCB_TYPE;
  1650. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1651. mbx->mb0 = cpu_to_le16(MBC_LOGOUT_FABRIC_PORT);
  1652. mbx->mb1 = HAS_EXTENDED_IDS(ha) ?
  1653. cpu_to_le16(sp->fcport->loop_id):
  1654. cpu_to_le16(sp->fcport->loop_id << 8);
  1655. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1656. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1657. sp->fcport->d_id.b.al_pa);
  1658. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1659. /* Implicit: mbx->mbx10 = 0. */
  1660. }
  1661. static void
  1662. qla24xx_adisc_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1663. {
  1664. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1665. logio->control_flags = cpu_to_le16(LCF_COMMAND_ADISC);
  1666. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1667. logio->vp_index = sp->fcport->vha->vp_idx;
  1668. }
  1669. static void
  1670. qla2x00_adisc_iocb(srb_t *sp, struct mbx_entry *mbx)
  1671. {
  1672. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1673. mbx->entry_type = MBX_IOCB_TYPE;
  1674. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1675. mbx->mb0 = cpu_to_le16(MBC_GET_PORT_DATABASE);
  1676. if (HAS_EXTENDED_IDS(ha)) {
  1677. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1678. mbx->mb10 = cpu_to_le16(BIT_0);
  1679. } else {
  1680. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | BIT_0);
  1681. }
  1682. mbx->mb2 = cpu_to_le16(MSW(ha->async_pd_dma));
  1683. mbx->mb3 = cpu_to_le16(LSW(ha->async_pd_dma));
  1684. mbx->mb6 = cpu_to_le16(MSW(MSD(ha->async_pd_dma)));
  1685. mbx->mb7 = cpu_to_le16(LSW(MSD(ha->async_pd_dma)));
  1686. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1687. }
  1688. static void
  1689. qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)
  1690. {
  1691. uint32_t flags;
  1692. uint64_t lun;
  1693. struct fc_port *fcport = sp->fcport;
  1694. scsi_qla_host_t *vha = fcport->vha;
  1695. struct qla_hw_data *ha = vha->hw;
  1696. struct srb_iocb *iocb = &sp->u.iocb_cmd;
  1697. struct req_que *req = vha->req;
  1698. flags = iocb->u.tmf.flags;
  1699. lun = iocb->u.tmf.lun;
  1700. tsk->entry_type = TSK_MGMT_IOCB_TYPE;
  1701. tsk->entry_count = 1;
  1702. tsk->handle = MAKE_HANDLE(req->id, tsk->handle);
  1703. tsk->nport_handle = cpu_to_le16(fcport->loop_id);
  1704. tsk->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  1705. tsk->control_flags = cpu_to_le32(flags);
  1706. tsk->port_id[0] = fcport->d_id.b.al_pa;
  1707. tsk->port_id[1] = fcport->d_id.b.area;
  1708. tsk->port_id[2] = fcport->d_id.b.domain;
  1709. tsk->vp_index = fcport->vha->vp_idx;
  1710. if (flags == TCF_LUN_RESET) {
  1711. int_to_scsilun(lun, &tsk->lun);
  1712. host_to_fcp_swap((uint8_t *)&tsk->lun,
  1713. sizeof(tsk->lun));
  1714. }
  1715. }
  1716. static void
  1717. qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  1718. {
  1719. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1720. els_iocb->entry_type = ELS_IOCB_TYPE;
  1721. els_iocb->entry_count = 1;
  1722. els_iocb->sys_define = 0;
  1723. els_iocb->entry_status = 0;
  1724. els_iocb->handle = sp->handle;
  1725. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1726. els_iocb->tx_dsd_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1727. els_iocb->vp_index = sp->fcport->vha->vp_idx;
  1728. els_iocb->sof_type = EST_SOFI3;
  1729. els_iocb->rx_dsd_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1730. els_iocb->opcode =
  1731. sp->type == SRB_ELS_CMD_RPT ?
  1732. bsg_job->request->rqst_data.r_els.els_code :
  1733. bsg_job->request->rqst_data.h_els.command_code;
  1734. els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  1735. els_iocb->port_id[1] = sp->fcport->d_id.b.area;
  1736. els_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  1737. els_iocb->control_flags = 0;
  1738. els_iocb->rx_byte_count =
  1739. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1740. els_iocb->tx_byte_count =
  1741. cpu_to_le32(bsg_job->request_payload.payload_len);
  1742. els_iocb->tx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1743. (bsg_job->request_payload.sg_list)));
  1744. els_iocb->tx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1745. (bsg_job->request_payload.sg_list)));
  1746. els_iocb->tx_len = cpu_to_le32(sg_dma_len
  1747. (bsg_job->request_payload.sg_list));
  1748. els_iocb->rx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1749. (bsg_job->reply_payload.sg_list)));
  1750. els_iocb->rx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1751. (bsg_job->reply_payload.sg_list)));
  1752. els_iocb->rx_len = cpu_to_le32(sg_dma_len
  1753. (bsg_job->reply_payload.sg_list));
  1754. sp->fcport->vha->qla_stats.control_requests++;
  1755. }
  1756. static void
  1757. qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
  1758. {
  1759. uint16_t avail_dsds;
  1760. uint32_t *cur_dsd;
  1761. struct scatterlist *sg;
  1762. int index;
  1763. uint16_t tot_dsds;
  1764. scsi_qla_host_t *vha = sp->fcport->vha;
  1765. struct qla_hw_data *ha = vha->hw;
  1766. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1767. int loop_iterartion = 0;
  1768. int entry_count = 1;
  1769. memset(ct_iocb, 0, sizeof(ms_iocb_entry_t));
  1770. ct_iocb->entry_type = CT_IOCB_TYPE;
  1771. ct_iocb->entry_status = 0;
  1772. ct_iocb->handle1 = sp->handle;
  1773. SET_TARGET_ID(ha, ct_iocb->loop_id, sp->fcport->loop_id);
  1774. ct_iocb->status = cpu_to_le16(0);
  1775. ct_iocb->control_flags = cpu_to_le16(0);
  1776. ct_iocb->timeout = 0;
  1777. ct_iocb->cmd_dsd_count =
  1778. cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1779. ct_iocb->total_dsd_count =
  1780. cpu_to_le16(bsg_job->request_payload.sg_cnt + 1);
  1781. ct_iocb->req_bytecount =
  1782. cpu_to_le32(bsg_job->request_payload.payload_len);
  1783. ct_iocb->rsp_bytecount =
  1784. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1785. ct_iocb->dseg_req_address[0] = cpu_to_le32(LSD(sg_dma_address
  1786. (bsg_job->request_payload.sg_list)));
  1787. ct_iocb->dseg_req_address[1] = cpu_to_le32(MSD(sg_dma_address
  1788. (bsg_job->request_payload.sg_list)));
  1789. ct_iocb->dseg_req_length = ct_iocb->req_bytecount;
  1790. ct_iocb->dseg_rsp_address[0] = cpu_to_le32(LSD(sg_dma_address
  1791. (bsg_job->reply_payload.sg_list)));
  1792. ct_iocb->dseg_rsp_address[1] = cpu_to_le32(MSD(sg_dma_address
  1793. (bsg_job->reply_payload.sg_list)));
  1794. ct_iocb->dseg_rsp_length = ct_iocb->rsp_bytecount;
  1795. avail_dsds = 1;
  1796. cur_dsd = (uint32_t *)ct_iocb->dseg_rsp_address;
  1797. index = 0;
  1798. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1799. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1800. dma_addr_t sle_dma;
  1801. cont_a64_entry_t *cont_pkt;
  1802. /* Allocate additional continuation packets? */
  1803. if (avail_dsds == 0) {
  1804. /*
  1805. * Five DSDs are available in the Cont.
  1806. * Type 1 IOCB.
  1807. */
  1808. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1809. vha->hw->req_q_map[0]);
  1810. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1811. avail_dsds = 5;
  1812. entry_count++;
  1813. }
  1814. sle_dma = sg_dma_address(sg);
  1815. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1816. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1817. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1818. loop_iterartion++;
  1819. avail_dsds--;
  1820. }
  1821. ct_iocb->entry_count = entry_count;
  1822. sp->fcport->vha->qla_stats.control_requests++;
  1823. }
  1824. static void
  1825. qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
  1826. {
  1827. uint16_t avail_dsds;
  1828. uint32_t *cur_dsd;
  1829. struct scatterlist *sg;
  1830. int index;
  1831. uint16_t tot_dsds;
  1832. scsi_qla_host_t *vha = sp->fcport->vha;
  1833. struct qla_hw_data *ha = vha->hw;
  1834. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1835. int loop_iterartion = 0;
  1836. int entry_count = 1;
  1837. ct_iocb->entry_type = CT_IOCB_TYPE;
  1838. ct_iocb->entry_status = 0;
  1839. ct_iocb->sys_define = 0;
  1840. ct_iocb->handle = sp->handle;
  1841. ct_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1842. ct_iocb->vp_index = sp->fcport->vha->vp_idx;
  1843. ct_iocb->comp_status = cpu_to_le16(0);
  1844. ct_iocb->cmd_dsd_count =
  1845. cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1846. ct_iocb->timeout = 0;
  1847. ct_iocb->rsp_dsd_count =
  1848. cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1849. ct_iocb->rsp_byte_count =
  1850. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1851. ct_iocb->cmd_byte_count =
  1852. cpu_to_le32(bsg_job->request_payload.payload_len);
  1853. ct_iocb->dseg_0_address[0] = cpu_to_le32(LSD(sg_dma_address
  1854. (bsg_job->request_payload.sg_list)));
  1855. ct_iocb->dseg_0_address[1] = cpu_to_le32(MSD(sg_dma_address
  1856. (bsg_job->request_payload.sg_list)));
  1857. ct_iocb->dseg_0_len = cpu_to_le32(sg_dma_len
  1858. (bsg_job->request_payload.sg_list));
  1859. avail_dsds = 1;
  1860. cur_dsd = (uint32_t *)ct_iocb->dseg_1_address;
  1861. index = 0;
  1862. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1863. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1864. dma_addr_t sle_dma;
  1865. cont_a64_entry_t *cont_pkt;
  1866. /* Allocate additional continuation packets? */
  1867. if (avail_dsds == 0) {
  1868. /*
  1869. * Five DSDs are available in the Cont.
  1870. * Type 1 IOCB.
  1871. */
  1872. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1873. ha->req_q_map[0]);
  1874. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1875. avail_dsds = 5;
  1876. entry_count++;
  1877. }
  1878. sle_dma = sg_dma_address(sg);
  1879. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1880. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1881. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1882. loop_iterartion++;
  1883. avail_dsds--;
  1884. }
  1885. ct_iocb->entry_count = entry_count;
  1886. }
  1887. /*
  1888. * qla82xx_start_scsi() - Send a SCSI command to the ISP
  1889. * @sp: command to send to the ISP
  1890. *
  1891. * Returns non-zero if a failure occurred, else zero.
  1892. */
  1893. int
  1894. qla82xx_start_scsi(srb_t *sp)
  1895. {
  1896. int nseg;
  1897. unsigned long flags;
  1898. struct scsi_cmnd *cmd;
  1899. uint32_t *clr_ptr;
  1900. uint32_t index;
  1901. uint32_t handle;
  1902. uint16_t cnt;
  1903. uint16_t req_cnt;
  1904. uint16_t tot_dsds;
  1905. struct device_reg_82xx __iomem *reg;
  1906. uint32_t dbval;
  1907. uint32_t *fcp_dl;
  1908. uint8_t additional_cdb_len;
  1909. struct ct6_dsd *ctx;
  1910. struct scsi_qla_host *vha = sp->fcport->vha;
  1911. struct qla_hw_data *ha = vha->hw;
  1912. struct req_que *req = NULL;
  1913. struct rsp_que *rsp = NULL;
  1914. /* Setup device pointers. */
  1915. reg = &ha->iobase->isp82;
  1916. cmd = GET_CMD_SP(sp);
  1917. req = vha->req;
  1918. rsp = ha->rsp_q_map[0];
  1919. /* So we know we haven't pci_map'ed anything yet */
  1920. tot_dsds = 0;
  1921. dbval = 0x04 | (ha->portnum << 5);
  1922. /* Send marker if required */
  1923. if (vha->marker_needed != 0) {
  1924. if (qla2x00_marker(vha, req,
  1925. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS) {
  1926. ql_log(ql_log_warn, vha, 0x300c,
  1927. "qla2x00_marker failed for cmd=%p.\n", cmd);
  1928. return QLA_FUNCTION_FAILED;
  1929. }
  1930. vha->marker_needed = 0;
  1931. }
  1932. /* Acquire ring specific lock */
  1933. spin_lock_irqsave(&ha->hardware_lock, flags);
  1934. /* Check for room in outstanding command list. */
  1935. handle = req->current_outstanding_cmd;
  1936. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1937. handle++;
  1938. if (handle == req->num_outstanding_cmds)
  1939. handle = 1;
  1940. if (!req->outstanding_cmds[handle])
  1941. break;
  1942. }
  1943. if (index == req->num_outstanding_cmds)
  1944. goto queuing_error;
  1945. /* Map the sg table so we have an accurate count of sg entries needed */
  1946. if (scsi_sg_count(cmd)) {
  1947. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1948. scsi_sg_count(cmd), cmd->sc_data_direction);
  1949. if (unlikely(!nseg))
  1950. goto queuing_error;
  1951. } else
  1952. nseg = 0;
  1953. tot_dsds = nseg;
  1954. if (tot_dsds > ql2xshiftctondsd) {
  1955. struct cmd_type_6 *cmd_pkt;
  1956. uint16_t more_dsd_lists = 0;
  1957. struct dsd_dma *dsd_ptr;
  1958. uint16_t i;
  1959. more_dsd_lists = qla24xx_calc_dsd_lists(tot_dsds);
  1960. if ((more_dsd_lists + ha->gbl_dsd_inuse) >= NUM_DSD_CHAIN) {
  1961. ql_dbg(ql_dbg_io, vha, 0x300d,
  1962. "Num of DSD list %d is than %d for cmd=%p.\n",
  1963. more_dsd_lists + ha->gbl_dsd_inuse, NUM_DSD_CHAIN,
  1964. cmd);
  1965. goto queuing_error;
  1966. }
  1967. if (more_dsd_lists <= ha->gbl_dsd_avail)
  1968. goto sufficient_dsds;
  1969. else
  1970. more_dsd_lists -= ha->gbl_dsd_avail;
  1971. for (i = 0; i < more_dsd_lists; i++) {
  1972. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  1973. if (!dsd_ptr) {
  1974. ql_log(ql_log_fatal, vha, 0x300e,
  1975. "Failed to allocate memory for dsd_dma "
  1976. "for cmd=%p.\n", cmd);
  1977. goto queuing_error;
  1978. }
  1979. dsd_ptr->dsd_addr = dma_pool_alloc(ha->dl_dma_pool,
  1980. GFP_ATOMIC, &dsd_ptr->dsd_list_dma);
  1981. if (!dsd_ptr->dsd_addr) {
  1982. kfree(dsd_ptr);
  1983. ql_log(ql_log_fatal, vha, 0x300f,
  1984. "Failed to allocate memory for dsd_addr "
  1985. "for cmd=%p.\n", cmd);
  1986. goto queuing_error;
  1987. }
  1988. list_add_tail(&dsd_ptr->list, &ha->gbl_dsd_list);
  1989. ha->gbl_dsd_avail++;
  1990. }
  1991. sufficient_dsds:
  1992. req_cnt = 1;
  1993. if (req->cnt < (req_cnt + 2)) {
  1994. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  1995. &reg->req_q_out[0]);
  1996. if (req->ring_index < cnt)
  1997. req->cnt = cnt - req->ring_index;
  1998. else
  1999. req->cnt = req->length -
  2000. (req->ring_index - cnt);
  2001. if (req->cnt < (req_cnt + 2))
  2002. goto queuing_error;
  2003. }
  2004. ctx = sp->u.scmd.ctx =
  2005. mempool_alloc(ha->ctx_mempool, GFP_ATOMIC);
  2006. if (!ctx) {
  2007. ql_log(ql_log_fatal, vha, 0x3010,
  2008. "Failed to allocate ctx for cmd=%p.\n", cmd);
  2009. goto queuing_error;
  2010. }
  2011. memset(ctx, 0, sizeof(struct ct6_dsd));
  2012. ctx->fcp_cmnd = dma_pool_alloc(ha->fcp_cmnd_dma_pool,
  2013. GFP_ATOMIC, &ctx->fcp_cmnd_dma);
  2014. if (!ctx->fcp_cmnd) {
  2015. ql_log(ql_log_fatal, vha, 0x3011,
  2016. "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd);
  2017. goto queuing_error;
  2018. }
  2019. /* Initialize the DSD list and dma handle */
  2020. INIT_LIST_HEAD(&ctx->dsd_list);
  2021. ctx->dsd_use_cnt = 0;
  2022. if (cmd->cmd_len > 16) {
  2023. additional_cdb_len = cmd->cmd_len - 16;
  2024. if ((cmd->cmd_len % 4) != 0) {
  2025. /* SCSI command bigger than 16 bytes must be
  2026. * multiple of 4
  2027. */
  2028. ql_log(ql_log_warn, vha, 0x3012,
  2029. "scsi cmd len %d not multiple of 4 "
  2030. "for cmd=%p.\n", cmd->cmd_len, cmd);
  2031. goto queuing_error_fcp_cmnd;
  2032. }
  2033. ctx->fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  2034. } else {
  2035. additional_cdb_len = 0;
  2036. ctx->fcp_cmnd_len = 12 + 16 + 4;
  2037. }
  2038. cmd_pkt = (struct cmd_type_6 *)req->ring_ptr;
  2039. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2040. /* Zero out remaining portion of packet. */
  2041. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  2042. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2043. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2044. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2045. /* Set NPORT-ID and LUN number*/
  2046. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2047. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2048. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2049. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2050. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2051. /* Build IOCB segments */
  2052. if (qla24xx_build_scsi_type_6_iocbs(sp, cmd_pkt, tot_dsds))
  2053. goto queuing_error_fcp_cmnd;
  2054. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2055. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  2056. /* build FCP_CMND IU */
  2057. memset(ctx->fcp_cmnd, 0, sizeof(struct fcp_cmnd));
  2058. int_to_scsilun(cmd->device->lun, &ctx->fcp_cmnd->lun);
  2059. ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len;
  2060. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  2061. ctx->fcp_cmnd->additional_cdb_len |= 1;
  2062. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  2063. ctx->fcp_cmnd->additional_cdb_len |= 2;
  2064. /* Populate the FCP_PRIO. */
  2065. if (ha->flags.fcp_prio_enabled)
  2066. ctx->fcp_cmnd->task_attribute |=
  2067. sp->fcport->fcp_prio << 3;
  2068. memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  2069. fcp_dl = (uint32_t *)(ctx->fcp_cmnd->cdb + 16 +
  2070. additional_cdb_len);
  2071. *fcp_dl = htonl((uint32_t)scsi_bufflen(cmd));
  2072. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len);
  2073. cmd_pkt->fcp_cmnd_dseg_address[0] =
  2074. cpu_to_le32(LSD(ctx->fcp_cmnd_dma));
  2075. cmd_pkt->fcp_cmnd_dseg_address[1] =
  2076. cpu_to_le32(MSD(ctx->fcp_cmnd_dma));
  2077. sp->flags |= SRB_FCP_CMND_DMA_VALID;
  2078. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2079. /* Set total data segment count. */
  2080. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2081. /* Specify response queue number where
  2082. * completion should happen
  2083. */
  2084. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2085. } else {
  2086. struct cmd_type_7 *cmd_pkt;
  2087. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2088. if (req->cnt < (req_cnt + 2)) {
  2089. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2090. &reg->req_q_out[0]);
  2091. if (req->ring_index < cnt)
  2092. req->cnt = cnt - req->ring_index;
  2093. else
  2094. req->cnt = req->length -
  2095. (req->ring_index - cnt);
  2096. }
  2097. if (req->cnt < (req_cnt + 2))
  2098. goto queuing_error;
  2099. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  2100. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2101. /* Zero out remaining portion of packet. */
  2102. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2103. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2104. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2105. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2106. /* Set NPORT-ID and LUN number*/
  2107. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2108. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2109. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2110. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2111. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2112. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2113. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun,
  2114. sizeof(cmd_pkt->lun));
  2115. /* Populate the FCP_PRIO. */
  2116. if (ha->flags.fcp_prio_enabled)
  2117. cmd_pkt->task |= sp->fcport->fcp_prio << 3;
  2118. /* Load SCSI command packet. */
  2119. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  2120. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  2121. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2122. /* Build IOCB segments */
  2123. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  2124. /* Set total data segment count. */
  2125. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2126. /* Specify response queue number where
  2127. * completion should happen.
  2128. */
  2129. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2130. }
  2131. /* Build command packet. */
  2132. req->current_outstanding_cmd = handle;
  2133. req->outstanding_cmds[handle] = sp;
  2134. sp->handle = handle;
  2135. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  2136. req->cnt -= req_cnt;
  2137. wmb();
  2138. /* Adjust ring index. */
  2139. req->ring_index++;
  2140. if (req->ring_index == req->length) {
  2141. req->ring_index = 0;
  2142. req->ring_ptr = req->ring;
  2143. } else
  2144. req->ring_ptr++;
  2145. sp->flags |= SRB_DMA_VALID;
  2146. /* Set chip new ring index. */
  2147. /* write, read and verify logic */
  2148. dbval = dbval | (req->id << 8) | (req->ring_index << 16);
  2149. if (ql2xdbwr)
  2150. qla82xx_wr_32(ha, (uintptr_t __force)ha->nxdb_wr_ptr, dbval);
  2151. else {
  2152. WRT_REG_DWORD(ha->nxdb_wr_ptr, dbval);
  2153. wmb();
  2154. while (RD_REG_DWORD(ha->nxdb_rd_ptr) != dbval) {
  2155. WRT_REG_DWORD(ha->nxdb_wr_ptr, dbval);
  2156. wmb();
  2157. }
  2158. }
  2159. /* Manage unprocessed RIO/ZIO commands in response queue. */
  2160. if (vha->flags.process_response_queue &&
  2161. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  2162. qla24xx_process_response_queue(vha, rsp);
  2163. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2164. return QLA_SUCCESS;
  2165. queuing_error_fcp_cmnd:
  2166. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma);
  2167. queuing_error:
  2168. if (tot_dsds)
  2169. scsi_dma_unmap(cmd);
  2170. if (sp->u.scmd.ctx) {
  2171. mempool_free(sp->u.scmd.ctx, ha->ctx_mempool);
  2172. sp->u.scmd.ctx = NULL;
  2173. }
  2174. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2175. return QLA_FUNCTION_FAILED;
  2176. }
  2177. static void
  2178. qla24xx_abort_iocb(srb_t *sp, struct abort_entry_24xx *abt_iocb)
  2179. {
  2180. struct srb_iocb *aio = &sp->u.iocb_cmd;
  2181. scsi_qla_host_t *vha = sp->fcport->vha;
  2182. struct req_que *req = vha->req;
  2183. memset(abt_iocb, 0, sizeof(struct abort_entry_24xx));
  2184. abt_iocb->entry_type = ABORT_IOCB_TYPE;
  2185. abt_iocb->entry_count = 1;
  2186. abt_iocb->handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
  2187. abt_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2188. abt_iocb->handle_to_abort =
  2189. cpu_to_le32(MAKE_HANDLE(req->id, aio->u.abt.cmd_hndl));
  2190. abt_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  2191. abt_iocb->port_id[1] = sp->fcport->d_id.b.area;
  2192. abt_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  2193. abt_iocb->vp_index = vha->vp_idx;
  2194. abt_iocb->req_que_no = cpu_to_le16(req->id);
  2195. /* Send the command to the firmware */
  2196. wmb();
  2197. }
  2198. int
  2199. qla2x00_start_sp(srb_t *sp)
  2200. {
  2201. int rval;
  2202. struct qla_hw_data *ha = sp->fcport->vha->hw;
  2203. void *pkt;
  2204. unsigned long flags;
  2205. rval = QLA_FUNCTION_FAILED;
  2206. spin_lock_irqsave(&ha->hardware_lock, flags);
  2207. pkt = qla2x00_alloc_iocbs(sp->fcport->vha, sp);
  2208. if (!pkt) {
  2209. ql_log(ql_log_warn, sp->fcport->vha, 0x700c,
  2210. "qla2x00_alloc_iocbs failed.\n");
  2211. goto done;
  2212. }
  2213. rval = QLA_SUCCESS;
  2214. switch (sp->type) {
  2215. case SRB_LOGIN_CMD:
  2216. IS_FWI2_CAPABLE(ha) ?
  2217. qla24xx_login_iocb(sp, pkt) :
  2218. qla2x00_login_iocb(sp, pkt);
  2219. break;
  2220. case SRB_LOGOUT_CMD:
  2221. IS_FWI2_CAPABLE(ha) ?
  2222. qla24xx_logout_iocb(sp, pkt) :
  2223. qla2x00_logout_iocb(sp, pkt);
  2224. break;
  2225. case SRB_ELS_CMD_RPT:
  2226. case SRB_ELS_CMD_HST:
  2227. qla24xx_els_iocb(sp, pkt);
  2228. break;
  2229. case SRB_CT_CMD:
  2230. IS_FWI2_CAPABLE(ha) ?
  2231. qla24xx_ct_iocb(sp, pkt) :
  2232. qla2x00_ct_iocb(sp, pkt);
  2233. break;
  2234. case SRB_ADISC_CMD:
  2235. IS_FWI2_CAPABLE(ha) ?
  2236. qla24xx_adisc_iocb(sp, pkt) :
  2237. qla2x00_adisc_iocb(sp, pkt);
  2238. break;
  2239. case SRB_TM_CMD:
  2240. IS_QLAFX00(ha) ?
  2241. qlafx00_tm_iocb(sp, pkt) :
  2242. qla24xx_tm_iocb(sp, pkt);
  2243. break;
  2244. case SRB_FXIOCB_DCMD:
  2245. case SRB_FXIOCB_BCMD:
  2246. qlafx00_fxdisc_iocb(sp, pkt);
  2247. break;
  2248. case SRB_ABT_CMD:
  2249. IS_QLAFX00(ha) ?
  2250. qlafx00_abort_iocb(sp, pkt) :
  2251. qla24xx_abort_iocb(sp, pkt);
  2252. break;
  2253. default:
  2254. break;
  2255. }
  2256. wmb();
  2257. qla2x00_start_iocbs(sp->fcport->vha, ha->req_q_map[0]);
  2258. done:
  2259. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2260. return rval;
  2261. }
  2262. static void
  2263. qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
  2264. struct cmd_bidir *cmd_pkt, uint32_t tot_dsds)
  2265. {
  2266. uint16_t avail_dsds;
  2267. uint32_t *cur_dsd;
  2268. uint32_t req_data_len = 0;
  2269. uint32_t rsp_data_len = 0;
  2270. struct scatterlist *sg;
  2271. int index;
  2272. int entry_count = 1;
  2273. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  2274. /*Update entry type to indicate bidir command */
  2275. *((uint32_t *)(&cmd_pkt->entry_type)) =
  2276. cpu_to_le32(COMMAND_BIDIRECTIONAL);
  2277. /* Set the transfer direction, in this set both flags
  2278. * Also set the BD_WRAP_BACK flag, firmware will take care
  2279. * assigning DID=SID for outgoing pkts.
  2280. */
  2281. cmd_pkt->wr_dseg_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2282. cmd_pkt->rd_dseg_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  2283. cmd_pkt->control_flags = cpu_to_le16(BD_WRITE_DATA | BD_READ_DATA |
  2284. BD_WRAP_BACK);
  2285. req_data_len = rsp_data_len = bsg_job->request_payload.payload_len;
  2286. cmd_pkt->wr_byte_count = cpu_to_le32(req_data_len);
  2287. cmd_pkt->rd_byte_count = cpu_to_le32(rsp_data_len);
  2288. cmd_pkt->timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
  2289. vha->bidi_stats.transfer_bytes += req_data_len;
  2290. vha->bidi_stats.io_count++;
  2291. vha->qla_stats.output_bytes += req_data_len;
  2292. vha->qla_stats.output_requests++;
  2293. /* Only one dsd is available for bidirectional IOCB, remaining dsds
  2294. * are bundled in continuation iocb
  2295. */
  2296. avail_dsds = 1;
  2297. cur_dsd = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  2298. index = 0;
  2299. for_each_sg(bsg_job->request_payload.sg_list, sg,
  2300. bsg_job->request_payload.sg_cnt, index) {
  2301. dma_addr_t sle_dma;
  2302. cont_a64_entry_t *cont_pkt;
  2303. /* Allocate additional continuation packets */
  2304. if (avail_dsds == 0) {
  2305. /* Continuation type 1 IOCB can accomodate
  2306. * 5 DSDS
  2307. */
  2308. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2309. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2310. avail_dsds = 5;
  2311. entry_count++;
  2312. }
  2313. sle_dma = sg_dma_address(sg);
  2314. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2315. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2316. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2317. avail_dsds--;
  2318. }
  2319. /* For read request DSD will always goes to continuation IOCB
  2320. * and follow the write DSD. If there is room on the current IOCB
  2321. * then it is added to that IOCB else new continuation IOCB is
  2322. * allocated.
  2323. */
  2324. for_each_sg(bsg_job->reply_payload.sg_list, sg,
  2325. bsg_job->reply_payload.sg_cnt, index) {
  2326. dma_addr_t sle_dma;
  2327. cont_a64_entry_t *cont_pkt;
  2328. /* Allocate additional continuation packets */
  2329. if (avail_dsds == 0) {
  2330. /* Continuation type 1 IOCB can accomodate
  2331. * 5 DSDS
  2332. */
  2333. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2334. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2335. avail_dsds = 5;
  2336. entry_count++;
  2337. }
  2338. sle_dma = sg_dma_address(sg);
  2339. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2340. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2341. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2342. avail_dsds--;
  2343. }
  2344. /* This value should be same as number of IOCB required for this cmd */
  2345. cmd_pkt->entry_count = entry_count;
  2346. }
  2347. int
  2348. qla2x00_start_bidir(srb_t *sp, struct scsi_qla_host *vha, uint32_t tot_dsds)
  2349. {
  2350. struct qla_hw_data *ha = vha->hw;
  2351. unsigned long flags;
  2352. uint32_t handle;
  2353. uint32_t index;
  2354. uint16_t req_cnt;
  2355. uint16_t cnt;
  2356. uint32_t *clr_ptr;
  2357. struct cmd_bidir *cmd_pkt = NULL;
  2358. struct rsp_que *rsp;
  2359. struct req_que *req;
  2360. int rval = EXT_STATUS_OK;
  2361. rval = QLA_SUCCESS;
  2362. rsp = ha->rsp_q_map[0];
  2363. req = vha->req;
  2364. /* Send marker if required */
  2365. if (vha->marker_needed != 0) {
  2366. if (qla2x00_marker(vha, req,
  2367. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS)
  2368. return EXT_STATUS_MAILBOX;
  2369. vha->marker_needed = 0;
  2370. }
  2371. /* Acquire ring specific lock */
  2372. spin_lock_irqsave(&ha->hardware_lock, flags);
  2373. /* Check for room in outstanding command list. */
  2374. handle = req->current_outstanding_cmd;
  2375. for (index = 1; index < req->num_outstanding_cmds; index++) {
  2376. handle++;
  2377. if (handle == req->num_outstanding_cmds)
  2378. handle = 1;
  2379. if (!req->outstanding_cmds[handle])
  2380. break;
  2381. }
  2382. if (index == req->num_outstanding_cmds) {
  2383. rval = EXT_STATUS_BUSY;
  2384. goto queuing_error;
  2385. }
  2386. /* Calculate number of IOCB required */
  2387. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2388. /* Check for room on request queue. */
  2389. if (req->cnt < req_cnt + 2) {
  2390. cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr :
  2391. RD_REG_DWORD_RELAXED(req->req_q_out);
  2392. if (req->ring_index < cnt)
  2393. req->cnt = cnt - req->ring_index;
  2394. else
  2395. req->cnt = req->length -
  2396. (req->ring_index - cnt);
  2397. }
  2398. if (req->cnt < req_cnt + 2) {
  2399. rval = EXT_STATUS_BUSY;
  2400. goto queuing_error;
  2401. }
  2402. cmd_pkt = (struct cmd_bidir *)req->ring_ptr;
  2403. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2404. /* Zero out remaining portion of packet. */
  2405. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2406. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2407. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2408. /* Set NPORT-ID (of vha)*/
  2409. cmd_pkt->nport_handle = cpu_to_le16(vha->self_login_loop_id);
  2410. cmd_pkt->port_id[0] = vha->d_id.b.al_pa;
  2411. cmd_pkt->port_id[1] = vha->d_id.b.area;
  2412. cmd_pkt->port_id[2] = vha->d_id.b.domain;
  2413. qla25xx_build_bidir_iocb(sp, vha, cmd_pkt, tot_dsds);
  2414. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2415. /* Build command packet. */
  2416. req->current_outstanding_cmd = handle;
  2417. req->outstanding_cmds[handle] = sp;
  2418. sp->handle = handle;
  2419. req->cnt -= req_cnt;
  2420. /* Send the command to the firmware */
  2421. wmb();
  2422. qla2x00_start_iocbs(vha, req);
  2423. queuing_error:
  2424. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2425. return rval;
  2426. }