sym_hipd.c 144 KB

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  1. /*
  2. * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family
  3. * of PCI-SCSI IO processors.
  4. *
  5. * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr>
  6. * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx>
  7. *
  8. * This driver is derived from the Linux sym53c8xx driver.
  9. * Copyright (C) 1998-2000 Gerard Roudier
  10. *
  11. * The sym53c8xx driver is derived from the ncr53c8xx driver that had been
  12. * a port of the FreeBSD ncr driver to Linux-1.2.13.
  13. *
  14. * The original ncr driver has been written for 386bsd and FreeBSD by
  15. * Wolfgang Stanglmeier <wolf@cologne.de>
  16. * Stefan Esser <se@mi.Uni-Koeln.de>
  17. * Copyright (C) 1994 Wolfgang Stanglmeier
  18. *
  19. * Other major contributions:
  20. *
  21. * NVRAM detection and reading.
  22. * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
  23. *
  24. *-----------------------------------------------------------------------------
  25. *
  26. * This program is free software; you can redistribute it and/or modify
  27. * it under the terms of the GNU General Public License as published by
  28. * the Free Software Foundation; either version 2 of the License, or
  29. * (at your option) any later version.
  30. *
  31. * This program is distributed in the hope that it will be useful,
  32. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  33. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  34. * GNU General Public License for more details.
  35. *
  36. * You should have received a copy of the GNU General Public License
  37. * along with this program; if not, write to the Free Software
  38. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  39. */
  40. #include <linux/slab.h>
  41. #include <asm/param.h> /* for timeouts in units of HZ */
  42. #include "sym_glue.h"
  43. #include "sym_nvram.h"
  44. #if 0
  45. #define SYM_DEBUG_GENERIC_SUPPORT
  46. #endif
  47. /*
  48. * Needed function prototypes.
  49. */
  50. static void sym_int_ma (struct sym_hcb *np);
  51. static void sym_int_sir(struct sym_hcb *);
  52. static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np);
  53. static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa);
  54. static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln);
  55. static void sym_complete_error (struct sym_hcb *np, struct sym_ccb *cp);
  56. static void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp);
  57. static int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp);
  58. /*
  59. * Print a buffer in hexadecimal format with a ".\n" at end.
  60. */
  61. static void sym_printl_hex(u_char *p, int n)
  62. {
  63. while (n-- > 0)
  64. printf (" %x", *p++);
  65. printf (".\n");
  66. }
  67. static void sym_print_msg(struct sym_ccb *cp, char *label, u_char *msg)
  68. {
  69. sym_print_addr(cp->cmd, "%s: ", label);
  70. spi_print_msg(msg);
  71. printf("\n");
  72. }
  73. static void sym_print_nego_msg(struct sym_hcb *np, int target, char *label, u_char *msg)
  74. {
  75. struct sym_tcb *tp = &np->target[target];
  76. dev_info(&tp->starget->dev, "%s: ", label);
  77. spi_print_msg(msg);
  78. printf("\n");
  79. }
  80. /*
  81. * Print something that tells about extended errors.
  82. */
  83. void sym_print_xerr(struct scsi_cmnd *cmd, int x_status)
  84. {
  85. if (x_status & XE_PARITY_ERR) {
  86. sym_print_addr(cmd, "unrecovered SCSI parity error.\n");
  87. }
  88. if (x_status & XE_EXTRA_DATA) {
  89. sym_print_addr(cmd, "extraneous data discarded.\n");
  90. }
  91. if (x_status & XE_BAD_PHASE) {
  92. sym_print_addr(cmd, "illegal scsi phase (4/5).\n");
  93. }
  94. if (x_status & XE_SODL_UNRUN) {
  95. sym_print_addr(cmd, "ODD transfer in DATA OUT phase.\n");
  96. }
  97. if (x_status & XE_SWIDE_OVRUN) {
  98. sym_print_addr(cmd, "ODD transfer in DATA IN phase.\n");
  99. }
  100. }
  101. /*
  102. * Return a string for SCSI BUS mode.
  103. */
  104. static char *sym_scsi_bus_mode(int mode)
  105. {
  106. switch(mode) {
  107. case SMODE_HVD: return "HVD";
  108. case SMODE_SE: return "SE";
  109. case SMODE_LVD: return "LVD";
  110. }
  111. return "??";
  112. }
  113. /*
  114. * Soft reset the chip.
  115. *
  116. * Raising SRST when the chip is running may cause
  117. * problems on dual function chips (see below).
  118. * On the other hand, LVD devices need some delay
  119. * to settle and report actual BUS mode in STEST4.
  120. */
  121. static void sym_chip_reset (struct sym_hcb *np)
  122. {
  123. OUTB(np, nc_istat, SRST);
  124. INB(np, nc_mbox1);
  125. udelay(10);
  126. OUTB(np, nc_istat, 0);
  127. INB(np, nc_mbox1);
  128. udelay(2000); /* For BUS MODE to settle */
  129. }
  130. /*
  131. * Really soft reset the chip.:)
  132. *
  133. * Some 896 and 876 chip revisions may hang-up if we set
  134. * the SRST (soft reset) bit at the wrong time when SCRIPTS
  135. * are running.
  136. * So, we need to abort the current operation prior to
  137. * soft resetting the chip.
  138. */
  139. static void sym_soft_reset (struct sym_hcb *np)
  140. {
  141. u_char istat = 0;
  142. int i;
  143. if (!(np->features & FE_ISTAT1) || !(INB(np, nc_istat1) & SCRUN))
  144. goto do_chip_reset;
  145. OUTB(np, nc_istat, CABRT);
  146. for (i = 100000 ; i ; --i) {
  147. istat = INB(np, nc_istat);
  148. if (istat & SIP) {
  149. INW(np, nc_sist);
  150. }
  151. else if (istat & DIP) {
  152. if (INB(np, nc_dstat) & ABRT)
  153. break;
  154. }
  155. udelay(5);
  156. }
  157. OUTB(np, nc_istat, 0);
  158. if (!i)
  159. printf("%s: unable to abort current chip operation, "
  160. "ISTAT=0x%02x.\n", sym_name(np), istat);
  161. do_chip_reset:
  162. sym_chip_reset(np);
  163. }
  164. /*
  165. * Start reset process.
  166. *
  167. * The interrupt handler will reinitialize the chip.
  168. */
  169. static void sym_start_reset(struct sym_hcb *np)
  170. {
  171. sym_reset_scsi_bus(np, 1);
  172. }
  173. int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int)
  174. {
  175. u32 term;
  176. int retv = 0;
  177. sym_soft_reset(np); /* Soft reset the chip */
  178. if (enab_int)
  179. OUTW(np, nc_sien, RST);
  180. /*
  181. * Enable Tolerant, reset IRQD if present and
  182. * properly set IRQ mode, prior to resetting the bus.
  183. */
  184. OUTB(np, nc_stest3, TE);
  185. OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM));
  186. OUTB(np, nc_scntl1, CRST);
  187. INB(np, nc_mbox1);
  188. udelay(200);
  189. if (!SYM_SETUP_SCSI_BUS_CHECK)
  190. goto out;
  191. /*
  192. * Check for no terminators or SCSI bus shorts to ground.
  193. * Read SCSI data bus, data parity bits and control signals.
  194. * We are expecting RESET to be TRUE and other signals to be
  195. * FALSE.
  196. */
  197. term = INB(np, nc_sstat0);
  198. term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */
  199. term |= ((INB(np, nc_sstat2) & 0x01) << 26) | /* sdp1 */
  200. ((INW(np, nc_sbdl) & 0xff) << 9) | /* d7-0 */
  201. ((INW(np, nc_sbdl) & 0xff00) << 10) | /* d15-8 */
  202. INB(np, nc_sbcl); /* req ack bsy sel atn msg cd io */
  203. if (!np->maxwide)
  204. term &= 0x3ffff;
  205. if (term != (2<<7)) {
  206. printf("%s: suspicious SCSI data while resetting the BUS.\n",
  207. sym_name(np));
  208. printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
  209. "0x%lx, expecting 0x%lx\n",
  210. sym_name(np),
  211. (np->features & FE_WIDE) ? "dp1,d15-8," : "",
  212. (u_long)term, (u_long)(2<<7));
  213. if (SYM_SETUP_SCSI_BUS_CHECK == 1)
  214. retv = 1;
  215. }
  216. out:
  217. OUTB(np, nc_scntl1, 0);
  218. return retv;
  219. }
  220. /*
  221. * Select SCSI clock frequency
  222. */
  223. static void sym_selectclock(struct sym_hcb *np, u_char scntl3)
  224. {
  225. /*
  226. * If multiplier not present or not selected, leave here.
  227. */
  228. if (np->multiplier <= 1) {
  229. OUTB(np, nc_scntl3, scntl3);
  230. return;
  231. }
  232. if (sym_verbose >= 2)
  233. printf ("%s: enabling clock multiplier\n", sym_name(np));
  234. OUTB(np, nc_stest1, DBLEN); /* Enable clock multiplier */
  235. /*
  236. * Wait for the LCKFRQ bit to be set if supported by the chip.
  237. * Otherwise wait 50 micro-seconds (at least).
  238. */
  239. if (np->features & FE_LCKFRQ) {
  240. int i = 20;
  241. while (!(INB(np, nc_stest4) & LCKFRQ) && --i > 0)
  242. udelay(20);
  243. if (!i)
  244. printf("%s: the chip cannot lock the frequency\n",
  245. sym_name(np));
  246. } else {
  247. INB(np, nc_mbox1);
  248. udelay(50+10);
  249. }
  250. OUTB(np, nc_stest3, HSC); /* Halt the scsi clock */
  251. OUTB(np, nc_scntl3, scntl3);
  252. OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
  253. OUTB(np, nc_stest3, 0x00); /* Restart scsi clock */
  254. }
  255. /*
  256. * Determine the chip's clock frequency.
  257. *
  258. * This is essential for the negotiation of the synchronous
  259. * transfer rate.
  260. *
  261. * Note: we have to return the correct value.
  262. * THERE IS NO SAFE DEFAULT VALUE.
  263. *
  264. * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
  265. * 53C860 and 53C875 rev. 1 support fast20 transfers but
  266. * do not have a clock doubler and so are provided with a
  267. * 80 MHz clock. All other fast20 boards incorporate a doubler
  268. * and so should be delivered with a 40 MHz clock.
  269. * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
  270. * clock and provide a clock quadrupler (160 Mhz).
  271. */
  272. /*
  273. * calculate SCSI clock frequency (in KHz)
  274. */
  275. static unsigned getfreq (struct sym_hcb *np, int gen)
  276. {
  277. unsigned int ms = 0;
  278. unsigned int f;
  279. /*
  280. * Measure GEN timer delay in order
  281. * to calculate SCSI clock frequency
  282. *
  283. * This code will never execute too
  284. * many loop iterations (if DELAY is
  285. * reasonably correct). It could get
  286. * too low a delay (too high a freq.)
  287. * if the CPU is slow executing the
  288. * loop for some reason (an NMI, for
  289. * example). For this reason we will
  290. * if multiple measurements are to be
  291. * performed trust the higher delay
  292. * (lower frequency returned).
  293. */
  294. OUTW(np, nc_sien, 0); /* mask all scsi interrupts */
  295. INW(np, nc_sist); /* clear pending scsi interrupt */
  296. OUTB(np, nc_dien, 0); /* mask all dma interrupts */
  297. INW(np, nc_sist); /* another one, just to be sure :) */
  298. /*
  299. * The C1010-33 core does not report GEN in SIST,
  300. * if this interrupt is masked in SIEN.
  301. * I don't know yet if the C1010-66 behaves the same way.
  302. */
  303. if (np->features & FE_C10) {
  304. OUTW(np, nc_sien, GEN);
  305. OUTB(np, nc_istat1, SIRQD);
  306. }
  307. OUTB(np, nc_scntl3, 4); /* set pre-scaler to divide by 3 */
  308. OUTB(np, nc_stime1, 0); /* disable general purpose timer */
  309. OUTB(np, nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */
  310. while (!(INW(np, nc_sist) & GEN) && ms++ < 100000)
  311. udelay(1000/4); /* count in 1/4 of ms */
  312. OUTB(np, nc_stime1, 0); /* disable general purpose timer */
  313. /*
  314. * Undo C1010-33 specific settings.
  315. */
  316. if (np->features & FE_C10) {
  317. OUTW(np, nc_sien, 0);
  318. OUTB(np, nc_istat1, 0);
  319. }
  320. /*
  321. * set prescaler to divide by whatever 0 means
  322. * 0 ought to choose divide by 2, but appears
  323. * to set divide by 3.5 mode in my 53c810 ...
  324. */
  325. OUTB(np, nc_scntl3, 0);
  326. /*
  327. * adjust for prescaler, and convert into KHz
  328. */
  329. f = ms ? ((1 << gen) * (4340*4)) / ms : 0;
  330. /*
  331. * The C1010-33 result is biased by a factor
  332. * of 2/3 compared to earlier chips.
  333. */
  334. if (np->features & FE_C10)
  335. f = (f * 2) / 3;
  336. if (sym_verbose >= 2)
  337. printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
  338. sym_name(np), gen, ms/4, f);
  339. return f;
  340. }
  341. static unsigned sym_getfreq (struct sym_hcb *np)
  342. {
  343. u_int f1, f2;
  344. int gen = 8;
  345. getfreq (np, gen); /* throw away first result */
  346. f1 = getfreq (np, gen);
  347. f2 = getfreq (np, gen);
  348. if (f1 > f2) f1 = f2; /* trust lower result */
  349. return f1;
  350. }
  351. /*
  352. * Get/probe chip SCSI clock frequency
  353. */
  354. static void sym_getclock (struct sym_hcb *np, int mult)
  355. {
  356. unsigned char scntl3 = np->sv_scntl3;
  357. unsigned char stest1 = np->sv_stest1;
  358. unsigned f1;
  359. np->multiplier = 1;
  360. f1 = 40000;
  361. /*
  362. * True with 875/895/896/895A with clock multiplier selected
  363. */
  364. if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
  365. if (sym_verbose >= 2)
  366. printf ("%s: clock multiplier found\n", sym_name(np));
  367. np->multiplier = mult;
  368. }
  369. /*
  370. * If multiplier not found or scntl3 not 7,5,3,
  371. * reset chip and get frequency from general purpose timer.
  372. * Otherwise trust scntl3 BIOS setting.
  373. */
  374. if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
  375. OUTB(np, nc_stest1, 0); /* make sure doubler is OFF */
  376. f1 = sym_getfreq (np);
  377. if (sym_verbose)
  378. printf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
  379. if (f1 < 45000) f1 = 40000;
  380. else if (f1 < 55000) f1 = 50000;
  381. else f1 = 80000;
  382. if (f1 < 80000 && mult > 1) {
  383. if (sym_verbose >= 2)
  384. printf ("%s: clock multiplier assumed\n",
  385. sym_name(np));
  386. np->multiplier = mult;
  387. }
  388. } else {
  389. if ((scntl3 & 7) == 3) f1 = 40000;
  390. else if ((scntl3 & 7) == 5) f1 = 80000;
  391. else f1 = 160000;
  392. f1 /= np->multiplier;
  393. }
  394. /*
  395. * Compute controller synchronous parameters.
  396. */
  397. f1 *= np->multiplier;
  398. np->clock_khz = f1;
  399. }
  400. /*
  401. * Get/probe PCI clock frequency
  402. */
  403. static int sym_getpciclock (struct sym_hcb *np)
  404. {
  405. int f = 0;
  406. /*
  407. * For now, we only need to know about the actual
  408. * PCI BUS clock frequency for C1010-66 chips.
  409. */
  410. #if 1
  411. if (np->features & FE_66MHZ) {
  412. #else
  413. if (1) {
  414. #endif
  415. OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
  416. f = sym_getfreq(np);
  417. OUTB(np, nc_stest1, 0);
  418. }
  419. np->pciclk_khz = f;
  420. return f;
  421. }
  422. /*
  423. * SYMBIOS chip clock divisor table.
  424. *
  425. * Divisors are multiplied by 10,000,000 in order to make
  426. * calculations more simple.
  427. */
  428. #define _5M 5000000
  429. static const u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
  430. /*
  431. * Get clock factor and sync divisor for a given
  432. * synchronous factor period.
  433. */
  434. static int
  435. sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
  436. {
  437. u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */
  438. int div = np->clock_divn; /* Number of divisors supported */
  439. u32 fak; /* Sync factor in sxfer */
  440. u32 per; /* Period in tenths of ns */
  441. u32 kpc; /* (per * clk) */
  442. int ret;
  443. /*
  444. * Compute the synchronous period in tenths of nano-seconds
  445. */
  446. if (dt && sfac <= 9) per = 125;
  447. else if (sfac <= 10) per = 250;
  448. else if (sfac == 11) per = 303;
  449. else if (sfac == 12) per = 500;
  450. else per = 40 * sfac;
  451. ret = per;
  452. kpc = per * clk;
  453. if (dt)
  454. kpc <<= 1;
  455. /*
  456. * For earliest C10 revision 0, we cannot use extra
  457. * clocks for the setting of the SCSI clocking.
  458. * Note that this limits the lowest sync data transfer
  459. * to 5 Mega-transfers per second and may result in
  460. * using higher clock divisors.
  461. */
  462. #if 1
  463. if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
  464. /*
  465. * Look for the lowest clock divisor that allows an
  466. * output speed not faster than the period.
  467. */
  468. while (div > 0) {
  469. --div;
  470. if (kpc > (div_10M[div] << 2)) {
  471. ++div;
  472. break;
  473. }
  474. }
  475. fak = 0; /* No extra clocks */
  476. if (div == np->clock_divn) { /* Are we too fast ? */
  477. ret = -1;
  478. }
  479. *divp = div;
  480. *fakp = fak;
  481. return ret;
  482. }
  483. #endif
  484. /*
  485. * Look for the greatest clock divisor that allows an
  486. * input speed faster than the period.
  487. */
  488. while (--div > 0)
  489. if (kpc >= (div_10M[div] << 2)) break;
  490. /*
  491. * Calculate the lowest clock factor that allows an output
  492. * speed not faster than the period, and the max output speed.
  493. * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
  494. * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
  495. */
  496. if (dt) {
  497. fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
  498. /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
  499. } else {
  500. fak = (kpc - 1) / div_10M[div] + 1 - 4;
  501. /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
  502. }
  503. /*
  504. * Check against our hardware limits, or bugs :).
  505. */
  506. if (fak > 2) {
  507. fak = 2;
  508. ret = -1;
  509. }
  510. /*
  511. * Compute and return sync parameters.
  512. */
  513. *divp = div;
  514. *fakp = fak;
  515. return ret;
  516. }
  517. /*
  518. * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
  519. * 128 transfers. All chips support at least 16 transfers
  520. * bursts. The 825A, 875 and 895 chips support bursts of up
  521. * to 128 transfers and the 895A and 896 support bursts of up
  522. * to 64 transfers. All other chips support up to 16
  523. * transfers bursts.
  524. *
  525. * For PCI 32 bit data transfers each transfer is a DWORD.
  526. * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
  527. *
  528. * We use log base 2 (burst length) as internal code, with
  529. * value 0 meaning "burst disabled".
  530. */
  531. /*
  532. * Burst length from burst code.
  533. */
  534. #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
  535. /*
  536. * Burst code from io register bits.
  537. */
  538. #define burst_code(dmode, ctest4, ctest5) \
  539. (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
  540. /*
  541. * Set initial io register bits from burst code.
  542. */
  543. static inline void sym_init_burst(struct sym_hcb *np, u_char bc)
  544. {
  545. np->rv_ctest4 &= ~0x80;
  546. np->rv_dmode &= ~(0x3 << 6);
  547. np->rv_ctest5 &= ~0x4;
  548. if (!bc) {
  549. np->rv_ctest4 |= 0x80;
  550. }
  551. else {
  552. --bc;
  553. np->rv_dmode |= ((bc & 0x3) << 6);
  554. np->rv_ctest5 |= (bc & 0x4);
  555. }
  556. }
  557. /*
  558. * Save initial settings of some IO registers.
  559. * Assumed to have been set by BIOS.
  560. * We cannot reset the chip prior to reading the
  561. * IO registers, since informations will be lost.
  562. * Since the SCRIPTS processor may be running, this
  563. * is not safe on paper, but it seems to work quite
  564. * well. :)
  565. */
  566. static void sym_save_initial_setting (struct sym_hcb *np)
  567. {
  568. np->sv_scntl0 = INB(np, nc_scntl0) & 0x0a;
  569. np->sv_scntl3 = INB(np, nc_scntl3) & 0x07;
  570. np->sv_dmode = INB(np, nc_dmode) & 0xce;
  571. np->sv_dcntl = INB(np, nc_dcntl) & 0xa8;
  572. np->sv_ctest3 = INB(np, nc_ctest3) & 0x01;
  573. np->sv_ctest4 = INB(np, nc_ctest4) & 0x80;
  574. np->sv_gpcntl = INB(np, nc_gpcntl);
  575. np->sv_stest1 = INB(np, nc_stest1);
  576. np->sv_stest2 = INB(np, nc_stest2) & 0x20;
  577. np->sv_stest4 = INB(np, nc_stest4);
  578. if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */
  579. np->sv_scntl4 = INB(np, nc_scntl4);
  580. np->sv_ctest5 = INB(np, nc_ctest5) & 0x04;
  581. }
  582. else
  583. np->sv_ctest5 = INB(np, nc_ctest5) & 0x24;
  584. }
  585. /*
  586. * Set SCSI BUS mode.
  587. * - LVD capable chips (895/895A/896/1010) report the current BUS mode
  588. * through the STEST4 IO register.
  589. * - For previous generation chips (825/825A/875), the user has to tell us
  590. * how to check against HVD, since a 100% safe algorithm is not possible.
  591. */
  592. static void sym_set_bus_mode(struct sym_hcb *np, struct sym_nvram *nvram)
  593. {
  594. if (np->scsi_mode)
  595. return;
  596. np->scsi_mode = SMODE_SE;
  597. if (np->features & (FE_ULTRA2|FE_ULTRA3))
  598. np->scsi_mode = (np->sv_stest4 & SMODE);
  599. else if (np->features & FE_DIFF) {
  600. if (SYM_SETUP_SCSI_DIFF == 1) {
  601. if (np->sv_scntl3) {
  602. if (np->sv_stest2 & 0x20)
  603. np->scsi_mode = SMODE_HVD;
  604. } else if (nvram->type == SYM_SYMBIOS_NVRAM) {
  605. if (!(INB(np, nc_gpreg) & 0x08))
  606. np->scsi_mode = SMODE_HVD;
  607. }
  608. } else if (SYM_SETUP_SCSI_DIFF == 2)
  609. np->scsi_mode = SMODE_HVD;
  610. }
  611. if (np->scsi_mode == SMODE_HVD)
  612. np->rv_stest2 |= 0x20;
  613. }
  614. /*
  615. * Prepare io register values used by sym_start_up()
  616. * according to selected and supported features.
  617. */
  618. static int sym_prepare_setting(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram)
  619. {
  620. struct sym_data *sym_data = shost_priv(shost);
  621. struct pci_dev *pdev = sym_data->pdev;
  622. u_char burst_max;
  623. u32 period;
  624. int i;
  625. np->maxwide = (np->features & FE_WIDE) ? 1 : 0;
  626. /*
  627. * Guess the frequency of the chip's clock.
  628. */
  629. if (np->features & (FE_ULTRA3 | FE_ULTRA2))
  630. np->clock_khz = 160000;
  631. else if (np->features & FE_ULTRA)
  632. np->clock_khz = 80000;
  633. else
  634. np->clock_khz = 40000;
  635. /*
  636. * Get the clock multiplier factor.
  637. */
  638. if (np->features & FE_QUAD)
  639. np->multiplier = 4;
  640. else if (np->features & FE_DBLR)
  641. np->multiplier = 2;
  642. else
  643. np->multiplier = 1;
  644. /*
  645. * Measure SCSI clock frequency for chips
  646. * it may vary from assumed one.
  647. */
  648. if (np->features & FE_VARCLK)
  649. sym_getclock(np, np->multiplier);
  650. /*
  651. * Divisor to be used for async (timer pre-scaler).
  652. */
  653. i = np->clock_divn - 1;
  654. while (--i >= 0) {
  655. if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
  656. ++i;
  657. break;
  658. }
  659. }
  660. np->rv_scntl3 = i+1;
  661. /*
  662. * The C1010 uses hardwired divisors for async.
  663. * So, we just throw away, the async. divisor.:-)
  664. */
  665. if (np->features & FE_C10)
  666. np->rv_scntl3 = 0;
  667. /*
  668. * Minimum synchronous period factor supported by the chip.
  669. * Btw, 'period' is in tenths of nanoseconds.
  670. */
  671. period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
  672. if (period <= 250) np->minsync = 10;
  673. else if (period <= 303) np->minsync = 11;
  674. else if (period <= 500) np->minsync = 12;
  675. else np->minsync = (period + 40 - 1) / 40;
  676. /*
  677. * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
  678. */
  679. if (np->minsync < 25 &&
  680. !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
  681. np->minsync = 25;
  682. else if (np->minsync < 12 &&
  683. !(np->features & (FE_ULTRA2|FE_ULTRA3)))
  684. np->minsync = 12;
  685. /*
  686. * Maximum synchronous period factor supported by the chip.
  687. */
  688. period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
  689. np->maxsync = period > 2540 ? 254 : period / 10;
  690. /*
  691. * If chip is a C1010, guess the sync limits in DT mode.
  692. */
  693. if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
  694. if (np->clock_khz == 160000) {
  695. np->minsync_dt = 9;
  696. np->maxsync_dt = 50;
  697. np->maxoffs_dt = nvram->type ? 62 : 31;
  698. }
  699. }
  700. /*
  701. * 64 bit addressing (895A/896/1010) ?
  702. */
  703. if (np->features & FE_DAC) {
  704. if (!use_dac(np))
  705. np->rv_ccntl1 |= (DDAC);
  706. else if (SYM_CONF_DMA_ADDRESSING_MODE == 1)
  707. np->rv_ccntl1 |= (XTIMOD | EXTIBMV);
  708. else if (SYM_CONF_DMA_ADDRESSING_MODE == 2)
  709. np->rv_ccntl1 |= (0 | EXTIBMV);
  710. }
  711. /*
  712. * Phase mismatch handled by SCRIPTS (895A/896/1010) ?
  713. */
  714. if (np->features & FE_NOPM)
  715. np->rv_ccntl0 |= (ENPMJ);
  716. /*
  717. * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed.
  718. * In dual channel mode, contention occurs if internal cycles
  719. * are used. Disable internal cycles.
  720. */
  721. if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_33 &&
  722. pdev->revision < 0x1)
  723. np->rv_ccntl0 |= DILS;
  724. /*
  725. * Select burst length (dwords)
  726. */
  727. burst_max = SYM_SETUP_BURST_ORDER;
  728. if (burst_max == 255)
  729. burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
  730. np->sv_ctest5);
  731. if (burst_max > 7)
  732. burst_max = 7;
  733. if (burst_max > np->maxburst)
  734. burst_max = np->maxburst;
  735. /*
  736. * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
  737. * This chip and the 860 Rev 1 may wrongly use PCI cache line
  738. * based transactions on LOAD/STORE instructions. So we have
  739. * to prevent these chips from using such PCI transactions in
  740. * this driver. The generic ncr driver that does not use
  741. * LOAD/STORE instructions does not need this work-around.
  742. */
  743. if ((pdev->device == PCI_DEVICE_ID_NCR_53C810 &&
  744. pdev->revision >= 0x10 && pdev->revision <= 0x11) ||
  745. (pdev->device == PCI_DEVICE_ID_NCR_53C860 &&
  746. pdev->revision <= 0x1))
  747. np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
  748. /*
  749. * Select all supported special features.
  750. * If we are using on-board RAM for scripts, prefetch (PFEN)
  751. * does not help, but burst op fetch (BOF) does.
  752. * Disabling PFEN makes sure BOF will be used.
  753. */
  754. if (np->features & FE_ERL)
  755. np->rv_dmode |= ERL; /* Enable Read Line */
  756. if (np->features & FE_BOF)
  757. np->rv_dmode |= BOF; /* Burst Opcode Fetch */
  758. if (np->features & FE_ERMP)
  759. np->rv_dmode |= ERMP; /* Enable Read Multiple */
  760. #if 1
  761. if ((np->features & FE_PFEN) && !np->ram_ba)
  762. #else
  763. if (np->features & FE_PFEN)
  764. #endif
  765. np->rv_dcntl |= PFEN; /* Prefetch Enable */
  766. if (np->features & FE_CLSE)
  767. np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
  768. if (np->features & FE_WRIE)
  769. np->rv_ctest3 |= WRIE; /* Write and Invalidate */
  770. if (np->features & FE_DFS)
  771. np->rv_ctest5 |= DFS; /* Dma Fifo Size */
  772. /*
  773. * Select some other
  774. */
  775. np->rv_ctest4 |= MPEE; /* Master parity checking */
  776. np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */
  777. /*
  778. * Get parity checking, host ID and verbose mode from NVRAM
  779. */
  780. np->myaddr = 255;
  781. np->scsi_mode = 0;
  782. sym_nvram_setup_host(shost, np, nvram);
  783. /*
  784. * Get SCSI addr of host adapter (set by bios?).
  785. */
  786. if (np->myaddr == 255) {
  787. np->myaddr = INB(np, nc_scid) & 0x07;
  788. if (!np->myaddr)
  789. np->myaddr = SYM_SETUP_HOST_ID;
  790. }
  791. /*
  792. * Prepare initial io register bits for burst length
  793. */
  794. sym_init_burst(np, burst_max);
  795. sym_set_bus_mode(np, nvram);
  796. /*
  797. * Set LED support from SCRIPTS.
  798. * Ignore this feature for boards known to use a
  799. * specific GPIO wiring and for the 895A, 896
  800. * and 1010 that drive the LED directly.
  801. */
  802. if ((SYM_SETUP_SCSI_LED ||
  803. (nvram->type == SYM_SYMBIOS_NVRAM ||
  804. (nvram->type == SYM_TEKRAM_NVRAM &&
  805. pdev->device == PCI_DEVICE_ID_NCR_53C895))) &&
  806. !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
  807. np->features |= FE_LED0;
  808. /*
  809. * Set irq mode.
  810. */
  811. switch(SYM_SETUP_IRQ_MODE & 3) {
  812. case 2:
  813. np->rv_dcntl |= IRQM;
  814. break;
  815. case 1:
  816. np->rv_dcntl |= (np->sv_dcntl & IRQM);
  817. break;
  818. default:
  819. break;
  820. }
  821. /*
  822. * Configure targets according to driver setup.
  823. * If NVRAM present get targets setup from NVRAM.
  824. */
  825. for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
  826. struct sym_tcb *tp = &np->target[i];
  827. tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
  828. tp->usrtags = SYM_SETUP_MAX_TAG;
  829. tp->usr_width = np->maxwide;
  830. tp->usr_period = 9;
  831. sym_nvram_setup_target(tp, i, nvram);
  832. if (!tp->usrtags)
  833. tp->usrflags &= ~SYM_TAGS_ENABLED;
  834. }
  835. /*
  836. * Let user know about the settings.
  837. */
  838. printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np),
  839. sym_nvram_type(nvram), np->myaddr,
  840. (np->features & FE_ULTRA3) ? 80 :
  841. (np->features & FE_ULTRA2) ? 40 :
  842. (np->features & FE_ULTRA) ? 20 : 10,
  843. sym_scsi_bus_mode(np->scsi_mode),
  844. (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity");
  845. /*
  846. * Tell him more on demand.
  847. */
  848. if (sym_verbose) {
  849. printf("%s: %s IRQ line driver%s\n",
  850. sym_name(np),
  851. np->rv_dcntl & IRQM ? "totem pole" : "open drain",
  852. np->ram_ba ? ", using on-chip SRAM" : "");
  853. printf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
  854. if (np->features & FE_NOPM)
  855. printf("%s: handling phase mismatch from SCRIPTS.\n",
  856. sym_name(np));
  857. }
  858. /*
  859. * And still more.
  860. */
  861. if (sym_verbose >= 2) {
  862. printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
  863. "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
  864. sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
  865. np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
  866. printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
  867. "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
  868. sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
  869. np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
  870. }
  871. return 0;
  872. }
  873. /*
  874. * Test the pci bus snoop logic :-(
  875. *
  876. * Has to be called with interrupts disabled.
  877. */
  878. #ifdef CONFIG_SCSI_SYM53C8XX_MMIO
  879. static int sym_regtest(struct sym_hcb *np)
  880. {
  881. register volatile u32 data;
  882. /*
  883. * chip registers may NOT be cached.
  884. * write 0xffffffff to a read only register area,
  885. * and try to read it back.
  886. */
  887. data = 0xffffffff;
  888. OUTL(np, nc_dstat, data);
  889. data = INL(np, nc_dstat);
  890. #if 1
  891. if (data == 0xffffffff) {
  892. #else
  893. if ((data & 0xe2f0fffd) != 0x02000080) {
  894. #endif
  895. printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
  896. (unsigned) data);
  897. return 0x10;
  898. }
  899. return 0;
  900. }
  901. #else
  902. static inline int sym_regtest(struct sym_hcb *np)
  903. {
  904. return 0;
  905. }
  906. #endif
  907. static int sym_snooptest(struct sym_hcb *np)
  908. {
  909. u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
  910. int i, err;
  911. err = sym_regtest(np);
  912. if (err)
  913. return err;
  914. restart_test:
  915. /*
  916. * Enable Master Parity Checking as we intend
  917. * to enable it for normal operations.
  918. */
  919. OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE));
  920. /*
  921. * init
  922. */
  923. pc = SCRIPTZ_BA(np, snooptest);
  924. host_wr = 1;
  925. sym_wr = 2;
  926. /*
  927. * Set memory and register.
  928. */
  929. np->scratch = cpu_to_scr(host_wr);
  930. OUTL(np, nc_temp, sym_wr);
  931. /*
  932. * Start script (exchange values)
  933. */
  934. OUTL(np, nc_dsa, np->hcb_ba);
  935. OUTL_DSP(np, pc);
  936. /*
  937. * Wait 'til done (with timeout)
  938. */
  939. for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
  940. if (INB(np, nc_istat) & (INTF|SIP|DIP))
  941. break;
  942. if (i>=SYM_SNOOP_TIMEOUT) {
  943. printf ("CACHE TEST FAILED: timeout.\n");
  944. return (0x20);
  945. }
  946. /*
  947. * Check for fatal DMA errors.
  948. */
  949. dstat = INB(np, nc_dstat);
  950. #if 1 /* Band aiding for broken hardwares that fail PCI parity */
  951. if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
  952. printf ("%s: PCI DATA PARITY ERROR DETECTED - "
  953. "DISABLING MASTER DATA PARITY CHECKING.\n",
  954. sym_name(np));
  955. np->rv_ctest4 &= ~MPEE;
  956. goto restart_test;
  957. }
  958. #endif
  959. if (dstat & (MDPE|BF|IID)) {
  960. printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
  961. return (0x80);
  962. }
  963. /*
  964. * Save termination position.
  965. */
  966. pc = INL(np, nc_dsp);
  967. /*
  968. * Read memory and register.
  969. */
  970. host_rd = scr_to_cpu(np->scratch);
  971. sym_rd = INL(np, nc_scratcha);
  972. sym_bk = INL(np, nc_temp);
  973. /*
  974. * Check termination position.
  975. */
  976. if (pc != SCRIPTZ_BA(np, snoopend)+8) {
  977. printf ("CACHE TEST FAILED: script execution failed.\n");
  978. printf ("start=%08lx, pc=%08lx, end=%08lx\n",
  979. (u_long) SCRIPTZ_BA(np, snooptest), (u_long) pc,
  980. (u_long) SCRIPTZ_BA(np, snoopend) +8);
  981. return (0x40);
  982. }
  983. /*
  984. * Show results.
  985. */
  986. if (host_wr != sym_rd) {
  987. printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
  988. (int) host_wr, (int) sym_rd);
  989. err |= 1;
  990. }
  991. if (host_rd != sym_wr) {
  992. printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
  993. (int) sym_wr, (int) host_rd);
  994. err |= 2;
  995. }
  996. if (sym_bk != sym_wr) {
  997. printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
  998. (int) sym_wr, (int) sym_bk);
  999. err |= 4;
  1000. }
  1001. return err;
  1002. }
  1003. /*
  1004. * log message for real hard errors
  1005. *
  1006. * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc).
  1007. * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
  1008. *
  1009. * exception register:
  1010. * ds: dstat
  1011. * si: sist
  1012. *
  1013. * SCSI bus lines:
  1014. * so: control lines as driven by chip.
  1015. * si: control lines as seen by chip.
  1016. * sd: scsi data lines as seen by chip.
  1017. *
  1018. * wide/fastmode:
  1019. * sx: sxfer (see the manual)
  1020. * s3: scntl3 (see the manual)
  1021. * s4: scntl4 (see the manual)
  1022. *
  1023. * current script command:
  1024. * dsp: script address (relative to start of script).
  1025. * dbc: first word of script command.
  1026. *
  1027. * First 24 register of the chip:
  1028. * r0..rf
  1029. */
  1030. static void sym_log_hard_error(struct Scsi_Host *shost, u_short sist, u_char dstat)
  1031. {
  1032. struct sym_hcb *np = sym_get_hcb(shost);
  1033. u32 dsp;
  1034. int script_ofs;
  1035. int script_size;
  1036. char *script_name;
  1037. u_char *script_base;
  1038. int i;
  1039. dsp = INL(np, nc_dsp);
  1040. if (dsp > np->scripta_ba &&
  1041. dsp <= np->scripta_ba + np->scripta_sz) {
  1042. script_ofs = dsp - np->scripta_ba;
  1043. script_size = np->scripta_sz;
  1044. script_base = (u_char *) np->scripta0;
  1045. script_name = "scripta";
  1046. }
  1047. else if (np->scriptb_ba < dsp &&
  1048. dsp <= np->scriptb_ba + np->scriptb_sz) {
  1049. script_ofs = dsp - np->scriptb_ba;
  1050. script_size = np->scriptb_sz;
  1051. script_base = (u_char *) np->scriptb0;
  1052. script_name = "scriptb";
  1053. } else {
  1054. script_ofs = dsp;
  1055. script_size = 0;
  1056. script_base = NULL;
  1057. script_name = "mem";
  1058. }
  1059. printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n",
  1060. sym_name(np), (unsigned)INB(np, nc_sdid)&0x0f, dstat, sist,
  1061. (unsigned)INB(np, nc_socl), (unsigned)INB(np, nc_sbcl),
  1062. (unsigned)INB(np, nc_sbdl), (unsigned)INB(np, nc_sxfer),
  1063. (unsigned)INB(np, nc_scntl3),
  1064. (np->features & FE_C10) ? (unsigned)INB(np, nc_scntl4) : 0,
  1065. script_name, script_ofs, (unsigned)INL(np, nc_dbc));
  1066. if (((script_ofs & 3) == 0) &&
  1067. (unsigned)script_ofs < script_size) {
  1068. printf ("%s: script cmd = %08x\n", sym_name(np),
  1069. scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
  1070. }
  1071. printf("%s: regdump:", sym_name(np));
  1072. for (i = 0; i < 24; i++)
  1073. printf(" %02x", (unsigned)INB_OFF(np, i));
  1074. printf(".\n");
  1075. /*
  1076. * PCI BUS error.
  1077. */
  1078. if (dstat & (MDPE|BF))
  1079. sym_log_bus_error(shost);
  1080. }
  1081. void sym_dump_registers(struct Scsi_Host *shost)
  1082. {
  1083. struct sym_hcb *np = sym_get_hcb(shost);
  1084. u_short sist;
  1085. u_char dstat;
  1086. sist = INW(np, nc_sist);
  1087. dstat = INB(np, nc_dstat);
  1088. sym_log_hard_error(shost, sist, dstat);
  1089. }
  1090. static struct sym_chip sym_dev_table[] = {
  1091. {PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, 64,
  1092. FE_ERL}
  1093. ,
  1094. #ifdef SYM_DEBUG_GENERIC_SUPPORT
  1095. {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
  1096. FE_BOF}
  1097. ,
  1098. #else
  1099. {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1,
  1100. FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
  1101. ,
  1102. #endif
  1103. {PCI_DEVICE_ID_NCR_53C815, 0xff, "815", 4, 8, 4, 64,
  1104. FE_BOF|FE_ERL}
  1105. ,
  1106. {PCI_DEVICE_ID_NCR_53C825, 0x0f, "825", 6, 8, 4, 64,
  1107. FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
  1108. ,
  1109. {PCI_DEVICE_ID_NCR_53C825, 0xff, "825a", 6, 8, 4, 2,
  1110. FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
  1111. ,
  1112. {PCI_DEVICE_ID_NCR_53C860, 0xff, "860", 4, 8, 5, 1,
  1113. FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
  1114. ,
  1115. {PCI_DEVICE_ID_NCR_53C875, 0x01, "875", 6, 16, 5, 2,
  1116. FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1117. FE_RAM|FE_DIFF|FE_VARCLK}
  1118. ,
  1119. {PCI_DEVICE_ID_NCR_53C875, 0xff, "875", 6, 16, 5, 2,
  1120. FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1121. FE_RAM|FE_DIFF|FE_VARCLK}
  1122. ,
  1123. {PCI_DEVICE_ID_NCR_53C875J, 0xff, "875J", 6, 16, 5, 2,
  1124. FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1125. FE_RAM|FE_DIFF|FE_VARCLK}
  1126. ,
  1127. {PCI_DEVICE_ID_NCR_53C885, 0xff, "885", 6, 16, 5, 2,
  1128. FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1129. FE_RAM|FE_DIFF|FE_VARCLK}
  1130. ,
  1131. #ifdef SYM_DEBUG_GENERIC_SUPPORT
  1132. {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
  1133. FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
  1134. FE_RAM|FE_LCKFRQ}
  1135. ,
  1136. #else
  1137. {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2,
  1138. FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1139. FE_RAM|FE_LCKFRQ}
  1140. ,
  1141. #endif
  1142. {PCI_DEVICE_ID_NCR_53C896, 0xff, "896", 6, 31, 7, 4,
  1143. FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1144. FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
  1145. ,
  1146. {PCI_DEVICE_ID_LSI_53C895A, 0xff, "895a", 6, 31, 7, 4,
  1147. FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1148. FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
  1149. ,
  1150. {PCI_DEVICE_ID_LSI_53C875A, 0xff, "875a", 6, 31, 7, 4,
  1151. FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1152. FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
  1153. ,
  1154. {PCI_DEVICE_ID_LSI_53C1010_33, 0x00, "1010-33", 6, 31, 7, 8,
  1155. FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
  1156. FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
  1157. FE_C10}
  1158. ,
  1159. {PCI_DEVICE_ID_LSI_53C1010_33, 0xff, "1010-33", 6, 31, 7, 8,
  1160. FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
  1161. FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
  1162. FE_C10|FE_U3EN}
  1163. ,
  1164. {PCI_DEVICE_ID_LSI_53C1010_66, 0xff, "1010-66", 6, 31, 7, 8,
  1165. FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
  1166. FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
  1167. FE_C10|FE_U3EN}
  1168. ,
  1169. {PCI_DEVICE_ID_LSI_53C1510, 0xff, "1510d", 6, 31, 7, 4,
  1170. FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
  1171. FE_RAM|FE_IO256|FE_LEDC}
  1172. };
  1173. #define sym_num_devs (ARRAY_SIZE(sym_dev_table))
  1174. /*
  1175. * Look up the chip table.
  1176. *
  1177. * Return a pointer to the chip entry if found,
  1178. * zero otherwise.
  1179. */
  1180. struct sym_chip *
  1181. sym_lookup_chip_table (u_short device_id, u_char revision)
  1182. {
  1183. struct sym_chip *chip;
  1184. int i;
  1185. for (i = 0; i < sym_num_devs; i++) {
  1186. chip = &sym_dev_table[i];
  1187. if (device_id != chip->device_id)
  1188. continue;
  1189. if (revision > chip->revision_id)
  1190. continue;
  1191. return chip;
  1192. }
  1193. return NULL;
  1194. }
  1195. #if SYM_CONF_DMA_ADDRESSING_MODE == 2
  1196. /*
  1197. * Lookup the 64 bit DMA segments map.
  1198. * This is only used if the direct mapping
  1199. * has been unsuccessful.
  1200. */
  1201. int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s)
  1202. {
  1203. int i;
  1204. if (!use_dac(np))
  1205. goto weird;
  1206. /* Look up existing mappings */
  1207. for (i = SYM_DMAP_SIZE-1; i > 0; i--) {
  1208. if (h == np->dmap_bah[i])
  1209. return i;
  1210. }
  1211. /* If direct mapping is free, get it */
  1212. if (!np->dmap_bah[s])
  1213. goto new;
  1214. /* Collision -> lookup free mappings */
  1215. for (s = SYM_DMAP_SIZE-1; s > 0; s--) {
  1216. if (!np->dmap_bah[s])
  1217. goto new;
  1218. }
  1219. weird:
  1220. panic("sym: ran out of 64 bit DMA segment registers");
  1221. return -1;
  1222. new:
  1223. np->dmap_bah[s] = h;
  1224. np->dmap_dirty = 1;
  1225. return s;
  1226. }
  1227. /*
  1228. * Update IO registers scratch C..R so they will be
  1229. * in sync. with queued CCB expectations.
  1230. */
  1231. static void sym_update_dmap_regs(struct sym_hcb *np)
  1232. {
  1233. int o, i;
  1234. if (!np->dmap_dirty)
  1235. return;
  1236. o = offsetof(struct sym_reg, nc_scrx[0]);
  1237. for (i = 0; i < SYM_DMAP_SIZE; i++) {
  1238. OUTL_OFF(np, o, np->dmap_bah[i]);
  1239. o += 4;
  1240. }
  1241. np->dmap_dirty = 0;
  1242. }
  1243. #endif
  1244. /* Enforce all the fiddly SPI rules and the chip limitations */
  1245. static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget,
  1246. struct sym_trans *goal)
  1247. {
  1248. if (!spi_support_wide(starget))
  1249. goal->width = 0;
  1250. if (!spi_support_sync(starget)) {
  1251. goal->iu = 0;
  1252. goal->dt = 0;
  1253. goal->qas = 0;
  1254. goal->offset = 0;
  1255. return;
  1256. }
  1257. if (spi_support_dt(starget)) {
  1258. if (spi_support_dt_only(starget))
  1259. goal->dt = 1;
  1260. if (goal->offset == 0)
  1261. goal->dt = 0;
  1262. } else {
  1263. goal->dt = 0;
  1264. }
  1265. /* Some targets fail to properly negotiate DT in SE mode */
  1266. if ((np->scsi_mode != SMODE_LVD) || !(np->features & FE_U3EN))
  1267. goal->dt = 0;
  1268. if (goal->dt) {
  1269. /* all DT transfers must be wide */
  1270. goal->width = 1;
  1271. if (goal->offset > np->maxoffs_dt)
  1272. goal->offset = np->maxoffs_dt;
  1273. if (goal->period < np->minsync_dt)
  1274. goal->period = np->minsync_dt;
  1275. if (goal->period > np->maxsync_dt)
  1276. goal->period = np->maxsync_dt;
  1277. } else {
  1278. goal->iu = goal->qas = 0;
  1279. if (goal->offset > np->maxoffs)
  1280. goal->offset = np->maxoffs;
  1281. if (goal->period < np->minsync)
  1282. goal->period = np->minsync;
  1283. if (goal->period > np->maxsync)
  1284. goal->period = np->maxsync;
  1285. }
  1286. }
  1287. /*
  1288. * Prepare the next negotiation message if needed.
  1289. *
  1290. * Fill in the part of message buffer that contains the
  1291. * negotiation and the nego_status field of the CCB.
  1292. * Returns the size of the message in bytes.
  1293. */
  1294. static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgptr)
  1295. {
  1296. struct sym_tcb *tp = &np->target[cp->target];
  1297. struct scsi_target *starget = tp->starget;
  1298. struct sym_trans *goal = &tp->tgoal;
  1299. int msglen = 0;
  1300. int nego;
  1301. sym_check_goals(np, starget, goal);
  1302. /*
  1303. * Many devices implement PPR in a buggy way, so only use it if we
  1304. * really want to.
  1305. */
  1306. if (goal->renego == NS_PPR || (goal->offset &&
  1307. (goal->iu || goal->dt || goal->qas || (goal->period < 0xa)))) {
  1308. nego = NS_PPR;
  1309. } else if (goal->renego == NS_WIDE || goal->width) {
  1310. nego = NS_WIDE;
  1311. } else if (goal->renego == NS_SYNC || goal->offset) {
  1312. nego = NS_SYNC;
  1313. } else {
  1314. goal->check_nego = 0;
  1315. nego = 0;
  1316. }
  1317. switch (nego) {
  1318. case NS_SYNC:
  1319. msglen += spi_populate_sync_msg(msgptr + msglen, goal->period,
  1320. goal->offset);
  1321. break;
  1322. case NS_WIDE:
  1323. msglen += spi_populate_width_msg(msgptr + msglen, goal->width);
  1324. break;
  1325. case NS_PPR:
  1326. msglen += spi_populate_ppr_msg(msgptr + msglen, goal->period,
  1327. goal->offset, goal->width,
  1328. (goal->iu ? PPR_OPT_IU : 0) |
  1329. (goal->dt ? PPR_OPT_DT : 0) |
  1330. (goal->qas ? PPR_OPT_QAS : 0));
  1331. break;
  1332. }
  1333. cp->nego_status = nego;
  1334. if (nego) {
  1335. tp->nego_cp = cp; /* Keep track a nego will be performed */
  1336. if (DEBUG_FLAGS & DEBUG_NEGO) {
  1337. sym_print_nego_msg(np, cp->target,
  1338. nego == NS_SYNC ? "sync msgout" :
  1339. nego == NS_WIDE ? "wide msgout" :
  1340. "ppr msgout", msgptr);
  1341. }
  1342. }
  1343. return msglen;
  1344. }
  1345. /*
  1346. * Insert a job into the start queue.
  1347. */
  1348. void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp)
  1349. {
  1350. u_short qidx;
  1351. #ifdef SYM_CONF_IARB_SUPPORT
  1352. /*
  1353. * If the previously queued CCB is not yet done,
  1354. * set the IARB hint. The SCRIPTS will go with IARB
  1355. * for this job when starting the previous one.
  1356. * We leave devices a chance to win arbitration by
  1357. * not using more than 'iarb_max' consecutive
  1358. * immediate arbitrations.
  1359. */
  1360. if (np->last_cp && np->iarb_count < np->iarb_max) {
  1361. np->last_cp->host_flags |= HF_HINT_IARB;
  1362. ++np->iarb_count;
  1363. }
  1364. else
  1365. np->iarb_count = 0;
  1366. np->last_cp = cp;
  1367. #endif
  1368. #if SYM_CONF_DMA_ADDRESSING_MODE == 2
  1369. /*
  1370. * Make SCRIPTS aware of the 64 bit DMA
  1371. * segment registers not being up-to-date.
  1372. */
  1373. if (np->dmap_dirty)
  1374. cp->host_xflags |= HX_DMAP_DIRTY;
  1375. #endif
  1376. /*
  1377. * Insert first the idle task and then our job.
  1378. * The MBs should ensure proper ordering.
  1379. */
  1380. qidx = np->squeueput + 2;
  1381. if (qidx >= MAX_QUEUE*2) qidx = 0;
  1382. np->squeue [qidx] = cpu_to_scr(np->idletask_ba);
  1383. MEMORY_WRITE_BARRIER();
  1384. np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
  1385. np->squeueput = qidx;
  1386. if (DEBUG_FLAGS & DEBUG_QUEUE)
  1387. scmd_printk(KERN_DEBUG, cp->cmd, "queuepos=%d\n",
  1388. np->squeueput);
  1389. /*
  1390. * Script processor may be waiting for reselect.
  1391. * Wake it up.
  1392. */
  1393. MEMORY_WRITE_BARRIER();
  1394. OUTB(np, nc_istat, SIGP|np->istat_sem);
  1395. }
  1396. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  1397. /*
  1398. * Start next ready-to-start CCBs.
  1399. */
  1400. void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn)
  1401. {
  1402. SYM_QUEHEAD *qp;
  1403. struct sym_ccb *cp;
  1404. /*
  1405. * Paranoia, as usual. :-)
  1406. */
  1407. assert(!lp->started_tags || !lp->started_no_tag);
  1408. /*
  1409. * Try to start as many commands as asked by caller.
  1410. * Prevent from having both tagged and untagged
  1411. * commands queued to the device at the same time.
  1412. */
  1413. while (maxn--) {
  1414. qp = sym_remque_head(&lp->waiting_ccbq);
  1415. if (!qp)
  1416. break;
  1417. cp = sym_que_entry(qp, struct sym_ccb, link2_ccbq);
  1418. if (cp->tag != NO_TAG) {
  1419. if (lp->started_no_tag ||
  1420. lp->started_tags >= lp->started_max) {
  1421. sym_insque_head(qp, &lp->waiting_ccbq);
  1422. break;
  1423. }
  1424. lp->itlq_tbl[cp->tag] = cpu_to_scr(cp->ccb_ba);
  1425. lp->head.resel_sa =
  1426. cpu_to_scr(SCRIPTA_BA(np, resel_tag));
  1427. ++lp->started_tags;
  1428. } else {
  1429. if (lp->started_no_tag || lp->started_tags) {
  1430. sym_insque_head(qp, &lp->waiting_ccbq);
  1431. break;
  1432. }
  1433. lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
  1434. lp->head.resel_sa =
  1435. cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
  1436. ++lp->started_no_tag;
  1437. }
  1438. cp->started = 1;
  1439. sym_insque_tail(qp, &lp->started_ccbq);
  1440. sym_put_start_queue(np, cp);
  1441. }
  1442. }
  1443. #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */
  1444. /*
  1445. * The chip may have completed jobs. Look at the DONE QUEUE.
  1446. *
  1447. * On paper, memory read barriers may be needed here to
  1448. * prevent out of order LOADs by the CPU from having
  1449. * prefetched stale data prior to DMA having occurred.
  1450. */
  1451. static int sym_wakeup_done (struct sym_hcb *np)
  1452. {
  1453. struct sym_ccb *cp;
  1454. int i, n;
  1455. u32 dsa;
  1456. n = 0;
  1457. i = np->dqueueget;
  1458. /* MEMORY_READ_BARRIER(); */
  1459. while (1) {
  1460. dsa = scr_to_cpu(np->dqueue[i]);
  1461. if (!dsa)
  1462. break;
  1463. np->dqueue[i] = 0;
  1464. if ((i = i+2) >= MAX_QUEUE*2)
  1465. i = 0;
  1466. cp = sym_ccb_from_dsa(np, dsa);
  1467. if (cp) {
  1468. MEMORY_READ_BARRIER();
  1469. sym_complete_ok (np, cp);
  1470. ++n;
  1471. }
  1472. else
  1473. printf ("%s: bad DSA (%x) in done queue.\n",
  1474. sym_name(np), (u_int) dsa);
  1475. }
  1476. np->dqueueget = i;
  1477. return n;
  1478. }
  1479. /*
  1480. * Complete all CCBs queued to the COMP queue.
  1481. *
  1482. * These CCBs are assumed:
  1483. * - Not to be referenced either by devices or
  1484. * SCRIPTS-related queues and datas.
  1485. * - To have to be completed with an error condition
  1486. * or requeued.
  1487. *
  1488. * The device queue freeze count is incremented
  1489. * for each CCB that does not prevent this.
  1490. * This function is called when all CCBs involved
  1491. * in error handling/recovery have been reaped.
  1492. */
  1493. static void sym_flush_comp_queue(struct sym_hcb *np, int cam_status)
  1494. {
  1495. SYM_QUEHEAD *qp;
  1496. struct sym_ccb *cp;
  1497. while ((qp = sym_remque_head(&np->comp_ccbq)) != NULL) {
  1498. struct scsi_cmnd *cmd;
  1499. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  1500. sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
  1501. /* Leave quiet CCBs waiting for resources */
  1502. if (cp->host_status == HS_WAIT)
  1503. continue;
  1504. cmd = cp->cmd;
  1505. if (cam_status)
  1506. sym_set_cam_status(cmd, cam_status);
  1507. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  1508. if (sym_get_cam_status(cmd) == DID_SOFT_ERROR) {
  1509. struct sym_tcb *tp = &np->target[cp->target];
  1510. struct sym_lcb *lp = sym_lp(tp, cp->lun);
  1511. if (lp) {
  1512. sym_remque(&cp->link2_ccbq);
  1513. sym_insque_tail(&cp->link2_ccbq,
  1514. &lp->waiting_ccbq);
  1515. if (cp->started) {
  1516. if (cp->tag != NO_TAG)
  1517. --lp->started_tags;
  1518. else
  1519. --lp->started_no_tag;
  1520. }
  1521. }
  1522. cp->started = 0;
  1523. continue;
  1524. }
  1525. #endif
  1526. sym_free_ccb(np, cp);
  1527. sym_xpt_done(np, cmd);
  1528. }
  1529. }
  1530. /*
  1531. * Complete all active CCBs with error.
  1532. * Used on CHIP/SCSI RESET.
  1533. */
  1534. static void sym_flush_busy_queue (struct sym_hcb *np, int cam_status)
  1535. {
  1536. /*
  1537. * Move all active CCBs to the COMP queue
  1538. * and flush this queue.
  1539. */
  1540. sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
  1541. sym_que_init(&np->busy_ccbq);
  1542. sym_flush_comp_queue(np, cam_status);
  1543. }
  1544. /*
  1545. * Start chip.
  1546. *
  1547. * 'reason' means:
  1548. * 0: initialisation.
  1549. * 1: SCSI BUS RESET delivered or received.
  1550. * 2: SCSI BUS MODE changed.
  1551. */
  1552. void sym_start_up(struct Scsi_Host *shost, int reason)
  1553. {
  1554. struct sym_data *sym_data = shost_priv(shost);
  1555. struct pci_dev *pdev = sym_data->pdev;
  1556. struct sym_hcb *np = sym_data->ncb;
  1557. int i;
  1558. u32 phys;
  1559. /*
  1560. * Reset chip if asked, otherwise just clear fifos.
  1561. */
  1562. if (reason == 1)
  1563. sym_soft_reset(np);
  1564. else {
  1565. OUTB(np, nc_stest3, TE|CSF);
  1566. OUTONB(np, nc_ctest3, CLF);
  1567. }
  1568. /*
  1569. * Clear Start Queue
  1570. */
  1571. phys = np->squeue_ba;
  1572. for (i = 0; i < MAX_QUEUE*2; i += 2) {
  1573. np->squeue[i] = cpu_to_scr(np->idletask_ba);
  1574. np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
  1575. }
  1576. np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
  1577. /*
  1578. * Start at first entry.
  1579. */
  1580. np->squeueput = 0;
  1581. /*
  1582. * Clear Done Queue
  1583. */
  1584. phys = np->dqueue_ba;
  1585. for (i = 0; i < MAX_QUEUE*2; i += 2) {
  1586. np->dqueue[i] = 0;
  1587. np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
  1588. }
  1589. np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
  1590. /*
  1591. * Start at first entry.
  1592. */
  1593. np->dqueueget = 0;
  1594. /*
  1595. * Install patches in scripts.
  1596. * This also let point to first position the start
  1597. * and done queue pointers used from SCRIPTS.
  1598. */
  1599. np->fw_patch(shost);
  1600. /*
  1601. * Wakeup all pending jobs.
  1602. */
  1603. sym_flush_busy_queue(np, DID_RESET);
  1604. /*
  1605. * Init chip.
  1606. */
  1607. OUTB(np, nc_istat, 0x00); /* Remove Reset, abort */
  1608. INB(np, nc_mbox1);
  1609. udelay(2000); /* The 895 needs time for the bus mode to settle */
  1610. OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0);
  1611. /* full arb., ena parity, par->ATN */
  1612. OUTB(np, nc_scntl1, 0x00); /* odd parity, and remove CRST!! */
  1613. sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
  1614. OUTB(np, nc_scid , RRE|np->myaddr); /* Adapter SCSI address */
  1615. OUTW(np, nc_respid, 1ul<<np->myaddr); /* Id to respond to */
  1616. OUTB(np, nc_istat , SIGP ); /* Signal Process */
  1617. OUTB(np, nc_dmode , np->rv_dmode); /* Burst length, dma mode */
  1618. OUTB(np, nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */
  1619. OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */
  1620. OUTB(np, nc_ctest3, np->rv_ctest3); /* Write and invalidate */
  1621. OUTB(np, nc_ctest4, np->rv_ctest4); /* Master parity checking */
  1622. /* Extended Sreq/Sack filtering not supported on the C10 */
  1623. if (np->features & FE_C10)
  1624. OUTB(np, nc_stest2, np->rv_stest2);
  1625. else
  1626. OUTB(np, nc_stest2, EXT|np->rv_stest2);
  1627. OUTB(np, nc_stest3, TE); /* TolerANT enable */
  1628. OUTB(np, nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */
  1629. /*
  1630. * For now, disable AIP generation on C1010-66.
  1631. */
  1632. if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_66)
  1633. OUTB(np, nc_aipcntl1, DISAIP);
  1634. /*
  1635. * C10101 rev. 0 errata.
  1636. * Errant SGE's when in narrow. Write bits 4 & 5 of
  1637. * STEST1 register to disable SGE. We probably should do
  1638. * that from SCRIPTS for each selection/reselection, but
  1639. * I just don't want. :)
  1640. */
  1641. if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_33 &&
  1642. pdev->revision < 1)
  1643. OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30);
  1644. /*
  1645. * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
  1646. * Disable overlapped arbitration for some dual function devices,
  1647. * regardless revision id (kind of post-chip-design feature. ;-))
  1648. */
  1649. if (pdev->device == PCI_DEVICE_ID_NCR_53C875)
  1650. OUTB(np, nc_ctest0, (1<<5));
  1651. else if (pdev->device == PCI_DEVICE_ID_NCR_53C896)
  1652. np->rv_ccntl0 |= DPR;
  1653. /*
  1654. * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
  1655. * and/or hardware phase mismatch, since only such chips
  1656. * seem to support those IO registers.
  1657. */
  1658. if (np->features & (FE_DAC|FE_NOPM)) {
  1659. OUTB(np, nc_ccntl0, np->rv_ccntl0);
  1660. OUTB(np, nc_ccntl1, np->rv_ccntl1);
  1661. }
  1662. #if SYM_CONF_DMA_ADDRESSING_MODE == 2
  1663. /*
  1664. * Set up scratch C and DRS IO registers to map the 32 bit
  1665. * DMA address range our data structures are located in.
  1666. */
  1667. if (use_dac(np)) {
  1668. np->dmap_bah[0] = 0; /* ??? */
  1669. OUTL(np, nc_scrx[0], np->dmap_bah[0]);
  1670. OUTL(np, nc_drs, np->dmap_bah[0]);
  1671. }
  1672. #endif
  1673. /*
  1674. * If phase mismatch handled by scripts (895A/896/1010),
  1675. * set PM jump addresses.
  1676. */
  1677. if (np->features & FE_NOPM) {
  1678. OUTL(np, nc_pmjad1, SCRIPTB_BA(np, pm_handle));
  1679. OUTL(np, nc_pmjad2, SCRIPTB_BA(np, pm_handle));
  1680. }
  1681. /*
  1682. * Enable GPIO0 pin for writing if LED support from SCRIPTS.
  1683. * Also set GPIO5 and clear GPIO6 if hardware LED control.
  1684. */
  1685. if (np->features & FE_LED0)
  1686. OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01);
  1687. else if (np->features & FE_LEDC)
  1688. OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20);
  1689. /*
  1690. * enable ints
  1691. */
  1692. OUTW(np, nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
  1693. OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID);
  1694. /*
  1695. * For 895/6 enable SBMC interrupt and save current SCSI bus mode.
  1696. * Try to eat the spurious SBMC interrupt that may occur when
  1697. * we reset the chip but not the SCSI BUS (at initialization).
  1698. */
  1699. if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
  1700. OUTONW(np, nc_sien, SBMC);
  1701. if (reason == 0) {
  1702. INB(np, nc_mbox1);
  1703. mdelay(100);
  1704. INW(np, nc_sist);
  1705. }
  1706. np->scsi_mode = INB(np, nc_stest4) & SMODE;
  1707. }
  1708. /*
  1709. * Fill in target structure.
  1710. * Reinitialize usrsync.
  1711. * Reinitialize usrwide.
  1712. * Prepare sync negotiation according to actual SCSI bus mode.
  1713. */
  1714. for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
  1715. struct sym_tcb *tp = &np->target[i];
  1716. tp->to_reset = 0;
  1717. tp->head.sval = 0;
  1718. tp->head.wval = np->rv_scntl3;
  1719. tp->head.uval = 0;
  1720. if (tp->lun0p)
  1721. tp->lun0p->to_clear = 0;
  1722. if (tp->lunmp) {
  1723. int ln;
  1724. for (ln = 1; ln < SYM_CONF_MAX_LUN; ln++)
  1725. if (tp->lunmp[ln])
  1726. tp->lunmp[ln]->to_clear = 0;
  1727. }
  1728. }
  1729. /*
  1730. * Download SCSI SCRIPTS to on-chip RAM if present,
  1731. * and start script processor.
  1732. * We do the download preferently from the CPU.
  1733. * For platforms that may not support PCI memory mapping,
  1734. * we use simple SCRIPTS that performs MEMORY MOVEs.
  1735. */
  1736. phys = SCRIPTA_BA(np, init);
  1737. if (np->ram_ba) {
  1738. if (sym_verbose >= 2)
  1739. printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np));
  1740. memcpy_toio(np->s.ramaddr, np->scripta0, np->scripta_sz);
  1741. if (np->features & FE_RAM8K) {
  1742. memcpy_toio(np->s.ramaddr + 4096, np->scriptb0, np->scriptb_sz);
  1743. phys = scr_to_cpu(np->scr_ram_seg);
  1744. OUTL(np, nc_mmws, phys);
  1745. OUTL(np, nc_mmrs, phys);
  1746. OUTL(np, nc_sfs, phys);
  1747. phys = SCRIPTB_BA(np, start64);
  1748. }
  1749. }
  1750. np->istat_sem = 0;
  1751. OUTL(np, nc_dsa, np->hcb_ba);
  1752. OUTL_DSP(np, phys);
  1753. /*
  1754. * Notify the XPT about the RESET condition.
  1755. */
  1756. if (reason != 0)
  1757. sym_xpt_async_bus_reset(np);
  1758. }
  1759. /*
  1760. * Switch trans mode for current job and its target.
  1761. */
  1762. static void sym_settrans(struct sym_hcb *np, int target, u_char opts, u_char ofs,
  1763. u_char per, u_char wide, u_char div, u_char fak)
  1764. {
  1765. SYM_QUEHEAD *qp;
  1766. u_char sval, wval, uval;
  1767. struct sym_tcb *tp = &np->target[target];
  1768. assert(target == (INB(np, nc_sdid) & 0x0f));
  1769. sval = tp->head.sval;
  1770. wval = tp->head.wval;
  1771. uval = tp->head.uval;
  1772. #if 0
  1773. printf("XXXX sval=%x wval=%x uval=%x (%x)\n",
  1774. sval, wval, uval, np->rv_scntl3);
  1775. #endif
  1776. /*
  1777. * Set the offset.
  1778. */
  1779. if (!(np->features & FE_C10))
  1780. sval = (sval & ~0x1f) | ofs;
  1781. else
  1782. sval = (sval & ~0x3f) | ofs;
  1783. /*
  1784. * Set the sync divisor and extra clock factor.
  1785. */
  1786. if (ofs != 0) {
  1787. wval = (wval & ~0x70) | ((div+1) << 4);
  1788. if (!(np->features & FE_C10))
  1789. sval = (sval & ~0xe0) | (fak << 5);
  1790. else {
  1791. uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
  1792. if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
  1793. if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
  1794. }
  1795. }
  1796. /*
  1797. * Set the bus width.
  1798. */
  1799. wval = wval & ~EWS;
  1800. if (wide != 0)
  1801. wval |= EWS;
  1802. /*
  1803. * Set misc. ultra enable bits.
  1804. */
  1805. if (np->features & FE_C10) {
  1806. uval = uval & ~(U3EN|AIPCKEN);
  1807. if (opts) {
  1808. assert(np->features & FE_U3EN);
  1809. uval |= U3EN;
  1810. }
  1811. } else {
  1812. wval = wval & ~ULTRA;
  1813. if (per <= 12) wval |= ULTRA;
  1814. }
  1815. /*
  1816. * Stop there if sync parameters are unchanged.
  1817. */
  1818. if (tp->head.sval == sval &&
  1819. tp->head.wval == wval &&
  1820. tp->head.uval == uval)
  1821. return;
  1822. tp->head.sval = sval;
  1823. tp->head.wval = wval;
  1824. tp->head.uval = uval;
  1825. /*
  1826. * Disable extended Sreq/Sack filtering if per < 50.
  1827. * Not supported on the C1010.
  1828. */
  1829. if (per < 50 && !(np->features & FE_C10))
  1830. OUTOFFB(np, nc_stest2, EXT);
  1831. /*
  1832. * set actual value and sync_status
  1833. */
  1834. OUTB(np, nc_sxfer, tp->head.sval);
  1835. OUTB(np, nc_scntl3, tp->head.wval);
  1836. if (np->features & FE_C10) {
  1837. OUTB(np, nc_scntl4, tp->head.uval);
  1838. }
  1839. /*
  1840. * patch ALL busy ccbs of this target.
  1841. */
  1842. FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
  1843. struct sym_ccb *cp;
  1844. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  1845. if (cp->target != target)
  1846. continue;
  1847. cp->phys.select.sel_scntl3 = tp->head.wval;
  1848. cp->phys.select.sel_sxfer = tp->head.sval;
  1849. if (np->features & FE_C10) {
  1850. cp->phys.select.sel_scntl4 = tp->head.uval;
  1851. }
  1852. }
  1853. }
  1854. static void sym_announce_transfer_rate(struct sym_tcb *tp)
  1855. {
  1856. struct scsi_target *starget = tp->starget;
  1857. if (tp->tprint.period != spi_period(starget) ||
  1858. tp->tprint.offset != spi_offset(starget) ||
  1859. tp->tprint.width != spi_width(starget) ||
  1860. tp->tprint.iu != spi_iu(starget) ||
  1861. tp->tprint.dt != spi_dt(starget) ||
  1862. tp->tprint.qas != spi_qas(starget) ||
  1863. !tp->tprint.check_nego) {
  1864. tp->tprint.period = spi_period(starget);
  1865. tp->tprint.offset = spi_offset(starget);
  1866. tp->tprint.width = spi_width(starget);
  1867. tp->tprint.iu = spi_iu(starget);
  1868. tp->tprint.dt = spi_dt(starget);
  1869. tp->tprint.qas = spi_qas(starget);
  1870. tp->tprint.check_nego = 1;
  1871. spi_display_xfer_agreement(starget);
  1872. }
  1873. }
  1874. /*
  1875. * We received a WDTR.
  1876. * Let everything be aware of the changes.
  1877. */
  1878. static void sym_setwide(struct sym_hcb *np, int target, u_char wide)
  1879. {
  1880. struct sym_tcb *tp = &np->target[target];
  1881. struct scsi_target *starget = tp->starget;
  1882. sym_settrans(np, target, 0, 0, 0, wide, 0, 0);
  1883. if (wide)
  1884. tp->tgoal.renego = NS_WIDE;
  1885. else
  1886. tp->tgoal.renego = 0;
  1887. tp->tgoal.check_nego = 0;
  1888. tp->tgoal.width = wide;
  1889. spi_offset(starget) = 0;
  1890. spi_period(starget) = 0;
  1891. spi_width(starget) = wide;
  1892. spi_iu(starget) = 0;
  1893. spi_dt(starget) = 0;
  1894. spi_qas(starget) = 0;
  1895. if (sym_verbose >= 3)
  1896. sym_announce_transfer_rate(tp);
  1897. }
  1898. /*
  1899. * We received a SDTR.
  1900. * Let everything be aware of the changes.
  1901. */
  1902. static void
  1903. sym_setsync(struct sym_hcb *np, int target,
  1904. u_char ofs, u_char per, u_char div, u_char fak)
  1905. {
  1906. struct sym_tcb *tp = &np->target[target];
  1907. struct scsi_target *starget = tp->starget;
  1908. u_char wide = (tp->head.wval & EWS) ? BUS_16_BIT : BUS_8_BIT;
  1909. sym_settrans(np, target, 0, ofs, per, wide, div, fak);
  1910. if (wide)
  1911. tp->tgoal.renego = NS_WIDE;
  1912. else if (ofs)
  1913. tp->tgoal.renego = NS_SYNC;
  1914. else
  1915. tp->tgoal.renego = 0;
  1916. spi_period(starget) = per;
  1917. spi_offset(starget) = ofs;
  1918. spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0;
  1919. if (!tp->tgoal.dt && !tp->tgoal.iu && !tp->tgoal.qas) {
  1920. tp->tgoal.period = per;
  1921. tp->tgoal.offset = ofs;
  1922. tp->tgoal.check_nego = 0;
  1923. }
  1924. sym_announce_transfer_rate(tp);
  1925. }
  1926. /*
  1927. * We received a PPR.
  1928. * Let everything be aware of the changes.
  1929. */
  1930. static void
  1931. sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs,
  1932. u_char per, u_char wide, u_char div, u_char fak)
  1933. {
  1934. struct sym_tcb *tp = &np->target[target];
  1935. struct scsi_target *starget = tp->starget;
  1936. sym_settrans(np, target, opts, ofs, per, wide, div, fak);
  1937. if (wide || ofs)
  1938. tp->tgoal.renego = NS_PPR;
  1939. else
  1940. tp->tgoal.renego = 0;
  1941. spi_width(starget) = tp->tgoal.width = wide;
  1942. spi_period(starget) = tp->tgoal.period = per;
  1943. spi_offset(starget) = tp->tgoal.offset = ofs;
  1944. spi_iu(starget) = tp->tgoal.iu = !!(opts & PPR_OPT_IU);
  1945. spi_dt(starget) = tp->tgoal.dt = !!(opts & PPR_OPT_DT);
  1946. spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS);
  1947. tp->tgoal.check_nego = 0;
  1948. sym_announce_transfer_rate(tp);
  1949. }
  1950. /*
  1951. * generic recovery from scsi interrupt
  1952. *
  1953. * The doc says that when the chip gets an SCSI interrupt,
  1954. * it tries to stop in an orderly fashion, by completing
  1955. * an instruction fetch that had started or by flushing
  1956. * the DMA fifo for a write to memory that was executing.
  1957. * Such a fashion is not enough to know if the instruction
  1958. * that was just before the current DSP value has been
  1959. * executed or not.
  1960. *
  1961. * There are some small SCRIPTS sections that deal with
  1962. * the start queue and the done queue that may break any
  1963. * assomption from the C code if we are interrupted
  1964. * inside, so we reset if this happens. Btw, since these
  1965. * SCRIPTS sections are executed while the SCRIPTS hasn't
  1966. * started SCSI operations, it is very unlikely to happen.
  1967. *
  1968. * All the driver data structures are supposed to be
  1969. * allocated from the same 4 GB memory window, so there
  1970. * is a 1 to 1 relationship between DSA and driver data
  1971. * structures. Since we are careful :) to invalidate the
  1972. * DSA when we complete a command or when the SCRIPTS
  1973. * pushes a DSA into a queue, we can trust it when it
  1974. * points to a CCB.
  1975. */
  1976. static void sym_recover_scsi_int (struct sym_hcb *np, u_char hsts)
  1977. {
  1978. u32 dsp = INL(np, nc_dsp);
  1979. u32 dsa = INL(np, nc_dsa);
  1980. struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
  1981. /*
  1982. * If we haven't been interrupted inside the SCRIPTS
  1983. * critical pathes, we can safely restart the SCRIPTS
  1984. * and trust the DSA value if it matches a CCB.
  1985. */
  1986. if ((!(dsp > SCRIPTA_BA(np, getjob_begin) &&
  1987. dsp < SCRIPTA_BA(np, getjob_end) + 1)) &&
  1988. (!(dsp > SCRIPTA_BA(np, ungetjob) &&
  1989. dsp < SCRIPTA_BA(np, reselect) + 1)) &&
  1990. (!(dsp > SCRIPTB_BA(np, sel_for_abort) &&
  1991. dsp < SCRIPTB_BA(np, sel_for_abort_1) + 1)) &&
  1992. (!(dsp > SCRIPTA_BA(np, done) &&
  1993. dsp < SCRIPTA_BA(np, done_end) + 1))) {
  1994. OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
  1995. OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
  1996. /*
  1997. * If we have a CCB, let the SCRIPTS call us back for
  1998. * the handling of the error with SCRATCHA filled with
  1999. * STARTPOS. This way, we will be able to freeze the
  2000. * device queue and requeue awaiting IOs.
  2001. */
  2002. if (cp) {
  2003. cp->host_status = hsts;
  2004. OUTL_DSP(np, SCRIPTA_BA(np, complete_error));
  2005. }
  2006. /*
  2007. * Otherwise just restart the SCRIPTS.
  2008. */
  2009. else {
  2010. OUTL(np, nc_dsa, 0xffffff);
  2011. OUTL_DSP(np, SCRIPTA_BA(np, start));
  2012. }
  2013. }
  2014. else
  2015. goto reset_all;
  2016. return;
  2017. reset_all:
  2018. sym_start_reset(np);
  2019. }
  2020. /*
  2021. * chip exception handler for selection timeout
  2022. */
  2023. static void sym_int_sto (struct sym_hcb *np)
  2024. {
  2025. u32 dsp = INL(np, nc_dsp);
  2026. if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
  2027. if (dsp == SCRIPTA_BA(np, wf_sel_done) + 8)
  2028. sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
  2029. else
  2030. sym_start_reset(np);
  2031. }
  2032. /*
  2033. * chip exception handler for unexpected disconnect
  2034. */
  2035. static void sym_int_udc (struct sym_hcb *np)
  2036. {
  2037. printf ("%s: unexpected disconnect\n", sym_name(np));
  2038. sym_recover_scsi_int(np, HS_UNEXPECTED);
  2039. }
  2040. /*
  2041. * chip exception handler for SCSI bus mode change
  2042. *
  2043. * spi2-r12 11.2.3 says a transceiver mode change must
  2044. * generate a reset event and a device that detects a reset
  2045. * event shall initiate a hard reset. It says also that a
  2046. * device that detects a mode change shall set data transfer
  2047. * mode to eight bit asynchronous, etc...
  2048. * So, just reinitializing all except chip should be enough.
  2049. */
  2050. static void sym_int_sbmc(struct Scsi_Host *shost)
  2051. {
  2052. struct sym_hcb *np = sym_get_hcb(shost);
  2053. u_char scsi_mode = INB(np, nc_stest4) & SMODE;
  2054. /*
  2055. * Notify user.
  2056. */
  2057. printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np),
  2058. sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
  2059. /*
  2060. * Should suspend command processing for a few seconds and
  2061. * reinitialize all except the chip.
  2062. */
  2063. sym_start_up(shost, 2);
  2064. }
  2065. /*
  2066. * chip exception handler for SCSI parity error.
  2067. *
  2068. * When the chip detects a SCSI parity error and is
  2069. * currently executing a (CH)MOV instruction, it does
  2070. * not interrupt immediately, but tries to finish the
  2071. * transfer of the current scatter entry before
  2072. * interrupting. The following situations may occur:
  2073. *
  2074. * - The complete scatter entry has been transferred
  2075. * without the device having changed phase.
  2076. * The chip will then interrupt with the DSP pointing
  2077. * to the instruction that follows the MOV.
  2078. *
  2079. * - A phase mismatch occurs before the MOV finished
  2080. * and phase errors are to be handled by the C code.
  2081. * The chip will then interrupt with both PAR and MA
  2082. * conditions set.
  2083. *
  2084. * - A phase mismatch occurs before the MOV finished and
  2085. * phase errors are to be handled by SCRIPTS.
  2086. * The chip will load the DSP with the phase mismatch
  2087. * JUMP address and interrupt the host processor.
  2088. */
  2089. static void sym_int_par (struct sym_hcb *np, u_short sist)
  2090. {
  2091. u_char hsts = INB(np, HS_PRT);
  2092. u32 dsp = INL(np, nc_dsp);
  2093. u32 dbc = INL(np, nc_dbc);
  2094. u32 dsa = INL(np, nc_dsa);
  2095. u_char sbcl = INB(np, nc_sbcl);
  2096. u_char cmd = dbc >> 24;
  2097. int phase = cmd & 7;
  2098. struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
  2099. if (printk_ratelimit())
  2100. printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
  2101. sym_name(np), hsts, dbc, sbcl);
  2102. /*
  2103. * Check that the chip is connected to the SCSI BUS.
  2104. */
  2105. if (!(INB(np, nc_scntl1) & ISCON)) {
  2106. sym_recover_scsi_int(np, HS_UNEXPECTED);
  2107. return;
  2108. }
  2109. /*
  2110. * If the nexus is not clearly identified, reset the bus.
  2111. * We will try to do better later.
  2112. */
  2113. if (!cp)
  2114. goto reset_all;
  2115. /*
  2116. * Check instruction was a MOV, direction was INPUT and
  2117. * ATN is asserted.
  2118. */
  2119. if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
  2120. goto reset_all;
  2121. /*
  2122. * Keep track of the parity error.
  2123. */
  2124. OUTONB(np, HF_PRT, HF_EXT_ERR);
  2125. cp->xerr_status |= XE_PARITY_ERR;
  2126. /*
  2127. * Prepare the message to send to the device.
  2128. */
  2129. np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
  2130. /*
  2131. * If the old phase was DATA IN phase, we have to deal with
  2132. * the 3 situations described above.
  2133. * For other input phases (MSG IN and STATUS), the device
  2134. * must resend the whole thing that failed parity checking
  2135. * or signal error. So, jumping to dispatcher should be OK.
  2136. */
  2137. if (phase == 1 || phase == 5) {
  2138. /* Phase mismatch handled by SCRIPTS */
  2139. if (dsp == SCRIPTB_BA(np, pm_handle))
  2140. OUTL_DSP(np, dsp);
  2141. /* Phase mismatch handled by the C code */
  2142. else if (sist & MA)
  2143. sym_int_ma (np);
  2144. /* No phase mismatch occurred */
  2145. else {
  2146. sym_set_script_dp (np, cp, dsp);
  2147. OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
  2148. }
  2149. }
  2150. else if (phase == 7) /* We definitely cannot handle parity errors */
  2151. #if 1 /* in message-in phase due to the relection */
  2152. goto reset_all; /* path and various message anticipations. */
  2153. #else
  2154. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  2155. #endif
  2156. else
  2157. OUTL_DSP(np, SCRIPTA_BA(np, dispatch));
  2158. return;
  2159. reset_all:
  2160. sym_start_reset(np);
  2161. return;
  2162. }
  2163. /*
  2164. * chip exception handler for phase errors.
  2165. *
  2166. * We have to construct a new transfer descriptor,
  2167. * to transfer the rest of the current block.
  2168. */
  2169. static void sym_int_ma (struct sym_hcb *np)
  2170. {
  2171. u32 dbc;
  2172. u32 rest;
  2173. u32 dsp;
  2174. u32 dsa;
  2175. u32 nxtdsp;
  2176. u32 *vdsp;
  2177. u32 oadr, olen;
  2178. u32 *tblp;
  2179. u32 newcmd;
  2180. u_int delta;
  2181. u_char cmd;
  2182. u_char hflags, hflags0;
  2183. struct sym_pmc *pm;
  2184. struct sym_ccb *cp;
  2185. dsp = INL(np, nc_dsp);
  2186. dbc = INL(np, nc_dbc);
  2187. dsa = INL(np, nc_dsa);
  2188. cmd = dbc >> 24;
  2189. rest = dbc & 0xffffff;
  2190. delta = 0;
  2191. /*
  2192. * locate matching cp if any.
  2193. */
  2194. cp = sym_ccb_from_dsa(np, dsa);
  2195. /*
  2196. * Donnot take into account dma fifo and various buffers in
  2197. * INPUT phase since the chip flushes everything before
  2198. * raising the MA interrupt for interrupted INPUT phases.
  2199. * For DATA IN phase, we will check for the SWIDE later.
  2200. */
  2201. if ((cmd & 7) != 1 && (cmd & 7) != 5) {
  2202. u_char ss0, ss2;
  2203. if (np->features & FE_DFBC)
  2204. delta = INW(np, nc_dfbc);
  2205. else {
  2206. u32 dfifo;
  2207. /*
  2208. * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
  2209. */
  2210. dfifo = INL(np, nc_dfifo);
  2211. /*
  2212. * Calculate remaining bytes in DMA fifo.
  2213. * (CTEST5 = dfifo >> 16)
  2214. */
  2215. if (dfifo & (DFS << 16))
  2216. delta = ((((dfifo >> 8) & 0x300) |
  2217. (dfifo & 0xff)) - rest) & 0x3ff;
  2218. else
  2219. delta = ((dfifo & 0xff) - rest) & 0x7f;
  2220. }
  2221. /*
  2222. * The data in the dma fifo has not been transferred to
  2223. * the target -> add the amount to the rest
  2224. * and clear the data.
  2225. * Check the sstat2 register in case of wide transfer.
  2226. */
  2227. rest += delta;
  2228. ss0 = INB(np, nc_sstat0);
  2229. if (ss0 & OLF) rest++;
  2230. if (!(np->features & FE_C10))
  2231. if (ss0 & ORF) rest++;
  2232. if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
  2233. ss2 = INB(np, nc_sstat2);
  2234. if (ss2 & OLF1) rest++;
  2235. if (!(np->features & FE_C10))
  2236. if (ss2 & ORF1) rest++;
  2237. }
  2238. /*
  2239. * Clear fifos.
  2240. */
  2241. OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */
  2242. OUTB(np, nc_stest3, TE|CSF); /* scsi fifo */
  2243. }
  2244. /*
  2245. * log the information
  2246. */
  2247. if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
  2248. printf ("P%x%x RL=%d D=%d ", cmd&7, INB(np, nc_sbcl)&7,
  2249. (unsigned) rest, (unsigned) delta);
  2250. /*
  2251. * try to find the interrupted script command,
  2252. * and the address at which to continue.
  2253. */
  2254. vdsp = NULL;
  2255. nxtdsp = 0;
  2256. if (dsp > np->scripta_ba &&
  2257. dsp <= np->scripta_ba + np->scripta_sz) {
  2258. vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
  2259. nxtdsp = dsp;
  2260. }
  2261. else if (dsp > np->scriptb_ba &&
  2262. dsp <= np->scriptb_ba + np->scriptb_sz) {
  2263. vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
  2264. nxtdsp = dsp;
  2265. }
  2266. /*
  2267. * log the information
  2268. */
  2269. if (DEBUG_FLAGS & DEBUG_PHASE) {
  2270. printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
  2271. cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
  2272. }
  2273. if (!vdsp) {
  2274. printf ("%s: interrupted SCRIPT address not found.\n",
  2275. sym_name (np));
  2276. goto reset_all;
  2277. }
  2278. if (!cp) {
  2279. printf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
  2280. sym_name (np));
  2281. goto reset_all;
  2282. }
  2283. /*
  2284. * get old startaddress and old length.
  2285. */
  2286. oadr = scr_to_cpu(vdsp[1]);
  2287. if (cmd & 0x10) { /* Table indirect */
  2288. tblp = (u32 *) ((char*) &cp->phys + oadr);
  2289. olen = scr_to_cpu(tblp[0]);
  2290. oadr = scr_to_cpu(tblp[1]);
  2291. } else {
  2292. tblp = (u32 *) 0;
  2293. olen = scr_to_cpu(vdsp[0]) & 0xffffff;
  2294. }
  2295. if (DEBUG_FLAGS & DEBUG_PHASE) {
  2296. printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
  2297. (unsigned) (scr_to_cpu(vdsp[0]) >> 24),
  2298. tblp,
  2299. (unsigned) olen,
  2300. (unsigned) oadr);
  2301. }
  2302. /*
  2303. * check cmd against assumed interrupted script command.
  2304. * If dt data phase, the MOVE instruction hasn't bit 4 of
  2305. * the phase.
  2306. */
  2307. if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
  2308. sym_print_addr(cp->cmd,
  2309. "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
  2310. cmd, scr_to_cpu(vdsp[0]) >> 24);
  2311. goto reset_all;
  2312. }
  2313. /*
  2314. * if old phase not dataphase, leave here.
  2315. */
  2316. if (cmd & 2) {
  2317. sym_print_addr(cp->cmd,
  2318. "phase change %x-%x %d@%08x resid=%d.\n",
  2319. cmd&7, INB(np, nc_sbcl)&7, (unsigned)olen,
  2320. (unsigned)oadr, (unsigned)rest);
  2321. goto unexpected_phase;
  2322. }
  2323. /*
  2324. * Choose the correct PM save area.
  2325. *
  2326. * Look at the PM_SAVE SCRIPT if you want to understand
  2327. * this stuff. The equivalent code is implemented in
  2328. * SCRIPTS for the 895A, 896 and 1010 that are able to
  2329. * handle PM from the SCRIPTS processor.
  2330. */
  2331. hflags0 = INB(np, HF_PRT);
  2332. hflags = hflags0;
  2333. if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
  2334. if (hflags & HF_IN_PM0)
  2335. nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
  2336. else if (hflags & HF_IN_PM1)
  2337. nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
  2338. if (hflags & HF_DP_SAVED)
  2339. hflags ^= HF_ACT_PM;
  2340. }
  2341. if (!(hflags & HF_ACT_PM)) {
  2342. pm = &cp->phys.pm0;
  2343. newcmd = SCRIPTA_BA(np, pm0_data);
  2344. }
  2345. else {
  2346. pm = &cp->phys.pm1;
  2347. newcmd = SCRIPTA_BA(np, pm1_data);
  2348. }
  2349. hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
  2350. if (hflags != hflags0)
  2351. OUTB(np, HF_PRT, hflags);
  2352. /*
  2353. * fillin the phase mismatch context
  2354. */
  2355. pm->sg.addr = cpu_to_scr(oadr + olen - rest);
  2356. pm->sg.size = cpu_to_scr(rest);
  2357. pm->ret = cpu_to_scr(nxtdsp);
  2358. /*
  2359. * If we have a SWIDE,
  2360. * - prepare the address to write the SWIDE from SCRIPTS,
  2361. * - compute the SCRIPTS address to restart from,
  2362. * - move current data pointer context by one byte.
  2363. */
  2364. nxtdsp = SCRIPTA_BA(np, dispatch);
  2365. if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
  2366. (INB(np, nc_scntl2) & WSR)) {
  2367. u32 tmp;
  2368. /*
  2369. * Set up the table indirect for the MOVE
  2370. * of the residual byte and adjust the data
  2371. * pointer context.
  2372. */
  2373. tmp = scr_to_cpu(pm->sg.addr);
  2374. cp->phys.wresid.addr = cpu_to_scr(tmp);
  2375. pm->sg.addr = cpu_to_scr(tmp + 1);
  2376. tmp = scr_to_cpu(pm->sg.size);
  2377. cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
  2378. pm->sg.size = cpu_to_scr(tmp - 1);
  2379. /*
  2380. * If only the residual byte is to be moved,
  2381. * no PM context is needed.
  2382. */
  2383. if ((tmp&0xffffff) == 1)
  2384. newcmd = pm->ret;
  2385. /*
  2386. * Prepare the address of SCRIPTS that will
  2387. * move the residual byte to memory.
  2388. */
  2389. nxtdsp = SCRIPTB_BA(np, wsr_ma_helper);
  2390. }
  2391. if (DEBUG_FLAGS & DEBUG_PHASE) {
  2392. sym_print_addr(cp->cmd, "PM %x %x %x / %x %x %x.\n",
  2393. hflags0, hflags, newcmd,
  2394. (unsigned)scr_to_cpu(pm->sg.addr),
  2395. (unsigned)scr_to_cpu(pm->sg.size),
  2396. (unsigned)scr_to_cpu(pm->ret));
  2397. }
  2398. /*
  2399. * Restart the SCRIPTS processor.
  2400. */
  2401. sym_set_script_dp (np, cp, newcmd);
  2402. OUTL_DSP(np, nxtdsp);
  2403. return;
  2404. /*
  2405. * Unexpected phase changes that occurs when the current phase
  2406. * is not a DATA IN or DATA OUT phase are due to error conditions.
  2407. * Such event may only happen when the SCRIPTS is using a
  2408. * multibyte SCSI MOVE.
  2409. *
  2410. * Phase change Some possible cause
  2411. *
  2412. * COMMAND --> MSG IN SCSI parity error detected by target.
  2413. * COMMAND --> STATUS Bad command or refused by target.
  2414. * MSG OUT --> MSG IN Message rejected by target.
  2415. * MSG OUT --> COMMAND Bogus target that discards extended
  2416. * negotiation messages.
  2417. *
  2418. * The code below does not care of the new phase and so
  2419. * trusts the target. Why to annoy it ?
  2420. * If the interrupted phase is COMMAND phase, we restart at
  2421. * dispatcher.
  2422. * If a target does not get all the messages after selection,
  2423. * the code assumes blindly that the target discards extended
  2424. * messages and clears the negotiation status.
  2425. * If the target does not want all our response to negotiation,
  2426. * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
  2427. * bloat for such a should_not_happen situation).
  2428. * In all other situation, we reset the BUS.
  2429. * Are these assumptions reasonable ? (Wait and see ...)
  2430. */
  2431. unexpected_phase:
  2432. dsp -= 8;
  2433. nxtdsp = 0;
  2434. switch (cmd & 7) {
  2435. case 2: /* COMMAND phase */
  2436. nxtdsp = SCRIPTA_BA(np, dispatch);
  2437. break;
  2438. #if 0
  2439. case 3: /* STATUS phase */
  2440. nxtdsp = SCRIPTA_BA(np, dispatch);
  2441. break;
  2442. #endif
  2443. case 6: /* MSG OUT phase */
  2444. /*
  2445. * If the device may want to use untagged when we want
  2446. * tagged, we prepare an IDENTIFY without disc. granted,
  2447. * since we will not be able to handle reselect.
  2448. * Otherwise, we just don't care.
  2449. */
  2450. if (dsp == SCRIPTA_BA(np, send_ident)) {
  2451. if (cp->tag != NO_TAG && olen - rest <= 3) {
  2452. cp->host_status = HS_BUSY;
  2453. np->msgout[0] = IDENTIFY(0, cp->lun);
  2454. nxtdsp = SCRIPTB_BA(np, ident_break_atn);
  2455. }
  2456. else
  2457. nxtdsp = SCRIPTB_BA(np, ident_break);
  2458. }
  2459. else if (dsp == SCRIPTB_BA(np, send_wdtr) ||
  2460. dsp == SCRIPTB_BA(np, send_sdtr) ||
  2461. dsp == SCRIPTB_BA(np, send_ppr)) {
  2462. nxtdsp = SCRIPTB_BA(np, nego_bad_phase);
  2463. if (dsp == SCRIPTB_BA(np, send_ppr)) {
  2464. struct scsi_device *dev = cp->cmd->device;
  2465. dev->ppr = 0;
  2466. }
  2467. }
  2468. break;
  2469. #if 0
  2470. case 7: /* MSG IN phase */
  2471. nxtdsp = SCRIPTA_BA(np, clrack);
  2472. break;
  2473. #endif
  2474. }
  2475. if (nxtdsp) {
  2476. OUTL_DSP(np, nxtdsp);
  2477. return;
  2478. }
  2479. reset_all:
  2480. sym_start_reset(np);
  2481. }
  2482. /*
  2483. * chip interrupt handler
  2484. *
  2485. * In normal situations, interrupt conditions occur one at
  2486. * a time. But when something bad happens on the SCSI BUS,
  2487. * the chip may raise several interrupt flags before
  2488. * stopping and interrupting the CPU. The additionnal
  2489. * interrupt flags are stacked in some extra registers
  2490. * after the SIP and/or DIP flag has been raised in the
  2491. * ISTAT. After the CPU has read the interrupt condition
  2492. * flag from SIST or DSTAT, the chip unstacks the other
  2493. * interrupt flags and sets the corresponding bits in
  2494. * SIST or DSTAT. Since the chip starts stacking once the
  2495. * SIP or DIP flag is set, there is a small window of time
  2496. * where the stacking does not occur.
  2497. *
  2498. * Typically, multiple interrupt conditions may happen in
  2499. * the following situations:
  2500. *
  2501. * - SCSI parity error + Phase mismatch (PAR|MA)
  2502. * When an parity error is detected in input phase
  2503. * and the device switches to msg-in phase inside a
  2504. * block MOV.
  2505. * - SCSI parity error + Unexpected disconnect (PAR|UDC)
  2506. * When a stupid device does not want to handle the
  2507. * recovery of an SCSI parity error.
  2508. * - Some combinations of STO, PAR, UDC, ...
  2509. * When using non compliant SCSI stuff, when user is
  2510. * doing non compliant hot tampering on the BUS, when
  2511. * something really bad happens to a device, etc ...
  2512. *
  2513. * The heuristic suggested by SYMBIOS to handle
  2514. * multiple interrupts is to try unstacking all
  2515. * interrupts conditions and to handle them on some
  2516. * priority based on error severity.
  2517. * This will work when the unstacking has been
  2518. * successful, but we cannot be 100 % sure of that,
  2519. * since the CPU may have been faster to unstack than
  2520. * the chip is able to stack. Hmmm ... But it seems that
  2521. * such a situation is very unlikely to happen.
  2522. *
  2523. * If this happen, for example STO caught by the CPU
  2524. * then UDC happenning before the CPU have restarted
  2525. * the SCRIPTS, the driver may wrongly complete the
  2526. * same command on UDC, since the SCRIPTS didn't restart
  2527. * and the DSA still points to the same command.
  2528. * We avoid this situation by setting the DSA to an
  2529. * invalid value when the CCB is completed and before
  2530. * restarting the SCRIPTS.
  2531. *
  2532. * Another issue is that we need some section of our
  2533. * recovery procedures to be somehow uninterruptible but
  2534. * the SCRIPTS processor does not provides such a
  2535. * feature. For this reason, we handle recovery preferently
  2536. * from the C code and check against some SCRIPTS critical
  2537. * sections from the C code.
  2538. *
  2539. * Hopefully, the interrupt handling of the driver is now
  2540. * able to resist to weird BUS error conditions, but donnot
  2541. * ask me for any guarantee that it will never fail. :-)
  2542. * Use at your own decision and risk.
  2543. */
  2544. irqreturn_t sym_interrupt(struct Scsi_Host *shost)
  2545. {
  2546. struct sym_data *sym_data = shost_priv(shost);
  2547. struct sym_hcb *np = sym_data->ncb;
  2548. struct pci_dev *pdev = sym_data->pdev;
  2549. u_char istat, istatc;
  2550. u_char dstat;
  2551. u_short sist;
  2552. /*
  2553. * interrupt on the fly ?
  2554. * (SCRIPTS may still be running)
  2555. *
  2556. * A `dummy read' is needed to ensure that the
  2557. * clear of the INTF flag reaches the device
  2558. * and that posted writes are flushed to memory
  2559. * before the scanning of the DONE queue.
  2560. * Note that SCRIPTS also (dummy) read to memory
  2561. * prior to deliver the INTF interrupt condition.
  2562. */
  2563. istat = INB(np, nc_istat);
  2564. if (istat & INTF) {
  2565. OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem);
  2566. istat |= INB(np, nc_istat); /* DUMMY READ */
  2567. if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
  2568. sym_wakeup_done(np);
  2569. }
  2570. if (!(istat & (SIP|DIP)))
  2571. return (istat & INTF) ? IRQ_HANDLED : IRQ_NONE;
  2572. #if 0 /* We should never get this one */
  2573. if (istat & CABRT)
  2574. OUTB(np, nc_istat, CABRT);
  2575. #endif
  2576. /*
  2577. * PAR and MA interrupts may occur at the same time,
  2578. * and we need to know of both in order to handle
  2579. * this situation properly. We try to unstack SCSI
  2580. * interrupts for that reason. BTW, I dislike a LOT
  2581. * such a loop inside the interrupt routine.
  2582. * Even if DMA interrupt stacking is very unlikely to
  2583. * happen, we also try unstacking these ones, since
  2584. * this has no performance impact.
  2585. */
  2586. sist = 0;
  2587. dstat = 0;
  2588. istatc = istat;
  2589. do {
  2590. if (istatc & SIP)
  2591. sist |= INW(np, nc_sist);
  2592. if (istatc & DIP)
  2593. dstat |= INB(np, nc_dstat);
  2594. istatc = INB(np, nc_istat);
  2595. istat |= istatc;
  2596. /* Prevent deadlock waiting on a condition that may
  2597. * never clear. */
  2598. if (unlikely(sist == 0xffff && dstat == 0xff)) {
  2599. if (pci_channel_offline(pdev))
  2600. return IRQ_NONE;
  2601. }
  2602. } while (istatc & (SIP|DIP));
  2603. if (DEBUG_FLAGS & DEBUG_TINY)
  2604. printf ("<%d|%x:%x|%x:%x>",
  2605. (int)INB(np, nc_scr0),
  2606. dstat,sist,
  2607. (unsigned)INL(np, nc_dsp),
  2608. (unsigned)INL(np, nc_dbc));
  2609. /*
  2610. * On paper, a memory read barrier may be needed here to
  2611. * prevent out of order LOADs by the CPU from having
  2612. * prefetched stale data prior to DMA having occurred.
  2613. * And since we are paranoid ... :)
  2614. */
  2615. MEMORY_READ_BARRIER();
  2616. /*
  2617. * First, interrupts we want to service cleanly.
  2618. *
  2619. * Phase mismatch (MA) is the most frequent interrupt
  2620. * for chip earlier than the 896 and so we have to service
  2621. * it as quickly as possible.
  2622. * A SCSI parity error (PAR) may be combined with a phase
  2623. * mismatch condition (MA).
  2624. * Programmed interrupts (SIR) are used to call the C code
  2625. * from SCRIPTS.
  2626. * The single step interrupt (SSI) is not used in this
  2627. * driver.
  2628. */
  2629. if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
  2630. !(dstat & (MDPE|BF|ABRT|IID))) {
  2631. if (sist & PAR) sym_int_par (np, sist);
  2632. else if (sist & MA) sym_int_ma (np);
  2633. else if (dstat & SIR) sym_int_sir(np);
  2634. else if (dstat & SSI) OUTONB_STD();
  2635. else goto unknown_int;
  2636. return IRQ_HANDLED;
  2637. }
  2638. /*
  2639. * Now, interrupts that donnot happen in normal
  2640. * situations and that we may need to recover from.
  2641. *
  2642. * On SCSI RESET (RST), we reset everything.
  2643. * On SCSI BUS MODE CHANGE (SBMC), we complete all
  2644. * active CCBs with RESET status, prepare all devices
  2645. * for negotiating again and restart the SCRIPTS.
  2646. * On STO and UDC, we complete the CCB with the corres-
  2647. * ponding status and restart the SCRIPTS.
  2648. */
  2649. if (sist & RST) {
  2650. printf("%s: SCSI BUS reset detected.\n", sym_name(np));
  2651. sym_start_up(shost, 1);
  2652. return IRQ_HANDLED;
  2653. }
  2654. OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
  2655. OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */
  2656. if (!(sist & (GEN|HTH|SGE)) &&
  2657. !(dstat & (MDPE|BF|ABRT|IID))) {
  2658. if (sist & SBMC) sym_int_sbmc(shost);
  2659. else if (sist & STO) sym_int_sto (np);
  2660. else if (sist & UDC) sym_int_udc (np);
  2661. else goto unknown_int;
  2662. return IRQ_HANDLED;
  2663. }
  2664. /*
  2665. * Now, interrupts we are not able to recover cleanly.
  2666. *
  2667. * Log message for hard errors.
  2668. * Reset everything.
  2669. */
  2670. sym_log_hard_error(shost, sist, dstat);
  2671. if ((sist & (GEN|HTH|SGE)) ||
  2672. (dstat & (MDPE|BF|ABRT|IID))) {
  2673. sym_start_reset(np);
  2674. return IRQ_HANDLED;
  2675. }
  2676. unknown_int:
  2677. /*
  2678. * We just miss the cause of the interrupt. :(
  2679. * Print a message. The timeout will do the real work.
  2680. */
  2681. printf( "%s: unknown interrupt(s) ignored, "
  2682. "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
  2683. sym_name(np), istat, dstat, sist);
  2684. return IRQ_NONE;
  2685. }
  2686. /*
  2687. * Dequeue from the START queue all CCBs that match
  2688. * a given target/lun/task condition (-1 means all),
  2689. * and move them from the BUSY queue to the COMP queue
  2690. * with DID_SOFT_ERROR status condition.
  2691. * This function is used during error handling/recovery.
  2692. * It is called with SCRIPTS not running.
  2693. */
  2694. static int
  2695. sym_dequeue_from_squeue(struct sym_hcb *np, int i, int target, int lun, int task)
  2696. {
  2697. int j;
  2698. struct sym_ccb *cp;
  2699. /*
  2700. * Make sure the starting index is within range.
  2701. */
  2702. assert((i >= 0) && (i < 2*MAX_QUEUE));
  2703. /*
  2704. * Walk until end of START queue and dequeue every job
  2705. * that matches the target/lun/task condition.
  2706. */
  2707. j = i;
  2708. while (i != np->squeueput) {
  2709. cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
  2710. assert(cp);
  2711. #ifdef SYM_CONF_IARB_SUPPORT
  2712. /* Forget hints for IARB, they may be no longer relevant */
  2713. cp->host_flags &= ~HF_HINT_IARB;
  2714. #endif
  2715. if ((target == -1 || cp->target == target) &&
  2716. (lun == -1 || cp->lun == lun) &&
  2717. (task == -1 || cp->tag == task)) {
  2718. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  2719. sym_set_cam_status(cp->cmd, DID_SOFT_ERROR);
  2720. #else
  2721. sym_set_cam_status(cp->cmd, DID_REQUEUE);
  2722. #endif
  2723. sym_remque(&cp->link_ccbq);
  2724. sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
  2725. }
  2726. else {
  2727. if (i != j)
  2728. np->squeue[j] = np->squeue[i];
  2729. if ((j += 2) >= MAX_QUEUE*2) j = 0;
  2730. }
  2731. if ((i += 2) >= MAX_QUEUE*2) i = 0;
  2732. }
  2733. if (i != j) /* Copy back the idle task if needed */
  2734. np->squeue[j] = np->squeue[i];
  2735. np->squeueput = j; /* Update our current start queue pointer */
  2736. return (i - j) / 2;
  2737. }
  2738. /*
  2739. * chip handler for bad SCSI status condition
  2740. *
  2741. * In case of bad SCSI status, we unqueue all the tasks
  2742. * currently queued to the controller but not yet started
  2743. * and then restart the SCRIPTS processor immediately.
  2744. *
  2745. * QUEUE FULL and BUSY conditions are handled the same way.
  2746. * Basically all the not yet started tasks are requeued in
  2747. * device queue and the queue is frozen until a completion.
  2748. *
  2749. * For CHECK CONDITION and COMMAND TERMINATED status, we use
  2750. * the CCB of the failed command to prepare a REQUEST SENSE
  2751. * SCSI command and queue it to the controller queue.
  2752. *
  2753. * SCRATCHA is assumed to have been loaded with STARTPOS
  2754. * before the SCRIPTS called the C code.
  2755. */
  2756. static void sym_sir_bad_scsi_status(struct sym_hcb *np, int num, struct sym_ccb *cp)
  2757. {
  2758. u32 startp;
  2759. u_char s_status = cp->ssss_status;
  2760. u_char h_flags = cp->host_flags;
  2761. int msglen;
  2762. int i;
  2763. /*
  2764. * Compute the index of the next job to start from SCRIPTS.
  2765. */
  2766. i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
  2767. /*
  2768. * The last CCB queued used for IARB hint may be
  2769. * no longer relevant. Forget it.
  2770. */
  2771. #ifdef SYM_CONF_IARB_SUPPORT
  2772. if (np->last_cp)
  2773. np->last_cp = 0;
  2774. #endif
  2775. /*
  2776. * Now deal with the SCSI status.
  2777. */
  2778. switch(s_status) {
  2779. case S_BUSY:
  2780. case S_QUEUE_FULL:
  2781. if (sym_verbose >= 2) {
  2782. sym_print_addr(cp->cmd, "%s\n",
  2783. s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
  2784. }
  2785. default: /* S_INT, S_INT_COND_MET, S_CONFLICT */
  2786. sym_complete_error (np, cp);
  2787. break;
  2788. case S_TERMINATED:
  2789. case S_CHECK_COND:
  2790. /*
  2791. * If we get an SCSI error when requesting sense, give up.
  2792. */
  2793. if (h_flags & HF_SENSE) {
  2794. sym_complete_error (np, cp);
  2795. break;
  2796. }
  2797. /*
  2798. * Dequeue all queued CCBs for that device not yet started,
  2799. * and restart the SCRIPTS processor immediately.
  2800. */
  2801. sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
  2802. OUTL_DSP(np, SCRIPTA_BA(np, start));
  2803. /*
  2804. * Save some info of the actual IO.
  2805. * Compute the data residual.
  2806. */
  2807. cp->sv_scsi_status = cp->ssss_status;
  2808. cp->sv_xerr_status = cp->xerr_status;
  2809. cp->sv_resid = sym_compute_residual(np, cp);
  2810. /*
  2811. * Prepare all needed data structures for
  2812. * requesting sense data.
  2813. */
  2814. cp->scsi_smsg2[0] = IDENTIFY(0, cp->lun);
  2815. msglen = 1;
  2816. /*
  2817. * If we are currently using anything different from
  2818. * async. 8 bit data transfers with that target,
  2819. * start a negotiation, since the device may want
  2820. * to report us a UNIT ATTENTION condition due to
  2821. * a cause we currently ignore, and we donnot want
  2822. * to be stuck with WIDE and/or SYNC data transfer.
  2823. *
  2824. * cp->nego_status is filled by sym_prepare_nego().
  2825. */
  2826. cp->nego_status = 0;
  2827. msglen += sym_prepare_nego(np, cp, &cp->scsi_smsg2[msglen]);
  2828. /*
  2829. * Message table indirect structure.
  2830. */
  2831. cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg2);
  2832. cp->phys.smsg.size = cpu_to_scr(msglen);
  2833. /*
  2834. * sense command
  2835. */
  2836. cp->phys.cmd.addr = CCB_BA(cp, sensecmd);
  2837. cp->phys.cmd.size = cpu_to_scr(6);
  2838. /*
  2839. * patch requested size into sense command
  2840. */
  2841. cp->sensecmd[0] = REQUEST_SENSE;
  2842. cp->sensecmd[1] = 0;
  2843. if (cp->cmd->device->scsi_level <= SCSI_2 && cp->lun <= 7)
  2844. cp->sensecmd[1] = cp->lun << 5;
  2845. cp->sensecmd[4] = SYM_SNS_BBUF_LEN;
  2846. cp->data_len = SYM_SNS_BBUF_LEN;
  2847. /*
  2848. * sense data
  2849. */
  2850. memset(cp->sns_bbuf, 0, SYM_SNS_BBUF_LEN);
  2851. cp->phys.sense.addr = CCB_BA(cp, sns_bbuf);
  2852. cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN);
  2853. /*
  2854. * requeue the command.
  2855. */
  2856. startp = SCRIPTB_BA(np, sdata_in);
  2857. cp->phys.head.savep = cpu_to_scr(startp);
  2858. cp->phys.head.lastp = cpu_to_scr(startp);
  2859. cp->startp = cpu_to_scr(startp);
  2860. cp->goalp = cpu_to_scr(startp + 16);
  2861. cp->host_xflags = 0;
  2862. cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
  2863. cp->ssss_status = S_ILLEGAL;
  2864. cp->host_flags = (HF_SENSE|HF_DATA_IN);
  2865. cp->xerr_status = 0;
  2866. cp->extra_bytes = 0;
  2867. cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
  2868. /*
  2869. * Requeue the command.
  2870. */
  2871. sym_put_start_queue(np, cp);
  2872. /*
  2873. * Give back to upper layer everything we have dequeued.
  2874. */
  2875. sym_flush_comp_queue(np, 0);
  2876. break;
  2877. }
  2878. }
  2879. /*
  2880. * After a device has accepted some management message
  2881. * as BUS DEVICE RESET, ABORT TASK, etc ..., or when
  2882. * a device signals a UNIT ATTENTION condition, some
  2883. * tasks are thrown away by the device. We are required
  2884. * to reflect that on our tasks list since the device
  2885. * will never complete these tasks.
  2886. *
  2887. * This function move from the BUSY queue to the COMP
  2888. * queue all disconnected CCBs for a given target that
  2889. * match the following criteria:
  2890. * - lun=-1 means any logical UNIT otherwise a given one.
  2891. * - task=-1 means any task, otherwise a given one.
  2892. */
  2893. int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task)
  2894. {
  2895. SYM_QUEHEAD qtmp, *qp;
  2896. int i = 0;
  2897. struct sym_ccb *cp;
  2898. /*
  2899. * Move the entire BUSY queue to our temporary queue.
  2900. */
  2901. sym_que_init(&qtmp);
  2902. sym_que_splice(&np->busy_ccbq, &qtmp);
  2903. sym_que_init(&np->busy_ccbq);
  2904. /*
  2905. * Put all CCBs that matches our criteria into
  2906. * the COMP queue and put back other ones into
  2907. * the BUSY queue.
  2908. */
  2909. while ((qp = sym_remque_head(&qtmp)) != NULL) {
  2910. struct scsi_cmnd *cmd;
  2911. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  2912. cmd = cp->cmd;
  2913. if (cp->host_status != HS_DISCONNECT ||
  2914. cp->target != target ||
  2915. (lun != -1 && cp->lun != lun) ||
  2916. (task != -1 &&
  2917. (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
  2918. sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
  2919. continue;
  2920. }
  2921. sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
  2922. /* Preserve the software timeout condition */
  2923. if (sym_get_cam_status(cmd) != DID_TIME_OUT)
  2924. sym_set_cam_status(cmd, cam_status);
  2925. ++i;
  2926. #if 0
  2927. printf("XXXX TASK @%p CLEARED\n", cp);
  2928. #endif
  2929. }
  2930. return i;
  2931. }
  2932. /*
  2933. * chip handler for TASKS recovery
  2934. *
  2935. * We cannot safely abort a command, while the SCRIPTS
  2936. * processor is running, since we just would be in race
  2937. * with it.
  2938. *
  2939. * As long as we have tasks to abort, we keep the SEM
  2940. * bit set in the ISTAT. When this bit is set, the
  2941. * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
  2942. * each time it enters the scheduler.
  2943. *
  2944. * If we have to reset a target, clear tasks of a unit,
  2945. * or to perform the abort of a disconnected job, we
  2946. * restart the SCRIPTS for selecting the target. Once
  2947. * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
  2948. * If it loses arbitration, the SCRIPTS will interrupt again
  2949. * the next time it will enter its scheduler, and so on ...
  2950. *
  2951. * On SIR_TARGET_SELECTED, we scan for the more
  2952. * appropriate thing to do:
  2953. *
  2954. * - If nothing, we just sent a M_ABORT message to the
  2955. * target to get rid of the useless SCSI bus ownership.
  2956. * According to the specs, no tasks shall be affected.
  2957. * - If the target is to be reset, we send it a M_RESET
  2958. * message.
  2959. * - If a logical UNIT is to be cleared , we send the
  2960. * IDENTIFY(lun) + M_ABORT.
  2961. * - If an untagged task is to be aborted, we send the
  2962. * IDENTIFY(lun) + M_ABORT.
  2963. * - If a tagged task is to be aborted, we send the
  2964. * IDENTIFY(lun) + task attributes + M_ABORT_TAG.
  2965. *
  2966. * Once our 'kiss of death' :) message has been accepted
  2967. * by the target, the SCRIPTS interrupts again
  2968. * (SIR_ABORT_SENT). On this interrupt, we complete
  2969. * all the CCBs that should have been aborted by the
  2970. * target according to our message.
  2971. */
  2972. static void sym_sir_task_recovery(struct sym_hcb *np, int num)
  2973. {
  2974. SYM_QUEHEAD *qp;
  2975. struct sym_ccb *cp;
  2976. struct sym_tcb *tp = NULL; /* gcc isn't quite smart enough yet */
  2977. struct scsi_target *starget;
  2978. int target=-1, lun=-1, task;
  2979. int i, k;
  2980. switch(num) {
  2981. /*
  2982. * The SCRIPTS processor stopped before starting
  2983. * the next command in order to allow us to perform
  2984. * some task recovery.
  2985. */
  2986. case SIR_SCRIPT_STOPPED:
  2987. /*
  2988. * Do we have any target to reset or unit to clear ?
  2989. */
  2990. for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
  2991. tp = &np->target[i];
  2992. if (tp->to_reset ||
  2993. (tp->lun0p && tp->lun0p->to_clear)) {
  2994. target = i;
  2995. break;
  2996. }
  2997. if (!tp->lunmp)
  2998. continue;
  2999. for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
  3000. if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
  3001. target = i;
  3002. break;
  3003. }
  3004. }
  3005. if (target != -1)
  3006. break;
  3007. }
  3008. /*
  3009. * If not, walk the busy queue for any
  3010. * disconnected CCB to be aborted.
  3011. */
  3012. if (target == -1) {
  3013. FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
  3014. cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
  3015. if (cp->host_status != HS_DISCONNECT)
  3016. continue;
  3017. if (cp->to_abort) {
  3018. target = cp->target;
  3019. break;
  3020. }
  3021. }
  3022. }
  3023. /*
  3024. * If some target is to be selected,
  3025. * prepare and start the selection.
  3026. */
  3027. if (target != -1) {
  3028. tp = &np->target[target];
  3029. np->abrt_sel.sel_id = target;
  3030. np->abrt_sel.sel_scntl3 = tp->head.wval;
  3031. np->abrt_sel.sel_sxfer = tp->head.sval;
  3032. OUTL(np, nc_dsa, np->hcb_ba);
  3033. OUTL_DSP(np, SCRIPTB_BA(np, sel_for_abort));
  3034. return;
  3035. }
  3036. /*
  3037. * Now look for a CCB to abort that haven't started yet.
  3038. * Btw, the SCRIPTS processor is still stopped, so
  3039. * we are not in race.
  3040. */
  3041. i = 0;
  3042. cp = NULL;
  3043. FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
  3044. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  3045. if (cp->host_status != HS_BUSY &&
  3046. cp->host_status != HS_NEGOTIATE)
  3047. continue;
  3048. if (!cp->to_abort)
  3049. continue;
  3050. #ifdef SYM_CONF_IARB_SUPPORT
  3051. /*
  3052. * If we are using IMMEDIATE ARBITRATION, we donnot
  3053. * want to cancel the last queued CCB, since the
  3054. * SCRIPTS may have anticipated the selection.
  3055. */
  3056. if (cp == np->last_cp) {
  3057. cp->to_abort = 0;
  3058. continue;
  3059. }
  3060. #endif
  3061. i = 1; /* Means we have found some */
  3062. break;
  3063. }
  3064. if (!i) {
  3065. /*
  3066. * We are done, so we donnot need
  3067. * to synchronize with the SCRIPTS anylonger.
  3068. * Remove the SEM flag from the ISTAT.
  3069. */
  3070. np->istat_sem = 0;
  3071. OUTB(np, nc_istat, SIGP);
  3072. break;
  3073. }
  3074. /*
  3075. * Compute index of next position in the start
  3076. * queue the SCRIPTS intends to start and dequeue
  3077. * all CCBs for that device that haven't been started.
  3078. */
  3079. i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
  3080. i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
  3081. /*
  3082. * Make sure at least our IO to abort has been dequeued.
  3083. */
  3084. #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
  3085. assert(i && sym_get_cam_status(cp->cmd) == DID_SOFT_ERROR);
  3086. #else
  3087. sym_remque(&cp->link_ccbq);
  3088. sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
  3089. #endif
  3090. /*
  3091. * Keep track in cam status of the reason of the abort.
  3092. */
  3093. if (cp->to_abort == 2)
  3094. sym_set_cam_status(cp->cmd, DID_TIME_OUT);
  3095. else
  3096. sym_set_cam_status(cp->cmd, DID_ABORT);
  3097. /*
  3098. * Complete with error everything that we have dequeued.
  3099. */
  3100. sym_flush_comp_queue(np, 0);
  3101. break;
  3102. /*
  3103. * The SCRIPTS processor has selected a target
  3104. * we may have some manual recovery to perform for.
  3105. */
  3106. case SIR_TARGET_SELECTED:
  3107. target = INB(np, nc_sdid) & 0xf;
  3108. tp = &np->target[target];
  3109. np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
  3110. /*
  3111. * If the target is to be reset, prepare a
  3112. * M_RESET message and clear the to_reset flag
  3113. * since we donnot expect this operation to fail.
  3114. */
  3115. if (tp->to_reset) {
  3116. np->abrt_msg[0] = M_RESET;
  3117. np->abrt_tbl.size = 1;
  3118. tp->to_reset = 0;
  3119. break;
  3120. }
  3121. /*
  3122. * Otherwise, look for some logical unit to be cleared.
  3123. */
  3124. if (tp->lun0p && tp->lun0p->to_clear)
  3125. lun = 0;
  3126. else if (tp->lunmp) {
  3127. for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
  3128. if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
  3129. lun = k;
  3130. break;
  3131. }
  3132. }
  3133. }
  3134. /*
  3135. * If a logical unit is to be cleared, prepare
  3136. * an IDENTIFY(lun) + ABORT MESSAGE.
  3137. */
  3138. if (lun != -1) {
  3139. struct sym_lcb *lp = sym_lp(tp, lun);
  3140. lp->to_clear = 0; /* We don't expect to fail here */
  3141. np->abrt_msg[0] = IDENTIFY(0, lun);
  3142. np->abrt_msg[1] = M_ABORT;
  3143. np->abrt_tbl.size = 2;
  3144. break;
  3145. }
  3146. /*
  3147. * Otherwise, look for some disconnected job to
  3148. * abort for this target.
  3149. */
  3150. i = 0;
  3151. cp = NULL;
  3152. FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
  3153. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  3154. if (cp->host_status != HS_DISCONNECT)
  3155. continue;
  3156. if (cp->target != target)
  3157. continue;
  3158. if (!cp->to_abort)
  3159. continue;
  3160. i = 1; /* Means we have some */
  3161. break;
  3162. }
  3163. /*
  3164. * If we have none, probably since the device has
  3165. * completed the command before we won abitration,
  3166. * send a M_ABORT message without IDENTIFY.
  3167. * According to the specs, the device must just
  3168. * disconnect the BUS and not abort any task.
  3169. */
  3170. if (!i) {
  3171. np->abrt_msg[0] = M_ABORT;
  3172. np->abrt_tbl.size = 1;
  3173. break;
  3174. }
  3175. /*
  3176. * We have some task to abort.
  3177. * Set the IDENTIFY(lun)
  3178. */
  3179. np->abrt_msg[0] = IDENTIFY(0, cp->lun);
  3180. /*
  3181. * If we want to abort an untagged command, we
  3182. * will send a IDENTIFY + M_ABORT.
  3183. * Otherwise (tagged command), we will send
  3184. * a IDENTITFY + task attributes + ABORT TAG.
  3185. */
  3186. if (cp->tag == NO_TAG) {
  3187. np->abrt_msg[1] = M_ABORT;
  3188. np->abrt_tbl.size = 2;
  3189. } else {
  3190. np->abrt_msg[1] = cp->scsi_smsg[1];
  3191. np->abrt_msg[2] = cp->scsi_smsg[2];
  3192. np->abrt_msg[3] = M_ABORT_TAG;
  3193. np->abrt_tbl.size = 4;
  3194. }
  3195. /*
  3196. * Keep track of software timeout condition, since the
  3197. * peripheral driver may not count retries on abort
  3198. * conditions not due to timeout.
  3199. */
  3200. if (cp->to_abort == 2)
  3201. sym_set_cam_status(cp->cmd, DID_TIME_OUT);
  3202. cp->to_abort = 0; /* We donnot expect to fail here */
  3203. break;
  3204. /*
  3205. * The target has accepted our message and switched
  3206. * to BUS FREE phase as we expected.
  3207. */
  3208. case SIR_ABORT_SENT:
  3209. target = INB(np, nc_sdid) & 0xf;
  3210. tp = &np->target[target];
  3211. starget = tp->starget;
  3212. /*
  3213. ** If we didn't abort anything, leave here.
  3214. */
  3215. if (np->abrt_msg[0] == M_ABORT)
  3216. break;
  3217. /*
  3218. * If we sent a M_RESET, then a hardware reset has
  3219. * been performed by the target.
  3220. * - Reset everything to async 8 bit
  3221. * - Tell ourself to negotiate next time :-)
  3222. * - Prepare to clear all disconnected CCBs for
  3223. * this target from our task list (lun=task=-1)
  3224. */
  3225. lun = -1;
  3226. task = -1;
  3227. if (np->abrt_msg[0] == M_RESET) {
  3228. tp->head.sval = 0;
  3229. tp->head.wval = np->rv_scntl3;
  3230. tp->head.uval = 0;
  3231. spi_period(starget) = 0;
  3232. spi_offset(starget) = 0;
  3233. spi_width(starget) = 0;
  3234. spi_iu(starget) = 0;
  3235. spi_dt(starget) = 0;
  3236. spi_qas(starget) = 0;
  3237. tp->tgoal.check_nego = 1;
  3238. tp->tgoal.renego = 0;
  3239. }
  3240. /*
  3241. * Otherwise, check for the LUN and TASK(s)
  3242. * concerned by the cancelation.
  3243. * If it is not ABORT_TAG then it is CLEAR_QUEUE
  3244. * or an ABORT message :-)
  3245. */
  3246. else {
  3247. lun = np->abrt_msg[0] & 0x3f;
  3248. if (np->abrt_msg[1] == M_ABORT_TAG)
  3249. task = np->abrt_msg[2];
  3250. }
  3251. /*
  3252. * Complete all the CCBs the device should have
  3253. * aborted due to our 'kiss of death' message.
  3254. */
  3255. i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
  3256. sym_dequeue_from_squeue(np, i, target, lun, -1);
  3257. sym_clear_tasks(np, DID_ABORT, target, lun, task);
  3258. sym_flush_comp_queue(np, 0);
  3259. /*
  3260. * If we sent a BDR, make upper layer aware of that.
  3261. */
  3262. if (np->abrt_msg[0] == M_RESET)
  3263. starget_printk(KERN_NOTICE, starget,
  3264. "has been reset\n");
  3265. break;
  3266. }
  3267. /*
  3268. * Print to the log the message we intend to send.
  3269. */
  3270. if (num == SIR_TARGET_SELECTED) {
  3271. dev_info(&tp->starget->dev, "control msgout:");
  3272. sym_printl_hex(np->abrt_msg, np->abrt_tbl.size);
  3273. np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
  3274. }
  3275. /*
  3276. * Let the SCRIPTS processor continue.
  3277. */
  3278. OUTONB_STD();
  3279. }
  3280. /*
  3281. * Gerard's alchemy:) that deals with with the data
  3282. * pointer for both MDP and the residual calculation.
  3283. *
  3284. * I didn't want to bloat the code by more than 200
  3285. * lines for the handling of both MDP and the residual.
  3286. * This has been achieved by using a data pointer
  3287. * representation consisting in an index in the data
  3288. * array (dp_sg) and a negative offset (dp_ofs) that
  3289. * have the following meaning:
  3290. *
  3291. * - dp_sg = SYM_CONF_MAX_SG
  3292. * we are at the end of the data script.
  3293. * - dp_sg < SYM_CONF_MAX_SG
  3294. * dp_sg points to the next entry of the scatter array
  3295. * we want to transfer.
  3296. * - dp_ofs < 0
  3297. * dp_ofs represents the residual of bytes of the
  3298. * previous entry scatter entry we will send first.
  3299. * - dp_ofs = 0
  3300. * no residual to send first.
  3301. *
  3302. * The function sym_evaluate_dp() accepts an arbitray
  3303. * offset (basically from the MDP message) and returns
  3304. * the corresponding values of dp_sg and dp_ofs.
  3305. */
  3306. static int sym_evaluate_dp(struct sym_hcb *np, struct sym_ccb *cp, u32 scr, int *ofs)
  3307. {
  3308. u32 dp_scr;
  3309. int dp_ofs, dp_sg, dp_sgmin;
  3310. int tmp;
  3311. struct sym_pmc *pm;
  3312. /*
  3313. * Compute the resulted data pointer in term of a script
  3314. * address within some DATA script and a signed byte offset.
  3315. */
  3316. dp_scr = scr;
  3317. dp_ofs = *ofs;
  3318. if (dp_scr == SCRIPTA_BA(np, pm0_data))
  3319. pm = &cp->phys.pm0;
  3320. else if (dp_scr == SCRIPTA_BA(np, pm1_data))
  3321. pm = &cp->phys.pm1;
  3322. else
  3323. pm = NULL;
  3324. if (pm) {
  3325. dp_scr = scr_to_cpu(pm->ret);
  3326. dp_ofs -= scr_to_cpu(pm->sg.size) & 0x00ffffff;
  3327. }
  3328. /*
  3329. * If we are auto-sensing, then we are done.
  3330. */
  3331. if (cp->host_flags & HF_SENSE) {
  3332. *ofs = dp_ofs;
  3333. return 0;
  3334. }
  3335. /*
  3336. * Deduce the index of the sg entry.
  3337. * Keep track of the index of the first valid entry.
  3338. * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
  3339. * end of the data.
  3340. */
  3341. tmp = scr_to_cpu(cp->goalp);
  3342. dp_sg = SYM_CONF_MAX_SG;
  3343. if (dp_scr != tmp)
  3344. dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
  3345. dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
  3346. /*
  3347. * Move to the sg entry the data pointer belongs to.
  3348. *
  3349. * If we are inside the data area, we expect result to be:
  3350. *
  3351. * Either,
  3352. * dp_ofs = 0 and dp_sg is the index of the sg entry
  3353. * the data pointer belongs to (or the end of the data)
  3354. * Or,
  3355. * dp_ofs < 0 and dp_sg is the index of the sg entry
  3356. * the data pointer belongs to + 1.
  3357. */
  3358. if (dp_ofs < 0) {
  3359. int n;
  3360. while (dp_sg > dp_sgmin) {
  3361. --dp_sg;
  3362. tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
  3363. n = dp_ofs + (tmp & 0xffffff);
  3364. if (n > 0) {
  3365. ++dp_sg;
  3366. break;
  3367. }
  3368. dp_ofs = n;
  3369. }
  3370. }
  3371. else if (dp_ofs > 0) {
  3372. while (dp_sg < SYM_CONF_MAX_SG) {
  3373. tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
  3374. dp_ofs -= (tmp & 0xffffff);
  3375. ++dp_sg;
  3376. if (dp_ofs <= 0)
  3377. break;
  3378. }
  3379. }
  3380. /*
  3381. * Make sure the data pointer is inside the data area.
  3382. * If not, return some error.
  3383. */
  3384. if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
  3385. goto out_err;
  3386. else if (dp_sg > SYM_CONF_MAX_SG ||
  3387. (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
  3388. goto out_err;
  3389. /*
  3390. * Save the extreme pointer if needed.
  3391. */
  3392. if (dp_sg > cp->ext_sg ||
  3393. (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
  3394. cp->ext_sg = dp_sg;
  3395. cp->ext_ofs = dp_ofs;
  3396. }
  3397. /*
  3398. * Return data.
  3399. */
  3400. *ofs = dp_ofs;
  3401. return dp_sg;
  3402. out_err:
  3403. return -1;
  3404. }
  3405. /*
  3406. * chip handler for MODIFY DATA POINTER MESSAGE
  3407. *
  3408. * We also call this function on IGNORE WIDE RESIDUE
  3409. * messages that do not match a SWIDE full condition.
  3410. * Btw, we assume in that situation that such a message
  3411. * is equivalent to a MODIFY DATA POINTER (offset=-1).
  3412. */
  3413. static void sym_modify_dp(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp, int ofs)
  3414. {
  3415. int dp_ofs = ofs;
  3416. u32 dp_scr = sym_get_script_dp (np, cp);
  3417. u32 dp_ret;
  3418. u32 tmp;
  3419. u_char hflags;
  3420. int dp_sg;
  3421. struct sym_pmc *pm;
  3422. /*
  3423. * Not supported for auto-sense.
  3424. */
  3425. if (cp->host_flags & HF_SENSE)
  3426. goto out_reject;
  3427. /*
  3428. * Apply our alchemy:) (see comments in sym_evaluate_dp()),
  3429. * to the resulted data pointer.
  3430. */
  3431. dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
  3432. if (dp_sg < 0)
  3433. goto out_reject;
  3434. /*
  3435. * And our alchemy:) allows to easily calculate the data
  3436. * script address we want to return for the next data phase.
  3437. */
  3438. dp_ret = cpu_to_scr(cp->goalp);
  3439. dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
  3440. /*
  3441. * If offset / scatter entry is zero we donnot need
  3442. * a context for the new current data pointer.
  3443. */
  3444. if (dp_ofs == 0) {
  3445. dp_scr = dp_ret;
  3446. goto out_ok;
  3447. }
  3448. /*
  3449. * Get a context for the new current data pointer.
  3450. */
  3451. hflags = INB(np, HF_PRT);
  3452. if (hflags & HF_DP_SAVED)
  3453. hflags ^= HF_ACT_PM;
  3454. if (!(hflags & HF_ACT_PM)) {
  3455. pm = &cp->phys.pm0;
  3456. dp_scr = SCRIPTA_BA(np, pm0_data);
  3457. }
  3458. else {
  3459. pm = &cp->phys.pm1;
  3460. dp_scr = SCRIPTA_BA(np, pm1_data);
  3461. }
  3462. hflags &= ~(HF_DP_SAVED);
  3463. OUTB(np, HF_PRT, hflags);
  3464. /*
  3465. * Set up the new current data pointer.
  3466. * ofs < 0 there, and for the next data phase, we
  3467. * want to transfer part of the data of the sg entry
  3468. * corresponding to index dp_sg-1 prior to returning
  3469. * to the main data script.
  3470. */
  3471. pm->ret = cpu_to_scr(dp_ret);
  3472. tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
  3473. tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
  3474. pm->sg.addr = cpu_to_scr(tmp);
  3475. pm->sg.size = cpu_to_scr(-dp_ofs);
  3476. out_ok:
  3477. sym_set_script_dp (np, cp, dp_scr);
  3478. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  3479. return;
  3480. out_reject:
  3481. OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
  3482. }
  3483. /*
  3484. * chip calculation of the data residual.
  3485. *
  3486. * As I used to say, the requirement of data residual
  3487. * in SCSI is broken, useless and cannot be achieved
  3488. * without huge complexity.
  3489. * But most OSes and even the official CAM require it.
  3490. * When stupidity happens to be so widely spread inside
  3491. * a community, it gets hard to convince.
  3492. *
  3493. * Anyway, I don't care, since I am not going to use
  3494. * any software that considers this data residual as
  3495. * a relevant information. :)
  3496. */
  3497. int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp)
  3498. {
  3499. int dp_sg, dp_sgmin, resid = 0;
  3500. int dp_ofs = 0;
  3501. /*
  3502. * Check for some data lost or just thrown away.
  3503. * We are not required to be quite accurate in this
  3504. * situation. Btw, if we are odd for output and the
  3505. * device claims some more data, it may well happen
  3506. * than our residual be zero. :-)
  3507. */
  3508. if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
  3509. if (cp->xerr_status & XE_EXTRA_DATA)
  3510. resid -= cp->extra_bytes;
  3511. if (cp->xerr_status & XE_SODL_UNRUN)
  3512. ++resid;
  3513. if (cp->xerr_status & XE_SWIDE_OVRUN)
  3514. --resid;
  3515. }
  3516. /*
  3517. * If all data has been transferred,
  3518. * there is no residual.
  3519. */
  3520. if (cp->phys.head.lastp == cp->goalp)
  3521. return resid;
  3522. /*
  3523. * If no data transfer occurs, or if the data
  3524. * pointer is weird, return full residual.
  3525. */
  3526. if (cp->startp == cp->phys.head.lastp ||
  3527. sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
  3528. &dp_ofs) < 0) {
  3529. return cp->data_len - cp->odd_byte_adjustment;
  3530. }
  3531. /*
  3532. * If we were auto-sensing, then we are done.
  3533. */
  3534. if (cp->host_flags & HF_SENSE) {
  3535. return -dp_ofs;
  3536. }
  3537. /*
  3538. * We are now full comfortable in the computation
  3539. * of the data residual (2's complement).
  3540. */
  3541. dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
  3542. resid = -cp->ext_ofs;
  3543. for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
  3544. u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
  3545. resid += (tmp & 0xffffff);
  3546. }
  3547. resid -= cp->odd_byte_adjustment;
  3548. /*
  3549. * Hopefully, the result is not too wrong.
  3550. */
  3551. return resid;
  3552. }
  3553. /*
  3554. * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
  3555. *
  3556. * When we try to negotiate, we append the negotiation message
  3557. * to the identify and (maybe) simple tag message.
  3558. * The host status field is set to HS_NEGOTIATE to mark this
  3559. * situation.
  3560. *
  3561. * If the target doesn't answer this message immediately
  3562. * (as required by the standard), the SIR_NEGO_FAILED interrupt
  3563. * will be raised eventually.
  3564. * The handler removes the HS_NEGOTIATE status, and sets the
  3565. * negotiated value to the default (async / nowide).
  3566. *
  3567. * If we receive a matching answer immediately, we check it
  3568. * for validity, and set the values.
  3569. *
  3570. * If we receive a Reject message immediately, we assume the
  3571. * negotiation has failed, and fall back to standard values.
  3572. *
  3573. * If we receive a negotiation message while not in HS_NEGOTIATE
  3574. * state, it's a target initiated negotiation. We prepare a
  3575. * (hopefully) valid answer, set our parameters, and send back
  3576. * this answer to the target.
  3577. *
  3578. * If the target doesn't fetch the answer (no message out phase),
  3579. * we assume the negotiation has failed, and fall back to default
  3580. * settings (SIR_NEGO_PROTO interrupt).
  3581. *
  3582. * When we set the values, we adjust them in all ccbs belonging
  3583. * to this target, in the controller's register, and in the "phys"
  3584. * field of the controller's struct sym_hcb.
  3585. */
  3586. /*
  3587. * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
  3588. */
  3589. static int
  3590. sym_sync_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
  3591. {
  3592. int target = cp->target;
  3593. u_char chg, ofs, per, fak, div;
  3594. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3595. sym_print_nego_msg(np, target, "sync msgin", np->msgin);
  3596. }
  3597. /*
  3598. * Get requested values.
  3599. */
  3600. chg = 0;
  3601. per = np->msgin[3];
  3602. ofs = np->msgin[4];
  3603. /*
  3604. * Check values against our limits.
  3605. */
  3606. if (ofs) {
  3607. if (ofs > np->maxoffs)
  3608. {chg = 1; ofs = np->maxoffs;}
  3609. }
  3610. if (ofs) {
  3611. if (per < np->minsync)
  3612. {chg = 1; per = np->minsync;}
  3613. }
  3614. /*
  3615. * Get new chip synchronous parameters value.
  3616. */
  3617. div = fak = 0;
  3618. if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
  3619. goto reject_it;
  3620. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3621. sym_print_addr(cp->cmd,
  3622. "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
  3623. ofs, per, div, fak, chg);
  3624. }
  3625. /*
  3626. * If it was an answer we want to change,
  3627. * then it isn't acceptable. Reject it.
  3628. */
  3629. if (!req && chg)
  3630. goto reject_it;
  3631. /*
  3632. * Apply new values.
  3633. */
  3634. sym_setsync (np, target, ofs, per, div, fak);
  3635. /*
  3636. * It was an answer. We are done.
  3637. */
  3638. if (!req)
  3639. return 0;
  3640. /*
  3641. * It was a request. Prepare an answer message.
  3642. */
  3643. spi_populate_sync_msg(np->msgout, per, ofs);
  3644. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3645. sym_print_nego_msg(np, target, "sync msgout", np->msgout);
  3646. }
  3647. np->msgin [0] = M_NOOP;
  3648. return 0;
  3649. reject_it:
  3650. sym_setsync (np, target, 0, 0, 0, 0);
  3651. return -1;
  3652. }
  3653. static void sym_sync_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
  3654. {
  3655. int req = 1;
  3656. int result;
  3657. /*
  3658. * Request or answer ?
  3659. */
  3660. if (INB(np, HS_PRT) == HS_NEGOTIATE) {
  3661. OUTB(np, HS_PRT, HS_BUSY);
  3662. if (cp->nego_status && cp->nego_status != NS_SYNC)
  3663. goto reject_it;
  3664. req = 0;
  3665. }
  3666. /*
  3667. * Check and apply new values.
  3668. */
  3669. result = sym_sync_nego_check(np, req, cp);
  3670. if (result) /* Not acceptable, reject it */
  3671. goto reject_it;
  3672. if (req) { /* Was a request, send response. */
  3673. cp->nego_status = NS_SYNC;
  3674. OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
  3675. }
  3676. else /* Was a response, we are done. */
  3677. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  3678. return;
  3679. reject_it:
  3680. OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
  3681. }
  3682. /*
  3683. * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
  3684. */
  3685. static int
  3686. sym_ppr_nego_check(struct sym_hcb *np, int req, int target)
  3687. {
  3688. struct sym_tcb *tp = &np->target[target];
  3689. unsigned char fak, div;
  3690. int dt, chg = 0;
  3691. unsigned char per = np->msgin[3];
  3692. unsigned char ofs = np->msgin[5];
  3693. unsigned char wide = np->msgin[6];
  3694. unsigned char opts = np->msgin[7] & PPR_OPT_MASK;
  3695. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3696. sym_print_nego_msg(np, target, "ppr msgin", np->msgin);
  3697. }
  3698. /*
  3699. * Check values against our limits.
  3700. */
  3701. if (wide > np->maxwide) {
  3702. chg = 1;
  3703. wide = np->maxwide;
  3704. }
  3705. if (!wide || !(np->features & FE_U3EN))
  3706. opts = 0;
  3707. if (opts != (np->msgin[7] & PPR_OPT_MASK))
  3708. chg = 1;
  3709. dt = opts & PPR_OPT_DT;
  3710. if (ofs) {
  3711. unsigned char maxoffs = dt ? np->maxoffs_dt : np->maxoffs;
  3712. if (ofs > maxoffs) {
  3713. chg = 1;
  3714. ofs = maxoffs;
  3715. }
  3716. }
  3717. if (ofs) {
  3718. unsigned char minsync = dt ? np->minsync_dt : np->minsync;
  3719. if (per < minsync) {
  3720. chg = 1;
  3721. per = minsync;
  3722. }
  3723. }
  3724. /*
  3725. * Get new chip synchronous parameters value.
  3726. */
  3727. div = fak = 0;
  3728. if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
  3729. goto reject_it;
  3730. /*
  3731. * If it was an answer we want to change,
  3732. * then it isn't acceptable. Reject it.
  3733. */
  3734. if (!req && chg)
  3735. goto reject_it;
  3736. /*
  3737. * Apply new values.
  3738. */
  3739. sym_setpprot(np, target, opts, ofs, per, wide, div, fak);
  3740. /*
  3741. * It was an answer. We are done.
  3742. */
  3743. if (!req)
  3744. return 0;
  3745. /*
  3746. * It was a request. Prepare an answer message.
  3747. */
  3748. spi_populate_ppr_msg(np->msgout, per, ofs, wide, opts);
  3749. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3750. sym_print_nego_msg(np, target, "ppr msgout", np->msgout);
  3751. }
  3752. np->msgin [0] = M_NOOP;
  3753. return 0;
  3754. reject_it:
  3755. sym_setpprot (np, target, 0, 0, 0, 0, 0, 0);
  3756. /*
  3757. * If it is a device response that should result in
  3758. * ST, we may want to try a legacy negotiation later.
  3759. */
  3760. if (!req && !opts) {
  3761. tp->tgoal.period = per;
  3762. tp->tgoal.offset = ofs;
  3763. tp->tgoal.width = wide;
  3764. tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
  3765. tp->tgoal.check_nego = 1;
  3766. }
  3767. return -1;
  3768. }
  3769. static void sym_ppr_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
  3770. {
  3771. int req = 1;
  3772. int result;
  3773. /*
  3774. * Request or answer ?
  3775. */
  3776. if (INB(np, HS_PRT) == HS_NEGOTIATE) {
  3777. OUTB(np, HS_PRT, HS_BUSY);
  3778. if (cp->nego_status && cp->nego_status != NS_PPR)
  3779. goto reject_it;
  3780. req = 0;
  3781. }
  3782. /*
  3783. * Check and apply new values.
  3784. */
  3785. result = sym_ppr_nego_check(np, req, cp->target);
  3786. if (result) /* Not acceptable, reject it */
  3787. goto reject_it;
  3788. if (req) { /* Was a request, send response. */
  3789. cp->nego_status = NS_PPR;
  3790. OUTL_DSP(np, SCRIPTB_BA(np, ppr_resp));
  3791. }
  3792. else /* Was a response, we are done. */
  3793. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  3794. return;
  3795. reject_it:
  3796. OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
  3797. }
  3798. /*
  3799. * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
  3800. */
  3801. static int
  3802. sym_wide_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp)
  3803. {
  3804. int target = cp->target;
  3805. u_char chg, wide;
  3806. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3807. sym_print_nego_msg(np, target, "wide msgin", np->msgin);
  3808. }
  3809. /*
  3810. * Get requested values.
  3811. */
  3812. chg = 0;
  3813. wide = np->msgin[3];
  3814. /*
  3815. * Check values against our limits.
  3816. */
  3817. if (wide > np->maxwide) {
  3818. chg = 1;
  3819. wide = np->maxwide;
  3820. }
  3821. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3822. sym_print_addr(cp->cmd, "wdtr: wide=%d chg=%d.\n",
  3823. wide, chg);
  3824. }
  3825. /*
  3826. * If it was an answer we want to change,
  3827. * then it isn't acceptable. Reject it.
  3828. */
  3829. if (!req && chg)
  3830. goto reject_it;
  3831. /*
  3832. * Apply new values.
  3833. */
  3834. sym_setwide (np, target, wide);
  3835. /*
  3836. * It was an answer. We are done.
  3837. */
  3838. if (!req)
  3839. return 0;
  3840. /*
  3841. * It was a request. Prepare an answer message.
  3842. */
  3843. spi_populate_width_msg(np->msgout, wide);
  3844. np->msgin [0] = M_NOOP;
  3845. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3846. sym_print_nego_msg(np, target, "wide msgout", np->msgout);
  3847. }
  3848. return 0;
  3849. reject_it:
  3850. return -1;
  3851. }
  3852. static void sym_wide_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
  3853. {
  3854. int req = 1;
  3855. int result;
  3856. /*
  3857. * Request or answer ?
  3858. */
  3859. if (INB(np, HS_PRT) == HS_NEGOTIATE) {
  3860. OUTB(np, HS_PRT, HS_BUSY);
  3861. if (cp->nego_status && cp->nego_status != NS_WIDE)
  3862. goto reject_it;
  3863. req = 0;
  3864. }
  3865. /*
  3866. * Check and apply new values.
  3867. */
  3868. result = sym_wide_nego_check(np, req, cp);
  3869. if (result) /* Not acceptable, reject it */
  3870. goto reject_it;
  3871. if (req) { /* Was a request, send response. */
  3872. cp->nego_status = NS_WIDE;
  3873. OUTL_DSP(np, SCRIPTB_BA(np, wdtr_resp));
  3874. } else { /* Was a response. */
  3875. /*
  3876. * Negotiate for SYNC immediately after WIDE response.
  3877. * This allows to negotiate for both WIDE and SYNC on
  3878. * a single SCSI command (Suggested by Justin Gibbs).
  3879. */
  3880. if (tp->tgoal.offset) {
  3881. spi_populate_sync_msg(np->msgout, tp->tgoal.period,
  3882. tp->tgoal.offset);
  3883. if (DEBUG_FLAGS & DEBUG_NEGO) {
  3884. sym_print_nego_msg(np, cp->target,
  3885. "sync msgout", np->msgout);
  3886. }
  3887. cp->nego_status = NS_SYNC;
  3888. OUTB(np, HS_PRT, HS_NEGOTIATE);
  3889. OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp));
  3890. return;
  3891. } else
  3892. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  3893. }
  3894. return;
  3895. reject_it:
  3896. OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
  3897. }
  3898. /*
  3899. * Reset DT, SYNC or WIDE to default settings.
  3900. *
  3901. * Called when a negotiation does not succeed either
  3902. * on rejection or on protocol error.
  3903. *
  3904. * A target that understands a PPR message should never
  3905. * reject it, and messing with it is very unlikely.
  3906. * So, if a PPR makes problems, we may just want to
  3907. * try a legacy negotiation later.
  3908. */
  3909. static void sym_nego_default(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
  3910. {
  3911. switch (cp->nego_status) {
  3912. case NS_PPR:
  3913. #if 0
  3914. sym_setpprot (np, cp->target, 0, 0, 0, 0, 0, 0);
  3915. #else
  3916. if (tp->tgoal.period < np->minsync)
  3917. tp->tgoal.period = np->minsync;
  3918. if (tp->tgoal.offset > np->maxoffs)
  3919. tp->tgoal.offset = np->maxoffs;
  3920. tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0;
  3921. tp->tgoal.check_nego = 1;
  3922. #endif
  3923. break;
  3924. case NS_SYNC:
  3925. sym_setsync (np, cp->target, 0, 0, 0, 0);
  3926. break;
  3927. case NS_WIDE:
  3928. sym_setwide (np, cp->target, 0);
  3929. break;
  3930. }
  3931. np->msgin [0] = M_NOOP;
  3932. np->msgout[0] = M_NOOP;
  3933. cp->nego_status = 0;
  3934. }
  3935. /*
  3936. * chip handler for MESSAGE REJECT received in response to
  3937. * PPR, WIDE or SYNCHRONOUS negotiation.
  3938. */
  3939. static void sym_nego_rejected(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp)
  3940. {
  3941. sym_nego_default(np, tp, cp);
  3942. OUTB(np, HS_PRT, HS_BUSY);
  3943. }
  3944. /*
  3945. * chip exception handler for programmed interrupts.
  3946. */
  3947. static void sym_int_sir(struct sym_hcb *np)
  3948. {
  3949. u_char num = INB(np, nc_dsps);
  3950. u32 dsa = INL(np, nc_dsa);
  3951. struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa);
  3952. u_char target = INB(np, nc_sdid) & 0x0f;
  3953. struct sym_tcb *tp = &np->target[target];
  3954. int tmp;
  3955. if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
  3956. switch (num) {
  3957. #if SYM_CONF_DMA_ADDRESSING_MODE == 2
  3958. /*
  3959. * SCRIPTS tell us that we may have to update
  3960. * 64 bit DMA segment registers.
  3961. */
  3962. case SIR_DMAP_DIRTY:
  3963. sym_update_dmap_regs(np);
  3964. goto out;
  3965. #endif
  3966. /*
  3967. * Command has been completed with error condition
  3968. * or has been auto-sensed.
  3969. */
  3970. case SIR_COMPLETE_ERROR:
  3971. sym_complete_error(np, cp);
  3972. return;
  3973. /*
  3974. * The C code is currently trying to recover from something.
  3975. * Typically, user want to abort some command.
  3976. */
  3977. case SIR_SCRIPT_STOPPED:
  3978. case SIR_TARGET_SELECTED:
  3979. case SIR_ABORT_SENT:
  3980. sym_sir_task_recovery(np, num);
  3981. return;
  3982. /*
  3983. * The device didn't go to MSG OUT phase after having
  3984. * been selected with ATN. We do not want to handle that.
  3985. */
  3986. case SIR_SEL_ATN_NO_MSG_OUT:
  3987. scmd_printk(KERN_WARNING, cp->cmd,
  3988. "No MSG OUT phase after selection with ATN\n");
  3989. goto out_stuck;
  3990. /*
  3991. * The device didn't switch to MSG IN phase after
  3992. * having reselected the initiator.
  3993. */
  3994. case SIR_RESEL_NO_MSG_IN:
  3995. scmd_printk(KERN_WARNING, cp->cmd,
  3996. "No MSG IN phase after reselection\n");
  3997. goto out_stuck;
  3998. /*
  3999. * After reselection, the device sent a message that wasn't
  4000. * an IDENTIFY.
  4001. */
  4002. case SIR_RESEL_NO_IDENTIFY:
  4003. scmd_printk(KERN_WARNING, cp->cmd,
  4004. "No IDENTIFY after reselection\n");
  4005. goto out_stuck;
  4006. /*
  4007. * The device reselected a LUN we do not know about.
  4008. */
  4009. case SIR_RESEL_BAD_LUN:
  4010. np->msgout[0] = M_RESET;
  4011. goto out;
  4012. /*
  4013. * The device reselected for an untagged nexus and we
  4014. * haven't any.
  4015. */
  4016. case SIR_RESEL_BAD_I_T_L:
  4017. np->msgout[0] = M_ABORT;
  4018. goto out;
  4019. /*
  4020. * The device reselected for a tagged nexus that we do not have.
  4021. */
  4022. case SIR_RESEL_BAD_I_T_L_Q:
  4023. np->msgout[0] = M_ABORT_TAG;
  4024. goto out;
  4025. /*
  4026. * The SCRIPTS let us know that the device has grabbed
  4027. * our message and will abort the job.
  4028. */
  4029. case SIR_RESEL_ABORTED:
  4030. np->lastmsg = np->msgout[0];
  4031. np->msgout[0] = M_NOOP;
  4032. scmd_printk(KERN_WARNING, cp->cmd,
  4033. "message %x sent on bad reselection\n", np->lastmsg);
  4034. goto out;
  4035. /*
  4036. * The SCRIPTS let us know that a message has been
  4037. * successfully sent to the device.
  4038. */
  4039. case SIR_MSG_OUT_DONE:
  4040. np->lastmsg = np->msgout[0];
  4041. np->msgout[0] = M_NOOP;
  4042. /* Should we really care of that */
  4043. if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
  4044. if (cp) {
  4045. cp->xerr_status &= ~XE_PARITY_ERR;
  4046. if (!cp->xerr_status)
  4047. OUTOFFB(np, HF_PRT, HF_EXT_ERR);
  4048. }
  4049. }
  4050. goto out;
  4051. /*
  4052. * The device didn't send a GOOD SCSI status.
  4053. * We may have some work to do prior to allow
  4054. * the SCRIPTS processor to continue.
  4055. */
  4056. case SIR_BAD_SCSI_STATUS:
  4057. if (!cp)
  4058. goto out;
  4059. sym_sir_bad_scsi_status(np, num, cp);
  4060. return;
  4061. /*
  4062. * We are asked by the SCRIPTS to prepare a
  4063. * REJECT message.
  4064. */
  4065. case SIR_REJECT_TO_SEND:
  4066. sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
  4067. np->msgout[0] = M_REJECT;
  4068. goto out;
  4069. /*
  4070. * We have been ODD at the end of a DATA IN
  4071. * transfer and the device didn't send a
  4072. * IGNORE WIDE RESIDUE message.
  4073. * It is a data overrun condition.
  4074. */
  4075. case SIR_SWIDE_OVERRUN:
  4076. if (cp) {
  4077. OUTONB(np, HF_PRT, HF_EXT_ERR);
  4078. cp->xerr_status |= XE_SWIDE_OVRUN;
  4079. }
  4080. goto out;
  4081. /*
  4082. * We have been ODD at the end of a DATA OUT
  4083. * transfer.
  4084. * It is a data underrun condition.
  4085. */
  4086. case SIR_SODL_UNDERRUN:
  4087. if (cp) {
  4088. OUTONB(np, HF_PRT, HF_EXT_ERR);
  4089. cp->xerr_status |= XE_SODL_UNRUN;
  4090. }
  4091. goto out;
  4092. /*
  4093. * The device wants us to tranfer more data than
  4094. * expected or in the wrong direction.
  4095. * The number of extra bytes is in scratcha.
  4096. * It is a data overrun condition.
  4097. */
  4098. case SIR_DATA_OVERRUN:
  4099. if (cp) {
  4100. OUTONB(np, HF_PRT, HF_EXT_ERR);
  4101. cp->xerr_status |= XE_EXTRA_DATA;
  4102. cp->extra_bytes += INL(np, nc_scratcha);
  4103. }
  4104. goto out;
  4105. /*
  4106. * The device switched to an illegal phase (4/5).
  4107. */
  4108. case SIR_BAD_PHASE:
  4109. if (cp) {
  4110. OUTONB(np, HF_PRT, HF_EXT_ERR);
  4111. cp->xerr_status |= XE_BAD_PHASE;
  4112. }
  4113. goto out;
  4114. /*
  4115. * We received a message.
  4116. */
  4117. case SIR_MSG_RECEIVED:
  4118. if (!cp)
  4119. goto out_stuck;
  4120. switch (np->msgin [0]) {
  4121. /*
  4122. * We received an extended message.
  4123. * We handle MODIFY DATA POINTER, SDTR, WDTR
  4124. * and reject all other extended messages.
  4125. */
  4126. case M_EXTENDED:
  4127. switch (np->msgin [2]) {
  4128. case M_X_MODIFY_DP:
  4129. if (DEBUG_FLAGS & DEBUG_POINTER)
  4130. sym_print_msg(cp, "extended msg ",
  4131. np->msgin);
  4132. tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
  4133. (np->msgin[5]<<8) + (np->msgin[6]);
  4134. sym_modify_dp(np, tp, cp, tmp);
  4135. return;
  4136. case M_X_SYNC_REQ:
  4137. sym_sync_nego(np, tp, cp);
  4138. return;
  4139. case M_X_PPR_REQ:
  4140. sym_ppr_nego(np, tp, cp);
  4141. return;
  4142. case M_X_WIDE_REQ:
  4143. sym_wide_nego(np, tp, cp);
  4144. return;
  4145. default:
  4146. goto out_reject;
  4147. }
  4148. break;
  4149. /*
  4150. * We received a 1/2 byte message not handled from SCRIPTS.
  4151. * We are only expecting MESSAGE REJECT and IGNORE WIDE
  4152. * RESIDUE messages that haven't been anticipated by
  4153. * SCRIPTS on SWIDE full condition. Unanticipated IGNORE
  4154. * WIDE RESIDUE messages are aliased as MODIFY DP (-1).
  4155. */
  4156. case M_IGN_RESIDUE:
  4157. if (DEBUG_FLAGS & DEBUG_POINTER)
  4158. sym_print_msg(cp, "1 or 2 byte ", np->msgin);
  4159. if (cp->host_flags & HF_SENSE)
  4160. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  4161. else
  4162. sym_modify_dp(np, tp, cp, -1);
  4163. return;
  4164. case M_REJECT:
  4165. if (INB(np, HS_PRT) == HS_NEGOTIATE)
  4166. sym_nego_rejected(np, tp, cp);
  4167. else {
  4168. sym_print_addr(cp->cmd,
  4169. "M_REJECT received (%x:%x).\n",
  4170. scr_to_cpu(np->lastmsg), np->msgout[0]);
  4171. }
  4172. goto out_clrack;
  4173. break;
  4174. default:
  4175. goto out_reject;
  4176. }
  4177. break;
  4178. /*
  4179. * We received an unknown message.
  4180. * Ignore all MSG IN phases and reject it.
  4181. */
  4182. case SIR_MSG_WEIRD:
  4183. sym_print_msg(cp, "WEIRD message received", np->msgin);
  4184. OUTL_DSP(np, SCRIPTB_BA(np, msg_weird));
  4185. return;
  4186. /*
  4187. * Negotiation failed.
  4188. * Target does not send us the reply.
  4189. * Remove the HS_NEGOTIATE status.
  4190. */
  4191. case SIR_NEGO_FAILED:
  4192. OUTB(np, HS_PRT, HS_BUSY);
  4193. /*
  4194. * Negotiation failed.
  4195. * Target does not want answer message.
  4196. */
  4197. case SIR_NEGO_PROTO:
  4198. sym_nego_default(np, tp, cp);
  4199. goto out;
  4200. }
  4201. out:
  4202. OUTONB_STD();
  4203. return;
  4204. out_reject:
  4205. OUTL_DSP(np, SCRIPTB_BA(np, msg_bad));
  4206. return;
  4207. out_clrack:
  4208. OUTL_DSP(np, SCRIPTA_BA(np, clrack));
  4209. return;
  4210. out_stuck:
  4211. return;
  4212. }
  4213. /*
  4214. * Acquire a control block
  4215. */
  4216. struct sym_ccb *sym_get_ccb (struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order)
  4217. {
  4218. u_char tn = cmd->device->id;
  4219. u_char ln = cmd->device->lun;
  4220. struct sym_tcb *tp = &np->target[tn];
  4221. struct sym_lcb *lp = sym_lp(tp, ln);
  4222. u_short tag = NO_TAG;
  4223. SYM_QUEHEAD *qp;
  4224. struct sym_ccb *cp = NULL;
  4225. /*
  4226. * Look for a free CCB
  4227. */
  4228. if (sym_que_empty(&np->free_ccbq))
  4229. sym_alloc_ccb(np);
  4230. qp = sym_remque_head(&np->free_ccbq);
  4231. if (!qp)
  4232. goto out;
  4233. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  4234. {
  4235. /*
  4236. * If we have been asked for a tagged command.
  4237. */
  4238. if (tag_order) {
  4239. /*
  4240. * Debugging purpose.
  4241. */
  4242. #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4243. if (lp->busy_itl != 0)
  4244. goto out_free;
  4245. #endif
  4246. /*
  4247. * Allocate resources for tags if not yet.
  4248. */
  4249. if (!lp->cb_tags) {
  4250. sym_alloc_lcb_tags(np, tn, ln);
  4251. if (!lp->cb_tags)
  4252. goto out_free;
  4253. }
  4254. /*
  4255. * Get a tag for this SCSI IO and set up
  4256. * the CCB bus address for reselection,
  4257. * and count it for this LUN.
  4258. * Toggle reselect path to tagged.
  4259. */
  4260. if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
  4261. tag = lp->cb_tags[lp->ia_tag];
  4262. if (++lp->ia_tag == SYM_CONF_MAX_TASK)
  4263. lp->ia_tag = 0;
  4264. ++lp->busy_itlq;
  4265. #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4266. lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
  4267. lp->head.resel_sa =
  4268. cpu_to_scr(SCRIPTA_BA(np, resel_tag));
  4269. #endif
  4270. #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
  4271. cp->tags_si = lp->tags_si;
  4272. ++lp->tags_sum[cp->tags_si];
  4273. ++lp->tags_since;
  4274. #endif
  4275. }
  4276. else
  4277. goto out_free;
  4278. }
  4279. /*
  4280. * This command will not be tagged.
  4281. * If we already have either a tagged or untagged
  4282. * one, refuse to overlap this untagged one.
  4283. */
  4284. else {
  4285. /*
  4286. * Debugging purpose.
  4287. */
  4288. #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4289. if (lp->busy_itl != 0 || lp->busy_itlq != 0)
  4290. goto out_free;
  4291. #endif
  4292. /*
  4293. * Count this nexus for this LUN.
  4294. * Set up the CCB bus address for reselection.
  4295. * Toggle reselect path to untagged.
  4296. */
  4297. ++lp->busy_itl;
  4298. #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4299. if (lp->busy_itl == 1) {
  4300. lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
  4301. lp->head.resel_sa =
  4302. cpu_to_scr(SCRIPTA_BA(np, resel_no_tag));
  4303. }
  4304. else
  4305. goto out_free;
  4306. #endif
  4307. }
  4308. }
  4309. /*
  4310. * Put the CCB into the busy queue.
  4311. */
  4312. sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
  4313. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4314. if (lp) {
  4315. sym_remque(&cp->link2_ccbq);
  4316. sym_insque_tail(&cp->link2_ccbq, &lp->waiting_ccbq);
  4317. }
  4318. #endif
  4319. cp->to_abort = 0;
  4320. cp->odd_byte_adjustment = 0;
  4321. cp->tag = tag;
  4322. cp->order = tag_order;
  4323. cp->target = tn;
  4324. cp->lun = ln;
  4325. if (DEBUG_FLAGS & DEBUG_TAGS) {
  4326. sym_print_addr(cmd, "ccb @%p using tag %d.\n", cp, tag);
  4327. }
  4328. out:
  4329. return cp;
  4330. out_free:
  4331. sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
  4332. return NULL;
  4333. }
  4334. /*
  4335. * Release one control block
  4336. */
  4337. void sym_free_ccb (struct sym_hcb *np, struct sym_ccb *cp)
  4338. {
  4339. struct sym_tcb *tp = &np->target[cp->target];
  4340. struct sym_lcb *lp = sym_lp(tp, cp->lun);
  4341. if (DEBUG_FLAGS & DEBUG_TAGS) {
  4342. sym_print_addr(cp->cmd, "ccb @%p freeing tag %d.\n",
  4343. cp, cp->tag);
  4344. }
  4345. /*
  4346. * If LCB available,
  4347. */
  4348. if (lp) {
  4349. /*
  4350. * If tagged, release the tag, set the relect path
  4351. */
  4352. if (cp->tag != NO_TAG) {
  4353. #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
  4354. --lp->tags_sum[cp->tags_si];
  4355. #endif
  4356. /*
  4357. * Free the tag value.
  4358. */
  4359. lp->cb_tags[lp->if_tag] = cp->tag;
  4360. if (++lp->if_tag == SYM_CONF_MAX_TASK)
  4361. lp->if_tag = 0;
  4362. /*
  4363. * Make the reselect path invalid,
  4364. * and uncount this CCB.
  4365. */
  4366. lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
  4367. --lp->busy_itlq;
  4368. } else { /* Untagged */
  4369. /*
  4370. * Make the reselect path invalid,
  4371. * and uncount this CCB.
  4372. */
  4373. lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
  4374. --lp->busy_itl;
  4375. }
  4376. /*
  4377. * If no JOB active, make the LUN reselect path invalid.
  4378. */
  4379. if (lp->busy_itlq == 0 && lp->busy_itl == 0)
  4380. lp->head.resel_sa =
  4381. cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
  4382. }
  4383. /*
  4384. * We donnot queue more than 1 ccb per target
  4385. * with negotiation at any time. If this ccb was
  4386. * used for negotiation, clear this info in the tcb.
  4387. */
  4388. if (cp == tp->nego_cp)
  4389. tp->nego_cp = NULL;
  4390. #ifdef SYM_CONF_IARB_SUPPORT
  4391. /*
  4392. * If we just complete the last queued CCB,
  4393. * clear this info that is no longer relevant.
  4394. */
  4395. if (cp == np->last_cp)
  4396. np->last_cp = 0;
  4397. #endif
  4398. /*
  4399. * Make this CCB available.
  4400. */
  4401. cp->cmd = NULL;
  4402. cp->host_status = HS_IDLE;
  4403. sym_remque(&cp->link_ccbq);
  4404. sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
  4405. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4406. if (lp) {
  4407. sym_remque(&cp->link2_ccbq);
  4408. sym_insque_tail(&cp->link2_ccbq, &np->dummy_ccbq);
  4409. if (cp->started) {
  4410. if (cp->tag != NO_TAG)
  4411. --lp->started_tags;
  4412. else
  4413. --lp->started_no_tag;
  4414. }
  4415. }
  4416. cp->started = 0;
  4417. #endif
  4418. }
  4419. /*
  4420. * Allocate a CCB from memory and initialize its fixed part.
  4421. */
  4422. static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np)
  4423. {
  4424. struct sym_ccb *cp = NULL;
  4425. int hcode;
  4426. /*
  4427. * Prevent from allocating more CCBs than we can
  4428. * queue to the controller.
  4429. */
  4430. if (np->actccbs >= SYM_CONF_MAX_START)
  4431. return NULL;
  4432. /*
  4433. * Allocate memory for this CCB.
  4434. */
  4435. cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
  4436. if (!cp)
  4437. goto out_free;
  4438. /*
  4439. * Count it.
  4440. */
  4441. np->actccbs++;
  4442. /*
  4443. * Compute the bus address of this ccb.
  4444. */
  4445. cp->ccb_ba = vtobus(cp);
  4446. /*
  4447. * Insert this ccb into the hashed list.
  4448. */
  4449. hcode = CCB_HASH_CODE(cp->ccb_ba);
  4450. cp->link_ccbh = np->ccbh[hcode];
  4451. np->ccbh[hcode] = cp;
  4452. /*
  4453. * Initialyze the start and restart actions.
  4454. */
  4455. cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, idle));
  4456. cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
  4457. /*
  4458. * Initilialyze some other fields.
  4459. */
  4460. cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
  4461. /*
  4462. * Chain into free ccb queue.
  4463. */
  4464. sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
  4465. /*
  4466. * Chain into optionnal lists.
  4467. */
  4468. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4469. sym_insque_head(&cp->link2_ccbq, &np->dummy_ccbq);
  4470. #endif
  4471. return cp;
  4472. out_free:
  4473. if (cp)
  4474. sym_mfree_dma(cp, sizeof(*cp), "CCB");
  4475. return NULL;
  4476. }
  4477. /*
  4478. * Look up a CCB from a DSA value.
  4479. */
  4480. static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa)
  4481. {
  4482. int hcode;
  4483. struct sym_ccb *cp;
  4484. hcode = CCB_HASH_CODE(dsa);
  4485. cp = np->ccbh[hcode];
  4486. while (cp) {
  4487. if (cp->ccb_ba == dsa)
  4488. break;
  4489. cp = cp->link_ccbh;
  4490. }
  4491. return cp;
  4492. }
  4493. /*
  4494. * Target control block initialisation.
  4495. * Nothing important to do at the moment.
  4496. */
  4497. static void sym_init_tcb (struct sym_hcb *np, u_char tn)
  4498. {
  4499. #if 0 /* Hmmm... this checking looks paranoid. */
  4500. /*
  4501. * Check some alignments required by the chip.
  4502. */
  4503. assert (((offsetof(struct sym_reg, nc_sxfer) ^
  4504. offsetof(struct sym_tcb, head.sval)) &3) == 0);
  4505. assert (((offsetof(struct sym_reg, nc_scntl3) ^
  4506. offsetof(struct sym_tcb, head.wval)) &3) == 0);
  4507. #endif
  4508. }
  4509. /*
  4510. * Lun control block allocation and initialization.
  4511. */
  4512. struct sym_lcb *sym_alloc_lcb (struct sym_hcb *np, u_char tn, u_char ln)
  4513. {
  4514. struct sym_tcb *tp = &np->target[tn];
  4515. struct sym_lcb *lp = NULL;
  4516. /*
  4517. * Initialize the target control block if not yet.
  4518. */
  4519. sym_init_tcb (np, tn);
  4520. /*
  4521. * Allocate the LCB bus address array.
  4522. * Compute the bus address of this table.
  4523. */
  4524. if (ln && !tp->luntbl) {
  4525. int i;
  4526. tp->luntbl = sym_calloc_dma(256, "LUNTBL");
  4527. if (!tp->luntbl)
  4528. goto fail;
  4529. for (i = 0 ; i < 64 ; i++)
  4530. tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
  4531. tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
  4532. }
  4533. /*
  4534. * Allocate the table of pointers for LUN(s) > 0, if needed.
  4535. */
  4536. if (ln && !tp->lunmp) {
  4537. tp->lunmp = kcalloc(SYM_CONF_MAX_LUN, sizeof(struct sym_lcb *),
  4538. GFP_ATOMIC);
  4539. if (!tp->lunmp)
  4540. goto fail;
  4541. }
  4542. /*
  4543. * Allocate the lcb.
  4544. * Make it available to the chip.
  4545. */
  4546. lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
  4547. if (!lp)
  4548. goto fail;
  4549. if (ln) {
  4550. tp->lunmp[ln] = lp;
  4551. tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
  4552. }
  4553. else {
  4554. tp->lun0p = lp;
  4555. tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
  4556. }
  4557. tp->nlcb++;
  4558. /*
  4559. * Let the itl task point to error handling.
  4560. */
  4561. lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
  4562. /*
  4563. * Set the reselect pattern to our default. :)
  4564. */
  4565. lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
  4566. /*
  4567. * Set user capabilities.
  4568. */
  4569. lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
  4570. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4571. /*
  4572. * Initialize device queueing.
  4573. */
  4574. sym_que_init(&lp->waiting_ccbq);
  4575. sym_que_init(&lp->started_ccbq);
  4576. lp->started_max = SYM_CONF_MAX_TASK;
  4577. lp->started_limit = SYM_CONF_MAX_TASK;
  4578. #endif
  4579. fail:
  4580. return lp;
  4581. }
  4582. /*
  4583. * Allocate LCB resources for tagged command queuing.
  4584. */
  4585. static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln)
  4586. {
  4587. struct sym_tcb *tp = &np->target[tn];
  4588. struct sym_lcb *lp = sym_lp(tp, ln);
  4589. int i;
  4590. /*
  4591. * Allocate the task table and and the tag allocation
  4592. * circular buffer. We want both or none.
  4593. */
  4594. lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
  4595. if (!lp->itlq_tbl)
  4596. goto fail;
  4597. lp->cb_tags = kcalloc(SYM_CONF_MAX_TASK, 1, GFP_ATOMIC);
  4598. if (!lp->cb_tags) {
  4599. sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
  4600. lp->itlq_tbl = NULL;
  4601. goto fail;
  4602. }
  4603. /*
  4604. * Initialize the task table with invalid entries.
  4605. */
  4606. for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
  4607. lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
  4608. /*
  4609. * Fill up the tag buffer with tag numbers.
  4610. */
  4611. for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
  4612. lp->cb_tags[i] = i;
  4613. /*
  4614. * Make the task table available to SCRIPTS,
  4615. * And accept tagged commands now.
  4616. */
  4617. lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
  4618. return;
  4619. fail:
  4620. return;
  4621. }
  4622. /*
  4623. * Lun control block deallocation. Returns the number of valid remaining LCBs
  4624. * for the target.
  4625. */
  4626. int sym_free_lcb(struct sym_hcb *np, u_char tn, u_char ln)
  4627. {
  4628. struct sym_tcb *tp = &np->target[tn];
  4629. struct sym_lcb *lp = sym_lp(tp, ln);
  4630. tp->nlcb--;
  4631. if (ln) {
  4632. if (!tp->nlcb) {
  4633. kfree(tp->lunmp);
  4634. sym_mfree_dma(tp->luntbl, 256, "LUNTBL");
  4635. tp->lunmp = NULL;
  4636. tp->luntbl = NULL;
  4637. tp->head.luntbl_sa = cpu_to_scr(vtobus(np->badluntbl));
  4638. } else {
  4639. tp->luntbl[ln] = cpu_to_scr(vtobus(&np->badlun_sa));
  4640. tp->lunmp[ln] = NULL;
  4641. }
  4642. } else {
  4643. tp->lun0p = NULL;
  4644. tp->head.lun0_sa = cpu_to_scr(vtobus(&np->badlun_sa));
  4645. }
  4646. if (lp->itlq_tbl) {
  4647. sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
  4648. kfree(lp->cb_tags);
  4649. }
  4650. sym_mfree_dma(lp, sizeof(*lp), "LCB");
  4651. return tp->nlcb;
  4652. }
  4653. /*
  4654. * Queue a SCSI IO to the controller.
  4655. */
  4656. int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *cp)
  4657. {
  4658. struct scsi_device *sdev = cmd->device;
  4659. struct sym_tcb *tp;
  4660. struct sym_lcb *lp;
  4661. u_char *msgptr;
  4662. u_int msglen;
  4663. int can_disconnect;
  4664. /*
  4665. * Keep track of the IO in our CCB.
  4666. */
  4667. cp->cmd = cmd;
  4668. /*
  4669. * Retrieve the target descriptor.
  4670. */
  4671. tp = &np->target[cp->target];
  4672. /*
  4673. * Retrieve the lun descriptor.
  4674. */
  4675. lp = sym_lp(tp, sdev->lun);
  4676. can_disconnect = (cp->tag != NO_TAG) ||
  4677. (lp && (lp->curr_flags & SYM_DISC_ENABLED));
  4678. msgptr = cp->scsi_smsg;
  4679. msglen = 0;
  4680. msgptr[msglen++] = IDENTIFY(can_disconnect, sdev->lun);
  4681. /*
  4682. * Build the tag message if present.
  4683. */
  4684. if (cp->tag != NO_TAG) {
  4685. u_char order = cp->order;
  4686. switch(order) {
  4687. case M_ORDERED_TAG:
  4688. break;
  4689. case M_HEAD_TAG:
  4690. break;
  4691. default:
  4692. order = M_SIMPLE_TAG;
  4693. }
  4694. #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING
  4695. /*
  4696. * Avoid too much reordering of SCSI commands.
  4697. * The algorithm tries to prevent completion of any
  4698. * tagged command from being delayed against more
  4699. * than 3 times the max number of queued commands.
  4700. */
  4701. if (lp && lp->tags_since > 3*SYM_CONF_MAX_TAG) {
  4702. lp->tags_si = !(lp->tags_si);
  4703. if (lp->tags_sum[lp->tags_si]) {
  4704. order = M_ORDERED_TAG;
  4705. if ((DEBUG_FLAGS & DEBUG_TAGS)||sym_verbose>1) {
  4706. sym_print_addr(cmd,
  4707. "ordered tag forced.\n");
  4708. }
  4709. }
  4710. lp->tags_since = 0;
  4711. }
  4712. #endif
  4713. msgptr[msglen++] = order;
  4714. /*
  4715. * For less than 128 tags, actual tags are numbered
  4716. * 1,3,5,..2*MAXTAGS+1,since we may have to deal
  4717. * with devices that have problems with #TAG 0 or too
  4718. * great #TAG numbers. For more tags (up to 256),
  4719. * we use directly our tag number.
  4720. */
  4721. #if SYM_CONF_MAX_TASK > (512/4)
  4722. msgptr[msglen++] = cp->tag;
  4723. #else
  4724. msgptr[msglen++] = (cp->tag << 1) + 1;
  4725. #endif
  4726. }
  4727. /*
  4728. * Build a negotiation message if needed.
  4729. * (nego_status is filled by sym_prepare_nego())
  4730. *
  4731. * Always negotiate on INQUIRY and REQUEST SENSE.
  4732. *
  4733. */
  4734. cp->nego_status = 0;
  4735. if ((tp->tgoal.check_nego ||
  4736. cmd->cmnd[0] == INQUIRY || cmd->cmnd[0] == REQUEST_SENSE) &&
  4737. !tp->nego_cp && lp) {
  4738. msglen += sym_prepare_nego(np, cp, msgptr + msglen);
  4739. }
  4740. /*
  4741. * Startqueue
  4742. */
  4743. cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select));
  4744. cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA(np, resel_dsa));
  4745. /*
  4746. * select
  4747. */
  4748. cp->phys.select.sel_id = cp->target;
  4749. cp->phys.select.sel_scntl3 = tp->head.wval;
  4750. cp->phys.select.sel_sxfer = tp->head.sval;
  4751. cp->phys.select.sel_scntl4 = tp->head.uval;
  4752. /*
  4753. * message
  4754. */
  4755. cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg);
  4756. cp->phys.smsg.size = cpu_to_scr(msglen);
  4757. /*
  4758. * status
  4759. */
  4760. cp->host_xflags = 0;
  4761. cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
  4762. cp->ssss_status = S_ILLEGAL;
  4763. cp->xerr_status = 0;
  4764. cp->host_flags = 0;
  4765. cp->extra_bytes = 0;
  4766. /*
  4767. * extreme data pointer.
  4768. * shall be positive, so -1 is lower than lowest.:)
  4769. */
  4770. cp->ext_sg = -1;
  4771. cp->ext_ofs = 0;
  4772. /*
  4773. * Build the CDB and DATA descriptor block
  4774. * and start the IO.
  4775. */
  4776. return sym_setup_data_and_start(np, cmd, cp);
  4777. }
  4778. /*
  4779. * Reset a SCSI target (all LUNs of this target).
  4780. */
  4781. int sym_reset_scsi_target(struct sym_hcb *np, int target)
  4782. {
  4783. struct sym_tcb *tp;
  4784. if (target == np->myaddr || (u_int)target >= SYM_CONF_MAX_TARGET)
  4785. return -1;
  4786. tp = &np->target[target];
  4787. tp->to_reset = 1;
  4788. np->istat_sem = SEM;
  4789. OUTB(np, nc_istat, SIGP|SEM);
  4790. return 0;
  4791. }
  4792. /*
  4793. * Abort a SCSI IO.
  4794. */
  4795. static int sym_abort_ccb(struct sym_hcb *np, struct sym_ccb *cp, int timed_out)
  4796. {
  4797. /*
  4798. * Check that the IO is active.
  4799. */
  4800. if (!cp || !cp->host_status || cp->host_status == HS_WAIT)
  4801. return -1;
  4802. /*
  4803. * If a previous abort didn't succeed in time,
  4804. * perform a BUS reset.
  4805. */
  4806. if (cp->to_abort) {
  4807. sym_reset_scsi_bus(np, 1);
  4808. return 0;
  4809. }
  4810. /*
  4811. * Mark the CCB for abort and allow time for.
  4812. */
  4813. cp->to_abort = timed_out ? 2 : 1;
  4814. /*
  4815. * Tell the SCRIPTS processor to stop and synchronize with us.
  4816. */
  4817. np->istat_sem = SEM;
  4818. OUTB(np, nc_istat, SIGP|SEM);
  4819. return 0;
  4820. }
  4821. int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, int timed_out)
  4822. {
  4823. struct sym_ccb *cp;
  4824. SYM_QUEHEAD *qp;
  4825. /*
  4826. * Look up our CCB control block.
  4827. */
  4828. cp = NULL;
  4829. FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
  4830. struct sym_ccb *cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  4831. if (cp2->cmd == cmd) {
  4832. cp = cp2;
  4833. break;
  4834. }
  4835. }
  4836. return sym_abort_ccb(np, cp, timed_out);
  4837. }
  4838. /*
  4839. * Complete execution of a SCSI command with extended
  4840. * error, SCSI status error, or having been auto-sensed.
  4841. *
  4842. * The SCRIPTS processor is not running there, so we
  4843. * can safely access IO registers and remove JOBs from
  4844. * the START queue.
  4845. * SCRATCHA is assumed to have been loaded with STARTPOS
  4846. * before the SCRIPTS called the C code.
  4847. */
  4848. void sym_complete_error(struct sym_hcb *np, struct sym_ccb *cp)
  4849. {
  4850. struct scsi_device *sdev;
  4851. struct scsi_cmnd *cmd;
  4852. struct sym_tcb *tp;
  4853. struct sym_lcb *lp;
  4854. int resid;
  4855. int i;
  4856. /*
  4857. * Paranoid check. :)
  4858. */
  4859. if (!cp || !cp->cmd)
  4860. return;
  4861. cmd = cp->cmd;
  4862. sdev = cmd->device;
  4863. if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
  4864. dev_info(&sdev->sdev_gendev, "CCB=%p STAT=%x/%x/%x\n", cp,
  4865. cp->host_status, cp->ssss_status, cp->host_flags);
  4866. }
  4867. /*
  4868. * Get target and lun pointers.
  4869. */
  4870. tp = &np->target[cp->target];
  4871. lp = sym_lp(tp, sdev->lun);
  4872. /*
  4873. * Check for extended errors.
  4874. */
  4875. if (cp->xerr_status) {
  4876. if (sym_verbose)
  4877. sym_print_xerr(cmd, cp->xerr_status);
  4878. if (cp->host_status == HS_COMPLETE)
  4879. cp->host_status = HS_COMP_ERR;
  4880. }
  4881. /*
  4882. * Calculate the residual.
  4883. */
  4884. resid = sym_compute_residual(np, cp);
  4885. if (!SYM_SETUP_RESIDUAL_SUPPORT) {/* If user does not want residuals */
  4886. resid = 0; /* throw them away. :) */
  4887. cp->sv_resid = 0;
  4888. }
  4889. #ifdef DEBUG_2_0_X
  4890. if (resid)
  4891. printf("XXXX RESID= %d - 0x%x\n", resid, resid);
  4892. #endif
  4893. /*
  4894. * Dequeue all queued CCBs for that device
  4895. * not yet started by SCRIPTS.
  4896. */
  4897. i = (INL(np, nc_scratcha) - np->squeue_ba) / 4;
  4898. i = sym_dequeue_from_squeue(np, i, cp->target, sdev->lun, -1);
  4899. /*
  4900. * Restart the SCRIPTS processor.
  4901. */
  4902. OUTL_DSP(np, SCRIPTA_BA(np, start));
  4903. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4904. if (cp->host_status == HS_COMPLETE &&
  4905. cp->ssss_status == S_QUEUE_FULL) {
  4906. if (!lp || lp->started_tags - i < 2)
  4907. goto weirdness;
  4908. /*
  4909. * Decrease queue depth as needed.
  4910. */
  4911. lp->started_max = lp->started_tags - i - 1;
  4912. lp->num_sgood = 0;
  4913. if (sym_verbose >= 2) {
  4914. sym_print_addr(cmd, " queue depth is now %d\n",
  4915. lp->started_max);
  4916. }
  4917. /*
  4918. * Repair the CCB.
  4919. */
  4920. cp->host_status = HS_BUSY;
  4921. cp->ssss_status = S_ILLEGAL;
  4922. /*
  4923. * Let's requeue it to device.
  4924. */
  4925. sym_set_cam_status(cmd, DID_SOFT_ERROR);
  4926. goto finish;
  4927. }
  4928. weirdness:
  4929. #endif
  4930. /*
  4931. * Build result in CAM ccb.
  4932. */
  4933. sym_set_cam_result_error(np, cp, resid);
  4934. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4935. finish:
  4936. #endif
  4937. /*
  4938. * Add this one to the COMP queue.
  4939. */
  4940. sym_remque(&cp->link_ccbq);
  4941. sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
  4942. /*
  4943. * Complete all those commands with either error
  4944. * or requeue condition.
  4945. */
  4946. sym_flush_comp_queue(np, 0);
  4947. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  4948. /*
  4949. * Donnot start more than 1 command after an error.
  4950. */
  4951. sym_start_next_ccbs(np, lp, 1);
  4952. #endif
  4953. }
  4954. /*
  4955. * Complete execution of a successful SCSI command.
  4956. *
  4957. * Only successful commands go to the DONE queue,
  4958. * since we need to have the SCRIPTS processor
  4959. * stopped on any error condition.
  4960. * The SCRIPTS processor is running while we are
  4961. * completing successful commands.
  4962. */
  4963. void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp)
  4964. {
  4965. struct sym_tcb *tp;
  4966. struct sym_lcb *lp;
  4967. struct scsi_cmnd *cmd;
  4968. int resid;
  4969. /*
  4970. * Paranoid check. :)
  4971. */
  4972. if (!cp || !cp->cmd)
  4973. return;
  4974. assert (cp->host_status == HS_COMPLETE);
  4975. /*
  4976. * Get user command.
  4977. */
  4978. cmd = cp->cmd;
  4979. /*
  4980. * Get target and lun pointers.
  4981. */
  4982. tp = &np->target[cp->target];
  4983. lp = sym_lp(tp, cp->lun);
  4984. /*
  4985. * If all data have been transferred, given than no
  4986. * extended error did occur, there is no residual.
  4987. */
  4988. resid = 0;
  4989. if (cp->phys.head.lastp != cp->goalp)
  4990. resid = sym_compute_residual(np, cp);
  4991. /*
  4992. * Wrong transfer residuals may be worse than just always
  4993. * returning zero. User can disable this feature in
  4994. * sym53c8xx.h. Residual support is enabled by default.
  4995. */
  4996. if (!SYM_SETUP_RESIDUAL_SUPPORT)
  4997. resid = 0;
  4998. #ifdef DEBUG_2_0_X
  4999. if (resid)
  5000. printf("XXXX RESID= %d - 0x%x\n", resid, resid);
  5001. #endif
  5002. /*
  5003. * Build result in CAM ccb.
  5004. */
  5005. sym_set_cam_result_ok(cp, cmd, resid);
  5006. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  5007. /*
  5008. * If max number of started ccbs had been reduced,
  5009. * increase it if 200 good status received.
  5010. */
  5011. if (lp && lp->started_max < lp->started_limit) {
  5012. ++lp->num_sgood;
  5013. if (lp->num_sgood >= 200) {
  5014. lp->num_sgood = 0;
  5015. ++lp->started_max;
  5016. if (sym_verbose >= 2) {
  5017. sym_print_addr(cmd, " queue depth is now %d\n",
  5018. lp->started_max);
  5019. }
  5020. }
  5021. }
  5022. #endif
  5023. /*
  5024. * Free our CCB.
  5025. */
  5026. sym_free_ccb (np, cp);
  5027. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  5028. /*
  5029. * Requeue a couple of awaiting scsi commands.
  5030. */
  5031. if (!sym_que_empty(&lp->waiting_ccbq))
  5032. sym_start_next_ccbs(np, lp, 2);
  5033. #endif
  5034. /*
  5035. * Complete the command.
  5036. */
  5037. sym_xpt_done(np, cmd);
  5038. }
  5039. /*
  5040. * Soft-attach the controller.
  5041. */
  5042. int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram)
  5043. {
  5044. struct sym_hcb *np = sym_get_hcb(shost);
  5045. int i;
  5046. /*
  5047. * Get some info about the firmware.
  5048. */
  5049. np->scripta_sz = fw->a_size;
  5050. np->scriptb_sz = fw->b_size;
  5051. np->scriptz_sz = fw->z_size;
  5052. np->fw_setup = fw->setup;
  5053. np->fw_patch = fw->patch;
  5054. np->fw_name = fw->name;
  5055. /*
  5056. * Save setting of some IO registers, so we will
  5057. * be able to probe specific implementations.
  5058. */
  5059. sym_save_initial_setting (np);
  5060. /*
  5061. * Reset the chip now, since it has been reported
  5062. * that SCSI clock calibration may not work properly
  5063. * if the chip is currently active.
  5064. */
  5065. sym_chip_reset(np);
  5066. /*
  5067. * Prepare controller and devices settings, according
  5068. * to chip features, user set-up and driver set-up.
  5069. */
  5070. sym_prepare_setting(shost, np, nvram);
  5071. /*
  5072. * Check the PCI clock frequency.
  5073. * Must be performed after prepare_setting since it destroys
  5074. * STEST1 that is used to probe for the clock doubler.
  5075. */
  5076. i = sym_getpciclock(np);
  5077. if (i > 37000 && !(np->features & FE_66MHZ))
  5078. printf("%s: PCI BUS clock seems too high: %u KHz.\n",
  5079. sym_name(np), i);
  5080. /*
  5081. * Allocate the start queue.
  5082. */
  5083. np->squeue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
  5084. if (!np->squeue)
  5085. goto attach_failed;
  5086. np->squeue_ba = vtobus(np->squeue);
  5087. /*
  5088. * Allocate the done queue.
  5089. */
  5090. np->dqueue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
  5091. if (!np->dqueue)
  5092. goto attach_failed;
  5093. np->dqueue_ba = vtobus(np->dqueue);
  5094. /*
  5095. * Allocate the target bus address array.
  5096. */
  5097. np->targtbl = sym_calloc_dma(256, "TARGTBL");
  5098. if (!np->targtbl)
  5099. goto attach_failed;
  5100. np->targtbl_ba = vtobus(np->targtbl);
  5101. /*
  5102. * Allocate SCRIPTS areas.
  5103. */
  5104. np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
  5105. np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
  5106. np->scriptz0 = sym_calloc_dma(np->scriptz_sz, "SCRIPTZ0");
  5107. if (!np->scripta0 || !np->scriptb0 || !np->scriptz0)
  5108. goto attach_failed;
  5109. /*
  5110. * Allocate the array of lists of CCBs hashed by DSA.
  5111. */
  5112. np->ccbh = kcalloc(CCB_HASH_SIZE, sizeof(struct sym_ccb **), GFP_KERNEL);
  5113. if (!np->ccbh)
  5114. goto attach_failed;
  5115. /*
  5116. * Initialyze the CCB free and busy queues.
  5117. */
  5118. sym_que_init(&np->free_ccbq);
  5119. sym_que_init(&np->busy_ccbq);
  5120. sym_que_init(&np->comp_ccbq);
  5121. /*
  5122. * Initialization for optional handling
  5123. * of device queueing.
  5124. */
  5125. #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING
  5126. sym_que_init(&np->dummy_ccbq);
  5127. #endif
  5128. /*
  5129. * Allocate some CCB. We need at least ONE.
  5130. */
  5131. if (!sym_alloc_ccb(np))
  5132. goto attach_failed;
  5133. /*
  5134. * Calculate BUS addresses where we are going
  5135. * to load the SCRIPTS.
  5136. */
  5137. np->scripta_ba = vtobus(np->scripta0);
  5138. np->scriptb_ba = vtobus(np->scriptb0);
  5139. np->scriptz_ba = vtobus(np->scriptz0);
  5140. if (np->ram_ba) {
  5141. np->scripta_ba = np->ram_ba;
  5142. if (np->features & FE_RAM8K) {
  5143. np->scriptb_ba = np->scripta_ba + 4096;
  5144. #if 0 /* May get useful for 64 BIT PCI addressing */
  5145. np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
  5146. #endif
  5147. }
  5148. }
  5149. /*
  5150. * Copy scripts to controller instance.
  5151. */
  5152. memcpy(np->scripta0, fw->a_base, np->scripta_sz);
  5153. memcpy(np->scriptb0, fw->b_base, np->scriptb_sz);
  5154. memcpy(np->scriptz0, fw->z_base, np->scriptz_sz);
  5155. /*
  5156. * Setup variable parts in scripts and compute
  5157. * scripts bus addresses used from the C code.
  5158. */
  5159. np->fw_setup(np, fw);
  5160. /*
  5161. * Bind SCRIPTS with physical addresses usable by the
  5162. * SCRIPTS processor (as seen from the BUS = BUS addresses).
  5163. */
  5164. sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
  5165. sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
  5166. sym_fw_bind_script(np, (u32 *) np->scriptz0, np->scriptz_sz);
  5167. #ifdef SYM_CONF_IARB_SUPPORT
  5168. /*
  5169. * If user wants IARB to be set when we win arbitration
  5170. * and have other jobs, compute the max number of consecutive
  5171. * settings of IARB hints before we leave devices a chance to
  5172. * arbitrate for reselection.
  5173. */
  5174. #ifdef SYM_SETUP_IARB_MAX
  5175. np->iarb_max = SYM_SETUP_IARB_MAX;
  5176. #else
  5177. np->iarb_max = 4;
  5178. #endif
  5179. #endif
  5180. /*
  5181. * Prepare the idle and invalid task actions.
  5182. */
  5183. np->idletask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
  5184. np->idletask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
  5185. np->idletask_ba = vtobus(&np->idletask);
  5186. np->notask.start = cpu_to_scr(SCRIPTA_BA(np, idle));
  5187. np->notask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
  5188. np->notask_ba = vtobus(&np->notask);
  5189. np->bad_itl.start = cpu_to_scr(SCRIPTA_BA(np, idle));
  5190. np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l));
  5191. np->bad_itl_ba = vtobus(&np->bad_itl);
  5192. np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA(np, idle));
  5193. np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA(np,bad_i_t_l_q));
  5194. np->bad_itlq_ba = vtobus(&np->bad_itlq);
  5195. /*
  5196. * Allocate and prepare the lun JUMP table that is used
  5197. * for a target prior the probing of devices (bad lun table).
  5198. * A private table will be allocated for the target on the
  5199. * first INQUIRY response received.
  5200. */
  5201. np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
  5202. if (!np->badluntbl)
  5203. goto attach_failed;
  5204. np->badlun_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun));
  5205. for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */
  5206. np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
  5207. /*
  5208. * Prepare the bus address array that contains the bus
  5209. * address of each target control block.
  5210. * For now, assume all logical units are wrong. :)
  5211. */
  5212. for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
  5213. np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
  5214. np->target[i].head.luntbl_sa =
  5215. cpu_to_scr(vtobus(np->badluntbl));
  5216. np->target[i].head.lun0_sa =
  5217. cpu_to_scr(vtobus(&np->badlun_sa));
  5218. }
  5219. /*
  5220. * Now check the cache handling of the pci chipset.
  5221. */
  5222. if (sym_snooptest (np)) {
  5223. printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
  5224. goto attach_failed;
  5225. }
  5226. /*
  5227. * Sigh! we are done.
  5228. */
  5229. return 0;
  5230. attach_failed:
  5231. return -ENXIO;
  5232. }
  5233. /*
  5234. * Free everything that has been allocated for this device.
  5235. */
  5236. void sym_hcb_free(struct sym_hcb *np)
  5237. {
  5238. SYM_QUEHEAD *qp;
  5239. struct sym_ccb *cp;
  5240. struct sym_tcb *tp;
  5241. int target;
  5242. if (np->scriptz0)
  5243. sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0");
  5244. if (np->scriptb0)
  5245. sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
  5246. if (np->scripta0)
  5247. sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
  5248. if (np->squeue)
  5249. sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
  5250. if (np->dqueue)
  5251. sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
  5252. if (np->actccbs) {
  5253. while ((qp = sym_remque_head(&np->free_ccbq)) != NULL) {
  5254. cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
  5255. sym_mfree_dma(cp, sizeof(*cp), "CCB");
  5256. }
  5257. }
  5258. kfree(np->ccbh);
  5259. if (np->badluntbl)
  5260. sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
  5261. for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
  5262. tp = &np->target[target];
  5263. if (tp->luntbl)
  5264. sym_mfree_dma(tp->luntbl, 256, "LUNTBL");
  5265. #if SYM_CONF_MAX_LUN > 1
  5266. kfree(tp->lunmp);
  5267. #endif
  5268. }
  5269. if (np->targtbl)
  5270. sym_mfree_dma(np->targtbl, 256, "TARGTBL");
  5271. }