wd33c93.c 65 KB

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  1. /*
  2. * Copyright (c) 1996 John Shifflett, GeoLog Consulting
  3. * john@geolog.com
  4. * jshiffle@netcom.com
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. /*
  17. * Drew Eckhardt's excellent 'Generic NCR5380' sources from Linux-PC
  18. * provided much of the inspiration and some of the code for this
  19. * driver. Everything I know about Amiga DMA was gleaned from careful
  20. * reading of Hamish Mcdonald's original wd33c93 driver; in fact, I
  21. * borrowed shamelessly from all over that source. Thanks Hamish!
  22. *
  23. * _This_ driver is (I feel) an improvement over the old one in
  24. * several respects:
  25. *
  26. * - Target Disconnection/Reconnection is now supported. Any
  27. * system with more than one device active on the SCSI bus
  28. * will benefit from this. The driver defaults to what I
  29. * call 'adaptive disconnect' - meaning that each command
  30. * is evaluated individually as to whether or not it should
  31. * be run with the option to disconnect/reselect (if the
  32. * device chooses), or as a "SCSI-bus-hog".
  33. *
  34. * - Synchronous data transfers are now supported. Because of
  35. * a few devices that choke after telling the driver that
  36. * they can do sync transfers, we don't automatically use
  37. * this faster protocol - it can be enabled via the command-
  38. * line on a device-by-device basis.
  39. *
  40. * - Runtime operating parameters can now be specified through
  41. * the 'amiboot' or the 'insmod' command line. For amiboot do:
  42. * "amiboot [usual stuff] wd33c93=blah,blah,blah"
  43. * The defaults should be good for most people. See the comment
  44. * for 'setup_strings' below for more details.
  45. *
  46. * - The old driver relied exclusively on what the Western Digital
  47. * docs call "Combination Level 2 Commands", which are a great
  48. * idea in that the CPU is relieved of a lot of interrupt
  49. * overhead. However, by accepting a certain (user-settable)
  50. * amount of additional interrupts, this driver achieves
  51. * better control over the SCSI bus, and data transfers are
  52. * almost as fast while being much easier to define, track,
  53. * and debug.
  54. *
  55. *
  56. * TODO:
  57. * more speed. linked commands.
  58. *
  59. *
  60. * People with bug reports, wish-lists, complaints, comments,
  61. * or improvements are asked to pah-leeez email me (John Shifflett)
  62. * at john@geolog.com or jshiffle@netcom.com! I'm anxious to get
  63. * this thing into as good a shape as possible, and I'm positive
  64. * there are lots of lurking bugs and "Stupid Places".
  65. *
  66. * Updates:
  67. *
  68. * Added support for pre -A chips, which don't have advanced features
  69. * and will generate CSR_RESEL rather than CSR_RESEL_AM.
  70. * Richard Hirst <richard@sleepie.demon.co.uk> August 2000
  71. *
  72. * Added support for Burst Mode DMA and Fast SCSI. Enabled the use of
  73. * default_sx_per for asynchronous data transfers. Added adjustment
  74. * of transfer periods in sx_table to the actual input-clock.
  75. * peter fuerst <post@pfrst.de> February 2007
  76. */
  77. #include <linux/module.h>
  78. #include <linux/string.h>
  79. #include <linux/delay.h>
  80. #include <linux/init.h>
  81. #include <linux/interrupt.h>
  82. #include <linux/blkdev.h>
  83. #include <scsi/scsi.h>
  84. #include <scsi/scsi_cmnd.h>
  85. #include <scsi/scsi_device.h>
  86. #include <scsi/scsi_host.h>
  87. #include <asm/irq.h>
  88. #include "wd33c93.h"
  89. #define optimum_sx_per(hostdata) (hostdata)->sx_table[1].period_ns
  90. #define WD33C93_VERSION "1.26++"
  91. #define WD33C93_DATE "10/Feb/2007"
  92. MODULE_AUTHOR("John Shifflett");
  93. MODULE_DESCRIPTION("Generic WD33C93 SCSI driver");
  94. MODULE_LICENSE("GPL");
  95. /*
  96. * 'setup_strings' is a single string used to pass operating parameters and
  97. * settings from the kernel/module command-line to the driver. 'setup_args[]'
  98. * is an array of strings that define the compile-time default values for
  99. * these settings. If Linux boots with an amiboot or insmod command-line,
  100. * those settings are combined with 'setup_args[]'. Note that amiboot
  101. * command-lines are prefixed with "wd33c93=" while insmod uses a
  102. * "setup_strings=" prefix. The driver recognizes the following keywords
  103. * (lower case required) and arguments:
  104. *
  105. * - nosync:bitmask -bitmask is a byte where the 1st 7 bits correspond with
  106. * the 7 possible SCSI devices. Set a bit to negotiate for
  107. * asynchronous transfers on that device. To maintain
  108. * backwards compatibility, a command-line such as
  109. * "wd33c93=255" will be automatically translated to
  110. * "wd33c93=nosync:0xff".
  111. * - nodma:x -x = 1 to disable DMA, x = 0 to enable it. Argument is
  112. * optional - if not present, same as "nodma:1".
  113. * - period:ns -ns is the minimum # of nanoseconds in a SCSI data transfer
  114. * period. Default is 500; acceptable values are 250 - 1000.
  115. * - disconnect:x -x = 0 to never allow disconnects, 2 to always allow them.
  116. * x = 1 does 'adaptive' disconnects, which is the default
  117. * and generally the best choice.
  118. * - debug:x -If 'DEBUGGING_ON' is defined, x is a bit mask that causes
  119. * various types of debug output to printed - see the DB_xxx
  120. * defines in wd33c93.h
  121. * - clock:x -x = clock input in MHz for WD33c93 chip. Normal values
  122. * would be from 8 through 20. Default is 8.
  123. * - burst:x -x = 1 to use Burst Mode (or Demand-Mode) DMA, x = 0 to use
  124. * Single Byte DMA, which is the default. Argument is
  125. * optional - if not present, same as "burst:1".
  126. * - fast:x -x = 1 to enable Fast SCSI, which is only effective with
  127. * input-clock divisor 4 (WD33C93_FS_16_20), x = 0 to disable
  128. * it, which is the default. Argument is optional - if not
  129. * present, same as "fast:1".
  130. * - next -No argument. Used to separate blocks of keywords when
  131. * there's more than one host adapter in the system.
  132. *
  133. * Syntax Notes:
  134. * - Numeric arguments can be decimal or the '0x' form of hex notation. There
  135. * _must_ be a colon between a keyword and its numeric argument, with no
  136. * spaces.
  137. * - Keywords are separated by commas, no spaces, in the standard kernel
  138. * command-line manner.
  139. * - A keyword in the 'nth' comma-separated command-line member will overwrite
  140. * the 'nth' element of setup_args[]. A blank command-line member (in
  141. * other words, a comma with no preceding keyword) will _not_ overwrite
  142. * the corresponding setup_args[] element.
  143. * - If a keyword is used more than once, the first one applies to the first
  144. * SCSI host found, the second to the second card, etc, unless the 'next'
  145. * keyword is used to change the order.
  146. *
  147. * Some amiboot examples (for insmod, use 'setup_strings' instead of 'wd33c93'):
  148. * - wd33c93=nosync:255
  149. * - wd33c93=nodma
  150. * - wd33c93=nodma:1
  151. * - wd33c93=disconnect:2,nosync:0x08,period:250
  152. * - wd33c93=debug:0x1c
  153. */
  154. /* Normally, no defaults are specified */
  155. static char *setup_args[] = { "", "", "", "", "", "", "", "", "", "" };
  156. static char *setup_strings;
  157. module_param(setup_strings, charp, 0);
  158. static void wd33c93_execute(struct Scsi_Host *instance);
  159. #ifdef CONFIG_WD33C93_PIO
  160. static inline uchar
  161. read_wd33c93(const wd33c93_regs regs, uchar reg_num)
  162. {
  163. uchar data;
  164. outb(reg_num, regs.SASR);
  165. data = inb(regs.SCMD);
  166. return data;
  167. }
  168. static inline unsigned long
  169. read_wd33c93_count(const wd33c93_regs regs)
  170. {
  171. unsigned long value;
  172. outb(WD_TRANSFER_COUNT_MSB, regs.SASR);
  173. value = inb(regs.SCMD) << 16;
  174. value |= inb(regs.SCMD) << 8;
  175. value |= inb(regs.SCMD);
  176. return value;
  177. }
  178. static inline uchar
  179. read_aux_stat(const wd33c93_regs regs)
  180. {
  181. return inb(regs.SASR);
  182. }
  183. static inline void
  184. write_wd33c93(const wd33c93_regs regs, uchar reg_num, uchar value)
  185. {
  186. outb(reg_num, regs.SASR);
  187. outb(value, regs.SCMD);
  188. }
  189. static inline void
  190. write_wd33c93_count(const wd33c93_regs regs, unsigned long value)
  191. {
  192. outb(WD_TRANSFER_COUNT_MSB, regs.SASR);
  193. outb((value >> 16) & 0xff, regs.SCMD);
  194. outb((value >> 8) & 0xff, regs.SCMD);
  195. outb( value & 0xff, regs.SCMD);
  196. }
  197. #define write_wd33c93_cmd(regs, cmd) \
  198. write_wd33c93((regs), WD_COMMAND, (cmd))
  199. static inline void
  200. write_wd33c93_cdb(const wd33c93_regs regs, uint len, uchar cmnd[])
  201. {
  202. int i;
  203. outb(WD_CDB_1, regs.SASR);
  204. for (i=0; i<len; i++)
  205. outb(cmnd[i], regs.SCMD);
  206. }
  207. #else /* CONFIG_WD33C93_PIO */
  208. static inline uchar
  209. read_wd33c93(const wd33c93_regs regs, uchar reg_num)
  210. {
  211. *regs.SASR = reg_num;
  212. mb();
  213. return (*regs.SCMD);
  214. }
  215. static unsigned long
  216. read_wd33c93_count(const wd33c93_regs regs)
  217. {
  218. unsigned long value;
  219. *regs.SASR = WD_TRANSFER_COUNT_MSB;
  220. mb();
  221. value = *regs.SCMD << 16;
  222. value |= *regs.SCMD << 8;
  223. value |= *regs.SCMD;
  224. mb();
  225. return value;
  226. }
  227. static inline uchar
  228. read_aux_stat(const wd33c93_regs regs)
  229. {
  230. return *regs.SASR;
  231. }
  232. static inline void
  233. write_wd33c93(const wd33c93_regs regs, uchar reg_num, uchar value)
  234. {
  235. *regs.SASR = reg_num;
  236. mb();
  237. *regs.SCMD = value;
  238. mb();
  239. }
  240. static void
  241. write_wd33c93_count(const wd33c93_regs regs, unsigned long value)
  242. {
  243. *regs.SASR = WD_TRANSFER_COUNT_MSB;
  244. mb();
  245. *regs.SCMD = value >> 16;
  246. *regs.SCMD = value >> 8;
  247. *regs.SCMD = value;
  248. mb();
  249. }
  250. static inline void
  251. write_wd33c93_cmd(const wd33c93_regs regs, uchar cmd)
  252. {
  253. *regs.SASR = WD_COMMAND;
  254. mb();
  255. *regs.SCMD = cmd;
  256. mb();
  257. }
  258. static inline void
  259. write_wd33c93_cdb(const wd33c93_regs regs, uint len, uchar cmnd[])
  260. {
  261. int i;
  262. *regs.SASR = WD_CDB_1;
  263. for (i = 0; i < len; i++)
  264. *regs.SCMD = cmnd[i];
  265. }
  266. #endif /* CONFIG_WD33C93_PIO */
  267. static inline uchar
  268. read_1_byte(const wd33c93_regs regs)
  269. {
  270. uchar asr;
  271. uchar x = 0;
  272. write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | CTRL_POLLED);
  273. write_wd33c93_cmd(regs, WD_CMD_TRANS_INFO | 0x80);
  274. do {
  275. asr = read_aux_stat(regs);
  276. if (asr & ASR_DBR)
  277. x = read_wd33c93(regs, WD_DATA);
  278. } while (!(asr & ASR_INT));
  279. return x;
  280. }
  281. static int
  282. round_period(unsigned int period, const struct sx_period *sx_table)
  283. {
  284. int x;
  285. for (x = 1; sx_table[x].period_ns; x++) {
  286. if ((period <= sx_table[x - 0].period_ns) &&
  287. (period > sx_table[x - 1].period_ns)) {
  288. return x;
  289. }
  290. }
  291. return 7;
  292. }
  293. /*
  294. * Calculate Synchronous Transfer Register value from SDTR code.
  295. */
  296. static uchar
  297. calc_sync_xfer(unsigned int period, unsigned int offset, unsigned int fast,
  298. const struct sx_period *sx_table)
  299. {
  300. /* When doing Fast SCSI synchronous data transfers, the corresponding
  301. * value in 'sx_table' is two times the actually used transfer period.
  302. */
  303. uchar result;
  304. if (offset && fast) {
  305. fast = STR_FSS;
  306. period *= 2;
  307. } else {
  308. fast = 0;
  309. }
  310. period *= 4; /* convert SDTR code to ns */
  311. result = sx_table[round_period(period,sx_table)].reg_value;
  312. result |= (offset < OPTIMUM_SX_OFF) ? offset : OPTIMUM_SX_OFF;
  313. result |= fast;
  314. return result;
  315. }
  316. /*
  317. * Calculate SDTR code bytes [3],[4] from period and offset.
  318. */
  319. static inline void
  320. calc_sync_msg(unsigned int period, unsigned int offset, unsigned int fast,
  321. uchar msg[2])
  322. {
  323. /* 'period' is a "normal"-mode value, like the ones in 'sx_table'. The
  324. * actually used transfer period for Fast SCSI synchronous data
  325. * transfers is half that value.
  326. */
  327. period /= 4;
  328. if (offset && fast)
  329. period /= 2;
  330. msg[0] = period;
  331. msg[1] = offset;
  332. }
  333. static int
  334. wd33c93_queuecommand_lck(struct scsi_cmnd *cmd,
  335. void (*done)(struct scsi_cmnd *))
  336. {
  337. struct WD33C93_hostdata *hostdata;
  338. struct scsi_cmnd *tmp;
  339. hostdata = (struct WD33C93_hostdata *) cmd->device->host->hostdata;
  340. DB(DB_QUEUE_COMMAND,
  341. printk("Q-%d-%02x( ", cmd->device->id, cmd->cmnd[0]))
  342. /* Set up a few fields in the scsi_cmnd structure for our own use:
  343. * - host_scribble is the pointer to the next cmd in the input queue
  344. * - scsi_done points to the routine we call when a cmd is finished
  345. * - result is what you'd expect
  346. */
  347. cmd->host_scribble = NULL;
  348. cmd->scsi_done = done;
  349. cmd->result = 0;
  350. /* We use the Scsi_Pointer structure that's included with each command
  351. * as a scratchpad (as it's intended to be used!). The handy thing about
  352. * the SCp.xxx fields is that they're always associated with a given
  353. * cmd, and are preserved across disconnect-reselect. This means we
  354. * can pretty much ignore SAVE_POINTERS and RESTORE_POINTERS messages
  355. * if we keep all the critical pointers and counters in SCp:
  356. * - SCp.ptr is the pointer into the RAM buffer
  357. * - SCp.this_residual is the size of that buffer
  358. * - SCp.buffer points to the current scatter-gather buffer
  359. * - SCp.buffers_residual tells us how many S.G. buffers there are
  360. * - SCp.have_data_in is not used
  361. * - SCp.sent_command is not used
  362. * - SCp.phase records this command's SRCID_ER bit setting
  363. */
  364. if (scsi_bufflen(cmd)) {
  365. cmd->SCp.buffer = scsi_sglist(cmd);
  366. cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
  367. cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
  368. cmd->SCp.this_residual = cmd->SCp.buffer->length;
  369. } else {
  370. cmd->SCp.buffer = NULL;
  371. cmd->SCp.buffers_residual = 0;
  372. cmd->SCp.ptr = NULL;
  373. cmd->SCp.this_residual = 0;
  374. }
  375. /* WD docs state that at the conclusion of a "LEVEL2" command, the
  376. * status byte can be retrieved from the LUN register. Apparently,
  377. * this is the case only for *uninterrupted* LEVEL2 commands! If
  378. * there are any unexpected phases entered, even if they are 100%
  379. * legal (different devices may choose to do things differently),
  380. * the LEVEL2 command sequence is exited. This often occurs prior
  381. * to receiving the status byte, in which case the driver does a
  382. * status phase interrupt and gets the status byte on its own.
  383. * While such a command can then be "resumed" (ie restarted to
  384. * finish up as a LEVEL2 command), the LUN register will NOT be
  385. * a valid status byte at the command's conclusion, and we must
  386. * use the byte obtained during the earlier interrupt. Here, we
  387. * preset SCp.Status to an illegal value (0xff) so that when
  388. * this command finally completes, we can tell where the actual
  389. * status byte is stored.
  390. */
  391. cmd->SCp.Status = ILLEGAL_STATUS_BYTE;
  392. /*
  393. * Add the cmd to the end of 'input_Q'. Note that REQUEST SENSE
  394. * commands are added to the head of the queue so that the desired
  395. * sense data is not lost before REQUEST_SENSE executes.
  396. */
  397. spin_lock_irq(&hostdata->lock);
  398. if (!(hostdata->input_Q) || (cmd->cmnd[0] == REQUEST_SENSE)) {
  399. cmd->host_scribble = (uchar *) hostdata->input_Q;
  400. hostdata->input_Q = cmd;
  401. } else { /* find the end of the queue */
  402. for (tmp = (struct scsi_cmnd *) hostdata->input_Q;
  403. tmp->host_scribble;
  404. tmp = (struct scsi_cmnd *) tmp->host_scribble) ;
  405. tmp->host_scribble = (uchar *) cmd;
  406. }
  407. /* We know that there's at least one command in 'input_Q' now.
  408. * Go see if any of them are runnable!
  409. */
  410. wd33c93_execute(cmd->device->host);
  411. DB(DB_QUEUE_COMMAND, printk(")Q "))
  412. spin_unlock_irq(&hostdata->lock);
  413. return 0;
  414. }
  415. DEF_SCSI_QCMD(wd33c93_queuecommand)
  416. /*
  417. * This routine attempts to start a scsi command. If the host_card is
  418. * already connected, we give up immediately. Otherwise, look through
  419. * the input_Q, using the first command we find that's intended
  420. * for a currently non-busy target/lun.
  421. *
  422. * wd33c93_execute() is always called with interrupts disabled or from
  423. * the wd33c93_intr itself, which means that a wd33c93 interrupt
  424. * cannot occur while we are in here.
  425. */
  426. static void
  427. wd33c93_execute(struct Scsi_Host *instance)
  428. {
  429. struct WD33C93_hostdata *hostdata =
  430. (struct WD33C93_hostdata *) instance->hostdata;
  431. const wd33c93_regs regs = hostdata->regs;
  432. struct scsi_cmnd *cmd, *prev;
  433. DB(DB_EXECUTE, printk("EX("))
  434. if (hostdata->selecting || hostdata->connected) {
  435. DB(DB_EXECUTE, printk(")EX-0 "))
  436. return;
  437. }
  438. /*
  439. * Search through the input_Q for a command destined
  440. * for an idle target/lun.
  441. */
  442. cmd = (struct scsi_cmnd *) hostdata->input_Q;
  443. prev = NULL;
  444. while (cmd) {
  445. if (!(hostdata->busy[cmd->device->id] &
  446. (1 << (cmd->device->lun & 0xff))))
  447. break;
  448. prev = cmd;
  449. cmd = (struct scsi_cmnd *) cmd->host_scribble;
  450. }
  451. /* quit if queue empty or all possible targets are busy */
  452. if (!cmd) {
  453. DB(DB_EXECUTE, printk(")EX-1 "))
  454. return;
  455. }
  456. /* remove command from queue */
  457. if (prev)
  458. prev->host_scribble = cmd->host_scribble;
  459. else
  460. hostdata->input_Q = (struct scsi_cmnd *) cmd->host_scribble;
  461. #ifdef PROC_STATISTICS
  462. hostdata->cmd_cnt[cmd->device->id]++;
  463. #endif
  464. /*
  465. * Start the selection process
  466. */
  467. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  468. write_wd33c93(regs, WD_DESTINATION_ID, cmd->device->id);
  469. else
  470. write_wd33c93(regs, WD_DESTINATION_ID, cmd->device->id | DSTID_DPD);
  471. /* Now we need to figure out whether or not this command is a good
  472. * candidate for disconnect/reselect. We guess to the best of our
  473. * ability, based on a set of hierarchical rules. When several
  474. * devices are operating simultaneously, disconnects are usually
  475. * an advantage. In a single device system, or if only 1 device
  476. * is being accessed, transfers usually go faster if disconnects
  477. * are not allowed:
  478. *
  479. * + Commands should NEVER disconnect if hostdata->disconnect =
  480. * DIS_NEVER (this holds for tape drives also), and ALWAYS
  481. * disconnect if hostdata->disconnect = DIS_ALWAYS.
  482. * + Tape drive commands should always be allowed to disconnect.
  483. * + Disconnect should be allowed if disconnected_Q isn't empty.
  484. * + Commands should NOT disconnect if input_Q is empty.
  485. * + Disconnect should be allowed if there are commands in input_Q
  486. * for a different target/lun. In this case, the other commands
  487. * should be made disconnect-able, if not already.
  488. *
  489. * I know, I know - this code would flunk me out of any
  490. * "C Programming 101" class ever offered. But it's easy
  491. * to change around and experiment with for now.
  492. */
  493. cmd->SCp.phase = 0; /* assume no disconnect */
  494. if (hostdata->disconnect == DIS_NEVER)
  495. goto no;
  496. if (hostdata->disconnect == DIS_ALWAYS)
  497. goto yes;
  498. if (cmd->device->type == 1) /* tape drive? */
  499. goto yes;
  500. if (hostdata->disconnected_Q) /* other commands disconnected? */
  501. goto yes;
  502. if (!(hostdata->input_Q)) /* input_Q empty? */
  503. goto no;
  504. for (prev = (struct scsi_cmnd *) hostdata->input_Q; prev;
  505. prev = (struct scsi_cmnd *) prev->host_scribble) {
  506. if ((prev->device->id != cmd->device->id) ||
  507. (prev->device->lun != cmd->device->lun)) {
  508. for (prev = (struct scsi_cmnd *) hostdata->input_Q; prev;
  509. prev = (struct scsi_cmnd *) prev->host_scribble)
  510. prev->SCp.phase = 1;
  511. goto yes;
  512. }
  513. }
  514. goto no;
  515. yes:
  516. cmd->SCp.phase = 1;
  517. #ifdef PROC_STATISTICS
  518. hostdata->disc_allowed_cnt[cmd->device->id]++;
  519. #endif
  520. no:
  521. write_wd33c93(regs, WD_SOURCE_ID, ((cmd->SCp.phase) ? SRCID_ER : 0));
  522. write_wd33c93(regs, WD_TARGET_LUN, (u8)cmd->device->lun);
  523. write_wd33c93(regs, WD_SYNCHRONOUS_TRANSFER,
  524. hostdata->sync_xfer[cmd->device->id]);
  525. hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
  526. if ((hostdata->level2 == L2_NONE) ||
  527. (hostdata->sync_stat[cmd->device->id] == SS_UNSET)) {
  528. /*
  529. * Do a 'Select-With-ATN' command. This will end with
  530. * one of the following interrupts:
  531. * CSR_RESEL_AM: failure - can try again later.
  532. * CSR_TIMEOUT: failure - give up.
  533. * CSR_SELECT: success - proceed.
  534. */
  535. hostdata->selecting = cmd;
  536. /* Every target has its own synchronous transfer setting, kept in the
  537. * sync_xfer array, and a corresponding status byte in sync_stat[].
  538. * Each target's sync_stat[] entry is initialized to SX_UNSET, and its
  539. * sync_xfer[] entry is initialized to the default/safe value. SS_UNSET
  540. * means that the parameters are undetermined as yet, and that we
  541. * need to send an SDTR message to this device after selection is
  542. * complete: We set SS_FIRST to tell the interrupt routine to do so.
  543. * If we've been asked not to try synchronous transfers on this
  544. * target (and _all_ luns within it), we'll still send the SDTR message
  545. * later, but at that time we'll negotiate for async by specifying a
  546. * sync fifo depth of 0.
  547. */
  548. if (hostdata->sync_stat[cmd->device->id] == SS_UNSET)
  549. hostdata->sync_stat[cmd->device->id] = SS_FIRST;
  550. hostdata->state = S_SELECTING;
  551. write_wd33c93_count(regs, 0); /* guarantee a DATA_PHASE interrupt */
  552. write_wd33c93_cmd(regs, WD_CMD_SEL_ATN);
  553. } else {
  554. /*
  555. * Do a 'Select-With-ATN-Xfer' command. This will end with
  556. * one of the following interrupts:
  557. * CSR_RESEL_AM: failure - can try again later.
  558. * CSR_TIMEOUT: failure - give up.
  559. * anything else: success - proceed.
  560. */
  561. hostdata->connected = cmd;
  562. write_wd33c93(regs, WD_COMMAND_PHASE, 0);
  563. /* copy command_descriptor_block into WD chip
  564. * (take advantage of auto-incrementing)
  565. */
  566. write_wd33c93_cdb(regs, cmd->cmd_len, cmd->cmnd);
  567. /* The wd33c93 only knows about Group 0, 1, and 5 commands when
  568. * it's doing a 'select-and-transfer'. To be safe, we write the
  569. * size of the CDB into the OWN_ID register for every case. This
  570. * way there won't be problems with vendor-unique, audio, etc.
  571. */
  572. write_wd33c93(regs, WD_OWN_ID, cmd->cmd_len);
  573. /* When doing a non-disconnect command with DMA, we can save
  574. * ourselves a DATA phase interrupt later by setting everything
  575. * up ahead of time.
  576. */
  577. if ((cmd->SCp.phase == 0) && (hostdata->no_dma == 0)) {
  578. if (hostdata->dma_setup(cmd,
  579. (cmd->sc_data_direction == DMA_TO_DEVICE) ?
  580. DATA_OUT_DIR : DATA_IN_DIR))
  581. write_wd33c93_count(regs, 0); /* guarantee a DATA_PHASE interrupt */
  582. else {
  583. write_wd33c93_count(regs,
  584. cmd->SCp.this_residual);
  585. write_wd33c93(regs, WD_CONTROL,
  586. CTRL_IDI | CTRL_EDI | hostdata->dma_mode);
  587. hostdata->dma = D_DMA_RUNNING;
  588. }
  589. } else
  590. write_wd33c93_count(regs, 0); /* guarantee a DATA_PHASE interrupt */
  591. hostdata->state = S_RUNNING_LEVEL2;
  592. write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
  593. }
  594. /*
  595. * Since the SCSI bus can handle only 1 connection at a time,
  596. * we get out of here now. If the selection fails, or when
  597. * the command disconnects, we'll come back to this routine
  598. * to search the input_Q again...
  599. */
  600. DB(DB_EXECUTE,
  601. printk("%s)EX-2 ", (cmd->SCp.phase) ? "d:" : ""))
  602. }
  603. static void
  604. transfer_pio(const wd33c93_regs regs, uchar * buf, int cnt,
  605. int data_in_dir, struct WD33C93_hostdata *hostdata)
  606. {
  607. uchar asr;
  608. DB(DB_TRANSFER,
  609. printk("(%p,%d,%s:", buf, cnt, data_in_dir ? "in" : "out"))
  610. write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | CTRL_POLLED);
  611. write_wd33c93_count(regs, cnt);
  612. write_wd33c93_cmd(regs, WD_CMD_TRANS_INFO);
  613. if (data_in_dir) {
  614. do {
  615. asr = read_aux_stat(regs);
  616. if (asr & ASR_DBR)
  617. *buf++ = read_wd33c93(regs, WD_DATA);
  618. } while (!(asr & ASR_INT));
  619. } else {
  620. do {
  621. asr = read_aux_stat(regs);
  622. if (asr & ASR_DBR)
  623. write_wd33c93(regs, WD_DATA, *buf++);
  624. } while (!(asr & ASR_INT));
  625. }
  626. /* Note: we are returning with the interrupt UN-cleared.
  627. * Since (presumably) an entire I/O operation has
  628. * completed, the bus phase is probably different, and
  629. * the interrupt routine will discover this when it
  630. * responds to the uncleared int.
  631. */
  632. }
  633. static void
  634. transfer_bytes(const wd33c93_regs regs, struct scsi_cmnd *cmd,
  635. int data_in_dir)
  636. {
  637. struct WD33C93_hostdata *hostdata;
  638. unsigned long length;
  639. hostdata = (struct WD33C93_hostdata *) cmd->device->host->hostdata;
  640. /* Normally, you'd expect 'this_residual' to be non-zero here.
  641. * In a series of scatter-gather transfers, however, this
  642. * routine will usually be called with 'this_residual' equal
  643. * to 0 and 'buffers_residual' non-zero. This means that a
  644. * previous transfer completed, clearing 'this_residual', and
  645. * now we need to setup the next scatter-gather buffer as the
  646. * source or destination for THIS transfer.
  647. */
  648. if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
  649. ++cmd->SCp.buffer;
  650. --cmd->SCp.buffers_residual;
  651. cmd->SCp.this_residual = cmd->SCp.buffer->length;
  652. cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
  653. }
  654. if (!cmd->SCp.this_residual) /* avoid bogus setups */
  655. return;
  656. write_wd33c93(regs, WD_SYNCHRONOUS_TRANSFER,
  657. hostdata->sync_xfer[cmd->device->id]);
  658. /* 'hostdata->no_dma' is TRUE if we don't even want to try DMA.
  659. * Update 'this_residual' and 'ptr' after 'transfer_pio()' returns.
  660. */
  661. if (hostdata->no_dma || hostdata->dma_setup(cmd, data_in_dir)) {
  662. #ifdef PROC_STATISTICS
  663. hostdata->pio_cnt++;
  664. #endif
  665. transfer_pio(regs, (uchar *) cmd->SCp.ptr,
  666. cmd->SCp.this_residual, data_in_dir, hostdata);
  667. length = cmd->SCp.this_residual;
  668. cmd->SCp.this_residual = read_wd33c93_count(regs);
  669. cmd->SCp.ptr += (length - cmd->SCp.this_residual);
  670. }
  671. /* We are able to do DMA (in fact, the Amiga hardware is
  672. * already going!), so start up the wd33c93 in DMA mode.
  673. * We set 'hostdata->dma' = D_DMA_RUNNING so that when the
  674. * transfer completes and causes an interrupt, we're
  675. * reminded to tell the Amiga to shut down its end. We'll
  676. * postpone the updating of 'this_residual' and 'ptr'
  677. * until then.
  678. */
  679. else {
  680. #ifdef PROC_STATISTICS
  681. hostdata->dma_cnt++;
  682. #endif
  683. write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | hostdata->dma_mode);
  684. write_wd33c93_count(regs, cmd->SCp.this_residual);
  685. if ((hostdata->level2 >= L2_DATA) ||
  686. (hostdata->level2 == L2_BASIC && cmd->SCp.phase == 0)) {
  687. write_wd33c93(regs, WD_COMMAND_PHASE, 0x45);
  688. write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
  689. hostdata->state = S_RUNNING_LEVEL2;
  690. } else
  691. write_wd33c93_cmd(regs, WD_CMD_TRANS_INFO);
  692. hostdata->dma = D_DMA_RUNNING;
  693. }
  694. }
  695. void
  696. wd33c93_intr(struct Scsi_Host *instance)
  697. {
  698. struct WD33C93_hostdata *hostdata =
  699. (struct WD33C93_hostdata *) instance->hostdata;
  700. const wd33c93_regs regs = hostdata->regs;
  701. struct scsi_cmnd *patch, *cmd;
  702. uchar asr, sr, phs, id, lun, *ucp, msg;
  703. unsigned long length, flags;
  704. asr = read_aux_stat(regs);
  705. if (!(asr & ASR_INT) || (asr & ASR_BSY))
  706. return;
  707. spin_lock_irqsave(&hostdata->lock, flags);
  708. #ifdef PROC_STATISTICS
  709. hostdata->int_cnt++;
  710. #endif
  711. cmd = (struct scsi_cmnd *) hostdata->connected; /* assume we're connected */
  712. sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear the interrupt */
  713. phs = read_wd33c93(regs, WD_COMMAND_PHASE);
  714. DB(DB_INTR, printk("{%02x:%02x-", asr, sr))
  715. /* After starting a DMA transfer, the next interrupt
  716. * is guaranteed to be in response to completion of
  717. * the transfer. Since the Amiga DMA hardware runs in
  718. * in an open-ended fashion, it needs to be told when
  719. * to stop; do that here if D_DMA_RUNNING is true.
  720. * Also, we have to update 'this_residual' and 'ptr'
  721. * based on the contents of the TRANSFER_COUNT register,
  722. * in case the device decided to do an intermediate
  723. * disconnect (a device may do this if it has to do a
  724. * seek, or just to be nice and let other devices have
  725. * some bus time during long transfers). After doing
  726. * whatever is needed, we go on and service the WD3393
  727. * interrupt normally.
  728. */
  729. if (hostdata->dma == D_DMA_RUNNING) {
  730. DB(DB_TRANSFER,
  731. printk("[%p/%d:", cmd->SCp.ptr, cmd->SCp.this_residual))
  732. hostdata->dma_stop(cmd->device->host, cmd, 1);
  733. hostdata->dma = D_DMA_OFF;
  734. length = cmd->SCp.this_residual;
  735. cmd->SCp.this_residual = read_wd33c93_count(regs);
  736. cmd->SCp.ptr += (length - cmd->SCp.this_residual);
  737. DB(DB_TRANSFER,
  738. printk("%p/%d]", cmd->SCp.ptr, cmd->SCp.this_residual))
  739. }
  740. /* Respond to the specific WD3393 interrupt - there are quite a few! */
  741. switch (sr) {
  742. case CSR_TIMEOUT:
  743. DB(DB_INTR, printk("TIMEOUT"))
  744. if (hostdata->state == S_RUNNING_LEVEL2)
  745. hostdata->connected = NULL;
  746. else {
  747. cmd = (struct scsi_cmnd *) hostdata->selecting; /* get a valid cmd */
  748. hostdata->selecting = NULL;
  749. }
  750. cmd->result = DID_NO_CONNECT << 16;
  751. hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
  752. hostdata->state = S_UNCONNECTED;
  753. cmd->scsi_done(cmd);
  754. /* From esp.c:
  755. * There is a window of time within the scsi_done() path
  756. * of execution where interrupts are turned back on full
  757. * blast and left that way. During that time we could
  758. * reconnect to a disconnected command, then we'd bomb
  759. * out below. We could also end up executing two commands
  760. * at _once_. ...just so you know why the restore_flags()
  761. * is here...
  762. */
  763. spin_unlock_irqrestore(&hostdata->lock, flags);
  764. /* We are not connected to a target - check to see if there
  765. * are commands waiting to be executed.
  766. */
  767. wd33c93_execute(instance);
  768. break;
  769. /* Note: this interrupt should not occur in a LEVEL2 command */
  770. case CSR_SELECT:
  771. DB(DB_INTR, printk("SELECT"))
  772. hostdata->connected = cmd =
  773. (struct scsi_cmnd *) hostdata->selecting;
  774. hostdata->selecting = NULL;
  775. /* construct an IDENTIFY message with correct disconnect bit */
  776. hostdata->outgoing_msg[0] = IDENTIFY(0, cmd->device->lun);
  777. if (cmd->SCp.phase)
  778. hostdata->outgoing_msg[0] |= 0x40;
  779. if (hostdata->sync_stat[cmd->device->id] == SS_FIRST) {
  780. hostdata->sync_stat[cmd->device->id] = SS_WAITING;
  781. /* Tack on a 2nd message to ask about synchronous transfers. If we've
  782. * been asked to do only asynchronous transfers on this device, we
  783. * request a fifo depth of 0, which is equivalent to async - should
  784. * solve the problems some people have had with GVP's Guru ROM.
  785. */
  786. hostdata->outgoing_msg[1] = EXTENDED_MESSAGE;
  787. hostdata->outgoing_msg[2] = 3;
  788. hostdata->outgoing_msg[3] = EXTENDED_SDTR;
  789. if (hostdata->no_sync & (1 << cmd->device->id)) {
  790. calc_sync_msg(hostdata->default_sx_per, 0,
  791. 0, hostdata->outgoing_msg + 4);
  792. } else {
  793. calc_sync_msg(optimum_sx_per(hostdata),
  794. OPTIMUM_SX_OFF,
  795. hostdata->fast,
  796. hostdata->outgoing_msg + 4);
  797. }
  798. hostdata->outgoing_len = 6;
  799. #ifdef SYNC_DEBUG
  800. ucp = hostdata->outgoing_msg + 1;
  801. printk(" sending SDTR %02x03%02x%02x%02x ",
  802. ucp[0], ucp[2], ucp[3], ucp[4]);
  803. #endif
  804. } else
  805. hostdata->outgoing_len = 1;
  806. hostdata->state = S_CONNECTED;
  807. spin_unlock_irqrestore(&hostdata->lock, flags);
  808. break;
  809. case CSR_XFER_DONE | PHS_DATA_IN:
  810. case CSR_UNEXP | PHS_DATA_IN:
  811. case CSR_SRV_REQ | PHS_DATA_IN:
  812. DB(DB_INTR,
  813. printk("IN-%d.%d", cmd->SCp.this_residual,
  814. cmd->SCp.buffers_residual))
  815. transfer_bytes(regs, cmd, DATA_IN_DIR);
  816. if (hostdata->state != S_RUNNING_LEVEL2)
  817. hostdata->state = S_CONNECTED;
  818. spin_unlock_irqrestore(&hostdata->lock, flags);
  819. break;
  820. case CSR_XFER_DONE | PHS_DATA_OUT:
  821. case CSR_UNEXP | PHS_DATA_OUT:
  822. case CSR_SRV_REQ | PHS_DATA_OUT:
  823. DB(DB_INTR,
  824. printk("OUT-%d.%d", cmd->SCp.this_residual,
  825. cmd->SCp.buffers_residual))
  826. transfer_bytes(regs, cmd, DATA_OUT_DIR);
  827. if (hostdata->state != S_RUNNING_LEVEL2)
  828. hostdata->state = S_CONNECTED;
  829. spin_unlock_irqrestore(&hostdata->lock, flags);
  830. break;
  831. /* Note: this interrupt should not occur in a LEVEL2 command */
  832. case CSR_XFER_DONE | PHS_COMMAND:
  833. case CSR_UNEXP | PHS_COMMAND:
  834. case CSR_SRV_REQ | PHS_COMMAND:
  835. DB(DB_INTR, printk("CMND-%02x", cmd->cmnd[0]))
  836. transfer_pio(regs, cmd->cmnd, cmd->cmd_len, DATA_OUT_DIR,
  837. hostdata);
  838. hostdata->state = S_CONNECTED;
  839. spin_unlock_irqrestore(&hostdata->lock, flags);
  840. break;
  841. case CSR_XFER_DONE | PHS_STATUS:
  842. case CSR_UNEXP | PHS_STATUS:
  843. case CSR_SRV_REQ | PHS_STATUS:
  844. DB(DB_INTR, printk("STATUS="))
  845. cmd->SCp.Status = read_1_byte(regs);
  846. DB(DB_INTR, printk("%02x", cmd->SCp.Status))
  847. if (hostdata->level2 >= L2_BASIC) {
  848. sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear interrupt */
  849. udelay(7);
  850. hostdata->state = S_RUNNING_LEVEL2;
  851. write_wd33c93(regs, WD_COMMAND_PHASE, 0x50);
  852. write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
  853. } else {
  854. hostdata->state = S_CONNECTED;
  855. }
  856. spin_unlock_irqrestore(&hostdata->lock, flags);
  857. break;
  858. case CSR_XFER_DONE | PHS_MESS_IN:
  859. case CSR_UNEXP | PHS_MESS_IN:
  860. case CSR_SRV_REQ | PHS_MESS_IN:
  861. DB(DB_INTR, printk("MSG_IN="))
  862. msg = read_1_byte(regs);
  863. sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear interrupt */
  864. udelay(7);
  865. hostdata->incoming_msg[hostdata->incoming_ptr] = msg;
  866. if (hostdata->incoming_msg[0] == EXTENDED_MESSAGE)
  867. msg = EXTENDED_MESSAGE;
  868. else
  869. hostdata->incoming_ptr = 0;
  870. cmd->SCp.Message = msg;
  871. switch (msg) {
  872. case COMMAND_COMPLETE:
  873. DB(DB_INTR, printk("CCMP"))
  874. write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
  875. hostdata->state = S_PRE_CMP_DISC;
  876. break;
  877. case SAVE_POINTERS:
  878. DB(DB_INTR, printk("SDP"))
  879. write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
  880. hostdata->state = S_CONNECTED;
  881. break;
  882. case RESTORE_POINTERS:
  883. DB(DB_INTR, printk("RDP"))
  884. if (hostdata->level2 >= L2_BASIC) {
  885. write_wd33c93(regs, WD_COMMAND_PHASE, 0x45);
  886. write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
  887. hostdata->state = S_RUNNING_LEVEL2;
  888. } else {
  889. write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
  890. hostdata->state = S_CONNECTED;
  891. }
  892. break;
  893. case DISCONNECT:
  894. DB(DB_INTR, printk("DIS"))
  895. cmd->device->disconnect = 1;
  896. write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
  897. hostdata->state = S_PRE_TMP_DISC;
  898. break;
  899. case MESSAGE_REJECT:
  900. DB(DB_INTR, printk("REJ"))
  901. #ifdef SYNC_DEBUG
  902. printk("-REJ-");
  903. #endif
  904. if (hostdata->sync_stat[cmd->device->id] == SS_WAITING) {
  905. hostdata->sync_stat[cmd->device->id] = SS_SET;
  906. /* we want default_sx_per, not DEFAULT_SX_PER */
  907. hostdata->sync_xfer[cmd->device->id] =
  908. calc_sync_xfer(hostdata->default_sx_per
  909. / 4, 0, 0, hostdata->sx_table);
  910. }
  911. write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
  912. hostdata->state = S_CONNECTED;
  913. break;
  914. case EXTENDED_MESSAGE:
  915. DB(DB_INTR, printk("EXT"))
  916. ucp = hostdata->incoming_msg;
  917. #ifdef SYNC_DEBUG
  918. printk("%02x", ucp[hostdata->incoming_ptr]);
  919. #endif
  920. /* Is this the last byte of the extended message? */
  921. if ((hostdata->incoming_ptr >= 2) &&
  922. (hostdata->incoming_ptr == (ucp[1] + 1))) {
  923. switch (ucp[2]) { /* what's the EXTENDED code? */
  924. case EXTENDED_SDTR:
  925. /* default to default async period */
  926. id = calc_sync_xfer(hostdata->
  927. default_sx_per / 4, 0,
  928. 0, hostdata->sx_table);
  929. if (hostdata->sync_stat[cmd->device->id] !=
  930. SS_WAITING) {
  931. /* A device has sent an unsolicited SDTR message; rather than go
  932. * through the effort of decoding it and then figuring out what
  933. * our reply should be, we're just gonna say that we have a
  934. * synchronous fifo depth of 0. This will result in asynchronous
  935. * transfers - not ideal but so much easier.
  936. * Actually, this is OK because it assures us that if we don't
  937. * specifically ask for sync transfers, we won't do any.
  938. */
  939. write_wd33c93_cmd(regs, WD_CMD_ASSERT_ATN); /* want MESS_OUT */
  940. hostdata->outgoing_msg[0] =
  941. EXTENDED_MESSAGE;
  942. hostdata->outgoing_msg[1] = 3;
  943. hostdata->outgoing_msg[2] =
  944. EXTENDED_SDTR;
  945. calc_sync_msg(hostdata->
  946. default_sx_per, 0,
  947. 0, hostdata->outgoing_msg + 3);
  948. hostdata->outgoing_len = 5;
  949. } else {
  950. if (ucp[4]) /* well, sync transfer */
  951. id = calc_sync_xfer(ucp[3], ucp[4],
  952. hostdata->fast,
  953. hostdata->sx_table);
  954. else if (ucp[3]) /* very unlikely... */
  955. id = calc_sync_xfer(ucp[3], ucp[4],
  956. 0, hostdata->sx_table);
  957. }
  958. hostdata->sync_xfer[cmd->device->id] = id;
  959. #ifdef SYNC_DEBUG
  960. printk(" sync_xfer=%02x\n",
  961. hostdata->sync_xfer[cmd->device->id]);
  962. #endif
  963. hostdata->sync_stat[cmd->device->id] =
  964. SS_SET;
  965. write_wd33c93_cmd(regs,
  966. WD_CMD_NEGATE_ACK);
  967. hostdata->state = S_CONNECTED;
  968. break;
  969. case EXTENDED_WDTR:
  970. write_wd33c93_cmd(regs, WD_CMD_ASSERT_ATN); /* want MESS_OUT */
  971. printk("sending WDTR ");
  972. hostdata->outgoing_msg[0] =
  973. EXTENDED_MESSAGE;
  974. hostdata->outgoing_msg[1] = 2;
  975. hostdata->outgoing_msg[2] =
  976. EXTENDED_WDTR;
  977. hostdata->outgoing_msg[3] = 0; /* 8 bit transfer width */
  978. hostdata->outgoing_len = 4;
  979. write_wd33c93_cmd(regs,
  980. WD_CMD_NEGATE_ACK);
  981. hostdata->state = S_CONNECTED;
  982. break;
  983. default:
  984. write_wd33c93_cmd(regs, WD_CMD_ASSERT_ATN); /* want MESS_OUT */
  985. printk
  986. ("Rejecting Unknown Extended Message(%02x). ",
  987. ucp[2]);
  988. hostdata->outgoing_msg[0] =
  989. MESSAGE_REJECT;
  990. hostdata->outgoing_len = 1;
  991. write_wd33c93_cmd(regs,
  992. WD_CMD_NEGATE_ACK);
  993. hostdata->state = S_CONNECTED;
  994. break;
  995. }
  996. hostdata->incoming_ptr = 0;
  997. }
  998. /* We need to read more MESS_IN bytes for the extended message */
  999. else {
  1000. hostdata->incoming_ptr++;
  1001. write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
  1002. hostdata->state = S_CONNECTED;
  1003. }
  1004. break;
  1005. default:
  1006. printk("Rejecting Unknown Message(%02x) ", msg);
  1007. write_wd33c93_cmd(regs, WD_CMD_ASSERT_ATN); /* want MESS_OUT */
  1008. hostdata->outgoing_msg[0] = MESSAGE_REJECT;
  1009. hostdata->outgoing_len = 1;
  1010. write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
  1011. hostdata->state = S_CONNECTED;
  1012. }
  1013. spin_unlock_irqrestore(&hostdata->lock, flags);
  1014. break;
  1015. /* Note: this interrupt will occur only after a LEVEL2 command */
  1016. case CSR_SEL_XFER_DONE:
  1017. /* Make sure that reselection is enabled at this point - it may
  1018. * have been turned off for the command that just completed.
  1019. */
  1020. write_wd33c93(regs, WD_SOURCE_ID, SRCID_ER);
  1021. if (phs == 0x60) {
  1022. DB(DB_INTR, printk("SX-DONE"))
  1023. cmd->SCp.Message = COMMAND_COMPLETE;
  1024. lun = read_wd33c93(regs, WD_TARGET_LUN);
  1025. DB(DB_INTR, printk(":%d.%d", cmd->SCp.Status, lun))
  1026. hostdata->connected = NULL;
  1027. hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
  1028. hostdata->state = S_UNCONNECTED;
  1029. if (cmd->SCp.Status == ILLEGAL_STATUS_BYTE)
  1030. cmd->SCp.Status = lun;
  1031. if (cmd->cmnd[0] == REQUEST_SENSE
  1032. && cmd->SCp.Status != GOOD)
  1033. cmd->result =
  1034. (cmd->
  1035. result & 0x00ffff) | (DID_ERROR << 16);
  1036. else
  1037. cmd->result =
  1038. cmd->SCp.Status | (cmd->SCp.Message << 8);
  1039. cmd->scsi_done(cmd);
  1040. /* We are no longer connected to a target - check to see if
  1041. * there are commands waiting to be executed.
  1042. */
  1043. spin_unlock_irqrestore(&hostdata->lock, flags);
  1044. wd33c93_execute(instance);
  1045. } else {
  1046. printk
  1047. ("%02x:%02x:%02x: Unknown SEL_XFER_DONE phase!!---",
  1048. asr, sr, phs);
  1049. spin_unlock_irqrestore(&hostdata->lock, flags);
  1050. }
  1051. break;
  1052. /* Note: this interrupt will occur only after a LEVEL2 command */
  1053. case CSR_SDP:
  1054. DB(DB_INTR, printk("SDP"))
  1055. hostdata->state = S_RUNNING_LEVEL2;
  1056. write_wd33c93(regs, WD_COMMAND_PHASE, 0x41);
  1057. write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
  1058. spin_unlock_irqrestore(&hostdata->lock, flags);
  1059. break;
  1060. case CSR_XFER_DONE | PHS_MESS_OUT:
  1061. case CSR_UNEXP | PHS_MESS_OUT:
  1062. case CSR_SRV_REQ | PHS_MESS_OUT:
  1063. DB(DB_INTR, printk("MSG_OUT="))
  1064. /* To get here, we've probably requested MESSAGE_OUT and have
  1065. * already put the correct bytes in outgoing_msg[] and filled
  1066. * in outgoing_len. We simply send them out to the SCSI bus.
  1067. * Sometimes we get MESSAGE_OUT phase when we're not expecting
  1068. * it - like when our SDTR message is rejected by a target. Some
  1069. * targets send the REJECT before receiving all of the extended
  1070. * message, and then seem to go back to MESSAGE_OUT for a byte
  1071. * or two. Not sure why, or if I'm doing something wrong to
  1072. * cause this to happen. Regardless, it seems that sending
  1073. * NOP messages in these situations results in no harm and
  1074. * makes everyone happy.
  1075. */
  1076. if (hostdata->outgoing_len == 0) {
  1077. hostdata->outgoing_len = 1;
  1078. hostdata->outgoing_msg[0] = NOP;
  1079. }
  1080. transfer_pio(regs, hostdata->outgoing_msg,
  1081. hostdata->outgoing_len, DATA_OUT_DIR, hostdata);
  1082. DB(DB_INTR, printk("%02x", hostdata->outgoing_msg[0]))
  1083. hostdata->outgoing_len = 0;
  1084. hostdata->state = S_CONNECTED;
  1085. spin_unlock_irqrestore(&hostdata->lock, flags);
  1086. break;
  1087. case CSR_UNEXP_DISC:
  1088. /* I think I've seen this after a request-sense that was in response
  1089. * to an error condition, but not sure. We certainly need to do
  1090. * something when we get this interrupt - the question is 'what?'.
  1091. * Let's think positively, and assume some command has finished
  1092. * in a legal manner (like a command that provokes a request-sense),
  1093. * so we treat it as a normal command-complete-disconnect.
  1094. */
  1095. /* Make sure that reselection is enabled at this point - it may
  1096. * have been turned off for the command that just completed.
  1097. */
  1098. write_wd33c93(regs, WD_SOURCE_ID, SRCID_ER);
  1099. if (cmd == NULL) {
  1100. printk(" - Already disconnected! ");
  1101. hostdata->state = S_UNCONNECTED;
  1102. spin_unlock_irqrestore(&hostdata->lock, flags);
  1103. return;
  1104. }
  1105. DB(DB_INTR, printk("UNEXP_DISC"))
  1106. hostdata->connected = NULL;
  1107. hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
  1108. hostdata->state = S_UNCONNECTED;
  1109. if (cmd->cmnd[0] == REQUEST_SENSE && cmd->SCp.Status != GOOD)
  1110. cmd->result =
  1111. (cmd->result & 0x00ffff) | (DID_ERROR << 16);
  1112. else
  1113. cmd->result = cmd->SCp.Status | (cmd->SCp.Message << 8);
  1114. cmd->scsi_done(cmd);
  1115. /* We are no longer connected to a target - check to see if
  1116. * there are commands waiting to be executed.
  1117. */
  1118. /* look above for comments on scsi_done() */
  1119. spin_unlock_irqrestore(&hostdata->lock, flags);
  1120. wd33c93_execute(instance);
  1121. break;
  1122. case CSR_DISC:
  1123. /* Make sure that reselection is enabled at this point - it may
  1124. * have been turned off for the command that just completed.
  1125. */
  1126. write_wd33c93(regs, WD_SOURCE_ID, SRCID_ER);
  1127. DB(DB_INTR, printk("DISC"))
  1128. if (cmd == NULL) {
  1129. printk(" - Already disconnected! ");
  1130. hostdata->state = S_UNCONNECTED;
  1131. }
  1132. switch (hostdata->state) {
  1133. case S_PRE_CMP_DISC:
  1134. hostdata->connected = NULL;
  1135. hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
  1136. hostdata->state = S_UNCONNECTED;
  1137. DB(DB_INTR, printk(":%d", cmd->SCp.Status))
  1138. if (cmd->cmnd[0] == REQUEST_SENSE
  1139. && cmd->SCp.Status != GOOD)
  1140. cmd->result =
  1141. (cmd->
  1142. result & 0x00ffff) | (DID_ERROR << 16);
  1143. else
  1144. cmd->result =
  1145. cmd->SCp.Status | (cmd->SCp.Message << 8);
  1146. cmd->scsi_done(cmd);
  1147. break;
  1148. case S_PRE_TMP_DISC:
  1149. case S_RUNNING_LEVEL2:
  1150. cmd->host_scribble = (uchar *) hostdata->disconnected_Q;
  1151. hostdata->disconnected_Q = cmd;
  1152. hostdata->connected = NULL;
  1153. hostdata->state = S_UNCONNECTED;
  1154. #ifdef PROC_STATISTICS
  1155. hostdata->disc_done_cnt[cmd->device->id]++;
  1156. #endif
  1157. break;
  1158. default:
  1159. printk("*** Unexpected DISCONNECT interrupt! ***");
  1160. hostdata->state = S_UNCONNECTED;
  1161. }
  1162. /* We are no longer connected to a target - check to see if
  1163. * there are commands waiting to be executed.
  1164. */
  1165. spin_unlock_irqrestore(&hostdata->lock, flags);
  1166. wd33c93_execute(instance);
  1167. break;
  1168. case CSR_RESEL_AM:
  1169. case CSR_RESEL:
  1170. DB(DB_INTR, printk("RESEL%s", sr == CSR_RESEL_AM ? "_AM" : ""))
  1171. /* Old chips (pre -A ???) don't have advanced features and will
  1172. * generate CSR_RESEL. In that case we have to extract the LUN the
  1173. * hard way (see below).
  1174. * First we have to make sure this reselection didn't
  1175. * happen during Arbitration/Selection of some other device.
  1176. * If yes, put losing command back on top of input_Q.
  1177. */
  1178. if (hostdata->level2 <= L2_NONE) {
  1179. if (hostdata->selecting) {
  1180. cmd = (struct scsi_cmnd *) hostdata->selecting;
  1181. hostdata->selecting = NULL;
  1182. hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
  1183. cmd->host_scribble =
  1184. (uchar *) hostdata->input_Q;
  1185. hostdata->input_Q = cmd;
  1186. }
  1187. }
  1188. else {
  1189. if (cmd) {
  1190. if (phs == 0x00) {
  1191. hostdata->busy[cmd->device->id] &=
  1192. ~(1 << (cmd->device->lun & 0xff));
  1193. cmd->host_scribble =
  1194. (uchar *) hostdata->input_Q;
  1195. hostdata->input_Q = cmd;
  1196. } else {
  1197. printk
  1198. ("---%02x:%02x:%02x-TROUBLE: Intrusive ReSelect!---",
  1199. asr, sr, phs);
  1200. while (1)
  1201. printk("\r");
  1202. }
  1203. }
  1204. }
  1205. /* OK - find out which device reselected us. */
  1206. id = read_wd33c93(regs, WD_SOURCE_ID);
  1207. id &= SRCID_MASK;
  1208. /* and extract the lun from the ID message. (Note that we don't
  1209. * bother to check for a valid message here - I guess this is
  1210. * not the right way to go, but...)
  1211. */
  1212. if (sr == CSR_RESEL_AM) {
  1213. lun = read_wd33c93(regs, WD_DATA);
  1214. if (hostdata->level2 < L2_RESELECT)
  1215. write_wd33c93_cmd(regs, WD_CMD_NEGATE_ACK);
  1216. lun &= 7;
  1217. } else {
  1218. /* Old chip; wait for msgin phase to pick up the LUN. */
  1219. for (lun = 255; lun; lun--) {
  1220. if ((asr = read_aux_stat(regs)) & ASR_INT)
  1221. break;
  1222. udelay(10);
  1223. }
  1224. if (!(asr & ASR_INT)) {
  1225. printk
  1226. ("wd33c93: Reselected without IDENTIFY\n");
  1227. lun = 0;
  1228. } else {
  1229. /* Verify this is a change to MSG_IN and read the message */
  1230. sr = read_wd33c93(regs, WD_SCSI_STATUS);
  1231. udelay(7);
  1232. if (sr == (CSR_ABORT | PHS_MESS_IN) ||
  1233. sr == (CSR_UNEXP | PHS_MESS_IN) ||
  1234. sr == (CSR_SRV_REQ | PHS_MESS_IN)) {
  1235. /* Got MSG_IN, grab target LUN */
  1236. lun = read_1_byte(regs);
  1237. /* Now we expect a 'paused with ACK asserted' int.. */
  1238. asr = read_aux_stat(regs);
  1239. if (!(asr & ASR_INT)) {
  1240. udelay(10);
  1241. asr = read_aux_stat(regs);
  1242. if (!(asr & ASR_INT))
  1243. printk
  1244. ("wd33c93: No int after LUN on RESEL (%02x)\n",
  1245. asr);
  1246. }
  1247. sr = read_wd33c93(regs, WD_SCSI_STATUS);
  1248. udelay(7);
  1249. if (sr != CSR_MSGIN)
  1250. printk
  1251. ("wd33c93: Not paused with ACK on RESEL (%02x)\n",
  1252. sr);
  1253. lun &= 7;
  1254. write_wd33c93_cmd(regs,
  1255. WD_CMD_NEGATE_ACK);
  1256. } else {
  1257. printk
  1258. ("wd33c93: Not MSG_IN on reselect (%02x)\n",
  1259. sr);
  1260. lun = 0;
  1261. }
  1262. }
  1263. }
  1264. /* Now we look for the command that's reconnecting. */
  1265. cmd = (struct scsi_cmnd *) hostdata->disconnected_Q;
  1266. patch = NULL;
  1267. while (cmd) {
  1268. if (id == cmd->device->id && lun == (u8)cmd->device->lun)
  1269. break;
  1270. patch = cmd;
  1271. cmd = (struct scsi_cmnd *) cmd->host_scribble;
  1272. }
  1273. /* Hmm. Couldn't find a valid command.... What to do? */
  1274. if (!cmd) {
  1275. printk
  1276. ("---TROUBLE: target %d.%d not in disconnect queue---",
  1277. id, (u8)lun);
  1278. spin_unlock_irqrestore(&hostdata->lock, flags);
  1279. return;
  1280. }
  1281. /* Ok, found the command - now start it up again. */
  1282. if (patch)
  1283. patch->host_scribble = cmd->host_scribble;
  1284. else
  1285. hostdata->disconnected_Q =
  1286. (struct scsi_cmnd *) cmd->host_scribble;
  1287. hostdata->connected = cmd;
  1288. /* We don't need to worry about 'initialize_SCp()' or 'hostdata->busy[]'
  1289. * because these things are preserved over a disconnect.
  1290. * But we DO need to fix the DPD bit so it's correct for this command.
  1291. */
  1292. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1293. write_wd33c93(regs, WD_DESTINATION_ID, cmd->device->id);
  1294. else
  1295. write_wd33c93(regs, WD_DESTINATION_ID,
  1296. cmd->device->id | DSTID_DPD);
  1297. if (hostdata->level2 >= L2_RESELECT) {
  1298. write_wd33c93_count(regs, 0); /* we want a DATA_PHASE interrupt */
  1299. write_wd33c93(regs, WD_COMMAND_PHASE, 0x45);
  1300. write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
  1301. hostdata->state = S_RUNNING_LEVEL2;
  1302. } else
  1303. hostdata->state = S_CONNECTED;
  1304. spin_unlock_irqrestore(&hostdata->lock, flags);
  1305. break;
  1306. default:
  1307. printk("--UNKNOWN INTERRUPT:%02x:%02x:%02x--", asr, sr, phs);
  1308. spin_unlock_irqrestore(&hostdata->lock, flags);
  1309. }
  1310. DB(DB_INTR, printk("} "))
  1311. }
  1312. static void
  1313. reset_wd33c93(struct Scsi_Host *instance)
  1314. {
  1315. struct WD33C93_hostdata *hostdata =
  1316. (struct WD33C93_hostdata *) instance->hostdata;
  1317. const wd33c93_regs regs = hostdata->regs;
  1318. uchar sr;
  1319. #ifdef CONFIG_SGI_IP22
  1320. {
  1321. int busycount = 0;
  1322. extern void sgiwd93_reset(unsigned long);
  1323. /* wait 'til the chip gets some time for us */
  1324. while ((read_aux_stat(regs) & ASR_BSY) && busycount++ < 100)
  1325. udelay (10);
  1326. /*
  1327. * there are scsi devices out there, which manage to lock up
  1328. * the wd33c93 in a busy condition. In this state it won't
  1329. * accept the reset command. The only way to solve this is to
  1330. * give the chip a hardware reset (if possible). The code below
  1331. * does this for the SGI Indy, where this is possible
  1332. */
  1333. /* still busy ? */
  1334. if (read_aux_stat(regs) & ASR_BSY)
  1335. sgiwd93_reset(instance->base); /* yeah, give it the hard one */
  1336. }
  1337. #endif
  1338. write_wd33c93(regs, WD_OWN_ID, OWNID_EAF | OWNID_RAF |
  1339. instance->this_id | hostdata->clock_freq);
  1340. write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | CTRL_POLLED);
  1341. write_wd33c93(regs, WD_SYNCHRONOUS_TRANSFER,
  1342. calc_sync_xfer(hostdata->default_sx_per / 4,
  1343. DEFAULT_SX_OFF, 0, hostdata->sx_table));
  1344. write_wd33c93(regs, WD_COMMAND, WD_CMD_RESET);
  1345. #ifdef CONFIG_MVME147_SCSI
  1346. udelay(25); /* The old wd33c93 on MVME147 needs this, at least */
  1347. #endif
  1348. while (!(read_aux_stat(regs) & ASR_INT))
  1349. ;
  1350. sr = read_wd33c93(regs, WD_SCSI_STATUS);
  1351. hostdata->microcode = read_wd33c93(regs, WD_CDB_1);
  1352. if (sr == 0x00)
  1353. hostdata->chip = C_WD33C93;
  1354. else if (sr == 0x01) {
  1355. write_wd33c93(regs, WD_QUEUE_TAG, 0xa5); /* any random number */
  1356. sr = read_wd33c93(regs, WD_QUEUE_TAG);
  1357. if (sr == 0xa5) {
  1358. hostdata->chip = C_WD33C93B;
  1359. write_wd33c93(regs, WD_QUEUE_TAG, 0);
  1360. } else
  1361. hostdata->chip = C_WD33C93A;
  1362. } else
  1363. hostdata->chip = C_UNKNOWN_CHIP;
  1364. if (hostdata->chip != C_WD33C93B) /* Fast SCSI unavailable */
  1365. hostdata->fast = 0;
  1366. write_wd33c93(regs, WD_TIMEOUT_PERIOD, TIMEOUT_PERIOD_VALUE);
  1367. write_wd33c93(regs, WD_CONTROL, CTRL_IDI | CTRL_EDI | CTRL_POLLED);
  1368. }
  1369. int
  1370. wd33c93_host_reset(struct scsi_cmnd * SCpnt)
  1371. {
  1372. struct Scsi_Host *instance;
  1373. struct WD33C93_hostdata *hostdata;
  1374. int i;
  1375. instance = SCpnt->device->host;
  1376. hostdata = (struct WD33C93_hostdata *) instance->hostdata;
  1377. printk("scsi%d: reset. ", instance->host_no);
  1378. disable_irq(instance->irq);
  1379. hostdata->dma_stop(instance, NULL, 0);
  1380. for (i = 0; i < 8; i++) {
  1381. hostdata->busy[i] = 0;
  1382. hostdata->sync_xfer[i] =
  1383. calc_sync_xfer(DEFAULT_SX_PER / 4, DEFAULT_SX_OFF,
  1384. 0, hostdata->sx_table);
  1385. hostdata->sync_stat[i] = SS_UNSET; /* using default sync values */
  1386. }
  1387. hostdata->input_Q = NULL;
  1388. hostdata->selecting = NULL;
  1389. hostdata->connected = NULL;
  1390. hostdata->disconnected_Q = NULL;
  1391. hostdata->state = S_UNCONNECTED;
  1392. hostdata->dma = D_DMA_OFF;
  1393. hostdata->incoming_ptr = 0;
  1394. hostdata->outgoing_len = 0;
  1395. reset_wd33c93(instance);
  1396. SCpnt->result = DID_RESET << 16;
  1397. enable_irq(instance->irq);
  1398. return SUCCESS;
  1399. }
  1400. int
  1401. wd33c93_abort(struct scsi_cmnd * cmd)
  1402. {
  1403. struct Scsi_Host *instance;
  1404. struct WD33C93_hostdata *hostdata;
  1405. wd33c93_regs regs;
  1406. struct scsi_cmnd *tmp, *prev;
  1407. disable_irq(cmd->device->host->irq);
  1408. instance = cmd->device->host;
  1409. hostdata = (struct WD33C93_hostdata *) instance->hostdata;
  1410. regs = hostdata->regs;
  1411. /*
  1412. * Case 1 : If the command hasn't been issued yet, we simply remove it
  1413. * from the input_Q.
  1414. */
  1415. tmp = (struct scsi_cmnd *) hostdata->input_Q;
  1416. prev = NULL;
  1417. while (tmp) {
  1418. if (tmp == cmd) {
  1419. if (prev)
  1420. prev->host_scribble = cmd->host_scribble;
  1421. else
  1422. hostdata->input_Q =
  1423. (struct scsi_cmnd *) cmd->host_scribble;
  1424. cmd->host_scribble = NULL;
  1425. cmd->result = DID_ABORT << 16;
  1426. printk
  1427. ("scsi%d: Abort - removing command from input_Q. ",
  1428. instance->host_no);
  1429. enable_irq(cmd->device->host->irq);
  1430. cmd->scsi_done(cmd);
  1431. return SUCCESS;
  1432. }
  1433. prev = tmp;
  1434. tmp = (struct scsi_cmnd *) tmp->host_scribble;
  1435. }
  1436. /*
  1437. * Case 2 : If the command is connected, we're going to fail the abort
  1438. * and let the high level SCSI driver retry at a later time or
  1439. * issue a reset.
  1440. *
  1441. * Timeouts, and therefore aborted commands, will be highly unlikely
  1442. * and handling them cleanly in this situation would make the common
  1443. * case of noresets less efficient, and would pollute our code. So,
  1444. * we fail.
  1445. */
  1446. if (hostdata->connected == cmd) {
  1447. uchar sr, asr;
  1448. unsigned long timeout;
  1449. printk("scsi%d: Aborting connected command - ",
  1450. instance->host_no);
  1451. printk("stopping DMA - ");
  1452. if (hostdata->dma == D_DMA_RUNNING) {
  1453. hostdata->dma_stop(instance, cmd, 0);
  1454. hostdata->dma = D_DMA_OFF;
  1455. }
  1456. printk("sending wd33c93 ABORT command - ");
  1457. write_wd33c93(regs, WD_CONTROL,
  1458. CTRL_IDI | CTRL_EDI | CTRL_POLLED);
  1459. write_wd33c93_cmd(regs, WD_CMD_ABORT);
  1460. /* Now we have to attempt to flush out the FIFO... */
  1461. printk("flushing fifo - ");
  1462. timeout = 1000000;
  1463. do {
  1464. asr = read_aux_stat(regs);
  1465. if (asr & ASR_DBR)
  1466. read_wd33c93(regs, WD_DATA);
  1467. } while (!(asr & ASR_INT) && timeout-- > 0);
  1468. sr = read_wd33c93(regs, WD_SCSI_STATUS);
  1469. printk
  1470. ("asr=%02x, sr=%02x, %ld bytes un-transferred (timeout=%ld) - ",
  1471. asr, sr, read_wd33c93_count(regs), timeout);
  1472. /*
  1473. * Abort command processed.
  1474. * Still connected.
  1475. * We must disconnect.
  1476. */
  1477. printk("sending wd33c93 DISCONNECT command - ");
  1478. write_wd33c93_cmd(regs, WD_CMD_DISCONNECT);
  1479. timeout = 1000000;
  1480. asr = read_aux_stat(regs);
  1481. while ((asr & ASR_CIP) && timeout-- > 0)
  1482. asr = read_aux_stat(regs);
  1483. sr = read_wd33c93(regs, WD_SCSI_STATUS);
  1484. printk("asr=%02x, sr=%02x.", asr, sr);
  1485. hostdata->busy[cmd->device->id] &= ~(1 << (cmd->device->lun & 0xff));
  1486. hostdata->connected = NULL;
  1487. hostdata->state = S_UNCONNECTED;
  1488. cmd->result = DID_ABORT << 16;
  1489. /* sti();*/
  1490. wd33c93_execute(instance);
  1491. enable_irq(cmd->device->host->irq);
  1492. cmd->scsi_done(cmd);
  1493. return SUCCESS;
  1494. }
  1495. /*
  1496. * Case 3: If the command is currently disconnected from the bus,
  1497. * we're not going to expend much effort here: Let's just return
  1498. * an ABORT_SNOOZE and hope for the best...
  1499. */
  1500. tmp = (struct scsi_cmnd *) hostdata->disconnected_Q;
  1501. while (tmp) {
  1502. if (tmp == cmd) {
  1503. printk
  1504. ("scsi%d: Abort - command found on disconnected_Q - ",
  1505. instance->host_no);
  1506. printk("Abort SNOOZE. ");
  1507. enable_irq(cmd->device->host->irq);
  1508. return FAILED;
  1509. }
  1510. tmp = (struct scsi_cmnd *) tmp->host_scribble;
  1511. }
  1512. /*
  1513. * Case 4 : If we reached this point, the command was not found in any of
  1514. * the queues.
  1515. *
  1516. * We probably reached this point because of an unlikely race condition
  1517. * between the command completing successfully and the abortion code,
  1518. * so we won't panic, but we will notify the user in case something really
  1519. * broke.
  1520. */
  1521. /* sti();*/
  1522. wd33c93_execute(instance);
  1523. enable_irq(cmd->device->host->irq);
  1524. printk("scsi%d: warning : SCSI command probably completed successfully"
  1525. " before abortion. ", instance->host_no);
  1526. return FAILED;
  1527. }
  1528. #define MAX_WD33C93_HOSTS 4
  1529. #define MAX_SETUP_ARGS ARRAY_SIZE(setup_args)
  1530. #define SETUP_BUFFER_SIZE 200
  1531. static char setup_buffer[SETUP_BUFFER_SIZE];
  1532. static char setup_used[MAX_SETUP_ARGS];
  1533. static int done_setup = 0;
  1534. static int
  1535. wd33c93_setup(char *str)
  1536. {
  1537. int i;
  1538. char *p1, *p2;
  1539. /* The kernel does some processing of the command-line before calling
  1540. * this function: If it begins with any decimal or hex number arguments,
  1541. * ints[0] = how many numbers found and ints[1] through [n] are the values
  1542. * themselves. str points to where the non-numeric arguments (if any)
  1543. * start: We do our own parsing of those. We construct synthetic 'nosync'
  1544. * keywords out of numeric args (to maintain compatibility with older
  1545. * versions) and then add the rest of the arguments.
  1546. */
  1547. p1 = setup_buffer;
  1548. *p1 = '\0';
  1549. if (str)
  1550. strncpy(p1, str, SETUP_BUFFER_SIZE - strlen(setup_buffer));
  1551. setup_buffer[SETUP_BUFFER_SIZE - 1] = '\0';
  1552. p1 = setup_buffer;
  1553. i = 0;
  1554. while (*p1 && (i < MAX_SETUP_ARGS)) {
  1555. p2 = strchr(p1, ',');
  1556. if (p2) {
  1557. *p2 = '\0';
  1558. if (p1 != p2)
  1559. setup_args[i] = p1;
  1560. p1 = p2 + 1;
  1561. i++;
  1562. } else {
  1563. setup_args[i] = p1;
  1564. break;
  1565. }
  1566. }
  1567. for (i = 0; i < MAX_SETUP_ARGS; i++)
  1568. setup_used[i] = 0;
  1569. done_setup = 1;
  1570. return 1;
  1571. }
  1572. __setup("wd33c93=", wd33c93_setup);
  1573. /* check_setup_args() returns index if key found, 0 if not
  1574. */
  1575. static int
  1576. check_setup_args(char *key, int *flags, int *val, char *buf)
  1577. {
  1578. int x;
  1579. char *cp;
  1580. for (x = 0; x < MAX_SETUP_ARGS; x++) {
  1581. if (setup_used[x])
  1582. continue;
  1583. if (!strncmp(setup_args[x], key, strlen(key)))
  1584. break;
  1585. if (!strncmp(setup_args[x], "next", strlen("next")))
  1586. return 0;
  1587. }
  1588. if (x == MAX_SETUP_ARGS)
  1589. return 0;
  1590. setup_used[x] = 1;
  1591. cp = setup_args[x] + strlen(key);
  1592. *val = -1;
  1593. if (*cp != ':')
  1594. return ++x;
  1595. cp++;
  1596. if ((*cp >= '0') && (*cp <= '9')) {
  1597. *val = simple_strtoul(cp, NULL, 0);
  1598. }
  1599. return ++x;
  1600. }
  1601. /*
  1602. * Calculate internal data-transfer-clock cycle from input-clock
  1603. * frequency (/MHz) and fill 'sx_table'.
  1604. *
  1605. * The original driver used to rely on a fixed sx_table, containing periods
  1606. * for (only) the lower limits of the respective input-clock-frequency ranges
  1607. * (8-10/12-15/16-20 MHz). Although it seems, that no problems occurred with
  1608. * this setting so far, it might be desirable to adjust the transfer periods
  1609. * closer to the really attached, possibly 25% higher, input-clock, since
  1610. * - the wd33c93 may really use a significant shorter period, than it has
  1611. * negotiated (eg. thrashing the target, which expects 4/8MHz, with 5/10MHz
  1612. * instead).
  1613. * - the wd33c93 may ask the target for a lower transfer rate, than the target
  1614. * is capable of (eg. negotiating for an assumed minimum of 252ns instead of
  1615. * possible 200ns, which indeed shows up in tests as an approx. 10% lower
  1616. * transfer rate).
  1617. */
  1618. static inline unsigned int
  1619. round_4(unsigned int x)
  1620. {
  1621. switch (x & 3) {
  1622. case 1: --x;
  1623. break;
  1624. case 2: ++x;
  1625. case 3: ++x;
  1626. }
  1627. return x;
  1628. }
  1629. static void
  1630. calc_sx_table(unsigned int mhz, struct sx_period sx_table[9])
  1631. {
  1632. unsigned int d, i;
  1633. if (mhz < 11)
  1634. d = 2; /* divisor for 8-10 MHz input-clock */
  1635. else if (mhz < 16)
  1636. d = 3; /* divisor for 12-15 MHz input-clock */
  1637. else
  1638. d = 4; /* divisor for 16-20 MHz input-clock */
  1639. d = (100000 * d) / 2 / mhz; /* 100 x DTCC / nanosec */
  1640. sx_table[0].period_ns = 1;
  1641. sx_table[0].reg_value = 0x20;
  1642. for (i = 1; i < 8; i++) {
  1643. sx_table[i].period_ns = round_4((i+1)*d / 100);
  1644. sx_table[i].reg_value = (i+1)*0x10;
  1645. }
  1646. sx_table[7].reg_value = 0;
  1647. sx_table[8].period_ns = 0;
  1648. sx_table[8].reg_value = 0;
  1649. }
  1650. /*
  1651. * check and, maybe, map an init- or "clock:"- argument.
  1652. */
  1653. static uchar
  1654. set_clk_freq(int freq, int *mhz)
  1655. {
  1656. int x = freq;
  1657. if (WD33C93_FS_8_10 == freq)
  1658. freq = 8;
  1659. else if (WD33C93_FS_12_15 == freq)
  1660. freq = 12;
  1661. else if (WD33C93_FS_16_20 == freq)
  1662. freq = 16;
  1663. else if (freq > 7 && freq < 11)
  1664. x = WD33C93_FS_8_10;
  1665. else if (freq > 11 && freq < 16)
  1666. x = WD33C93_FS_12_15;
  1667. else if (freq > 15 && freq < 21)
  1668. x = WD33C93_FS_16_20;
  1669. else {
  1670. /* Hmm, wouldn't it be safer to assume highest freq here? */
  1671. x = WD33C93_FS_8_10;
  1672. freq = 8;
  1673. }
  1674. *mhz = freq;
  1675. return x;
  1676. }
  1677. /*
  1678. * to be used with the resync: fast: ... options
  1679. */
  1680. static inline void set_resync ( struct WD33C93_hostdata *hd, int mask )
  1681. {
  1682. int i;
  1683. for (i = 0; i < 8; i++)
  1684. if (mask & (1 << i))
  1685. hd->sync_stat[i] = SS_UNSET;
  1686. }
  1687. void
  1688. wd33c93_init(struct Scsi_Host *instance, const wd33c93_regs regs,
  1689. dma_setup_t setup, dma_stop_t stop, int clock_freq)
  1690. {
  1691. struct WD33C93_hostdata *hostdata;
  1692. int i;
  1693. int flags;
  1694. int val;
  1695. char buf[32];
  1696. if (!done_setup && setup_strings)
  1697. wd33c93_setup(setup_strings);
  1698. hostdata = (struct WD33C93_hostdata *) instance->hostdata;
  1699. hostdata->regs = regs;
  1700. hostdata->clock_freq = set_clk_freq(clock_freq, &i);
  1701. calc_sx_table(i, hostdata->sx_table);
  1702. hostdata->dma_setup = setup;
  1703. hostdata->dma_stop = stop;
  1704. hostdata->dma_bounce_buffer = NULL;
  1705. hostdata->dma_bounce_len = 0;
  1706. for (i = 0; i < 8; i++) {
  1707. hostdata->busy[i] = 0;
  1708. hostdata->sync_xfer[i] =
  1709. calc_sync_xfer(DEFAULT_SX_PER / 4, DEFAULT_SX_OFF,
  1710. 0, hostdata->sx_table);
  1711. hostdata->sync_stat[i] = SS_UNSET; /* using default sync values */
  1712. #ifdef PROC_STATISTICS
  1713. hostdata->cmd_cnt[i] = 0;
  1714. hostdata->disc_allowed_cnt[i] = 0;
  1715. hostdata->disc_done_cnt[i] = 0;
  1716. #endif
  1717. }
  1718. hostdata->input_Q = NULL;
  1719. hostdata->selecting = NULL;
  1720. hostdata->connected = NULL;
  1721. hostdata->disconnected_Q = NULL;
  1722. hostdata->state = S_UNCONNECTED;
  1723. hostdata->dma = D_DMA_OFF;
  1724. hostdata->level2 = L2_BASIC;
  1725. hostdata->disconnect = DIS_ADAPTIVE;
  1726. hostdata->args = DEBUG_DEFAULTS;
  1727. hostdata->incoming_ptr = 0;
  1728. hostdata->outgoing_len = 0;
  1729. hostdata->default_sx_per = DEFAULT_SX_PER;
  1730. hostdata->no_dma = 0; /* default is DMA enabled */
  1731. #ifdef PROC_INTERFACE
  1732. hostdata->proc = PR_VERSION | PR_INFO | PR_STATISTICS |
  1733. PR_CONNECTED | PR_INPUTQ | PR_DISCQ | PR_STOP;
  1734. #ifdef PROC_STATISTICS
  1735. hostdata->dma_cnt = 0;
  1736. hostdata->pio_cnt = 0;
  1737. hostdata->int_cnt = 0;
  1738. #endif
  1739. #endif
  1740. if (check_setup_args("clock", &flags, &val, buf)) {
  1741. hostdata->clock_freq = set_clk_freq(val, &val);
  1742. calc_sx_table(val, hostdata->sx_table);
  1743. }
  1744. if (check_setup_args("nosync", &flags, &val, buf))
  1745. hostdata->no_sync = val;
  1746. if (check_setup_args("nodma", &flags, &val, buf))
  1747. hostdata->no_dma = (val == -1) ? 1 : val;
  1748. if (check_setup_args("period", &flags, &val, buf))
  1749. hostdata->default_sx_per =
  1750. hostdata->sx_table[round_period((unsigned int) val,
  1751. hostdata->sx_table)].period_ns;
  1752. if (check_setup_args("disconnect", &flags, &val, buf)) {
  1753. if ((val >= DIS_NEVER) && (val <= DIS_ALWAYS))
  1754. hostdata->disconnect = val;
  1755. else
  1756. hostdata->disconnect = DIS_ADAPTIVE;
  1757. }
  1758. if (check_setup_args("level2", &flags, &val, buf))
  1759. hostdata->level2 = val;
  1760. if (check_setup_args("debug", &flags, &val, buf))
  1761. hostdata->args = val & DB_MASK;
  1762. if (check_setup_args("burst", &flags, &val, buf))
  1763. hostdata->dma_mode = val ? CTRL_BURST:CTRL_DMA;
  1764. if (WD33C93_FS_16_20 == hostdata->clock_freq /* divisor 4 */
  1765. && check_setup_args("fast", &flags, &val, buf))
  1766. hostdata->fast = !!val;
  1767. if ((i = check_setup_args("next", &flags, &val, buf))) {
  1768. while (i)
  1769. setup_used[--i] = 1;
  1770. }
  1771. #ifdef PROC_INTERFACE
  1772. if (check_setup_args("proc", &flags, &val, buf))
  1773. hostdata->proc = val;
  1774. #endif
  1775. spin_lock_irq(&hostdata->lock);
  1776. reset_wd33c93(instance);
  1777. spin_unlock_irq(&hostdata->lock);
  1778. printk("wd33c93-%d: chip=%s/%d no_sync=0x%x no_dma=%d",
  1779. instance->host_no,
  1780. (hostdata->chip == C_WD33C93) ? "WD33c93" : (hostdata->chip ==
  1781. C_WD33C93A) ?
  1782. "WD33c93A" : (hostdata->chip ==
  1783. C_WD33C93B) ? "WD33c93B" : "unknown",
  1784. hostdata->microcode, hostdata->no_sync, hostdata->no_dma);
  1785. #ifdef DEBUGGING_ON
  1786. printk(" debug_flags=0x%02x\n", hostdata->args);
  1787. #else
  1788. printk(" debugging=OFF\n");
  1789. #endif
  1790. printk(" setup_args=");
  1791. for (i = 0; i < MAX_SETUP_ARGS; i++)
  1792. printk("%s,", setup_args[i]);
  1793. printk("\n");
  1794. printk(" Version %s - %s\n", WD33C93_VERSION, WD33C93_DATE);
  1795. }
  1796. int wd33c93_write_info(struct Scsi_Host *instance, char *buf, int len)
  1797. {
  1798. #ifdef PROC_INTERFACE
  1799. char *bp;
  1800. struct WD33C93_hostdata *hd;
  1801. int x;
  1802. hd = (struct WD33C93_hostdata *) instance->hostdata;
  1803. /* We accept the following
  1804. * keywords (same format as command-line, but arguments are not optional):
  1805. * debug
  1806. * disconnect
  1807. * period
  1808. * resync
  1809. * proc
  1810. * nodma
  1811. * level2
  1812. * burst
  1813. * fast
  1814. * nosync
  1815. */
  1816. buf[len] = '\0';
  1817. for (bp = buf; *bp; ) {
  1818. while (',' == *bp || ' ' == *bp)
  1819. ++bp;
  1820. if (!strncmp(bp, "debug:", 6)) {
  1821. hd->args = simple_strtoul(bp+6, &bp, 0) & DB_MASK;
  1822. } else if (!strncmp(bp, "disconnect:", 11)) {
  1823. x = simple_strtoul(bp+11, &bp, 0);
  1824. if (x < DIS_NEVER || x > DIS_ALWAYS)
  1825. x = DIS_ADAPTIVE;
  1826. hd->disconnect = x;
  1827. } else if (!strncmp(bp, "period:", 7)) {
  1828. x = simple_strtoul(bp+7, &bp, 0);
  1829. hd->default_sx_per =
  1830. hd->sx_table[round_period((unsigned int) x,
  1831. hd->sx_table)].period_ns;
  1832. } else if (!strncmp(bp, "resync:", 7)) {
  1833. set_resync(hd, (int)simple_strtoul(bp+7, &bp, 0));
  1834. } else if (!strncmp(bp, "proc:", 5)) {
  1835. hd->proc = simple_strtoul(bp+5, &bp, 0);
  1836. } else if (!strncmp(bp, "nodma:", 6)) {
  1837. hd->no_dma = simple_strtoul(bp+6, &bp, 0);
  1838. } else if (!strncmp(bp, "level2:", 7)) {
  1839. hd->level2 = simple_strtoul(bp+7, &bp, 0);
  1840. } else if (!strncmp(bp, "burst:", 6)) {
  1841. hd->dma_mode =
  1842. simple_strtol(bp+6, &bp, 0) ? CTRL_BURST:CTRL_DMA;
  1843. } else if (!strncmp(bp, "fast:", 5)) {
  1844. x = !!simple_strtol(bp+5, &bp, 0);
  1845. if (x != hd->fast)
  1846. set_resync(hd, 0xff);
  1847. hd->fast = x;
  1848. } else if (!strncmp(bp, "nosync:", 7)) {
  1849. x = simple_strtoul(bp+7, &bp, 0);
  1850. set_resync(hd, x ^ hd->no_sync);
  1851. hd->no_sync = x;
  1852. } else {
  1853. break; /* unknown keyword,syntax-error,... */
  1854. }
  1855. }
  1856. return len;
  1857. #else
  1858. return 0;
  1859. #endif
  1860. }
  1861. int
  1862. wd33c93_show_info(struct seq_file *m, struct Scsi_Host *instance)
  1863. {
  1864. #ifdef PROC_INTERFACE
  1865. struct WD33C93_hostdata *hd;
  1866. struct scsi_cmnd *cmd;
  1867. int x;
  1868. hd = (struct WD33C93_hostdata *) instance->hostdata;
  1869. spin_lock_irq(&hd->lock);
  1870. if (hd->proc & PR_VERSION)
  1871. seq_printf(m, "\nVersion %s - %s.",
  1872. WD33C93_VERSION, WD33C93_DATE);
  1873. if (hd->proc & PR_INFO) {
  1874. seq_printf(m, "\nclock_freq=%02x no_sync=%02x no_dma=%d"
  1875. " dma_mode=%02x fast=%d",
  1876. hd->clock_freq, hd->no_sync, hd->no_dma, hd->dma_mode, hd->fast);
  1877. seq_puts(m, "\nsync_xfer[] = ");
  1878. for (x = 0; x < 7; x++)
  1879. seq_printf(m, "\t%02x", hd->sync_xfer[x]);
  1880. seq_puts(m, "\nsync_stat[] = ");
  1881. for (x = 0; x < 7; x++)
  1882. seq_printf(m, "\t%02x", hd->sync_stat[x]);
  1883. }
  1884. #ifdef PROC_STATISTICS
  1885. if (hd->proc & PR_STATISTICS) {
  1886. seq_puts(m, "\ncommands issued: ");
  1887. for (x = 0; x < 7; x++)
  1888. seq_printf(m, "\t%ld", hd->cmd_cnt[x]);
  1889. seq_puts(m, "\ndisconnects allowed:");
  1890. for (x = 0; x < 7; x++)
  1891. seq_printf(m, "\t%ld", hd->disc_allowed_cnt[x]);
  1892. seq_puts(m, "\ndisconnects done: ");
  1893. for (x = 0; x < 7; x++)
  1894. seq_printf(m, "\t%ld", hd->disc_done_cnt[x]);
  1895. seq_printf(m,
  1896. "\ninterrupts: %ld, DATA_PHASE ints: %ld DMA, %ld PIO",
  1897. hd->int_cnt, hd->dma_cnt, hd->pio_cnt);
  1898. }
  1899. #endif
  1900. if (hd->proc & PR_CONNECTED) {
  1901. seq_puts(m, "\nconnected: ");
  1902. if (hd->connected) {
  1903. cmd = (struct scsi_cmnd *) hd->connected;
  1904. seq_printf(m, " %d:%llu(%02x)",
  1905. cmd->device->id, cmd->device->lun, cmd->cmnd[0]);
  1906. }
  1907. }
  1908. if (hd->proc & PR_INPUTQ) {
  1909. seq_puts(m, "\ninput_Q: ");
  1910. cmd = (struct scsi_cmnd *) hd->input_Q;
  1911. while (cmd) {
  1912. seq_printf(m, " %d:%llu(%02x)",
  1913. cmd->device->id, cmd->device->lun, cmd->cmnd[0]);
  1914. cmd = (struct scsi_cmnd *) cmd->host_scribble;
  1915. }
  1916. }
  1917. if (hd->proc & PR_DISCQ) {
  1918. seq_puts(m, "\ndisconnected_Q:");
  1919. cmd = (struct scsi_cmnd *) hd->disconnected_Q;
  1920. while (cmd) {
  1921. seq_printf(m, " %d:%llu(%02x)",
  1922. cmd->device->id, cmd->device->lun, cmd->cmnd[0]);
  1923. cmd = (struct scsi_cmnd *) cmd->host_scribble;
  1924. }
  1925. }
  1926. seq_putc(m, '\n');
  1927. spin_unlock_irq(&hd->lock);
  1928. #endif /* PROC_INTERFACE */
  1929. return 0;
  1930. }
  1931. EXPORT_SYMBOL(wd33c93_host_reset);
  1932. EXPORT_SYMBOL(wd33c93_init);
  1933. EXPORT_SYMBOL(wd33c93_abort);
  1934. EXPORT_SYMBOL(wd33c93_queuecommand);
  1935. EXPORT_SYMBOL(wd33c93_intr);
  1936. EXPORT_SYMBOL(wd33c93_show_info);
  1937. EXPORT_SYMBOL(wd33c93_write_info);