spi-nuc900.c 8.9 KB

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  1. /*
  2. * Copyright (c) 2009 Nuvoton technology.
  3. * Wan ZongShun <mcuos.com@gmail.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. */
  10. #include <linux/module.h>
  11. #include <linux/spinlock.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/delay.h>
  14. #include <linux/errno.h>
  15. #include <linux/err.h>
  16. #include <linux/clk.h>
  17. #include <linux/device.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/gpio.h>
  20. #include <linux/io.h>
  21. #include <linux/slab.h>
  22. #include <linux/spi/spi.h>
  23. #include <linux/spi/spi_bitbang.h>
  24. #include <linux/platform_data/spi-nuc900.h>
  25. /* usi registers offset */
  26. #define USI_CNT 0x00
  27. #define USI_DIV 0x04
  28. #define USI_SSR 0x08
  29. #define USI_RX0 0x10
  30. #define USI_TX0 0x10
  31. /* usi register bit */
  32. #define ENINT (0x01 << 17)
  33. #define ENFLG (0x01 << 16)
  34. #define SLEEP (0x0f << 12)
  35. #define TXNUM (0x03 << 8)
  36. #define TXBITLEN (0x1f << 3)
  37. #define TXNEG (0x01 << 2)
  38. #define RXNEG (0x01 << 1)
  39. #define LSB (0x01 << 10)
  40. #define SELECTLEV (0x01 << 2)
  41. #define SELECTPOL (0x01 << 31)
  42. #define SELECTSLAVE 0x01
  43. #define GOBUSY 0x01
  44. struct nuc900_spi {
  45. struct spi_bitbang bitbang;
  46. struct completion done;
  47. void __iomem *regs;
  48. int irq;
  49. int len;
  50. int count;
  51. const unsigned char *tx;
  52. unsigned char *rx;
  53. struct clk *clk;
  54. struct spi_master *master;
  55. struct nuc900_spi_info *pdata;
  56. spinlock_t lock;
  57. };
  58. static inline struct nuc900_spi *to_hw(struct spi_device *sdev)
  59. {
  60. return spi_master_get_devdata(sdev->master);
  61. }
  62. static void nuc900_slave_select(struct spi_device *spi, unsigned int ssr)
  63. {
  64. struct nuc900_spi *hw = to_hw(spi);
  65. unsigned int val;
  66. unsigned int cs = spi->mode & SPI_CS_HIGH ? 1 : 0;
  67. unsigned int cpol = spi->mode & SPI_CPOL ? 1 : 0;
  68. unsigned long flags;
  69. spin_lock_irqsave(&hw->lock, flags);
  70. val = __raw_readl(hw->regs + USI_SSR);
  71. if (!cs)
  72. val &= ~SELECTLEV;
  73. else
  74. val |= SELECTLEV;
  75. if (!ssr)
  76. val &= ~SELECTSLAVE;
  77. else
  78. val |= SELECTSLAVE;
  79. __raw_writel(val, hw->regs + USI_SSR);
  80. val = __raw_readl(hw->regs + USI_CNT);
  81. if (!cpol)
  82. val &= ~SELECTPOL;
  83. else
  84. val |= SELECTPOL;
  85. __raw_writel(val, hw->regs + USI_CNT);
  86. spin_unlock_irqrestore(&hw->lock, flags);
  87. }
  88. static void nuc900_spi_chipsel(struct spi_device *spi, int value)
  89. {
  90. switch (value) {
  91. case BITBANG_CS_INACTIVE:
  92. nuc900_slave_select(spi, 0);
  93. break;
  94. case BITBANG_CS_ACTIVE:
  95. nuc900_slave_select(spi, 1);
  96. break;
  97. }
  98. }
  99. static void nuc900_spi_setup_txnum(struct nuc900_spi *hw, unsigned int txnum)
  100. {
  101. unsigned int val;
  102. unsigned long flags;
  103. spin_lock_irqsave(&hw->lock, flags);
  104. val = __raw_readl(hw->regs + USI_CNT) & ~TXNUM;
  105. if (txnum)
  106. val |= txnum << 0x08;
  107. __raw_writel(val, hw->regs + USI_CNT);
  108. spin_unlock_irqrestore(&hw->lock, flags);
  109. }
  110. static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
  111. unsigned int txbitlen)
  112. {
  113. unsigned int val;
  114. unsigned long flags;
  115. spin_lock_irqsave(&hw->lock, flags);
  116. val = __raw_readl(hw->regs + USI_CNT) & ~TXBITLEN;
  117. val |= (txbitlen << 0x03);
  118. __raw_writel(val, hw->regs + USI_CNT);
  119. spin_unlock_irqrestore(&hw->lock, flags);
  120. }
  121. static void nuc900_spi_gobusy(struct nuc900_spi *hw)
  122. {
  123. unsigned int val;
  124. unsigned long flags;
  125. spin_lock_irqsave(&hw->lock, flags);
  126. val = __raw_readl(hw->regs + USI_CNT);
  127. val |= GOBUSY;
  128. __raw_writel(val, hw->regs + USI_CNT);
  129. spin_unlock_irqrestore(&hw->lock, flags);
  130. }
  131. static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
  132. {
  133. return hw->tx ? hw->tx[count] : 0;
  134. }
  135. static int nuc900_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
  136. {
  137. struct nuc900_spi *hw = to_hw(spi);
  138. hw->tx = t->tx_buf;
  139. hw->rx = t->rx_buf;
  140. hw->len = t->len;
  141. hw->count = 0;
  142. __raw_writel(hw_txbyte(hw, 0x0), hw->regs + USI_TX0);
  143. nuc900_spi_gobusy(hw);
  144. wait_for_completion(&hw->done);
  145. return hw->count;
  146. }
  147. static irqreturn_t nuc900_spi_irq(int irq, void *dev)
  148. {
  149. struct nuc900_spi *hw = dev;
  150. unsigned int status;
  151. unsigned int count = hw->count;
  152. status = __raw_readl(hw->regs + USI_CNT);
  153. __raw_writel(status, hw->regs + USI_CNT);
  154. if (status & ENFLG) {
  155. hw->count++;
  156. if (hw->rx)
  157. hw->rx[count] = __raw_readl(hw->regs + USI_RX0);
  158. count++;
  159. if (count < hw->len) {
  160. __raw_writel(hw_txbyte(hw, count), hw->regs + USI_TX0);
  161. nuc900_spi_gobusy(hw);
  162. } else {
  163. complete(&hw->done);
  164. }
  165. return IRQ_HANDLED;
  166. }
  167. complete(&hw->done);
  168. return IRQ_HANDLED;
  169. }
  170. static void nuc900_tx_edge(struct nuc900_spi *hw, unsigned int edge)
  171. {
  172. unsigned int val;
  173. unsigned long flags;
  174. spin_lock_irqsave(&hw->lock, flags);
  175. val = __raw_readl(hw->regs + USI_CNT);
  176. if (edge)
  177. val |= TXNEG;
  178. else
  179. val &= ~TXNEG;
  180. __raw_writel(val, hw->regs + USI_CNT);
  181. spin_unlock_irqrestore(&hw->lock, flags);
  182. }
  183. static void nuc900_rx_edge(struct nuc900_spi *hw, unsigned int edge)
  184. {
  185. unsigned int val;
  186. unsigned long flags;
  187. spin_lock_irqsave(&hw->lock, flags);
  188. val = __raw_readl(hw->regs + USI_CNT);
  189. if (edge)
  190. val |= RXNEG;
  191. else
  192. val &= ~RXNEG;
  193. __raw_writel(val, hw->regs + USI_CNT);
  194. spin_unlock_irqrestore(&hw->lock, flags);
  195. }
  196. static void nuc900_send_first(struct nuc900_spi *hw, unsigned int lsb)
  197. {
  198. unsigned int val;
  199. unsigned long flags;
  200. spin_lock_irqsave(&hw->lock, flags);
  201. val = __raw_readl(hw->regs + USI_CNT);
  202. if (lsb)
  203. val |= LSB;
  204. else
  205. val &= ~LSB;
  206. __raw_writel(val, hw->regs + USI_CNT);
  207. spin_unlock_irqrestore(&hw->lock, flags);
  208. }
  209. static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
  210. {
  211. unsigned int val;
  212. unsigned long flags;
  213. spin_lock_irqsave(&hw->lock, flags);
  214. val = __raw_readl(hw->regs + USI_CNT) & ~SLEEP;
  215. if (sleep)
  216. val |= (sleep << 12);
  217. __raw_writel(val, hw->regs + USI_CNT);
  218. spin_unlock_irqrestore(&hw->lock, flags);
  219. }
  220. static void nuc900_enable_int(struct nuc900_spi *hw)
  221. {
  222. unsigned int val;
  223. unsigned long flags;
  224. spin_lock_irqsave(&hw->lock, flags);
  225. val = __raw_readl(hw->regs + USI_CNT);
  226. val |= ENINT;
  227. __raw_writel(val, hw->regs + USI_CNT);
  228. spin_unlock_irqrestore(&hw->lock, flags);
  229. }
  230. static void nuc900_set_divider(struct nuc900_spi *hw)
  231. {
  232. __raw_writel(hw->pdata->divider, hw->regs + USI_DIV);
  233. }
  234. static void nuc900_init_spi(struct nuc900_spi *hw)
  235. {
  236. clk_enable(hw->clk);
  237. spin_lock_init(&hw->lock);
  238. nuc900_tx_edge(hw, hw->pdata->txneg);
  239. nuc900_rx_edge(hw, hw->pdata->rxneg);
  240. nuc900_send_first(hw, hw->pdata->lsb);
  241. nuc900_set_sleep(hw, hw->pdata->sleep);
  242. nuc900_spi_setup_txbitlen(hw, hw->pdata->txbitlen);
  243. nuc900_spi_setup_txnum(hw, hw->pdata->txnum);
  244. nuc900_set_divider(hw);
  245. nuc900_enable_int(hw);
  246. }
  247. static int nuc900_spi_probe(struct platform_device *pdev)
  248. {
  249. struct nuc900_spi *hw;
  250. struct spi_master *master;
  251. struct resource *res;
  252. int err = 0;
  253. master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
  254. if (master == NULL) {
  255. dev_err(&pdev->dev, "No memory for spi_master\n");
  256. return -ENOMEM;
  257. }
  258. hw = spi_master_get_devdata(master);
  259. hw->master = master;
  260. hw->pdata = dev_get_platdata(&pdev->dev);
  261. if (hw->pdata == NULL) {
  262. dev_err(&pdev->dev, "No platform data supplied\n");
  263. err = -ENOENT;
  264. goto err_pdata;
  265. }
  266. platform_set_drvdata(pdev, hw);
  267. init_completion(&hw->done);
  268. master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
  269. if (hw->pdata->lsb)
  270. master->mode_bits |= SPI_LSB_FIRST;
  271. master->num_chipselect = hw->pdata->num_cs;
  272. master->bus_num = hw->pdata->bus_num;
  273. hw->bitbang.master = hw->master;
  274. hw->bitbang.chipselect = nuc900_spi_chipsel;
  275. hw->bitbang.txrx_bufs = nuc900_spi_txrx;
  276. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  277. hw->regs = devm_ioremap_resource(&pdev->dev, res);
  278. if (IS_ERR(hw->regs)) {
  279. err = PTR_ERR(hw->regs);
  280. goto err_pdata;
  281. }
  282. hw->irq = platform_get_irq(pdev, 0);
  283. if (hw->irq < 0) {
  284. dev_err(&pdev->dev, "No IRQ specified\n");
  285. err = -ENOENT;
  286. goto err_pdata;
  287. }
  288. err = devm_request_irq(&pdev->dev, hw->irq, nuc900_spi_irq, 0,
  289. pdev->name, hw);
  290. if (err) {
  291. dev_err(&pdev->dev, "Cannot claim IRQ\n");
  292. goto err_pdata;
  293. }
  294. hw->clk = devm_clk_get(&pdev->dev, "spi");
  295. if (IS_ERR(hw->clk)) {
  296. dev_err(&pdev->dev, "No clock for device\n");
  297. err = PTR_ERR(hw->clk);
  298. goto err_pdata;
  299. }
  300. mfp_set_groupg(&pdev->dev, NULL);
  301. nuc900_init_spi(hw);
  302. err = spi_bitbang_start(&hw->bitbang);
  303. if (err) {
  304. dev_err(&pdev->dev, "Failed to register SPI master\n");
  305. goto err_register;
  306. }
  307. return 0;
  308. err_register:
  309. clk_disable(hw->clk);
  310. err_pdata:
  311. spi_master_put(hw->master);
  312. return err;
  313. }
  314. static int nuc900_spi_remove(struct platform_device *dev)
  315. {
  316. struct nuc900_spi *hw = platform_get_drvdata(dev);
  317. spi_bitbang_stop(&hw->bitbang);
  318. clk_disable(hw->clk);
  319. spi_master_put(hw->master);
  320. return 0;
  321. }
  322. static struct platform_driver nuc900_spi_driver = {
  323. .probe = nuc900_spi_probe,
  324. .remove = nuc900_spi_remove,
  325. .driver = {
  326. .name = "nuc900-spi",
  327. },
  328. };
  329. module_platform_driver(nuc900_spi_driver);
  330. MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
  331. MODULE_DESCRIPTION("nuc900 spi driver!");
  332. MODULE_LICENSE("GPL");
  333. MODULE_ALIAS("platform:nuc900-spi");