spi-pxa2xx-pci.c 5.2 KB

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  1. /*
  2. * CE4100's SPI device is more or less the same one as found on PXA
  3. *
  4. */
  5. #include <linux/pci.h>
  6. #include <linux/platform_device.h>
  7. #include <linux/of_device.h>
  8. #include <linux/module.h>
  9. #include <linux/spi/pxa2xx_spi.h>
  10. #include <linux/clk-provider.h>
  11. #include <linux/dmaengine.h>
  12. #include <linux/platform_data/dma-dw.h>
  13. enum {
  14. PORT_CE4100,
  15. PORT_BYT,
  16. PORT_BSW0,
  17. PORT_BSW1,
  18. PORT_BSW2,
  19. PORT_QUARK_X1000,
  20. };
  21. struct pxa_spi_info {
  22. enum pxa_ssp_type type;
  23. int port_id;
  24. int num_chipselect;
  25. unsigned long max_clk_rate;
  26. /* DMA channel request parameters */
  27. void *tx_param;
  28. void *rx_param;
  29. };
  30. static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
  31. static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
  32. static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
  33. static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
  34. static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
  35. static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
  36. static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
  37. static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
  38. static bool lpss_dma_filter(struct dma_chan *chan, void *param)
  39. {
  40. struct dw_dma_slave *dws = param;
  41. if (dws->dma_dev != chan->device->dev)
  42. return false;
  43. chan->private = dws;
  44. return true;
  45. }
  46. static struct pxa_spi_info spi_info_configs[] = {
  47. [PORT_CE4100] = {
  48. .type = PXA25x_SSP,
  49. .port_id = -1,
  50. .num_chipselect = -1,
  51. .max_clk_rate = 3686400,
  52. },
  53. [PORT_BYT] = {
  54. .type = LPSS_BYT_SSP,
  55. .port_id = 0,
  56. .num_chipselect = 1,
  57. .max_clk_rate = 50000000,
  58. .tx_param = &byt_tx_param,
  59. .rx_param = &byt_rx_param,
  60. },
  61. [PORT_BSW0] = {
  62. .type = LPSS_BYT_SSP,
  63. .port_id = 0,
  64. .num_chipselect = 1,
  65. .max_clk_rate = 50000000,
  66. .tx_param = &bsw0_tx_param,
  67. .rx_param = &bsw0_rx_param,
  68. },
  69. [PORT_BSW1] = {
  70. .type = LPSS_BYT_SSP,
  71. .port_id = 1,
  72. .num_chipselect = 1,
  73. .max_clk_rate = 50000000,
  74. .tx_param = &bsw1_tx_param,
  75. .rx_param = &bsw1_rx_param,
  76. },
  77. [PORT_BSW2] = {
  78. .type = LPSS_BYT_SSP,
  79. .port_id = 2,
  80. .num_chipselect = 1,
  81. .max_clk_rate = 50000000,
  82. .tx_param = &bsw2_tx_param,
  83. .rx_param = &bsw2_rx_param,
  84. },
  85. [PORT_QUARK_X1000] = {
  86. .type = QUARK_X1000_SSP,
  87. .port_id = -1,
  88. .num_chipselect = 1,
  89. .max_clk_rate = 50000000,
  90. },
  91. };
  92. static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
  93. const struct pci_device_id *ent)
  94. {
  95. struct platform_device_info pi;
  96. int ret;
  97. struct platform_device *pdev;
  98. struct pxa2xx_spi_master spi_pdata;
  99. struct ssp_device *ssp;
  100. struct pxa_spi_info *c;
  101. char buf[40];
  102. struct pci_dev *dma_dev;
  103. ret = pcim_enable_device(dev);
  104. if (ret)
  105. return ret;
  106. ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
  107. if (ret)
  108. return ret;
  109. c = &spi_info_configs[ent->driver_data];
  110. memset(&spi_pdata, 0, sizeof(spi_pdata));
  111. spi_pdata.num_chipselect = (c->num_chipselect > 0) ?
  112. c->num_chipselect : dev->devfn;
  113. dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
  114. if (c->tx_param) {
  115. struct dw_dma_slave *slave = c->tx_param;
  116. slave->dma_dev = &dma_dev->dev;
  117. slave->src_master = 1;
  118. slave->dst_master = 0;
  119. }
  120. if (c->rx_param) {
  121. struct dw_dma_slave *slave = c->rx_param;
  122. slave->dma_dev = &dma_dev->dev;
  123. slave->src_master = 1;
  124. slave->dst_master = 0;
  125. }
  126. spi_pdata.dma_filter = lpss_dma_filter;
  127. spi_pdata.tx_param = c->tx_param;
  128. spi_pdata.rx_param = c->rx_param;
  129. spi_pdata.enable_dma = c->rx_param && c->tx_param;
  130. ssp = &spi_pdata.ssp;
  131. ssp->phys_base = pci_resource_start(dev, 0);
  132. ssp->mmio_base = pcim_iomap_table(dev)[0];
  133. if (!ssp->mmio_base) {
  134. dev_err(&dev->dev, "failed to ioremap() registers\n");
  135. return -EIO;
  136. }
  137. ssp->irq = dev->irq;
  138. ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
  139. ssp->type = c->type;
  140. snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
  141. ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL,
  142. CLK_IS_ROOT, c->max_clk_rate);
  143. if (IS_ERR(ssp->clk))
  144. return PTR_ERR(ssp->clk);
  145. memset(&pi, 0, sizeof(pi));
  146. pi.parent = &dev->dev;
  147. pi.name = "pxa2xx-spi";
  148. pi.id = ssp->port_id;
  149. pi.data = &spi_pdata;
  150. pi.size_data = sizeof(spi_pdata);
  151. pdev = platform_device_register_full(&pi);
  152. if (IS_ERR(pdev)) {
  153. clk_unregister(ssp->clk);
  154. return PTR_ERR(pdev);
  155. }
  156. pci_set_drvdata(dev, pdev);
  157. return 0;
  158. }
  159. static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
  160. {
  161. struct platform_device *pdev = pci_get_drvdata(dev);
  162. struct pxa2xx_spi_master *spi_pdata;
  163. spi_pdata = dev_get_platdata(&pdev->dev);
  164. platform_device_unregister(pdev);
  165. clk_unregister(spi_pdata->ssp.clk);
  166. }
  167. static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
  168. { PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
  169. { PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
  170. { PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
  171. { PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
  172. { PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
  173. { PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
  174. { },
  175. };
  176. MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
  177. static struct pci_driver pxa2xx_spi_pci_driver = {
  178. .name = "pxa2xx_spi_pci",
  179. .id_table = pxa2xx_spi_pci_devices,
  180. .probe = pxa2xx_spi_pci_probe,
  181. .remove = pxa2xx_spi_pci_remove,
  182. };
  183. module_pci_driver(pxa2xx_spi_pci_driver);
  184. MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
  185. MODULE_LICENSE("GPL v2");
  186. MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");