r8192U_dm.h 6.3 KB

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  1. /*****************************************************************************
  2. * Copyright(c) 2007, RealTEK Technology Inc. All Right Reserved.
  3. *
  4. * Module: Hal819xUsbDM.h (RTL8192 Header H File)
  5. *
  6. *
  7. * Note: For dynamic control definition constant structure.
  8. *
  9. *
  10. * Export:
  11. *
  12. * Abbrev:
  13. *
  14. * History:
  15. * Data Who Remark
  16. * 10/04/2007 MHC Create initial version.
  17. *
  18. *****************************************************************************/
  19. /* Check to see if the file has been included already. */
  20. #ifndef __R8192UDM_H__
  21. #define __R8192UDM_H__
  22. /*--------------------------Define Parameters-------------------------------*/
  23. #define DM_DIG_THRESH_HIGH 40
  24. #define DM_DIG_THRESH_LOW 35
  25. #define DM_DIG_HIGH_PWR_THRESH_HIGH 75
  26. #define DM_DIG_HIGH_PWR_THRESH_LOW 70
  27. #define BW_AUTO_SWITCH_HIGH_LOW 25
  28. #define BW_AUTO_SWITCH_LOW_HIGH 30
  29. #define DM_check_fsync_time_interval 500
  30. #define DM_DIG_BACKOFF 12
  31. #define DM_DIG_MAX 0x36
  32. #define DM_DIG_MIN 0x1c
  33. #define DM_DIG_MIN_Netcore 0x12
  34. #define RxPathSelection_SS_TH_low 30
  35. #define RxPathSelection_diff_TH 18
  36. #define RateAdaptiveTH_High 50
  37. #define RateAdaptiveTH_Low_20M 30
  38. #define RateAdaptiveTH_Low_40M 10
  39. #define VeryLowRSSI 15
  40. #define CTSToSelfTHVal 30
  41. /* defined by vivi, for tx power track */
  42. #define E_FOR_TX_POWER_TRACK 300
  43. /* Dynamic Tx Power Control Threshold */
  44. #define TX_POWER_NEAR_FIELD_THRESH_HIGH 68
  45. #define TX_POWER_NEAR_FIELD_THRESH_LOW 62
  46. /* added by amy for atheros AP */
  47. #define TX_POWER_ATHEROAP_THRESH_HIGH 78
  48. #define TX_POWER_ATHEROAP_THRESH_LOW 72
  49. /* defined by vivi, for showing on UI */
  50. #define Current_Tx_Rate_Reg 0x1b8
  51. #define Initial_Tx_Rate_Reg 0x1b9
  52. #define Tx_Retry_Count_Reg 0x1ac
  53. #define RegC38_TH 20
  54. /*--------------------------Define Parameters-------------------------------*/
  55. /*------------------------------Define structure----------------------------*/
  56. /* 2007/10/04 MH Define upper and lower threshold of DIG enable or disable. */
  57. struct dig {
  58. u8 dig_enable_flag;
  59. u8 dig_algorithm;
  60. u8 dbg_mode;
  61. u8 dig_algorithm_switch;
  62. long rssi_low_thresh;
  63. long rssi_high_thresh;
  64. long rssi_high_power_lowthresh;
  65. long rssi_high_power_highthresh;
  66. u8 dig_state;
  67. u8 dig_highpwr_state;
  68. u8 cur_connect_state;
  69. u8 pre_connect_state;
  70. u8 curpd_thstate;
  71. u8 prepd_thstate;
  72. u8 curcs_ratio_state;
  73. u8 precs_ratio_state;
  74. u32 pre_ig_value;
  75. u32 cur_ig_value;
  76. u8 backoff_val;
  77. u8 rx_gain_range_max;
  78. u8 rx_gain_range_min;
  79. bool initialgain_lowerbound_state;
  80. long rssi_val;
  81. };
  82. typedef enum tag_dynamic_init_gain_state_definition {
  83. DM_STA_DIG_OFF = 0,
  84. DM_STA_DIG_ON,
  85. DM_STA_DIG_MAX
  86. } dm_dig_sta_e;
  87. /* 2007/10/08 MH Define RATR state. */
  88. typedef enum tag_dynamic_ratr_state_definition {
  89. DM_RATR_STA_HIGH = 0,
  90. DM_RATR_STA_MIDDLE = 1,
  91. DM_RATR_STA_LOW = 2,
  92. DM_RATR_STA_MAX
  93. } dm_ratr_sta_e;
  94. /* 2007/10/11 MH Define DIG operation type. */
  95. typedef enum tag_dynamic_init_gain_operation_type_definition {
  96. DIG_TYPE_THRESH_HIGH = 0,
  97. DIG_TYPE_THRESH_LOW = 1,
  98. DIG_TYPE_THRESH_HIGHPWR_HIGH = 2,
  99. DIG_TYPE_THRESH_HIGHPWR_LOW = 3,
  100. DIG_TYPE_DBG_MODE = 4,
  101. DIG_TYPE_RSSI = 5,
  102. DIG_TYPE_ALGORITHM = 6,
  103. DIG_TYPE_BACKOFF = 7,
  104. DIG_TYPE_PWDB_FACTOR = 8,
  105. DIG_TYPE_RX_GAIN_MIN = 9,
  106. DIG_TYPE_RX_GAIN_MAX = 10,
  107. DIG_TYPE_ENABLE = 20,
  108. DIG_TYPE_DISABLE = 30,
  109. DIG_OP_TYPE_MAX
  110. } dm_dig_op_e;
  111. typedef enum tag_dig_algorithm_definition {
  112. DIG_ALGO_BY_FALSE_ALARM = 0,
  113. DIG_ALGO_BY_RSSI = 1,
  114. DIG_ALGO_MAX
  115. } dm_dig_alg_e;
  116. typedef enum tag_dig_dbgmode_definition {
  117. DIG_DBG_OFF = 0,
  118. DIG_DBG_ON = 1,
  119. DIG_DBG_MAX
  120. } dm_dig_dbg_e;
  121. typedef enum tag_dig_connect_definition {
  122. DIG_DISCONNECT = 0,
  123. DIG_CONNECT = 1,
  124. DIG_CONNECT_MAX
  125. } dm_dig_connect_e;
  126. typedef enum tag_dig_packetdetection_threshold_definition {
  127. DIG_PD_AT_LOW_POWER = 0,
  128. DIG_PD_AT_NORMAL_POWER = 1,
  129. DIG_PD_AT_HIGH_POWER = 2,
  130. DIG_PD_MAX
  131. } dm_dig_pd_th_e;
  132. typedef enum tag_dig_cck_cs_ratio_state_definition {
  133. DIG_CS_RATIO_LOWER = 0,
  134. DIG_CS_RATIO_HIGHER = 1,
  135. DIG_CS_MAX
  136. } dm_dig_cs_ratio_e;
  137. struct dynamic_rx_path_sel {
  138. u8 Enable;
  139. u8 DbgMode;
  140. u8 cck_method;
  141. u8 cck_Rx_path;
  142. u8 SS_TH_low;
  143. u8 diff_TH;
  144. u8 disabledRF;
  145. u8 reserved;
  146. u8 rf_rssi[4];
  147. u8 rf_enable_rssi_th[4];
  148. long cck_pwdb_sta[4];
  149. };
  150. typedef enum tag_CCK_Rx_Path_Method_Definition {
  151. CCK_Rx_Version_1 = 0,
  152. CCK_Rx_Version_2 = 1,
  153. CCK_Rx_Version_MAX
  154. } DM_CCK_Rx_Path_Method;
  155. typedef enum tag_DM_DbgMode_Definition {
  156. DM_DBG_OFF = 0,
  157. DM_DBG_ON = 1,
  158. DM_DBG_MAX
  159. } DM_DBG_E;
  160. typedef struct tag_Tx_Config_Cmd_Format {
  161. u32 Op; /* Command packet type. */
  162. u32 Length; /* Command packet length. */
  163. u32 Value;
  164. } DCMD_TXCMD_T, *PDCMD_TXCMD_T;
  165. /*------------------------------Define structure----------------------------*/
  166. /*------------------------Export global variable----------------------------*/
  167. extern struct dig dm_digtable;
  168. extern u8 dm_shadow[16][256];
  169. extern struct dynamic_rx_path_sel DM_RxPathSelTable;
  170. /*------------------------Export global variable----------------------------*/
  171. /*------------------------Export Marco Definition---------------------------*/
  172. /*------------------------Export Marco Definition---------------------------*/
  173. /*--------------------------Exported Function prototype---------------------*/
  174. void init_hal_dm(struct net_device *dev);
  175. void deinit_hal_dm(struct net_device *dev);
  176. void hal_dm_watchdog(struct net_device *dev);
  177. void init_rate_adaptive(struct net_device *dev);
  178. void dm_txpower_trackingcallback(struct work_struct *work);
  179. void dm_restore_dynamic_mechanism_state(struct net_device *dev);
  180. void dm_backup_dynamic_mechanism_state(struct net_device *dev);
  181. void dm_change_dynamic_initgain_thresh(struct net_device *dev,
  182. u32 dm_type, u32 dm_value);
  183. void dm_force_tx_fw_info(struct net_device *dev,
  184. u32 force_type, u32 force_value);
  185. void dm_init_edca_turbo(struct net_device *dev);
  186. void dm_rf_operation_test_callback(unsigned long data);
  187. void dm_rf_pathcheck_workitemcallback(struct work_struct *work);
  188. void dm_fsync_timer_callback(unsigned long data);
  189. void dm_cck_txpower_adjust(struct net_device *dev, bool binch14);
  190. void dm_shadow_init(struct net_device *dev);
  191. void dm_initialize_txpower_tracking(struct net_device *dev);
  192. /*--------------------------Exported Function prototype---------------------*/
  193. #endif /*__R8192UDM_H__ */
  194. /* End of r8192U_dm.h */