intel_quark_dts_thermal.c 12 KB

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  1. /*
  2. * intel_quark_dts_thermal.c
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * Copyright(c) 2015 Intel Corporation.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of version 2 of the GNU General Public License as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * Contact Information:
  21. * Ong Boon Leong <boon.leong.ong@intel.com>
  22. * Intel Malaysia, Penang
  23. *
  24. * BSD LICENSE
  25. *
  26. * Copyright(c) 2015 Intel Corporation.
  27. *
  28. * Redistribution and use in source and binary forms, with or without
  29. * modification, are permitted provided that the following conditions
  30. * are met:
  31. *
  32. * * Redistributions of source code must retain the above copyright
  33. * notice, this list of conditions and the following disclaimer.
  34. * * Redistributions in binary form must reproduce the above copyright
  35. * notice, this list of conditions and the following disclaimer in
  36. * the documentation and/or other materials provided with the
  37. * distribution.
  38. * * Neither the name of Intel Corporation nor the names of its
  39. * contributors may be used to endorse or promote products derived
  40. * from this software without specific prior written permission.
  41. *
  42. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  43. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  44. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  45. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  46. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  47. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  48. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  49. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  50. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  51. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  52. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  53. *
  54. * Quark DTS thermal driver is implemented by referencing
  55. * intel_soc_dts_thermal.c.
  56. */
  57. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  58. #include <linux/module.h>
  59. #include <linux/slab.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/thermal.h>
  62. #include <asm/cpu_device_id.h>
  63. #include <asm/iosf_mbi.h>
  64. #define X86_FAMILY_QUARK 0x5
  65. #define X86_MODEL_QUARK_X1000 0x9
  66. /* DTS reset is programmed via QRK_MBI_UNIT_SOC */
  67. #define QRK_DTS_REG_OFFSET_RESET 0x34
  68. #define QRK_DTS_RESET_BIT BIT(0)
  69. /* DTS enable is programmed via QRK_MBI_UNIT_RMU */
  70. #define QRK_DTS_REG_OFFSET_ENABLE 0xB0
  71. #define QRK_DTS_ENABLE_BIT BIT(15)
  72. /* Temperature Register is read via QRK_MBI_UNIT_RMU */
  73. #define QRK_DTS_REG_OFFSET_TEMP 0xB1
  74. #define QRK_DTS_MASK_TEMP 0xFF
  75. #define QRK_DTS_OFFSET_TEMP 0
  76. #define QRK_DTS_OFFSET_REL_TEMP 16
  77. #define QRK_DTS_TEMP_BASE 50
  78. /* Programmable Trip Point Register is configured via QRK_MBI_UNIT_RMU */
  79. #define QRK_DTS_REG_OFFSET_PTPS 0xB2
  80. #define QRK_DTS_MASK_TP_THRES 0xFF
  81. #define QRK_DTS_SHIFT_TP 8
  82. #define QRK_DTS_ID_TP_CRITICAL 0
  83. #define QRK_DTS_SAFE_TP_THRES 105
  84. /* Thermal Sensor Register Lock */
  85. #define QRK_DTS_REG_OFFSET_LOCK 0x71
  86. #define QRK_DTS_LOCK_BIT BIT(5)
  87. /* Quark DTS has 2 trip points: hot & catastrophic */
  88. #define QRK_MAX_DTS_TRIPS 2
  89. /* If DTS not locked, all trip points are configurable */
  90. #define QRK_DTS_WR_MASK_SET 0x3
  91. /* If DTS locked, all trip points are not configurable */
  92. #define QRK_DTS_WR_MASK_CLR 0
  93. #define DEFAULT_POLL_DELAY 2000
  94. struct soc_sensor_entry {
  95. bool locked;
  96. u32 store_ptps;
  97. u32 store_dts_enable;
  98. enum thermal_device_mode mode;
  99. struct thermal_zone_device *tzone;
  100. };
  101. static struct soc_sensor_entry *soc_dts;
  102. static int polling_delay = DEFAULT_POLL_DELAY;
  103. module_param(polling_delay, int, 0644);
  104. MODULE_PARM_DESC(polling_delay,
  105. "Polling interval for checking trip points (in milliseconds)");
  106. static DEFINE_MUTEX(dts_update_mutex);
  107. static int soc_dts_enable(struct thermal_zone_device *tzd)
  108. {
  109. u32 out;
  110. struct soc_sensor_entry *aux_entry = tzd->devdata;
  111. int ret;
  112. ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ,
  113. QRK_DTS_REG_OFFSET_ENABLE, &out);
  114. if (ret)
  115. return ret;
  116. if (out & QRK_DTS_ENABLE_BIT) {
  117. aux_entry->mode = THERMAL_DEVICE_ENABLED;
  118. return 0;
  119. }
  120. if (!aux_entry->locked) {
  121. out |= QRK_DTS_ENABLE_BIT;
  122. ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE,
  123. QRK_DTS_REG_OFFSET_ENABLE, out);
  124. if (ret)
  125. return ret;
  126. aux_entry->mode = THERMAL_DEVICE_ENABLED;
  127. } else {
  128. aux_entry->mode = THERMAL_DEVICE_DISABLED;
  129. pr_info("DTS is locked. Cannot enable DTS\n");
  130. ret = -EPERM;
  131. }
  132. return ret;
  133. }
  134. static int soc_dts_disable(struct thermal_zone_device *tzd)
  135. {
  136. u32 out;
  137. struct soc_sensor_entry *aux_entry = tzd->devdata;
  138. int ret;
  139. ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ,
  140. QRK_DTS_REG_OFFSET_ENABLE, &out);
  141. if (ret)
  142. return ret;
  143. if (!(out & QRK_DTS_ENABLE_BIT)) {
  144. aux_entry->mode = THERMAL_DEVICE_DISABLED;
  145. return 0;
  146. }
  147. if (!aux_entry->locked) {
  148. out &= ~QRK_DTS_ENABLE_BIT;
  149. ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE,
  150. QRK_DTS_REG_OFFSET_ENABLE, out);
  151. if (ret)
  152. return ret;
  153. aux_entry->mode = THERMAL_DEVICE_DISABLED;
  154. } else {
  155. aux_entry->mode = THERMAL_DEVICE_ENABLED;
  156. pr_info("DTS is locked. Cannot disable DTS\n");
  157. ret = -EPERM;
  158. }
  159. return ret;
  160. }
  161. static int _get_trip_temp(int trip, int *temp)
  162. {
  163. int status;
  164. u32 out;
  165. mutex_lock(&dts_update_mutex);
  166. status = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ,
  167. QRK_DTS_REG_OFFSET_PTPS, &out);
  168. mutex_unlock(&dts_update_mutex);
  169. if (status)
  170. return status;
  171. /*
  172. * Thermal Sensor Programmable Trip Point Register has 8-bit
  173. * fields for critical (catastrophic) and hot set trip point
  174. * thresholds. The threshold value is always offset by its
  175. * temperature base (50 degree Celsius).
  176. */
  177. *temp = (out >> (trip * QRK_DTS_SHIFT_TP)) & QRK_DTS_MASK_TP_THRES;
  178. *temp -= QRK_DTS_TEMP_BASE;
  179. return 0;
  180. }
  181. static inline int sys_get_trip_temp(struct thermal_zone_device *tzd,
  182. int trip, int *temp)
  183. {
  184. return _get_trip_temp(trip, temp);
  185. }
  186. static inline int sys_get_crit_temp(struct thermal_zone_device *tzd, int *temp)
  187. {
  188. return _get_trip_temp(QRK_DTS_ID_TP_CRITICAL, temp);
  189. }
  190. static int update_trip_temp(struct soc_sensor_entry *aux_entry,
  191. int trip, int temp)
  192. {
  193. u32 out;
  194. u32 temp_out;
  195. u32 store_ptps;
  196. int ret;
  197. mutex_lock(&dts_update_mutex);
  198. if (aux_entry->locked) {
  199. ret = -EPERM;
  200. goto failed;
  201. }
  202. ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ,
  203. QRK_DTS_REG_OFFSET_PTPS, &store_ptps);
  204. if (ret)
  205. goto failed;
  206. /*
  207. * Protection against unsafe trip point thresdhold value.
  208. * As Quark X1000 data-sheet does not provide any recommendation
  209. * regarding the safe trip point threshold value to use, we choose
  210. * the safe value according to the threshold value set by UEFI BIOS.
  211. */
  212. if (temp > QRK_DTS_SAFE_TP_THRES)
  213. temp = QRK_DTS_SAFE_TP_THRES;
  214. /*
  215. * Thermal Sensor Programmable Trip Point Register has 8-bit
  216. * fields for critical (catastrophic) and hot set trip point
  217. * thresholds. The threshold value is always offset by its
  218. * temperature base (50 degree Celsius).
  219. */
  220. temp_out = temp + QRK_DTS_TEMP_BASE;
  221. out = (store_ptps & ~(QRK_DTS_MASK_TP_THRES <<
  222. (trip * QRK_DTS_SHIFT_TP)));
  223. out |= (temp_out & QRK_DTS_MASK_TP_THRES) <<
  224. (trip * QRK_DTS_SHIFT_TP);
  225. ret = iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE,
  226. QRK_DTS_REG_OFFSET_PTPS, out);
  227. failed:
  228. mutex_unlock(&dts_update_mutex);
  229. return ret;
  230. }
  231. static inline int sys_set_trip_temp(struct thermal_zone_device *tzd, int trip,
  232. int temp)
  233. {
  234. return update_trip_temp(tzd->devdata, trip, temp);
  235. }
  236. static int sys_get_trip_type(struct thermal_zone_device *thermal,
  237. int trip, enum thermal_trip_type *type)
  238. {
  239. if (trip)
  240. *type = THERMAL_TRIP_HOT;
  241. else
  242. *type = THERMAL_TRIP_CRITICAL;
  243. return 0;
  244. }
  245. static int sys_get_curr_temp(struct thermal_zone_device *tzd,
  246. int *temp)
  247. {
  248. u32 out;
  249. int ret;
  250. mutex_lock(&dts_update_mutex);
  251. ret = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ,
  252. QRK_DTS_REG_OFFSET_TEMP, &out);
  253. mutex_unlock(&dts_update_mutex);
  254. if (ret)
  255. return ret;
  256. /*
  257. * Thermal Sensor Temperature Register has 8-bit field
  258. * for temperature value (offset by temperature base
  259. * 50 degree Celsius).
  260. */
  261. out = (out >> QRK_DTS_OFFSET_TEMP) & QRK_DTS_MASK_TEMP;
  262. *temp = out - QRK_DTS_TEMP_BASE;
  263. return 0;
  264. }
  265. static int sys_get_mode(struct thermal_zone_device *tzd,
  266. enum thermal_device_mode *mode)
  267. {
  268. struct soc_sensor_entry *aux_entry = tzd->devdata;
  269. *mode = aux_entry->mode;
  270. return 0;
  271. }
  272. static int sys_set_mode(struct thermal_zone_device *tzd,
  273. enum thermal_device_mode mode)
  274. {
  275. int ret;
  276. mutex_lock(&dts_update_mutex);
  277. if (mode == THERMAL_DEVICE_ENABLED)
  278. ret = soc_dts_enable(tzd);
  279. else
  280. ret = soc_dts_disable(tzd);
  281. mutex_unlock(&dts_update_mutex);
  282. return ret;
  283. }
  284. static struct thermal_zone_device_ops tzone_ops = {
  285. .get_temp = sys_get_curr_temp,
  286. .get_trip_temp = sys_get_trip_temp,
  287. .get_trip_type = sys_get_trip_type,
  288. .set_trip_temp = sys_set_trip_temp,
  289. .get_crit_temp = sys_get_crit_temp,
  290. .get_mode = sys_get_mode,
  291. .set_mode = sys_set_mode,
  292. };
  293. static void free_soc_dts(struct soc_sensor_entry *aux_entry)
  294. {
  295. if (aux_entry) {
  296. if (!aux_entry->locked) {
  297. mutex_lock(&dts_update_mutex);
  298. iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE,
  299. QRK_DTS_REG_OFFSET_ENABLE,
  300. aux_entry->store_dts_enable);
  301. iosf_mbi_write(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_WRITE,
  302. QRK_DTS_REG_OFFSET_PTPS,
  303. aux_entry->store_ptps);
  304. mutex_unlock(&dts_update_mutex);
  305. }
  306. thermal_zone_device_unregister(aux_entry->tzone);
  307. kfree(aux_entry);
  308. }
  309. }
  310. static struct soc_sensor_entry *alloc_soc_dts(void)
  311. {
  312. struct soc_sensor_entry *aux_entry;
  313. int err;
  314. u32 out;
  315. int wr_mask;
  316. aux_entry = kzalloc(sizeof(*aux_entry), GFP_KERNEL);
  317. if (!aux_entry) {
  318. err = -ENOMEM;
  319. return ERR_PTR(-ENOMEM);
  320. }
  321. /* Check if DTS register is locked */
  322. err = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ,
  323. QRK_DTS_REG_OFFSET_LOCK,
  324. &out);
  325. if (err)
  326. goto err_ret;
  327. if (out & QRK_DTS_LOCK_BIT) {
  328. aux_entry->locked = true;
  329. wr_mask = QRK_DTS_WR_MASK_CLR;
  330. } else {
  331. aux_entry->locked = false;
  332. wr_mask = QRK_DTS_WR_MASK_SET;
  333. }
  334. /* Store DTS default state if DTS registers are not locked */
  335. if (!aux_entry->locked) {
  336. /* Store DTS default enable for restore on exit */
  337. err = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ,
  338. QRK_DTS_REG_OFFSET_ENABLE,
  339. &aux_entry->store_dts_enable);
  340. if (err)
  341. goto err_ret;
  342. /* Store DTS default PTPS register for restore on exit */
  343. err = iosf_mbi_read(QRK_MBI_UNIT_RMU, QRK_MBI_RMU_READ,
  344. QRK_DTS_REG_OFFSET_PTPS,
  345. &aux_entry->store_ptps);
  346. if (err)
  347. goto err_ret;
  348. }
  349. aux_entry->tzone = thermal_zone_device_register("quark_dts",
  350. QRK_MAX_DTS_TRIPS,
  351. wr_mask,
  352. aux_entry, &tzone_ops, NULL, 0, polling_delay);
  353. if (IS_ERR(aux_entry->tzone)) {
  354. err = PTR_ERR(aux_entry->tzone);
  355. goto err_ret;
  356. }
  357. mutex_lock(&dts_update_mutex);
  358. err = soc_dts_enable(aux_entry->tzone);
  359. mutex_unlock(&dts_update_mutex);
  360. if (err)
  361. goto err_aux_status;
  362. return aux_entry;
  363. err_aux_status:
  364. thermal_zone_device_unregister(aux_entry->tzone);
  365. err_ret:
  366. kfree(aux_entry);
  367. return ERR_PTR(err);
  368. }
  369. static const struct x86_cpu_id qrk_thermal_ids[] __initconst = {
  370. { X86_VENDOR_INTEL, X86_FAMILY_QUARK, X86_MODEL_QUARK_X1000 },
  371. {}
  372. };
  373. MODULE_DEVICE_TABLE(x86cpu, qrk_thermal_ids);
  374. static int __init intel_quark_thermal_init(void)
  375. {
  376. int err = 0;
  377. if (!x86_match_cpu(qrk_thermal_ids) || !iosf_mbi_available())
  378. return -ENODEV;
  379. soc_dts = alloc_soc_dts();
  380. if (IS_ERR(soc_dts)) {
  381. err = PTR_ERR(soc_dts);
  382. goto err_free;
  383. }
  384. return 0;
  385. err_free:
  386. free_soc_dts(soc_dts);
  387. return err;
  388. }
  389. static void __exit intel_quark_thermal_exit(void)
  390. {
  391. free_soc_dts(soc_dts);
  392. }
  393. module_init(intel_quark_thermal_init)
  394. module_exit(intel_quark_thermal_exit)
  395. MODULE_DESCRIPTION("Intel Quark DTS Thermal Driver");
  396. MODULE_AUTHOR("Ong Boon Leong <boon.leong.ong@intel.com>");
  397. MODULE_LICENSE("Dual BSD/GPL");