8250_dma.c 6.0 KB

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  1. /*
  2. * 8250_dma.c - DMA Engine API support for 8250.c
  3. *
  4. * Copyright (C) 2013 Intel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/tty.h>
  12. #include <linux/tty_flip.h>
  13. #include <linux/serial_reg.h>
  14. #include <linux/dma-mapping.h>
  15. #include "8250.h"
  16. static void __dma_tx_complete(void *param)
  17. {
  18. struct uart_8250_port *p = param;
  19. struct uart_8250_dma *dma = p->dma;
  20. struct circ_buf *xmit = &p->port.state->xmit;
  21. unsigned long flags;
  22. int ret;
  23. dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
  24. UART_XMIT_SIZE, DMA_TO_DEVICE);
  25. spin_lock_irqsave(&p->port.lock, flags);
  26. dma->tx_running = 0;
  27. xmit->tail += dma->tx_size;
  28. xmit->tail &= UART_XMIT_SIZE - 1;
  29. p->port.icount.tx += dma->tx_size;
  30. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  31. uart_write_wakeup(&p->port);
  32. ret = serial8250_tx_dma(p);
  33. if (ret) {
  34. p->ier |= UART_IER_THRI;
  35. serial_port_out(&p->port, UART_IER, p->ier);
  36. }
  37. spin_unlock_irqrestore(&p->port.lock, flags);
  38. }
  39. static void __dma_rx_complete(void *param)
  40. {
  41. struct uart_8250_port *p = param;
  42. struct uart_8250_dma *dma = p->dma;
  43. struct tty_port *tty_port = &p->port.state->port;
  44. struct dma_tx_state state;
  45. int count;
  46. dma->rx_running = 0;
  47. dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
  48. count = dma->rx_size - state.residue;
  49. tty_insert_flip_string(tty_port, dma->rx_buf, count);
  50. p->port.icount.rx += count;
  51. tty_flip_buffer_push(tty_port);
  52. }
  53. int serial8250_tx_dma(struct uart_8250_port *p)
  54. {
  55. struct uart_8250_dma *dma = p->dma;
  56. struct circ_buf *xmit = &p->port.state->xmit;
  57. struct dma_async_tx_descriptor *desc;
  58. int ret;
  59. if (uart_tx_stopped(&p->port) || dma->tx_running ||
  60. uart_circ_empty(xmit))
  61. return 0;
  62. dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  63. desc = dmaengine_prep_slave_single(dma->txchan,
  64. dma->tx_addr + xmit->tail,
  65. dma->tx_size, DMA_MEM_TO_DEV,
  66. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  67. if (!desc) {
  68. ret = -EBUSY;
  69. goto err;
  70. }
  71. dma->tx_running = 1;
  72. desc->callback = __dma_tx_complete;
  73. desc->callback_param = p;
  74. dma->tx_cookie = dmaengine_submit(desc);
  75. dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
  76. UART_XMIT_SIZE, DMA_TO_DEVICE);
  77. dma_async_issue_pending(dma->txchan);
  78. if (dma->tx_err) {
  79. dma->tx_err = 0;
  80. if (p->ier & UART_IER_THRI) {
  81. p->ier &= ~UART_IER_THRI;
  82. serial_out(p, UART_IER, p->ier);
  83. }
  84. }
  85. return 0;
  86. err:
  87. dma->tx_err = 1;
  88. return ret;
  89. }
  90. int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
  91. {
  92. struct uart_8250_dma *dma = p->dma;
  93. struct dma_async_tx_descriptor *desc;
  94. switch (iir & 0x3f) {
  95. case UART_IIR_RLSI:
  96. /* 8250_core handles errors and break interrupts */
  97. return -EIO;
  98. case UART_IIR_RX_TIMEOUT:
  99. /*
  100. * If RCVR FIFO trigger level was not reached, complete the
  101. * transfer and let 8250_core copy the remaining data.
  102. */
  103. if (dma->rx_running) {
  104. dmaengine_pause(dma->rxchan);
  105. __dma_rx_complete(p);
  106. dmaengine_terminate_all(dma->rxchan);
  107. }
  108. return -ETIMEDOUT;
  109. default:
  110. break;
  111. }
  112. if (dma->rx_running)
  113. return 0;
  114. desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
  115. dma->rx_size, DMA_DEV_TO_MEM,
  116. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  117. if (!desc)
  118. return -EBUSY;
  119. dma->rx_running = 1;
  120. desc->callback = __dma_rx_complete;
  121. desc->callback_param = p;
  122. dma->rx_cookie = dmaengine_submit(desc);
  123. dma_async_issue_pending(dma->rxchan);
  124. return 0;
  125. }
  126. int serial8250_request_dma(struct uart_8250_port *p)
  127. {
  128. struct uart_8250_dma *dma = p->dma;
  129. dma_cap_mask_t mask;
  130. /* Default slave configuration parameters */
  131. dma->rxconf.direction = DMA_DEV_TO_MEM;
  132. dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  133. dma->rxconf.src_addr = p->port.mapbase + UART_RX;
  134. dma->txconf.direction = DMA_MEM_TO_DEV;
  135. dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  136. dma->txconf.dst_addr = p->port.mapbase + UART_TX;
  137. dma_cap_zero(mask);
  138. dma_cap_set(DMA_SLAVE, mask);
  139. /* Get a channel for RX */
  140. dma->rxchan = dma_request_slave_channel_compat(mask,
  141. dma->fn, dma->rx_param,
  142. p->port.dev, "rx");
  143. if (!dma->rxchan)
  144. return -ENODEV;
  145. dmaengine_slave_config(dma->rxchan, &dma->rxconf);
  146. /* Get a channel for TX */
  147. dma->txchan = dma_request_slave_channel_compat(mask,
  148. dma->fn, dma->tx_param,
  149. p->port.dev, "tx");
  150. if (!dma->txchan) {
  151. dma_release_channel(dma->rxchan);
  152. return -ENODEV;
  153. }
  154. dmaengine_slave_config(dma->txchan, &dma->txconf);
  155. /* RX buffer */
  156. if (!dma->rx_size)
  157. dma->rx_size = PAGE_SIZE;
  158. dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
  159. &dma->rx_addr, GFP_KERNEL);
  160. if (!dma->rx_buf)
  161. goto err;
  162. /* TX buffer */
  163. dma->tx_addr = dma_map_single(dma->txchan->device->dev,
  164. p->port.state->xmit.buf,
  165. UART_XMIT_SIZE,
  166. DMA_TO_DEVICE);
  167. if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
  168. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
  169. dma->rx_buf, dma->rx_addr);
  170. goto err;
  171. }
  172. dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
  173. return 0;
  174. err:
  175. dma_release_channel(dma->rxchan);
  176. dma_release_channel(dma->txchan);
  177. return -ENOMEM;
  178. }
  179. EXPORT_SYMBOL_GPL(serial8250_request_dma);
  180. void serial8250_release_dma(struct uart_8250_port *p)
  181. {
  182. struct uart_8250_dma *dma = p->dma;
  183. if (!dma)
  184. return;
  185. /* Release RX resources */
  186. dmaengine_terminate_all(dma->rxchan);
  187. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
  188. dma->rx_addr);
  189. dma_release_channel(dma->rxchan);
  190. dma->rxchan = NULL;
  191. /* Release TX resources */
  192. dmaengine_terminate_all(dma->txchan);
  193. dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
  194. UART_XMIT_SIZE, DMA_TO_DEVICE);
  195. dma_release_channel(dma->txchan);
  196. dma->txchan = NULL;
  197. dma->tx_running = 0;
  198. dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
  199. }
  200. EXPORT_SYMBOL_GPL(serial8250_release_dma);