dz.c 22 KB

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  1. /*
  2. * dz.c: Serial port driver for DECstations equipped
  3. * with the DZ chipset.
  4. *
  5. * Copyright (C) 1998 Olivier A. D. Lebaillif
  6. *
  7. * Email: olivier.lebaillif@ifrsys.com
  8. *
  9. * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
  10. *
  11. * [31-AUG-98] triemer
  12. * Changed IRQ to use Harald's dec internals interrupts.h
  13. * removed base_addr code - moving address assignment to setup.c
  14. * Changed name of dz_init to rs_init to be consistent with tc code
  15. * [13-NOV-98] triemer fixed code to receive characters
  16. * after patches by harald to irq code.
  17. * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
  18. * field from "current" - somewhere between 2.1.121 and 2.1.131
  19. Qua Jun 27 15:02:26 BRT 2001
  20. * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
  21. *
  22. * Parts (C) 1999 David Airlie, airlied@linux.ie
  23. * [07-SEP-99] Bugfixes
  24. *
  25. * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
  26. * Converted to new serial core
  27. */
  28. #undef DEBUG_DZ
  29. #if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/bitops.h>
  33. #include <linux/compiler.h>
  34. #include <linux/console.h>
  35. #include <linux/delay.h>
  36. #include <linux/errno.h>
  37. #include <linux/init.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/ioport.h>
  40. #include <linux/kernel.h>
  41. #include <linux/major.h>
  42. #include <linux/module.h>
  43. #include <linux/serial.h>
  44. #include <linux/serial_core.h>
  45. #include <linux/sysrq.h>
  46. #include <linux/tty.h>
  47. #include <linux/tty_flip.h>
  48. #include <linux/atomic.h>
  49. #include <asm/bootinfo.h>
  50. #include <asm/io.h>
  51. #include <asm/dec/interrupts.h>
  52. #include <asm/dec/kn01.h>
  53. #include <asm/dec/kn02.h>
  54. #include <asm/dec/machtype.h>
  55. #include <asm/dec/prom.h>
  56. #include <asm/dec/system.h>
  57. #include "dz.h"
  58. MODULE_DESCRIPTION("DECstation DZ serial driver");
  59. MODULE_LICENSE("GPL");
  60. static char dz_name[] __initdata = "DECstation DZ serial driver version ";
  61. static char dz_version[] __initdata = "1.04";
  62. struct dz_port {
  63. struct dz_mux *mux;
  64. struct uart_port port;
  65. unsigned int cflag;
  66. };
  67. struct dz_mux {
  68. struct dz_port dport[DZ_NB_PORT];
  69. atomic_t map_guard;
  70. atomic_t irq_guard;
  71. int initialised;
  72. };
  73. static struct dz_mux dz_mux;
  74. static inline struct dz_port *to_dport(struct uart_port *uport)
  75. {
  76. return container_of(uport, struct dz_port, port);
  77. }
  78. /*
  79. * ------------------------------------------------------------
  80. * dz_in () and dz_out ()
  81. *
  82. * These routines are used to access the registers of the DZ
  83. * chip, hiding relocation differences between implementation.
  84. * ------------------------------------------------------------
  85. */
  86. static u16 dz_in(struct dz_port *dport, unsigned offset)
  87. {
  88. void __iomem *addr = dport->port.membase + offset;
  89. return readw(addr);
  90. }
  91. static void dz_out(struct dz_port *dport, unsigned offset, u16 value)
  92. {
  93. void __iomem *addr = dport->port.membase + offset;
  94. writew(value, addr);
  95. }
  96. /*
  97. * ------------------------------------------------------------
  98. * rs_stop () and rs_start ()
  99. *
  100. * These routines are called before setting or resetting
  101. * tty->stopped. They enable or disable transmitter interrupts,
  102. * as necessary.
  103. * ------------------------------------------------------------
  104. */
  105. static void dz_stop_tx(struct uart_port *uport)
  106. {
  107. struct dz_port *dport = to_dport(uport);
  108. u16 tmp, mask = 1 << dport->port.line;
  109. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  110. tmp &= ~mask; /* clear the TX flag */
  111. dz_out(dport, DZ_TCR, tmp);
  112. }
  113. static void dz_start_tx(struct uart_port *uport)
  114. {
  115. struct dz_port *dport = to_dport(uport);
  116. u16 tmp, mask = 1 << dport->port.line;
  117. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  118. tmp |= mask; /* set the TX flag */
  119. dz_out(dport, DZ_TCR, tmp);
  120. }
  121. static void dz_stop_rx(struct uart_port *uport)
  122. {
  123. struct dz_port *dport = to_dport(uport);
  124. dport->cflag &= ~DZ_RXENAB;
  125. dz_out(dport, DZ_LPR, dport->cflag);
  126. }
  127. /*
  128. * ------------------------------------------------------------
  129. *
  130. * Here start the interrupt handling routines. All of the following
  131. * subroutines are declared as inline and are folded into
  132. * dz_interrupt. They were separated out for readability's sake.
  133. *
  134. * Note: dz_interrupt() is a "fast" interrupt, which means that it
  135. * runs with interrupts turned off. People who may want to modify
  136. * dz_interrupt() should try to keep the interrupt handler as fast as
  137. * possible. After you are done making modifications, it is not a bad
  138. * idea to do:
  139. *
  140. * make drivers/serial/dz.s
  141. *
  142. * and look at the resulting assemble code in dz.s.
  143. *
  144. * ------------------------------------------------------------
  145. */
  146. /*
  147. * ------------------------------------------------------------
  148. * receive_char ()
  149. *
  150. * This routine deals with inputs from any lines.
  151. * ------------------------------------------------------------
  152. */
  153. static inline void dz_receive_chars(struct dz_mux *mux)
  154. {
  155. struct uart_port *uport;
  156. struct dz_port *dport = &mux->dport[0];
  157. struct uart_icount *icount;
  158. int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
  159. unsigned char ch, flag;
  160. u16 status;
  161. int i;
  162. while ((status = dz_in(dport, DZ_RBUF)) & DZ_DVAL) {
  163. dport = &mux->dport[LINE(status)];
  164. uport = &dport->port;
  165. ch = UCHAR(status); /* grab the char */
  166. flag = TTY_NORMAL;
  167. icount = &uport->icount;
  168. icount->rx++;
  169. if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
  170. /*
  171. * There is no separate BREAK status bit, so treat
  172. * null characters with framing errors as BREAKs;
  173. * normally, otherwise. For this move the Framing
  174. * Error bit to a simulated BREAK bit.
  175. */
  176. if (!ch) {
  177. status |= (status & DZ_FERR) >>
  178. (ffs(DZ_FERR) - ffs(DZ_BREAK));
  179. status &= ~DZ_FERR;
  180. }
  181. /* Handle SysRq/SAK & keep track of the statistics. */
  182. if (status & DZ_BREAK) {
  183. icount->brk++;
  184. if (uart_handle_break(uport))
  185. continue;
  186. } else if (status & DZ_FERR)
  187. icount->frame++;
  188. else if (status & DZ_PERR)
  189. icount->parity++;
  190. if (status & DZ_OERR)
  191. icount->overrun++;
  192. status &= uport->read_status_mask;
  193. if (status & DZ_BREAK)
  194. flag = TTY_BREAK;
  195. else if (status & DZ_FERR)
  196. flag = TTY_FRAME;
  197. else if (status & DZ_PERR)
  198. flag = TTY_PARITY;
  199. }
  200. if (uart_handle_sysrq_char(uport, ch))
  201. continue;
  202. uart_insert_char(uport, status, DZ_OERR, ch, flag);
  203. lines_rx[LINE(status)] = 1;
  204. }
  205. for (i = 0; i < DZ_NB_PORT; i++)
  206. if (lines_rx[i])
  207. tty_flip_buffer_push(&mux->dport[i].port.state->port);
  208. }
  209. /*
  210. * ------------------------------------------------------------
  211. * transmit_char ()
  212. *
  213. * This routine deals with outputs to any lines.
  214. * ------------------------------------------------------------
  215. */
  216. static inline void dz_transmit_chars(struct dz_mux *mux)
  217. {
  218. struct dz_port *dport = &mux->dport[0];
  219. struct circ_buf *xmit;
  220. unsigned char tmp;
  221. u16 status;
  222. status = dz_in(dport, DZ_CSR);
  223. dport = &mux->dport[LINE(status)];
  224. xmit = &dport->port.state->xmit;
  225. if (dport->port.x_char) { /* XON/XOFF chars */
  226. dz_out(dport, DZ_TDR, dport->port.x_char);
  227. dport->port.icount.tx++;
  228. dport->port.x_char = 0;
  229. return;
  230. }
  231. /* If nothing to do or stopped or hardware stopped. */
  232. if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
  233. spin_lock(&dport->port.lock);
  234. dz_stop_tx(&dport->port);
  235. spin_unlock(&dport->port.lock);
  236. return;
  237. }
  238. /*
  239. * If something to do... (remember the dz has no output fifo,
  240. * so we go one char at a time) :-<
  241. */
  242. tmp = xmit->buf[xmit->tail];
  243. xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
  244. dz_out(dport, DZ_TDR, tmp);
  245. dport->port.icount.tx++;
  246. if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
  247. uart_write_wakeup(&dport->port);
  248. /* Are we are done. */
  249. if (uart_circ_empty(xmit)) {
  250. spin_lock(&dport->port.lock);
  251. dz_stop_tx(&dport->port);
  252. spin_unlock(&dport->port.lock);
  253. }
  254. }
  255. /*
  256. * ------------------------------------------------------------
  257. * check_modem_status()
  258. *
  259. * DS 3100 & 5100: Only valid for the MODEM line, duh!
  260. * DS 5000/200: Valid for the MODEM and PRINTER line.
  261. * ------------------------------------------------------------
  262. */
  263. static inline void check_modem_status(struct dz_port *dport)
  264. {
  265. /*
  266. * FIXME:
  267. * 1. No status change interrupt; use a timer.
  268. * 2. Handle the 3100/5000 as appropriate. --macro
  269. */
  270. u16 status;
  271. /* If not the modem line just return. */
  272. if (dport->port.line != DZ_MODEM)
  273. return;
  274. status = dz_in(dport, DZ_MSR);
  275. /* it's easy, since DSR2 is the only bit in the register */
  276. if (status)
  277. dport->port.icount.dsr++;
  278. }
  279. /*
  280. * ------------------------------------------------------------
  281. * dz_interrupt ()
  282. *
  283. * this is the main interrupt routine for the DZ chip.
  284. * It deals with the multiple ports.
  285. * ------------------------------------------------------------
  286. */
  287. static irqreturn_t dz_interrupt(int irq, void *dev_id)
  288. {
  289. struct dz_mux *mux = dev_id;
  290. struct dz_port *dport = &mux->dport[0];
  291. u16 status;
  292. /* get the reason why we just got an irq */
  293. status = dz_in(dport, DZ_CSR);
  294. if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
  295. dz_receive_chars(mux);
  296. if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
  297. dz_transmit_chars(mux);
  298. return IRQ_HANDLED;
  299. }
  300. /*
  301. * -------------------------------------------------------------------
  302. * Here ends the DZ interrupt routines.
  303. * -------------------------------------------------------------------
  304. */
  305. static unsigned int dz_get_mctrl(struct uart_port *uport)
  306. {
  307. /*
  308. * FIXME: Handle the 3100/5000 as appropriate. --macro
  309. */
  310. struct dz_port *dport = to_dport(uport);
  311. unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  312. if (dport->port.line == DZ_MODEM) {
  313. if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
  314. mctrl &= ~TIOCM_DSR;
  315. }
  316. return mctrl;
  317. }
  318. static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
  319. {
  320. /*
  321. * FIXME: Handle the 3100/5000 as appropriate. --macro
  322. */
  323. struct dz_port *dport = to_dport(uport);
  324. u16 tmp;
  325. if (dport->port.line == DZ_MODEM) {
  326. tmp = dz_in(dport, DZ_TCR);
  327. if (mctrl & TIOCM_DTR)
  328. tmp &= ~DZ_MODEM_DTR;
  329. else
  330. tmp |= DZ_MODEM_DTR;
  331. dz_out(dport, DZ_TCR, tmp);
  332. }
  333. }
  334. /*
  335. * -------------------------------------------------------------------
  336. * startup ()
  337. *
  338. * various initialization tasks
  339. * -------------------------------------------------------------------
  340. */
  341. static int dz_startup(struct uart_port *uport)
  342. {
  343. struct dz_port *dport = to_dport(uport);
  344. struct dz_mux *mux = dport->mux;
  345. unsigned long flags;
  346. int irq_guard;
  347. int ret;
  348. u16 tmp;
  349. irq_guard = atomic_add_return(1, &mux->irq_guard);
  350. if (irq_guard != 1)
  351. return 0;
  352. ret = request_irq(dport->port.irq, dz_interrupt,
  353. IRQF_SHARED, "dz", mux);
  354. if (ret) {
  355. atomic_add(-1, &mux->irq_guard);
  356. printk(KERN_ERR "dz: Cannot get IRQ %d!\n", dport->port.irq);
  357. return ret;
  358. }
  359. spin_lock_irqsave(&dport->port.lock, flags);
  360. /* Enable interrupts. */
  361. tmp = dz_in(dport, DZ_CSR);
  362. tmp |= DZ_RIE | DZ_TIE;
  363. dz_out(dport, DZ_CSR, tmp);
  364. spin_unlock_irqrestore(&dport->port.lock, flags);
  365. return 0;
  366. }
  367. /*
  368. * -------------------------------------------------------------------
  369. * shutdown ()
  370. *
  371. * This routine will shutdown a serial port; interrupts are disabled, and
  372. * DTR is dropped if the hangup on close termio flag is on.
  373. * -------------------------------------------------------------------
  374. */
  375. static void dz_shutdown(struct uart_port *uport)
  376. {
  377. struct dz_port *dport = to_dport(uport);
  378. struct dz_mux *mux = dport->mux;
  379. unsigned long flags;
  380. int irq_guard;
  381. u16 tmp;
  382. spin_lock_irqsave(&dport->port.lock, flags);
  383. dz_stop_tx(&dport->port);
  384. spin_unlock_irqrestore(&dport->port.lock, flags);
  385. irq_guard = atomic_add_return(-1, &mux->irq_guard);
  386. if (!irq_guard) {
  387. /* Disable interrupts. */
  388. tmp = dz_in(dport, DZ_CSR);
  389. tmp &= ~(DZ_RIE | DZ_TIE);
  390. dz_out(dport, DZ_CSR, tmp);
  391. free_irq(dport->port.irq, mux);
  392. }
  393. }
  394. /*
  395. * -------------------------------------------------------------------
  396. * dz_tx_empty() -- get the transmitter empty status
  397. *
  398. * Purpose: Let user call ioctl() to get info when the UART physically
  399. * is emptied. On bus types like RS485, the transmitter must
  400. * release the bus after transmitting. This must be done when
  401. * the transmit shift register is empty, not be done when the
  402. * transmit holding register is empty. This functionality
  403. * allows an RS485 driver to be written in user space.
  404. * -------------------------------------------------------------------
  405. */
  406. static unsigned int dz_tx_empty(struct uart_port *uport)
  407. {
  408. struct dz_port *dport = to_dport(uport);
  409. unsigned short tmp, mask = 1 << dport->port.line;
  410. tmp = dz_in(dport, DZ_TCR);
  411. tmp &= mask;
  412. return tmp ? 0 : TIOCSER_TEMT;
  413. }
  414. static void dz_break_ctl(struct uart_port *uport, int break_state)
  415. {
  416. /*
  417. * FIXME: Can't access BREAK bits in TDR easily;
  418. * reuse the code for polled TX. --macro
  419. */
  420. struct dz_port *dport = to_dport(uport);
  421. unsigned long flags;
  422. unsigned short tmp, mask = 1 << dport->port.line;
  423. spin_lock_irqsave(&uport->lock, flags);
  424. tmp = dz_in(dport, DZ_TCR);
  425. if (break_state)
  426. tmp |= mask;
  427. else
  428. tmp &= ~mask;
  429. dz_out(dport, DZ_TCR, tmp);
  430. spin_unlock_irqrestore(&uport->lock, flags);
  431. }
  432. static int dz_encode_baud_rate(unsigned int baud)
  433. {
  434. switch (baud) {
  435. case 50:
  436. return DZ_B50;
  437. case 75:
  438. return DZ_B75;
  439. case 110:
  440. return DZ_B110;
  441. case 134:
  442. return DZ_B134;
  443. case 150:
  444. return DZ_B150;
  445. case 300:
  446. return DZ_B300;
  447. case 600:
  448. return DZ_B600;
  449. case 1200:
  450. return DZ_B1200;
  451. case 1800:
  452. return DZ_B1800;
  453. case 2000:
  454. return DZ_B2000;
  455. case 2400:
  456. return DZ_B2400;
  457. case 3600:
  458. return DZ_B3600;
  459. case 4800:
  460. return DZ_B4800;
  461. case 7200:
  462. return DZ_B7200;
  463. case 9600:
  464. return DZ_B9600;
  465. default:
  466. return -1;
  467. }
  468. }
  469. static void dz_reset(struct dz_port *dport)
  470. {
  471. struct dz_mux *mux = dport->mux;
  472. if (mux->initialised)
  473. return;
  474. dz_out(dport, DZ_CSR, DZ_CLR);
  475. while (dz_in(dport, DZ_CSR) & DZ_CLR);
  476. iob();
  477. /* Enable scanning. */
  478. dz_out(dport, DZ_CSR, DZ_MSE);
  479. mux->initialised = 1;
  480. }
  481. static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
  482. struct ktermios *old_termios)
  483. {
  484. struct dz_port *dport = to_dport(uport);
  485. unsigned long flags;
  486. unsigned int cflag, baud;
  487. int bflag;
  488. cflag = dport->port.line;
  489. switch (termios->c_cflag & CSIZE) {
  490. case CS5:
  491. cflag |= DZ_CS5;
  492. break;
  493. case CS6:
  494. cflag |= DZ_CS6;
  495. break;
  496. case CS7:
  497. cflag |= DZ_CS7;
  498. break;
  499. case CS8:
  500. default:
  501. cflag |= DZ_CS8;
  502. }
  503. if (termios->c_cflag & CSTOPB)
  504. cflag |= DZ_CSTOPB;
  505. if (termios->c_cflag & PARENB)
  506. cflag |= DZ_PARENB;
  507. if (termios->c_cflag & PARODD)
  508. cflag |= DZ_PARODD;
  509. baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
  510. bflag = dz_encode_baud_rate(baud);
  511. if (bflag < 0) { /* Try to keep unchanged. */
  512. baud = uart_get_baud_rate(uport, old_termios, NULL, 50, 9600);
  513. bflag = dz_encode_baud_rate(baud);
  514. if (bflag < 0) { /* Resort to 9600. */
  515. baud = 9600;
  516. bflag = DZ_B9600;
  517. }
  518. tty_termios_encode_baud_rate(termios, baud, baud);
  519. }
  520. cflag |= bflag;
  521. if (termios->c_cflag & CREAD)
  522. cflag |= DZ_RXENAB;
  523. spin_lock_irqsave(&dport->port.lock, flags);
  524. uart_update_timeout(uport, termios->c_cflag, baud);
  525. dz_out(dport, DZ_LPR, cflag);
  526. dport->cflag = cflag;
  527. /* setup accept flag */
  528. dport->port.read_status_mask = DZ_OERR;
  529. if (termios->c_iflag & INPCK)
  530. dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
  531. if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
  532. dport->port.read_status_mask |= DZ_BREAK;
  533. /* characters to ignore */
  534. uport->ignore_status_mask = 0;
  535. if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
  536. dport->port.ignore_status_mask |= DZ_OERR;
  537. if (termios->c_iflag & IGNPAR)
  538. dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
  539. if (termios->c_iflag & IGNBRK)
  540. dport->port.ignore_status_mask |= DZ_BREAK;
  541. spin_unlock_irqrestore(&dport->port.lock, flags);
  542. }
  543. /*
  544. * Hack alert!
  545. * Required solely so that the initial PROM-based console
  546. * works undisturbed in parallel with this one.
  547. */
  548. static void dz_pm(struct uart_port *uport, unsigned int state,
  549. unsigned int oldstate)
  550. {
  551. struct dz_port *dport = to_dport(uport);
  552. unsigned long flags;
  553. spin_lock_irqsave(&dport->port.lock, flags);
  554. if (state < 3)
  555. dz_start_tx(&dport->port);
  556. else
  557. dz_stop_tx(&dport->port);
  558. spin_unlock_irqrestore(&dport->port.lock, flags);
  559. }
  560. static const char *dz_type(struct uart_port *uport)
  561. {
  562. return "DZ";
  563. }
  564. static void dz_release_port(struct uart_port *uport)
  565. {
  566. struct dz_mux *mux = to_dport(uport)->mux;
  567. int map_guard;
  568. iounmap(uport->membase);
  569. uport->membase = NULL;
  570. map_guard = atomic_add_return(-1, &mux->map_guard);
  571. if (!map_guard)
  572. release_mem_region(uport->mapbase, dec_kn_slot_size);
  573. }
  574. static int dz_map_port(struct uart_port *uport)
  575. {
  576. if (!uport->membase)
  577. uport->membase = ioremap_nocache(uport->mapbase,
  578. dec_kn_slot_size);
  579. if (!uport->membase) {
  580. printk(KERN_ERR "dz: Cannot map MMIO\n");
  581. return -ENOMEM;
  582. }
  583. return 0;
  584. }
  585. static int dz_request_port(struct uart_port *uport)
  586. {
  587. struct dz_mux *mux = to_dport(uport)->mux;
  588. int map_guard;
  589. int ret;
  590. map_guard = atomic_add_return(1, &mux->map_guard);
  591. if (map_guard == 1) {
  592. if (!request_mem_region(uport->mapbase, dec_kn_slot_size,
  593. "dz")) {
  594. atomic_add(-1, &mux->map_guard);
  595. printk(KERN_ERR
  596. "dz: Unable to reserve MMIO resource\n");
  597. return -EBUSY;
  598. }
  599. }
  600. ret = dz_map_port(uport);
  601. if (ret) {
  602. map_guard = atomic_add_return(-1, &mux->map_guard);
  603. if (!map_guard)
  604. release_mem_region(uport->mapbase, dec_kn_slot_size);
  605. return ret;
  606. }
  607. return 0;
  608. }
  609. static void dz_config_port(struct uart_port *uport, int flags)
  610. {
  611. struct dz_port *dport = to_dport(uport);
  612. if (flags & UART_CONFIG_TYPE) {
  613. if (dz_request_port(uport))
  614. return;
  615. uport->type = PORT_DZ;
  616. dz_reset(dport);
  617. }
  618. }
  619. /*
  620. * Verify the new serial_struct (for TIOCSSERIAL).
  621. */
  622. static int dz_verify_port(struct uart_port *uport, struct serial_struct *ser)
  623. {
  624. int ret = 0;
  625. if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
  626. ret = -EINVAL;
  627. if (ser->irq != uport->irq)
  628. ret = -EINVAL;
  629. return ret;
  630. }
  631. static struct uart_ops dz_ops = {
  632. .tx_empty = dz_tx_empty,
  633. .get_mctrl = dz_get_mctrl,
  634. .set_mctrl = dz_set_mctrl,
  635. .stop_tx = dz_stop_tx,
  636. .start_tx = dz_start_tx,
  637. .stop_rx = dz_stop_rx,
  638. .break_ctl = dz_break_ctl,
  639. .startup = dz_startup,
  640. .shutdown = dz_shutdown,
  641. .set_termios = dz_set_termios,
  642. .pm = dz_pm,
  643. .type = dz_type,
  644. .release_port = dz_release_port,
  645. .request_port = dz_request_port,
  646. .config_port = dz_config_port,
  647. .verify_port = dz_verify_port,
  648. };
  649. static void __init dz_init_ports(void)
  650. {
  651. static int first = 1;
  652. unsigned long base;
  653. int line;
  654. if (!first)
  655. return;
  656. first = 0;
  657. if (mips_machtype == MACH_DS23100 || mips_machtype == MACH_DS5100)
  658. base = dec_kn_slot_base + KN01_DZ11;
  659. else
  660. base = dec_kn_slot_base + KN02_DZ11;
  661. for (line = 0; line < DZ_NB_PORT; line++) {
  662. struct dz_port *dport = &dz_mux.dport[line];
  663. struct uart_port *uport = &dport->port;
  664. dport->mux = &dz_mux;
  665. uport->irq = dec_interrupt[DEC_IRQ_DZ11];
  666. uport->fifosize = 1;
  667. uport->iotype = UPIO_MEM;
  668. uport->flags = UPF_BOOT_AUTOCONF;
  669. uport->ops = &dz_ops;
  670. uport->line = line;
  671. uport->mapbase = base;
  672. }
  673. }
  674. #ifdef CONFIG_SERIAL_DZ_CONSOLE
  675. /*
  676. * -------------------------------------------------------------------
  677. * dz_console_putchar() -- transmit a character
  678. *
  679. * Polled transmission. This is tricky. We need to mask transmit
  680. * interrupts so that they do not interfere, enable the transmitter
  681. * for the line requested and then wait till the transmit scanner
  682. * requests data for this line. But it may request data for another
  683. * line first, in which case we have to disable its transmitter and
  684. * repeat waiting till our line pops up. Only then the character may
  685. * be transmitted. Finally, the state of the transmitter mask is
  686. * restored. Welcome to the world of PDP-11!
  687. * -------------------------------------------------------------------
  688. */
  689. static void dz_console_putchar(struct uart_port *uport, int ch)
  690. {
  691. struct dz_port *dport = to_dport(uport);
  692. unsigned long flags;
  693. unsigned short csr, tcr, trdy, mask;
  694. int loops = 10000;
  695. spin_lock_irqsave(&dport->port.lock, flags);
  696. csr = dz_in(dport, DZ_CSR);
  697. dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
  698. tcr = dz_in(dport, DZ_TCR);
  699. tcr |= 1 << dport->port.line;
  700. mask = tcr;
  701. dz_out(dport, DZ_TCR, mask);
  702. iob();
  703. spin_unlock_irqrestore(&dport->port.lock, flags);
  704. do {
  705. trdy = dz_in(dport, DZ_CSR);
  706. if (!(trdy & DZ_TRDY))
  707. continue;
  708. trdy = (trdy & DZ_TLINE) >> 8;
  709. if (trdy == dport->port.line)
  710. break;
  711. mask &= ~(1 << trdy);
  712. dz_out(dport, DZ_TCR, mask);
  713. iob();
  714. udelay(2);
  715. } while (--loops);
  716. if (loops) /* Cannot send otherwise. */
  717. dz_out(dport, DZ_TDR, ch);
  718. dz_out(dport, DZ_TCR, tcr);
  719. dz_out(dport, DZ_CSR, csr);
  720. }
  721. /*
  722. * -------------------------------------------------------------------
  723. * dz_console_print ()
  724. *
  725. * dz_console_print is registered for printk.
  726. * The console must be locked when we get here.
  727. * -------------------------------------------------------------------
  728. */
  729. static void dz_console_print(struct console *co,
  730. const char *str,
  731. unsigned int count)
  732. {
  733. struct dz_port *dport = &dz_mux.dport[co->index];
  734. #ifdef DEBUG_DZ
  735. prom_printf((char *) str);
  736. #endif
  737. uart_console_write(&dport->port, str, count, dz_console_putchar);
  738. }
  739. static int __init dz_console_setup(struct console *co, char *options)
  740. {
  741. struct dz_port *dport = &dz_mux.dport[co->index];
  742. struct uart_port *uport = &dport->port;
  743. int baud = 9600;
  744. int bits = 8;
  745. int parity = 'n';
  746. int flow = 'n';
  747. int ret;
  748. ret = dz_map_port(uport);
  749. if (ret)
  750. return ret;
  751. spin_lock_init(&dport->port.lock); /* For dz_pm(). */
  752. dz_reset(dport);
  753. dz_pm(uport, 0, -1);
  754. if (options)
  755. uart_parse_options(options, &baud, &parity, &bits, &flow);
  756. return uart_set_options(&dport->port, co, baud, parity, bits, flow);
  757. }
  758. static struct uart_driver dz_reg;
  759. static struct console dz_console = {
  760. .name = "ttyS",
  761. .write = dz_console_print,
  762. .device = uart_console_device,
  763. .setup = dz_console_setup,
  764. .flags = CON_PRINTBUFFER,
  765. .index = -1,
  766. .data = &dz_reg,
  767. };
  768. static int __init dz_serial_console_init(void)
  769. {
  770. if (!IOASIC) {
  771. dz_init_ports();
  772. register_console(&dz_console);
  773. return 0;
  774. } else
  775. return -ENXIO;
  776. }
  777. console_initcall(dz_serial_console_init);
  778. #define SERIAL_DZ_CONSOLE &dz_console
  779. #else
  780. #define SERIAL_DZ_CONSOLE NULL
  781. #endif /* CONFIG_SERIAL_DZ_CONSOLE */
  782. static struct uart_driver dz_reg = {
  783. .owner = THIS_MODULE,
  784. .driver_name = "serial",
  785. .dev_name = "ttyS",
  786. .major = TTY_MAJOR,
  787. .minor = 64,
  788. .nr = DZ_NB_PORT,
  789. .cons = SERIAL_DZ_CONSOLE,
  790. };
  791. static int __init dz_init(void)
  792. {
  793. int ret, i;
  794. if (IOASIC)
  795. return -ENXIO;
  796. printk("%s%s\n", dz_name, dz_version);
  797. dz_init_ports();
  798. ret = uart_register_driver(&dz_reg);
  799. if (ret)
  800. return ret;
  801. for (i = 0; i < DZ_NB_PORT; i++)
  802. uart_add_one_port(&dz_reg, &dz_mux.dport[i].port);
  803. return 0;
  804. }
  805. module_init(dz_init);