max3100.c 21 KB

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  1. /*
  2. *
  3. * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. *
  11. * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
  12. * to use polling for flow control. TX empty IRQ is unusable, since
  13. * writing conf clears FIFO buffer and we cannot have this interrupt
  14. * always asking us for attention.
  15. *
  16. * Example platform data:
  17. static struct plat_max3100 max3100_plat_data = {
  18. .loopback = 0,
  19. .crystal = 0,
  20. .poll_time = 100,
  21. };
  22. static struct spi_board_info spi_board_info[] = {
  23. {
  24. .modalias = "max3100",
  25. .platform_data = &max3100_plat_data,
  26. .irq = IRQ_EINT12,
  27. .max_speed_hz = 5*1000*1000,
  28. .chip_select = 0,
  29. },
  30. };
  31. * The initial minor number is 209 in the low-density serial port:
  32. * mknod /dev/ttyMAX0 c 204 209
  33. */
  34. #define MAX3100_MAJOR 204
  35. #define MAX3100_MINOR 209
  36. /* 4 MAX3100s should be enough for everyone */
  37. #define MAX_MAX3100 4
  38. #include <linux/delay.h>
  39. #include <linux/slab.h>
  40. #include <linux/device.h>
  41. #include <linux/module.h>
  42. #include <linux/serial_core.h>
  43. #include <linux/serial.h>
  44. #include <linux/spi/spi.h>
  45. #include <linux/freezer.h>
  46. #include <linux/tty.h>
  47. #include <linux/tty_flip.h>
  48. #include <linux/serial_max3100.h>
  49. #define MAX3100_C (1<<14)
  50. #define MAX3100_D (0<<14)
  51. #define MAX3100_W (1<<15)
  52. #define MAX3100_RX (0<<15)
  53. #define MAX3100_WC (MAX3100_W | MAX3100_C)
  54. #define MAX3100_RC (MAX3100_RX | MAX3100_C)
  55. #define MAX3100_WD (MAX3100_W | MAX3100_D)
  56. #define MAX3100_RD (MAX3100_RX | MAX3100_D)
  57. #define MAX3100_CMD (3 << 14)
  58. #define MAX3100_T (1<<14)
  59. #define MAX3100_R (1<<15)
  60. #define MAX3100_FEN (1<<13)
  61. #define MAX3100_SHDN (1<<12)
  62. #define MAX3100_TM (1<<11)
  63. #define MAX3100_RM (1<<10)
  64. #define MAX3100_PM (1<<9)
  65. #define MAX3100_RAM (1<<8)
  66. #define MAX3100_IR (1<<7)
  67. #define MAX3100_ST (1<<6)
  68. #define MAX3100_PE (1<<5)
  69. #define MAX3100_L (1<<4)
  70. #define MAX3100_BAUD (0xf)
  71. #define MAX3100_TE (1<<10)
  72. #define MAX3100_RAFE (1<<10)
  73. #define MAX3100_RTS (1<<9)
  74. #define MAX3100_CTS (1<<9)
  75. #define MAX3100_PT (1<<8)
  76. #define MAX3100_DATA (0xff)
  77. #define MAX3100_RT (MAX3100_R | MAX3100_T)
  78. #define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
  79. /* the following simulate a status reg for ignore_status_mask */
  80. #define MAX3100_STATUS_PE 1
  81. #define MAX3100_STATUS_FE 2
  82. #define MAX3100_STATUS_OE 4
  83. struct max3100_port {
  84. struct uart_port port;
  85. struct spi_device *spi;
  86. int cts; /* last CTS received for flow ctrl */
  87. int tx_empty; /* last TX empty bit */
  88. spinlock_t conf_lock; /* shared data */
  89. int conf_commit; /* need to make changes */
  90. int conf; /* configuration for the MAX31000
  91. * (bits 0-7, bits 8-11 are irqs) */
  92. int rts_commit; /* need to change rts */
  93. int rts; /* rts status */
  94. int baud; /* current baud rate */
  95. int parity; /* keeps track if we should send parity */
  96. #define MAX3100_PARITY_ON 1
  97. #define MAX3100_PARITY_ODD 2
  98. #define MAX3100_7BIT 4
  99. int rx_enabled; /* if we should rx chars */
  100. int irq; /* irq assigned to the max3100 */
  101. int minor; /* minor number */
  102. int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */
  103. int loopback; /* 1 if we are in loopback mode */
  104. /* for handling irqs: need workqueue since we do spi_sync */
  105. struct workqueue_struct *workqueue;
  106. struct work_struct work;
  107. /* set to 1 to make the workhandler exit as soon as possible */
  108. int force_end_work;
  109. /* need to know we are suspending to avoid deadlock on workqueue */
  110. int suspending;
  111. /* hook for suspending MAX3100 via dedicated pin */
  112. void (*max3100_hw_suspend) (int suspend);
  113. /* poll time (in ms) for ctrl lines */
  114. int poll_time;
  115. /* and its timer */
  116. struct timer_list timer;
  117. };
  118. static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
  119. static DEFINE_MUTEX(max3100s_lock); /* race on probe */
  120. static int max3100_do_parity(struct max3100_port *s, u16 c)
  121. {
  122. int parity;
  123. if (s->parity & MAX3100_PARITY_ODD)
  124. parity = 1;
  125. else
  126. parity = 0;
  127. if (s->parity & MAX3100_7BIT)
  128. c &= 0x7f;
  129. else
  130. c &= 0xff;
  131. parity = parity ^ (hweight8(c) & 1);
  132. return parity;
  133. }
  134. static int max3100_check_parity(struct max3100_port *s, u16 c)
  135. {
  136. return max3100_do_parity(s, c) == ((c >> 8) & 1);
  137. }
  138. static void max3100_calc_parity(struct max3100_port *s, u16 *c)
  139. {
  140. if (s->parity & MAX3100_7BIT)
  141. *c &= 0x7f;
  142. else
  143. *c &= 0xff;
  144. if (s->parity & MAX3100_PARITY_ON)
  145. *c |= max3100_do_parity(s, *c) << 8;
  146. }
  147. static void max3100_work(struct work_struct *w);
  148. static void max3100_dowork(struct max3100_port *s)
  149. {
  150. if (!s->force_end_work && !freezing(current) && !s->suspending)
  151. queue_work(s->workqueue, &s->work);
  152. }
  153. static void max3100_timeout(unsigned long data)
  154. {
  155. struct max3100_port *s = (struct max3100_port *)data;
  156. if (s->port.state) {
  157. max3100_dowork(s);
  158. mod_timer(&s->timer, jiffies + s->poll_time);
  159. }
  160. }
  161. static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
  162. {
  163. struct spi_message message;
  164. u16 etx, erx;
  165. int status;
  166. struct spi_transfer tran = {
  167. .tx_buf = &etx,
  168. .rx_buf = &erx,
  169. .len = 2,
  170. };
  171. etx = cpu_to_be16(tx);
  172. spi_message_init(&message);
  173. spi_message_add_tail(&tran, &message);
  174. status = spi_sync(s->spi, &message);
  175. if (status) {
  176. dev_warn(&s->spi->dev, "error while calling spi_sync\n");
  177. return -EIO;
  178. }
  179. *rx = be16_to_cpu(erx);
  180. s->tx_empty = (*rx & MAX3100_T) > 0;
  181. dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
  182. return 0;
  183. }
  184. static int max3100_handlerx(struct max3100_port *s, u16 rx)
  185. {
  186. unsigned int ch, flg, status = 0;
  187. int ret = 0, cts;
  188. if (rx & MAX3100_R && s->rx_enabled) {
  189. dev_dbg(&s->spi->dev, "%s\n", __func__);
  190. ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
  191. if (rx & MAX3100_RAFE) {
  192. s->port.icount.frame++;
  193. flg = TTY_FRAME;
  194. status |= MAX3100_STATUS_FE;
  195. } else {
  196. if (s->parity & MAX3100_PARITY_ON) {
  197. if (max3100_check_parity(s, rx)) {
  198. s->port.icount.rx++;
  199. flg = TTY_NORMAL;
  200. } else {
  201. s->port.icount.parity++;
  202. flg = TTY_PARITY;
  203. status |= MAX3100_STATUS_PE;
  204. }
  205. } else {
  206. s->port.icount.rx++;
  207. flg = TTY_NORMAL;
  208. }
  209. }
  210. uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
  211. ret = 1;
  212. }
  213. cts = (rx & MAX3100_CTS) > 0;
  214. if (s->cts != cts) {
  215. s->cts = cts;
  216. uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
  217. }
  218. return ret;
  219. }
  220. static void max3100_work(struct work_struct *w)
  221. {
  222. struct max3100_port *s = container_of(w, struct max3100_port, work);
  223. int rxchars;
  224. u16 tx, rx;
  225. int conf, cconf, rts, crts;
  226. struct circ_buf *xmit = &s->port.state->xmit;
  227. dev_dbg(&s->spi->dev, "%s\n", __func__);
  228. rxchars = 0;
  229. do {
  230. spin_lock(&s->conf_lock);
  231. conf = s->conf;
  232. cconf = s->conf_commit;
  233. s->conf_commit = 0;
  234. rts = s->rts;
  235. crts = s->rts_commit;
  236. s->rts_commit = 0;
  237. spin_unlock(&s->conf_lock);
  238. if (cconf)
  239. max3100_sr(s, MAX3100_WC | conf, &rx);
  240. if (crts) {
  241. max3100_sr(s, MAX3100_WD | MAX3100_TE |
  242. (s->rts ? MAX3100_RTS : 0), &rx);
  243. rxchars += max3100_handlerx(s, rx);
  244. }
  245. max3100_sr(s, MAX3100_RD, &rx);
  246. rxchars += max3100_handlerx(s, rx);
  247. if (rx & MAX3100_T) {
  248. tx = 0xffff;
  249. if (s->port.x_char) {
  250. tx = s->port.x_char;
  251. s->port.icount.tx++;
  252. s->port.x_char = 0;
  253. } else if (!uart_circ_empty(xmit) &&
  254. !uart_tx_stopped(&s->port)) {
  255. tx = xmit->buf[xmit->tail];
  256. xmit->tail = (xmit->tail + 1) &
  257. (UART_XMIT_SIZE - 1);
  258. s->port.icount.tx++;
  259. }
  260. if (tx != 0xffff) {
  261. max3100_calc_parity(s, &tx);
  262. tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
  263. max3100_sr(s, tx, &rx);
  264. rxchars += max3100_handlerx(s, rx);
  265. }
  266. }
  267. if (rxchars > 16) {
  268. tty_flip_buffer_push(&s->port.state->port);
  269. rxchars = 0;
  270. }
  271. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  272. uart_write_wakeup(&s->port);
  273. } while (!s->force_end_work &&
  274. !freezing(current) &&
  275. ((rx & MAX3100_R) ||
  276. (!uart_circ_empty(xmit) &&
  277. !uart_tx_stopped(&s->port))));
  278. if (rxchars > 0)
  279. tty_flip_buffer_push(&s->port.state->port);
  280. }
  281. static irqreturn_t max3100_irq(int irqno, void *dev_id)
  282. {
  283. struct max3100_port *s = dev_id;
  284. dev_dbg(&s->spi->dev, "%s\n", __func__);
  285. max3100_dowork(s);
  286. return IRQ_HANDLED;
  287. }
  288. static void max3100_enable_ms(struct uart_port *port)
  289. {
  290. struct max3100_port *s = container_of(port,
  291. struct max3100_port,
  292. port);
  293. if (s->poll_time > 0)
  294. mod_timer(&s->timer, jiffies);
  295. dev_dbg(&s->spi->dev, "%s\n", __func__);
  296. }
  297. static void max3100_start_tx(struct uart_port *port)
  298. {
  299. struct max3100_port *s = container_of(port,
  300. struct max3100_port,
  301. port);
  302. dev_dbg(&s->spi->dev, "%s\n", __func__);
  303. max3100_dowork(s);
  304. }
  305. static void max3100_stop_rx(struct uart_port *port)
  306. {
  307. struct max3100_port *s = container_of(port,
  308. struct max3100_port,
  309. port);
  310. dev_dbg(&s->spi->dev, "%s\n", __func__);
  311. s->rx_enabled = 0;
  312. spin_lock(&s->conf_lock);
  313. s->conf &= ~MAX3100_RM;
  314. s->conf_commit = 1;
  315. spin_unlock(&s->conf_lock);
  316. max3100_dowork(s);
  317. }
  318. static unsigned int max3100_tx_empty(struct uart_port *port)
  319. {
  320. struct max3100_port *s = container_of(port,
  321. struct max3100_port,
  322. port);
  323. dev_dbg(&s->spi->dev, "%s\n", __func__);
  324. /* may not be truly up-to-date */
  325. max3100_dowork(s);
  326. return s->tx_empty;
  327. }
  328. static unsigned int max3100_get_mctrl(struct uart_port *port)
  329. {
  330. struct max3100_port *s = container_of(port,
  331. struct max3100_port,
  332. port);
  333. dev_dbg(&s->spi->dev, "%s\n", __func__);
  334. /* may not be truly up-to-date */
  335. max3100_dowork(s);
  336. /* always assert DCD and DSR since these lines are not wired */
  337. return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
  338. }
  339. static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
  340. {
  341. struct max3100_port *s = container_of(port,
  342. struct max3100_port,
  343. port);
  344. int rts;
  345. dev_dbg(&s->spi->dev, "%s\n", __func__);
  346. rts = (mctrl & TIOCM_RTS) > 0;
  347. spin_lock(&s->conf_lock);
  348. if (s->rts != rts) {
  349. s->rts = rts;
  350. s->rts_commit = 1;
  351. max3100_dowork(s);
  352. }
  353. spin_unlock(&s->conf_lock);
  354. }
  355. static void
  356. max3100_set_termios(struct uart_port *port, struct ktermios *termios,
  357. struct ktermios *old)
  358. {
  359. struct max3100_port *s = container_of(port,
  360. struct max3100_port,
  361. port);
  362. int baud = 0;
  363. unsigned cflag;
  364. u32 param_new, param_mask, parity = 0;
  365. dev_dbg(&s->spi->dev, "%s\n", __func__);
  366. cflag = termios->c_cflag;
  367. param_new = 0;
  368. param_mask = 0;
  369. baud = tty_termios_baud_rate(termios);
  370. param_new = s->conf & MAX3100_BAUD;
  371. switch (baud) {
  372. case 300:
  373. if (s->crystal)
  374. baud = s->baud;
  375. else
  376. param_new = 15;
  377. break;
  378. case 600:
  379. param_new = 14 + s->crystal;
  380. break;
  381. case 1200:
  382. param_new = 13 + s->crystal;
  383. break;
  384. case 2400:
  385. param_new = 12 + s->crystal;
  386. break;
  387. case 4800:
  388. param_new = 11 + s->crystal;
  389. break;
  390. case 9600:
  391. param_new = 10 + s->crystal;
  392. break;
  393. case 19200:
  394. param_new = 9 + s->crystal;
  395. break;
  396. case 38400:
  397. param_new = 8 + s->crystal;
  398. break;
  399. case 57600:
  400. param_new = 1 + s->crystal;
  401. break;
  402. case 115200:
  403. param_new = 0 + s->crystal;
  404. break;
  405. case 230400:
  406. if (s->crystal)
  407. param_new = 0;
  408. else
  409. baud = s->baud;
  410. break;
  411. default:
  412. baud = s->baud;
  413. }
  414. tty_termios_encode_baud_rate(termios, baud, baud);
  415. s->baud = baud;
  416. param_mask |= MAX3100_BAUD;
  417. if ((cflag & CSIZE) == CS8) {
  418. param_new &= ~MAX3100_L;
  419. parity &= ~MAX3100_7BIT;
  420. } else {
  421. param_new |= MAX3100_L;
  422. parity |= MAX3100_7BIT;
  423. cflag = (cflag & ~CSIZE) | CS7;
  424. }
  425. param_mask |= MAX3100_L;
  426. if (cflag & CSTOPB)
  427. param_new |= MAX3100_ST;
  428. else
  429. param_new &= ~MAX3100_ST;
  430. param_mask |= MAX3100_ST;
  431. if (cflag & PARENB) {
  432. param_new |= MAX3100_PE;
  433. parity |= MAX3100_PARITY_ON;
  434. } else {
  435. param_new &= ~MAX3100_PE;
  436. parity &= ~MAX3100_PARITY_ON;
  437. }
  438. param_mask |= MAX3100_PE;
  439. if (cflag & PARODD)
  440. parity |= MAX3100_PARITY_ODD;
  441. else
  442. parity &= ~MAX3100_PARITY_ODD;
  443. /* mask termios capabilities we don't support */
  444. cflag &= ~CMSPAR;
  445. termios->c_cflag = cflag;
  446. s->port.ignore_status_mask = 0;
  447. if (termios->c_iflag & IGNPAR)
  448. s->port.ignore_status_mask |=
  449. MAX3100_STATUS_PE | MAX3100_STATUS_FE |
  450. MAX3100_STATUS_OE;
  451. /* we are sending char from a workqueue so enable */
  452. s->port.state->port.low_latency = 1;
  453. if (s->poll_time > 0)
  454. del_timer_sync(&s->timer);
  455. uart_update_timeout(port, termios->c_cflag, baud);
  456. spin_lock(&s->conf_lock);
  457. s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
  458. s->conf_commit = 1;
  459. s->parity = parity;
  460. spin_unlock(&s->conf_lock);
  461. max3100_dowork(s);
  462. if (UART_ENABLE_MS(&s->port, termios->c_cflag))
  463. max3100_enable_ms(&s->port);
  464. }
  465. static void max3100_shutdown(struct uart_port *port)
  466. {
  467. struct max3100_port *s = container_of(port,
  468. struct max3100_port,
  469. port);
  470. dev_dbg(&s->spi->dev, "%s\n", __func__);
  471. if (s->suspending)
  472. return;
  473. s->force_end_work = 1;
  474. if (s->poll_time > 0)
  475. del_timer_sync(&s->timer);
  476. if (s->workqueue) {
  477. flush_workqueue(s->workqueue);
  478. destroy_workqueue(s->workqueue);
  479. s->workqueue = NULL;
  480. }
  481. if (s->irq)
  482. free_irq(s->irq, s);
  483. /* set shutdown mode to save power */
  484. if (s->max3100_hw_suspend)
  485. s->max3100_hw_suspend(1);
  486. else {
  487. u16 tx, rx;
  488. tx = MAX3100_WC | MAX3100_SHDN;
  489. max3100_sr(s, tx, &rx);
  490. }
  491. }
  492. static int max3100_startup(struct uart_port *port)
  493. {
  494. struct max3100_port *s = container_of(port,
  495. struct max3100_port,
  496. port);
  497. char b[12];
  498. dev_dbg(&s->spi->dev, "%s\n", __func__);
  499. s->conf = MAX3100_RM;
  500. s->baud = s->crystal ? 230400 : 115200;
  501. s->rx_enabled = 1;
  502. if (s->suspending)
  503. return 0;
  504. s->force_end_work = 0;
  505. s->parity = 0;
  506. s->rts = 0;
  507. sprintf(b, "max3100-%d", s->minor);
  508. s->workqueue = create_freezable_workqueue(b);
  509. if (!s->workqueue) {
  510. dev_warn(&s->spi->dev, "cannot create workqueue\n");
  511. return -EBUSY;
  512. }
  513. INIT_WORK(&s->work, max3100_work);
  514. if (request_irq(s->irq, max3100_irq,
  515. IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
  516. dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
  517. s->irq = 0;
  518. destroy_workqueue(s->workqueue);
  519. s->workqueue = NULL;
  520. return -EBUSY;
  521. }
  522. if (s->loopback) {
  523. u16 tx, rx;
  524. tx = 0x4001;
  525. max3100_sr(s, tx, &rx);
  526. }
  527. if (s->max3100_hw_suspend)
  528. s->max3100_hw_suspend(0);
  529. s->conf_commit = 1;
  530. max3100_dowork(s);
  531. /* wait for clock to settle */
  532. msleep(50);
  533. max3100_enable_ms(&s->port);
  534. return 0;
  535. }
  536. static const char *max3100_type(struct uart_port *port)
  537. {
  538. struct max3100_port *s = container_of(port,
  539. struct max3100_port,
  540. port);
  541. dev_dbg(&s->spi->dev, "%s\n", __func__);
  542. return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
  543. }
  544. static void max3100_release_port(struct uart_port *port)
  545. {
  546. struct max3100_port *s = container_of(port,
  547. struct max3100_port,
  548. port);
  549. dev_dbg(&s->spi->dev, "%s\n", __func__);
  550. }
  551. static void max3100_config_port(struct uart_port *port, int flags)
  552. {
  553. struct max3100_port *s = container_of(port,
  554. struct max3100_port,
  555. port);
  556. dev_dbg(&s->spi->dev, "%s\n", __func__);
  557. if (flags & UART_CONFIG_TYPE)
  558. s->port.type = PORT_MAX3100;
  559. }
  560. static int max3100_verify_port(struct uart_port *port,
  561. struct serial_struct *ser)
  562. {
  563. struct max3100_port *s = container_of(port,
  564. struct max3100_port,
  565. port);
  566. int ret = -EINVAL;
  567. dev_dbg(&s->spi->dev, "%s\n", __func__);
  568. if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
  569. ret = 0;
  570. return ret;
  571. }
  572. static void max3100_stop_tx(struct uart_port *port)
  573. {
  574. struct max3100_port *s = container_of(port,
  575. struct max3100_port,
  576. port);
  577. dev_dbg(&s->spi->dev, "%s\n", __func__);
  578. }
  579. static int max3100_request_port(struct uart_port *port)
  580. {
  581. struct max3100_port *s = container_of(port,
  582. struct max3100_port,
  583. port);
  584. dev_dbg(&s->spi->dev, "%s\n", __func__);
  585. return 0;
  586. }
  587. static void max3100_break_ctl(struct uart_port *port, int break_state)
  588. {
  589. struct max3100_port *s = container_of(port,
  590. struct max3100_port,
  591. port);
  592. dev_dbg(&s->spi->dev, "%s\n", __func__);
  593. }
  594. static struct uart_ops max3100_ops = {
  595. .tx_empty = max3100_tx_empty,
  596. .set_mctrl = max3100_set_mctrl,
  597. .get_mctrl = max3100_get_mctrl,
  598. .stop_tx = max3100_stop_tx,
  599. .start_tx = max3100_start_tx,
  600. .stop_rx = max3100_stop_rx,
  601. .enable_ms = max3100_enable_ms,
  602. .break_ctl = max3100_break_ctl,
  603. .startup = max3100_startup,
  604. .shutdown = max3100_shutdown,
  605. .set_termios = max3100_set_termios,
  606. .type = max3100_type,
  607. .release_port = max3100_release_port,
  608. .request_port = max3100_request_port,
  609. .config_port = max3100_config_port,
  610. .verify_port = max3100_verify_port,
  611. };
  612. static struct uart_driver max3100_uart_driver = {
  613. .owner = THIS_MODULE,
  614. .driver_name = "ttyMAX",
  615. .dev_name = "ttyMAX",
  616. .major = MAX3100_MAJOR,
  617. .minor = MAX3100_MINOR,
  618. .nr = MAX_MAX3100,
  619. };
  620. static int uart_driver_registered;
  621. static int max3100_probe(struct spi_device *spi)
  622. {
  623. int i, retval;
  624. struct plat_max3100 *pdata;
  625. u16 tx, rx;
  626. mutex_lock(&max3100s_lock);
  627. if (!uart_driver_registered) {
  628. uart_driver_registered = 1;
  629. retval = uart_register_driver(&max3100_uart_driver);
  630. if (retval) {
  631. printk(KERN_ERR "Couldn't register max3100 uart driver\n");
  632. mutex_unlock(&max3100s_lock);
  633. return retval;
  634. }
  635. }
  636. for (i = 0; i < MAX_MAX3100; i++)
  637. if (!max3100s[i])
  638. break;
  639. if (i == MAX_MAX3100) {
  640. dev_warn(&spi->dev, "too many MAX3100 chips\n");
  641. mutex_unlock(&max3100s_lock);
  642. return -ENOMEM;
  643. }
  644. max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
  645. if (!max3100s[i]) {
  646. dev_warn(&spi->dev,
  647. "kmalloc for max3100 structure %d failed!\n", i);
  648. mutex_unlock(&max3100s_lock);
  649. return -ENOMEM;
  650. }
  651. max3100s[i]->spi = spi;
  652. max3100s[i]->irq = spi->irq;
  653. spin_lock_init(&max3100s[i]->conf_lock);
  654. spi_set_drvdata(spi, max3100s[i]);
  655. pdata = dev_get_platdata(&spi->dev);
  656. max3100s[i]->crystal = pdata->crystal;
  657. max3100s[i]->loopback = pdata->loopback;
  658. max3100s[i]->poll_time = msecs_to_jiffies(pdata->poll_time);
  659. if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
  660. max3100s[i]->poll_time = 1;
  661. max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
  662. max3100s[i]->minor = i;
  663. init_timer(&max3100s[i]->timer);
  664. max3100s[i]->timer.function = max3100_timeout;
  665. max3100s[i]->timer.data = (unsigned long) max3100s[i];
  666. dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
  667. max3100s[i]->port.irq = max3100s[i]->irq;
  668. max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
  669. max3100s[i]->port.fifosize = 16;
  670. max3100s[i]->port.ops = &max3100_ops;
  671. max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
  672. max3100s[i]->port.line = i;
  673. max3100s[i]->port.type = PORT_MAX3100;
  674. max3100s[i]->port.dev = &spi->dev;
  675. retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
  676. if (retval < 0)
  677. dev_warn(&spi->dev,
  678. "uart_add_one_port failed for line %d with error %d\n",
  679. i, retval);
  680. /* set shutdown mode to save power. Will be woken-up on open */
  681. if (max3100s[i]->max3100_hw_suspend)
  682. max3100s[i]->max3100_hw_suspend(1);
  683. else {
  684. tx = MAX3100_WC | MAX3100_SHDN;
  685. max3100_sr(max3100s[i], tx, &rx);
  686. }
  687. mutex_unlock(&max3100s_lock);
  688. return 0;
  689. }
  690. static int max3100_remove(struct spi_device *spi)
  691. {
  692. struct max3100_port *s = spi_get_drvdata(spi);
  693. int i;
  694. mutex_lock(&max3100s_lock);
  695. /* find out the index for the chip we are removing */
  696. for (i = 0; i < MAX_MAX3100; i++)
  697. if (max3100s[i] == s) {
  698. dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
  699. uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
  700. kfree(max3100s[i]);
  701. max3100s[i] = NULL;
  702. break;
  703. }
  704. WARN_ON(i == MAX_MAX3100);
  705. /* check if this is the last chip we have */
  706. for (i = 0; i < MAX_MAX3100; i++)
  707. if (max3100s[i]) {
  708. mutex_unlock(&max3100s_lock);
  709. return 0;
  710. }
  711. pr_debug("removing max3100 driver\n");
  712. uart_unregister_driver(&max3100_uart_driver);
  713. mutex_unlock(&max3100s_lock);
  714. return 0;
  715. }
  716. #ifdef CONFIG_PM_SLEEP
  717. static int max3100_suspend(struct device *dev)
  718. {
  719. struct max3100_port *s = dev_get_drvdata(dev);
  720. dev_dbg(&s->spi->dev, "%s\n", __func__);
  721. disable_irq(s->irq);
  722. s->suspending = 1;
  723. uart_suspend_port(&max3100_uart_driver, &s->port);
  724. if (s->max3100_hw_suspend)
  725. s->max3100_hw_suspend(1);
  726. else {
  727. /* no HW suspend, so do SW one */
  728. u16 tx, rx;
  729. tx = MAX3100_WC | MAX3100_SHDN;
  730. max3100_sr(s, tx, &rx);
  731. }
  732. return 0;
  733. }
  734. static int max3100_resume(struct device *dev)
  735. {
  736. struct max3100_port *s = dev_get_drvdata(dev);
  737. dev_dbg(&s->spi->dev, "%s\n", __func__);
  738. if (s->max3100_hw_suspend)
  739. s->max3100_hw_suspend(0);
  740. uart_resume_port(&max3100_uart_driver, &s->port);
  741. s->suspending = 0;
  742. enable_irq(s->irq);
  743. s->conf_commit = 1;
  744. if (s->workqueue)
  745. max3100_dowork(s);
  746. return 0;
  747. }
  748. static SIMPLE_DEV_PM_OPS(max3100_pm_ops, max3100_suspend, max3100_resume);
  749. #define MAX3100_PM_OPS (&max3100_pm_ops)
  750. #else
  751. #define MAX3100_PM_OPS NULL
  752. #endif
  753. static struct spi_driver max3100_driver = {
  754. .driver = {
  755. .name = "max3100",
  756. .pm = MAX3100_PM_OPS,
  757. },
  758. .probe = max3100_probe,
  759. .remove = max3100_remove,
  760. };
  761. module_spi_driver(max3100_driver);
  762. MODULE_DESCRIPTION("MAX3100 driver");
  763. MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
  764. MODULE_LICENSE("GPL");
  765. MODULE_ALIAS("spi:max3100");