fhci-tds.c 17 KB

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  1. /*
  2. * Freescale QUICC Engine USB Host Controller Driver
  3. *
  4. * Copyright (c) Freescale Semicondutor, Inc. 2006.
  5. * Shlomi Gridish <gridish@freescale.com>
  6. * Jerry Huang <Chang-Ming.Huang@freescale.com>
  7. * Copyright (c) Logic Product Development, Inc. 2007
  8. * Peter Barada <peterb@logicpd.com>
  9. * Copyright (c) MontaVista Software, Inc. 2008.
  10. * Anton Vorontsov <avorontsov@ru.mvista.com>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/types.h>
  19. #include <linux/errno.h>
  20. #include <linux/slab.h>
  21. #include <linux/list.h>
  22. #include <linux/io.h>
  23. #include <linux/usb.h>
  24. #include <linux/usb/hcd.h>
  25. #include "fhci.h"
  26. #define DUMMY_BD_BUFFER 0xdeadbeef
  27. #define DUMMY2_BD_BUFFER 0xbaadf00d
  28. /* Transaction Descriptors bits */
  29. #define TD_R 0x8000 /* ready bit */
  30. #define TD_W 0x2000 /* wrap bit */
  31. #define TD_I 0x1000 /* interrupt on completion */
  32. #define TD_L 0x0800 /* last */
  33. #define TD_TC 0x0400 /* transmit CRC */
  34. #define TD_CNF 0x0200 /* CNF - Must be always 1 */
  35. #define TD_LSP 0x0100 /* Low-speed transaction */
  36. #define TD_PID 0x00c0 /* packet id */
  37. #define TD_RXER 0x0020 /* Rx error or not */
  38. #define TD_NAK 0x0010 /* No ack. */
  39. #define TD_STAL 0x0008 /* Stall received */
  40. #define TD_TO 0x0004 /* time out */
  41. #define TD_UN 0x0002 /* underrun */
  42. #define TD_NO 0x0010 /* Rx Non Octet Aligned Packet */
  43. #define TD_AB 0x0008 /* Frame Aborted */
  44. #define TD_CR 0x0004 /* CRC Error */
  45. #define TD_OV 0x0002 /* Overrun */
  46. #define TD_BOV 0x0001 /* Buffer Overrun */
  47. #define TD_ERRORS (TD_NAK | TD_STAL | TD_TO | TD_UN | \
  48. TD_NO | TD_AB | TD_CR | TD_OV | TD_BOV)
  49. #define TD_PID_DATA0 0x0080 /* Data 0 toggle */
  50. #define TD_PID_DATA1 0x00c0 /* Data 1 toggle */
  51. #define TD_PID_TOGGLE 0x00c0 /* Data 0/1 toggle mask */
  52. #define TD_TOK_SETUP 0x0000
  53. #define TD_TOK_OUT 0x4000
  54. #define TD_TOK_IN 0x8000
  55. #define TD_ISO 0x1000
  56. #define TD_ENDP 0x0780
  57. #define TD_ADDR 0x007f
  58. #define TD_ENDP_SHIFT 7
  59. struct usb_td {
  60. __be16 status;
  61. __be16 length;
  62. __be32 buf_ptr;
  63. __be16 extra;
  64. __be16 reserved;
  65. };
  66. static struct usb_td __iomem *next_bd(struct usb_td __iomem *base,
  67. struct usb_td __iomem *td,
  68. u16 status)
  69. {
  70. if (status & TD_W)
  71. return base;
  72. else
  73. return ++td;
  74. }
  75. void fhci_push_dummy_bd(struct endpoint *ep)
  76. {
  77. if (ep->already_pushed_dummy_bd == false) {
  78. u16 td_status = in_be16(&ep->empty_td->status);
  79. out_be32(&ep->empty_td->buf_ptr, DUMMY_BD_BUFFER);
  80. /* get the next TD in the ring */
  81. ep->empty_td = next_bd(ep->td_base, ep->empty_td, td_status);
  82. ep->already_pushed_dummy_bd = true;
  83. }
  84. }
  85. /* destroy an USB endpoint */
  86. void fhci_ep0_free(struct fhci_usb *usb)
  87. {
  88. struct endpoint *ep;
  89. int size;
  90. ep = usb->ep0;
  91. if (ep) {
  92. if (ep->td_base)
  93. cpm_muram_free(cpm_muram_offset(ep->td_base));
  94. if (kfifo_initialized(&ep->conf_frame_Q)) {
  95. size = cq_howmany(&ep->conf_frame_Q);
  96. for (; size; size--) {
  97. struct packet *pkt = cq_get(&ep->conf_frame_Q);
  98. kfree(pkt);
  99. }
  100. cq_delete(&ep->conf_frame_Q);
  101. }
  102. if (kfifo_initialized(&ep->empty_frame_Q)) {
  103. size = cq_howmany(&ep->empty_frame_Q);
  104. for (; size; size--) {
  105. struct packet *pkt = cq_get(&ep->empty_frame_Q);
  106. kfree(pkt);
  107. }
  108. cq_delete(&ep->empty_frame_Q);
  109. }
  110. if (kfifo_initialized(&ep->dummy_packets_Q)) {
  111. size = cq_howmany(&ep->dummy_packets_Q);
  112. for (; size; size--) {
  113. u8 *buff = cq_get(&ep->dummy_packets_Q);
  114. kfree(buff);
  115. }
  116. cq_delete(&ep->dummy_packets_Q);
  117. }
  118. kfree(ep);
  119. usb->ep0 = NULL;
  120. }
  121. }
  122. /*
  123. * create the endpoint structure
  124. *
  125. * arguments:
  126. * usb A pointer to the data structure of the USB
  127. * data_mem The data memory partition(BUS)
  128. * ring_len TD ring length
  129. */
  130. u32 fhci_create_ep(struct fhci_usb *usb, enum fhci_mem_alloc data_mem,
  131. u32 ring_len)
  132. {
  133. struct endpoint *ep;
  134. struct usb_td __iomem *td;
  135. unsigned long ep_offset;
  136. char *err_for = "endpoint PRAM";
  137. int ep_mem_size;
  138. u32 i;
  139. /* we need at least 3 TDs in the ring */
  140. if (!(ring_len > 2)) {
  141. fhci_err(usb->fhci, "illegal TD ring length parameters\n");
  142. return -EINVAL;
  143. }
  144. ep = kzalloc(sizeof(*ep), GFP_KERNEL);
  145. if (!ep)
  146. return -ENOMEM;
  147. ep_mem_size = ring_len * sizeof(*td) + sizeof(struct fhci_ep_pram);
  148. ep_offset = cpm_muram_alloc(ep_mem_size, 32);
  149. if (IS_ERR_VALUE(ep_offset))
  150. goto err;
  151. ep->td_base = cpm_muram_addr(ep_offset);
  152. /* zero all queue pointers */
  153. if (cq_new(&ep->conf_frame_Q, ring_len + 2) ||
  154. cq_new(&ep->empty_frame_Q, ring_len + 2) ||
  155. cq_new(&ep->dummy_packets_Q, ring_len + 2)) {
  156. err_for = "frame_queues";
  157. goto err;
  158. }
  159. for (i = 0; i < (ring_len + 1); i++) {
  160. struct packet *pkt;
  161. u8 *buff;
  162. pkt = kmalloc(sizeof(*pkt), GFP_KERNEL);
  163. if (!pkt) {
  164. err_for = "frame";
  165. goto err;
  166. }
  167. buff = kmalloc(1028 * sizeof(*buff), GFP_KERNEL);
  168. if (!buff) {
  169. kfree(pkt);
  170. err_for = "buffer";
  171. goto err;
  172. }
  173. cq_put(&ep->empty_frame_Q, pkt);
  174. cq_put(&ep->dummy_packets_Q, buff);
  175. }
  176. /* we put the endpoint parameter RAM right behind the TD ring */
  177. ep->ep_pram_ptr = (void __iomem *)ep->td_base + sizeof(*td) * ring_len;
  178. ep->conf_td = ep->td_base;
  179. ep->empty_td = ep->td_base;
  180. ep->already_pushed_dummy_bd = false;
  181. /* initialize tds */
  182. td = ep->td_base;
  183. for (i = 0; i < ring_len; i++) {
  184. out_be32(&td->buf_ptr, 0);
  185. out_be16(&td->status, 0);
  186. out_be16(&td->length, 0);
  187. out_be16(&td->extra, 0);
  188. td++;
  189. }
  190. td--;
  191. out_be16(&td->status, TD_W); /* for last TD set Wrap bit */
  192. out_be16(&td->length, 0);
  193. /* endpoint structure has been created */
  194. usb->ep0 = ep;
  195. return 0;
  196. err:
  197. fhci_ep0_free(usb);
  198. kfree(ep);
  199. fhci_err(usb->fhci, "no memory for the %s\n", err_for);
  200. return -ENOMEM;
  201. }
  202. /*
  203. * initialize the endpoint register according to the given parameters
  204. *
  205. * artuments:
  206. * usb A pointer to the data strucutre of the USB
  207. * ep A pointer to the endpoint structre
  208. * data_mem The data memory partition(BUS)
  209. */
  210. void fhci_init_ep_registers(struct fhci_usb *usb, struct endpoint *ep,
  211. enum fhci_mem_alloc data_mem)
  212. {
  213. u8 rt;
  214. /* set the endpoint registers according to the endpoint */
  215. out_be16(&usb->fhci->regs->usb_usep[0],
  216. USB_TRANS_CTR | USB_EP_MF | USB_EP_RTE);
  217. out_be16(&usb->fhci->pram->ep_ptr[0],
  218. cpm_muram_offset(ep->ep_pram_ptr));
  219. rt = (BUS_MODE_BO_BE | BUS_MODE_GBL);
  220. #ifdef MULTI_DATA_BUS
  221. if (data_mem == MEM_SECONDARY)
  222. rt |= BUS_MODE_DTB;
  223. #endif
  224. out_8(&ep->ep_pram_ptr->rx_func_code, rt);
  225. out_8(&ep->ep_pram_ptr->tx_func_code, rt);
  226. out_be16(&ep->ep_pram_ptr->rx_buff_len, 1028);
  227. out_be16(&ep->ep_pram_ptr->rx_base, 0);
  228. out_be16(&ep->ep_pram_ptr->tx_base, cpm_muram_offset(ep->td_base));
  229. out_be16(&ep->ep_pram_ptr->rx_bd_ptr, 0);
  230. out_be16(&ep->ep_pram_ptr->tx_bd_ptr, cpm_muram_offset(ep->td_base));
  231. out_be32(&ep->ep_pram_ptr->tx_state, 0);
  232. }
  233. /*
  234. * Collect the submitted frames and inform the application about them
  235. * It is also preparing the TDs for new frames. If the Tx interrupts
  236. * are disabled, the application should call that routine to get
  237. * confirmation about the submitted frames. Otherwise, the routine is
  238. * called from the interrupt service routine during the Tx interrupt.
  239. * In that case the application is informed by calling the application
  240. * specific 'fhci_transaction_confirm' routine
  241. */
  242. static void fhci_td_transaction_confirm(struct fhci_usb *usb)
  243. {
  244. struct endpoint *ep = usb->ep0;
  245. struct packet *pkt;
  246. struct usb_td __iomem *td;
  247. u16 extra_data;
  248. u16 td_status;
  249. u16 td_length;
  250. u32 buf;
  251. /*
  252. * collect transmitted BDs from the chip. The routine clears all BDs
  253. * with R bit = 0 and the pointer to data buffer is not NULL, that is
  254. * BDs which point to the transmitted data buffer
  255. */
  256. while (1) {
  257. td = ep->conf_td;
  258. td_status = in_be16(&td->status);
  259. td_length = in_be16(&td->length);
  260. buf = in_be32(&td->buf_ptr);
  261. extra_data = in_be16(&td->extra);
  262. /* check if the TD is empty */
  263. if (!(!(td_status & TD_R) && ((td_status & ~TD_W) || buf)))
  264. break;
  265. /* check if it is a dummy buffer */
  266. else if ((buf == DUMMY_BD_BUFFER) && !(td_status & ~TD_W))
  267. break;
  268. /* mark TD as empty */
  269. clrbits16(&td->status, ~TD_W);
  270. out_be16(&td->length, 0);
  271. out_be32(&td->buf_ptr, 0);
  272. out_be16(&td->extra, 0);
  273. /* advance the TD pointer */
  274. ep->conf_td = next_bd(ep->td_base, ep->conf_td, td_status);
  275. /* check if it is a dummy buffer(type2) */
  276. if ((buf == DUMMY2_BD_BUFFER) && !(td_status & ~TD_W))
  277. continue;
  278. pkt = cq_get(&ep->conf_frame_Q);
  279. if (!pkt)
  280. fhci_err(usb->fhci, "no frame to confirm\n");
  281. if (td_status & TD_ERRORS) {
  282. if (td_status & TD_RXER) {
  283. if (td_status & TD_CR)
  284. pkt->status = USB_TD_RX_ER_CRC;
  285. else if (td_status & TD_AB)
  286. pkt->status = USB_TD_RX_ER_BITSTUFF;
  287. else if (td_status & TD_OV)
  288. pkt->status = USB_TD_RX_ER_OVERUN;
  289. else if (td_status & TD_BOV)
  290. pkt->status = USB_TD_RX_DATA_OVERUN;
  291. else if (td_status & TD_NO)
  292. pkt->status = USB_TD_RX_ER_NONOCT;
  293. else
  294. fhci_err(usb->fhci, "illegal error "
  295. "occurred\n");
  296. } else if (td_status & TD_NAK)
  297. pkt->status = USB_TD_TX_ER_NAK;
  298. else if (td_status & TD_TO)
  299. pkt->status = USB_TD_TX_ER_TIMEOUT;
  300. else if (td_status & TD_UN)
  301. pkt->status = USB_TD_TX_ER_UNDERUN;
  302. else if (td_status & TD_STAL)
  303. pkt->status = USB_TD_TX_ER_STALL;
  304. else
  305. fhci_err(usb->fhci, "illegal error occurred\n");
  306. } else if ((extra_data & TD_TOK_IN) &&
  307. pkt->len > td_length - CRC_SIZE) {
  308. pkt->status = USB_TD_RX_DATA_UNDERUN;
  309. }
  310. if (extra_data & TD_TOK_IN)
  311. pkt->len = td_length - CRC_SIZE;
  312. else if (pkt->info & PKT_ZLP)
  313. pkt->len = 0;
  314. else
  315. pkt->len = td_length;
  316. fhci_transaction_confirm(usb, pkt);
  317. }
  318. }
  319. /*
  320. * Submitting a data frame to a specified endpoint of a USB device
  321. * The frame is put in the driver's transmit queue for this endpoint
  322. *
  323. * Arguments:
  324. * usb A pointer to the USB structure
  325. * pkt A pointer to the user frame structure
  326. * trans_type Transaction tyep - IN,OUT or SETUP
  327. * dest_addr Device address - 0~127
  328. * dest_ep Endpoint number of the device - 0~16
  329. * trans_mode Pipe type - ISO,Interrupt,bulk or control
  330. * dest_speed USB speed - Low speed or FULL speed
  331. * data_toggle Data sequence toggle - 0 or 1
  332. */
  333. u32 fhci_host_transaction(struct fhci_usb *usb,
  334. struct packet *pkt,
  335. enum fhci_ta_type trans_type,
  336. u8 dest_addr,
  337. u8 dest_ep,
  338. enum fhci_tf_mode trans_mode,
  339. enum fhci_speed dest_speed, u8 data_toggle)
  340. {
  341. struct endpoint *ep = usb->ep0;
  342. struct usb_td __iomem *td;
  343. u16 extra_data;
  344. u16 td_status;
  345. fhci_usb_disable_interrupt(usb);
  346. /* start from the next BD that should be filled */
  347. td = ep->empty_td;
  348. td_status = in_be16(&td->status);
  349. if (td_status & TD_R && in_be16(&td->length)) {
  350. /* if the TD is not free */
  351. fhci_usb_enable_interrupt(usb);
  352. return -1;
  353. }
  354. /* get the next TD in the ring */
  355. ep->empty_td = next_bd(ep->td_base, ep->empty_td, td_status);
  356. fhci_usb_enable_interrupt(usb);
  357. pkt->priv_data = td;
  358. out_be32(&td->buf_ptr, virt_to_phys(pkt->data));
  359. /* sets up transaction parameters - addr,endp,dir,and type */
  360. extra_data = (dest_ep << TD_ENDP_SHIFT) | dest_addr;
  361. switch (trans_type) {
  362. case FHCI_TA_IN:
  363. extra_data |= TD_TOK_IN;
  364. break;
  365. case FHCI_TA_OUT:
  366. extra_data |= TD_TOK_OUT;
  367. break;
  368. case FHCI_TA_SETUP:
  369. extra_data |= TD_TOK_SETUP;
  370. break;
  371. }
  372. if (trans_mode == FHCI_TF_ISO)
  373. extra_data |= TD_ISO;
  374. out_be16(&td->extra, extra_data);
  375. /* sets up the buffer descriptor */
  376. td_status = ((td_status & TD_W) | TD_R | TD_L | TD_I | TD_CNF);
  377. if (!(pkt->info & PKT_NO_CRC))
  378. td_status |= TD_TC;
  379. switch (trans_type) {
  380. case FHCI_TA_IN:
  381. if (data_toggle)
  382. pkt->info |= PKT_PID_DATA1;
  383. else
  384. pkt->info |= PKT_PID_DATA0;
  385. break;
  386. default:
  387. if (data_toggle) {
  388. td_status |= TD_PID_DATA1;
  389. pkt->info |= PKT_PID_DATA1;
  390. } else {
  391. td_status |= TD_PID_DATA0;
  392. pkt->info |= PKT_PID_DATA0;
  393. }
  394. break;
  395. }
  396. if ((dest_speed == FHCI_LOW_SPEED) &&
  397. (usb->port_status == FHCI_PORT_FULL))
  398. td_status |= TD_LSP;
  399. out_be16(&td->status, td_status);
  400. /* set up buffer length */
  401. if (trans_type == FHCI_TA_IN)
  402. out_be16(&td->length, pkt->len + CRC_SIZE);
  403. else
  404. out_be16(&td->length, pkt->len);
  405. /* put the frame to the confirmation queue */
  406. cq_put(&ep->conf_frame_Q, pkt);
  407. if (cq_howmany(&ep->conf_frame_Q) == 1)
  408. out_8(&usb->fhci->regs->usb_uscom, USB_CMD_STR_FIFO);
  409. return 0;
  410. }
  411. /* Reset the Tx BD ring */
  412. void fhci_flush_bds(struct fhci_usb *usb)
  413. {
  414. u16 extra_data;
  415. u16 td_status;
  416. u32 buf;
  417. struct usb_td __iomem *td;
  418. struct endpoint *ep = usb->ep0;
  419. td = ep->td_base;
  420. while (1) {
  421. td_status = in_be16(&td->status);
  422. buf = in_be32(&td->buf_ptr);
  423. extra_data = in_be16(&td->extra);
  424. /* if the TD is not empty - we'll confirm it as Timeout */
  425. if (td_status & TD_R)
  426. out_be16(&td->status, (td_status & ~TD_R) | TD_TO);
  427. /* if this TD is dummy - let's skip this TD */
  428. else if (in_be32(&td->buf_ptr) == DUMMY_BD_BUFFER)
  429. out_be32(&td->buf_ptr, DUMMY2_BD_BUFFER);
  430. /* if this is the last TD - break */
  431. if (td_status & TD_W)
  432. break;
  433. td++;
  434. }
  435. fhci_td_transaction_confirm(usb);
  436. td = ep->td_base;
  437. do {
  438. out_be16(&td->status, 0);
  439. out_be16(&td->length, 0);
  440. out_be32(&td->buf_ptr, 0);
  441. out_be16(&td->extra, 0);
  442. td++;
  443. } while (!(in_be16(&td->status) & TD_W));
  444. out_be16(&td->status, TD_W); /* for last TD set Wrap bit */
  445. out_be16(&td->length, 0);
  446. out_be32(&td->buf_ptr, 0);
  447. out_be16(&td->extra, 0);
  448. out_be16(&ep->ep_pram_ptr->tx_bd_ptr,
  449. in_be16(&ep->ep_pram_ptr->tx_base));
  450. out_be32(&ep->ep_pram_ptr->tx_state, 0);
  451. out_be16(&ep->ep_pram_ptr->tx_cnt, 0);
  452. ep->empty_td = ep->td_base;
  453. ep->conf_td = ep->td_base;
  454. }
  455. /*
  456. * Flush all transmitted packets from TDs in the actual frame.
  457. * This routine is called when something wrong with the controller and
  458. * we want to get rid of the actual frame and start again next frame
  459. */
  460. void fhci_flush_actual_frame(struct fhci_usb *usb)
  461. {
  462. u8 mode;
  463. u16 tb_ptr;
  464. u16 extra_data;
  465. u16 td_status;
  466. u32 buf_ptr;
  467. struct usb_td __iomem *td;
  468. struct endpoint *ep = usb->ep0;
  469. /* disable the USB controller */
  470. mode = in_8(&usb->fhci->regs->usb_usmod);
  471. out_8(&usb->fhci->regs->usb_usmod, mode & ~USB_MODE_EN);
  472. tb_ptr = in_be16(&ep->ep_pram_ptr->tx_bd_ptr);
  473. td = cpm_muram_addr(tb_ptr);
  474. td_status = in_be16(&td->status);
  475. buf_ptr = in_be32(&td->buf_ptr);
  476. extra_data = in_be16(&td->extra);
  477. do {
  478. if (td_status & TD_R) {
  479. out_be16(&td->status, (td_status & ~TD_R) | TD_TO);
  480. } else {
  481. out_be32(&td->buf_ptr, 0);
  482. ep->already_pushed_dummy_bd = false;
  483. break;
  484. }
  485. /* advance the TD pointer */
  486. td = next_bd(ep->td_base, td, td_status);
  487. td_status = in_be16(&td->status);
  488. buf_ptr = in_be32(&td->buf_ptr);
  489. extra_data = in_be16(&td->extra);
  490. } while ((td_status & TD_R) || buf_ptr);
  491. fhci_td_transaction_confirm(usb);
  492. out_be16(&ep->ep_pram_ptr->tx_bd_ptr,
  493. in_be16(&ep->ep_pram_ptr->tx_base));
  494. out_be32(&ep->ep_pram_ptr->tx_state, 0);
  495. out_be16(&ep->ep_pram_ptr->tx_cnt, 0);
  496. ep->empty_td = ep->td_base;
  497. ep->conf_td = ep->td_base;
  498. usb->actual_frame->frame_status = FRAME_TIMER_END_TRANSMISSION;
  499. /* reset the event register */
  500. out_be16(&usb->fhci->regs->usb_usber, 0xffff);
  501. /* enable the USB controller */
  502. out_8(&usb->fhci->regs->usb_usmod, mode | USB_MODE_EN);
  503. }
  504. /* handles Tx confirm and Tx error interrupt */
  505. void fhci_tx_conf_interrupt(struct fhci_usb *usb)
  506. {
  507. fhci_td_transaction_confirm(usb);
  508. /*
  509. * Schedule another transaction to this frame only if we have
  510. * already confirmed all transaction in the frame.
  511. */
  512. if (((fhci_get_sof_timer_count(usb) < usb->max_frame_usage) ||
  513. (usb->actual_frame->frame_status & FRAME_END_TRANSMISSION)) &&
  514. (list_empty(&usb->actual_frame->tds_list)))
  515. fhci_schedule_transactions(usb);
  516. }
  517. void fhci_host_transmit_actual_frame(struct fhci_usb *usb)
  518. {
  519. u16 tb_ptr;
  520. u16 td_status;
  521. struct usb_td __iomem *td;
  522. struct endpoint *ep = usb->ep0;
  523. tb_ptr = in_be16(&ep->ep_pram_ptr->tx_bd_ptr);
  524. td = cpm_muram_addr(tb_ptr);
  525. if (in_be32(&td->buf_ptr) == DUMMY_BD_BUFFER) {
  526. struct usb_td __iomem *old_td = td;
  527. ep->already_pushed_dummy_bd = false;
  528. td_status = in_be16(&td->status);
  529. /* gets the next TD in the ring */
  530. td = next_bd(ep->td_base, td, td_status);
  531. tb_ptr = cpm_muram_offset(td);
  532. out_be16(&ep->ep_pram_ptr->tx_bd_ptr, tb_ptr);
  533. /* start transmit only if we have something in the TDs */
  534. if (in_be16(&td->status) & TD_R)
  535. out_8(&usb->fhci->regs->usb_uscom, USB_CMD_STR_FIFO);
  536. if (in_be32(&ep->conf_td->buf_ptr) == DUMMY_BD_BUFFER) {
  537. out_be32(&old_td->buf_ptr, 0);
  538. ep->conf_td = next_bd(ep->td_base, ep->conf_td,
  539. td_status);
  540. } else {
  541. out_be32(&old_td->buf_ptr, DUMMY2_BD_BUFFER);
  542. }
  543. }
  544. }