isp116x-hcd.c 43 KB

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  1. /*
  2. * ISP116x HCD (Host Controller Driver) for USB.
  3. *
  4. * Derived from the SL811 HCD, rewritten for ISP116x.
  5. * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
  6. *
  7. * Portions:
  8. * Copyright (C) 2004 Psion Teklogix (for NetBook PRO)
  9. * Copyright (C) 2004 David Brownell
  10. *
  11. * Periodic scheduling is based on Roman's OHCI code
  12. * Copyright (C) 1999 Roman Weissgaerber
  13. *
  14. */
  15. /*
  16. * The driver basically works. A number of people have used it with a range
  17. * of devices.
  18. *
  19. * The driver passes all usbtests 1-14.
  20. *
  21. * Suspending/resuming of root hub via sysfs works. Remote wakeup works too.
  22. * And suspending/resuming of platform device works too. Suspend/resume
  23. * via HCD operations vector is not implemented.
  24. *
  25. * Iso transfer support is not implemented. Adding this would include
  26. * implementing recovery from the failure to service the processed ITL
  27. * fifo ram in time, which will involve chip reset.
  28. *
  29. * TODO:
  30. + More testing of suspend/resume.
  31. */
  32. /*
  33. ISP116x chips require certain delays between accesses to its
  34. registers. The following timing options exist.
  35. 1. Configure your memory controller (the best)
  36. 2. Implement platform-specific delay function possibly
  37. combined with configuring the memory controller; see
  38. include/linux/usb-isp116x.h for more info. Some broken
  39. memory controllers line LH7A400 SMC need this. Also,
  40. uncomment for that to work the following
  41. USE_PLATFORM_DELAY macro.
  42. 3. Use ndelay (easiest, poorest). For that, uncomment
  43. the following USE_NDELAY macro.
  44. */
  45. #define USE_PLATFORM_DELAY
  46. //#define USE_NDELAY
  47. //#define DEBUG
  48. //#define VERBOSE
  49. /* Transfer descriptors. See dump_ptd() for printout format */
  50. //#define PTD_TRACE
  51. /* enqueuing/finishing log of urbs */
  52. //#define URB_TRACE
  53. #include <linux/module.h>
  54. #include <linux/delay.h>
  55. #include <linux/debugfs.h>
  56. #include <linux/seq_file.h>
  57. #include <linux/errno.h>
  58. #include <linux/list.h>
  59. #include <linux/slab.h>
  60. #include <linux/usb.h>
  61. #include <linux/usb/isp116x.h>
  62. #include <linux/usb/hcd.h>
  63. #include <linux/platform_device.h>
  64. #include <asm/io.h>
  65. #include <asm/irq.h>
  66. #include <asm/byteorder.h>
  67. #include "isp116x.h"
  68. #define DRIVER_VERSION "03 Nov 2005"
  69. #define DRIVER_DESC "ISP116x USB Host Controller Driver"
  70. MODULE_DESCRIPTION(DRIVER_DESC);
  71. MODULE_LICENSE("GPL");
  72. static const char hcd_name[] = "isp116x-hcd";
  73. /*-----------------------------------------------------------------*/
  74. /*
  75. Write len bytes to fifo, pad till 32-bit boundary
  76. */
  77. static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
  78. {
  79. u8 *dp = (u8 *) buf;
  80. u16 *dp2 = (u16 *) buf;
  81. u16 w;
  82. int quot = len % 4;
  83. /* buffer is already in 'usb data order', which is LE. */
  84. /* When reading buffer as u16, we have to take care byte order */
  85. /* doesn't get mixed up */
  86. if ((unsigned long)dp2 & 1) {
  87. /* not aligned */
  88. for (; len > 1; len -= 2) {
  89. w = *dp++;
  90. w |= *dp++ << 8;
  91. isp116x_raw_write_data16(isp116x, w);
  92. }
  93. if (len)
  94. isp116x_write_data16(isp116x, (u16) * dp);
  95. } else {
  96. /* aligned */
  97. for (; len > 1; len -= 2) {
  98. /* Keep byte order ! */
  99. isp116x_raw_write_data16(isp116x, cpu_to_le16(*dp2++));
  100. }
  101. if (len)
  102. isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
  103. }
  104. if (quot == 1 || quot == 2)
  105. isp116x_raw_write_data16(isp116x, 0);
  106. }
  107. /*
  108. Read len bytes from fifo and then read till 32-bit boundary.
  109. */
  110. static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
  111. {
  112. u8 *dp = (u8 *) buf;
  113. u16 *dp2 = (u16 *) buf;
  114. u16 w;
  115. int quot = len % 4;
  116. /* buffer is already in 'usb data order', which is LE. */
  117. /* When reading buffer as u16, we have to take care byte order */
  118. /* doesn't get mixed up */
  119. if ((unsigned long)dp2 & 1) {
  120. /* not aligned */
  121. for (; len > 1; len -= 2) {
  122. w = isp116x_raw_read_data16(isp116x);
  123. *dp++ = w & 0xff;
  124. *dp++ = (w >> 8) & 0xff;
  125. }
  126. if (len)
  127. *dp = 0xff & isp116x_read_data16(isp116x);
  128. } else {
  129. /* aligned */
  130. for (; len > 1; len -= 2) {
  131. /* Keep byte order! */
  132. *dp2++ = le16_to_cpu(isp116x_raw_read_data16(isp116x));
  133. }
  134. if (len)
  135. *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
  136. }
  137. if (quot == 1 || quot == 2)
  138. isp116x_raw_read_data16(isp116x);
  139. }
  140. /*
  141. Write ptd's and data for scheduled transfers into
  142. the fifo ram. Fifo must be empty and ready.
  143. */
  144. static void pack_fifo(struct isp116x *isp116x)
  145. {
  146. struct isp116x_ep *ep;
  147. struct ptd *ptd;
  148. int buflen = isp116x->atl_last_dir == PTD_DIR_IN
  149. ? isp116x->atl_bufshrt : isp116x->atl_buflen;
  150. isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
  151. isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
  152. isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
  153. for (ep = isp116x->atl_active; ep; ep = ep->active) {
  154. ptd = &ep->ptd;
  155. dump_ptd(ptd);
  156. dump_ptd_out_data(ptd, ep->data);
  157. isp116x_write_data16(isp116x, ptd->count);
  158. isp116x_write_data16(isp116x, ptd->mps);
  159. isp116x_write_data16(isp116x, ptd->len);
  160. isp116x_write_data16(isp116x, ptd->faddr);
  161. buflen -= sizeof(struct ptd);
  162. /* Skip writing data for last IN PTD */
  163. if (ep->active || (isp116x->atl_last_dir != PTD_DIR_IN)) {
  164. write_ptddata_to_fifo(isp116x, ep->data, ep->length);
  165. buflen -= ALIGN(ep->length, 4);
  166. }
  167. }
  168. BUG_ON(buflen);
  169. }
  170. /*
  171. Read the processed ptd's and data from fifo ram back to
  172. URBs' buffers. Fifo must be full and done
  173. */
  174. static void unpack_fifo(struct isp116x *isp116x)
  175. {
  176. struct isp116x_ep *ep;
  177. struct ptd *ptd;
  178. int buflen = isp116x->atl_last_dir == PTD_DIR_IN
  179. ? isp116x->atl_buflen : isp116x->atl_bufshrt;
  180. isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
  181. isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
  182. isp116x_write_addr(isp116x, HCATLPORT);
  183. for (ep = isp116x->atl_active; ep; ep = ep->active) {
  184. ptd = &ep->ptd;
  185. ptd->count = isp116x_read_data16(isp116x);
  186. ptd->mps = isp116x_read_data16(isp116x);
  187. ptd->len = isp116x_read_data16(isp116x);
  188. ptd->faddr = isp116x_read_data16(isp116x);
  189. buflen -= sizeof(struct ptd);
  190. /* Skip reading data for last Setup or Out PTD */
  191. if (ep->active || (isp116x->atl_last_dir == PTD_DIR_IN)) {
  192. read_ptddata_from_fifo(isp116x, ep->data, ep->length);
  193. buflen -= ALIGN(ep->length, 4);
  194. }
  195. dump_ptd(ptd);
  196. dump_ptd_in_data(ptd, ep->data);
  197. }
  198. BUG_ON(buflen);
  199. }
  200. /*---------------------------------------------------------------*/
  201. /*
  202. Set up PTD's.
  203. */
  204. static void preproc_atl_queue(struct isp116x *isp116x)
  205. {
  206. struct isp116x_ep *ep;
  207. struct urb *urb;
  208. struct ptd *ptd;
  209. u16 len;
  210. for (ep = isp116x->atl_active; ep; ep = ep->active) {
  211. u16 toggle = 0, dir = PTD_DIR_SETUP;
  212. BUG_ON(list_empty(&ep->hep->urb_list));
  213. urb = container_of(ep->hep->urb_list.next,
  214. struct urb, urb_list);
  215. ptd = &ep->ptd;
  216. len = ep->length;
  217. ep->data = (unsigned char *)urb->transfer_buffer
  218. + urb->actual_length;
  219. switch (ep->nextpid) {
  220. case USB_PID_IN:
  221. toggle = usb_gettoggle(urb->dev, ep->epnum, 0);
  222. dir = PTD_DIR_IN;
  223. break;
  224. case USB_PID_OUT:
  225. toggle = usb_gettoggle(urb->dev, ep->epnum, 1);
  226. dir = PTD_DIR_OUT;
  227. break;
  228. case USB_PID_SETUP:
  229. len = sizeof(struct usb_ctrlrequest);
  230. ep->data = urb->setup_packet;
  231. break;
  232. case USB_PID_ACK:
  233. toggle = 1;
  234. len = 0;
  235. dir = (urb->transfer_buffer_length
  236. && usb_pipein(urb->pipe))
  237. ? PTD_DIR_OUT : PTD_DIR_IN;
  238. break;
  239. default:
  240. ERR("%s %d: ep->nextpid %d\n", __func__, __LINE__,
  241. ep->nextpid);
  242. BUG();
  243. }
  244. ptd->count = PTD_CC_MSK | PTD_ACTIVE_MSK | PTD_TOGGLE(toggle);
  245. ptd->mps = PTD_MPS(ep->maxpacket)
  246. | PTD_SPD(urb->dev->speed == USB_SPEED_LOW)
  247. | PTD_EP(ep->epnum);
  248. ptd->len = PTD_LEN(len) | PTD_DIR(dir);
  249. ptd->faddr = PTD_FA(usb_pipedevice(urb->pipe));
  250. if (!ep->active) {
  251. ptd->mps |= PTD_LAST_MSK;
  252. isp116x->atl_last_dir = dir;
  253. }
  254. isp116x->atl_bufshrt = sizeof(struct ptd) + isp116x->atl_buflen;
  255. isp116x->atl_buflen = isp116x->atl_bufshrt + ALIGN(len, 4);
  256. }
  257. }
  258. /*
  259. Take done or failed requests out of schedule. Give back
  260. processed urbs.
  261. */
  262. static void finish_request(struct isp116x *isp116x, struct isp116x_ep *ep,
  263. struct urb *urb, int status)
  264. __releases(isp116x->lock) __acquires(isp116x->lock)
  265. {
  266. unsigned i;
  267. ep->error_count = 0;
  268. if (usb_pipecontrol(urb->pipe))
  269. ep->nextpid = USB_PID_SETUP;
  270. urb_dbg(urb, "Finish");
  271. usb_hcd_unlink_urb_from_ep(isp116x_to_hcd(isp116x), urb);
  272. spin_unlock(&isp116x->lock);
  273. usb_hcd_giveback_urb(isp116x_to_hcd(isp116x), urb, status);
  274. spin_lock(&isp116x->lock);
  275. /* take idle endpoints out of the schedule */
  276. if (!list_empty(&ep->hep->urb_list))
  277. return;
  278. /* async deschedule */
  279. if (!list_empty(&ep->schedule)) {
  280. list_del_init(&ep->schedule);
  281. return;
  282. }
  283. /* periodic deschedule */
  284. DBG("deschedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
  285. for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
  286. struct isp116x_ep *temp;
  287. struct isp116x_ep **prev = &isp116x->periodic[i];
  288. while (*prev && ((temp = *prev) != ep))
  289. prev = &temp->next;
  290. if (*prev)
  291. *prev = ep->next;
  292. isp116x->load[i] -= ep->load;
  293. }
  294. ep->branch = PERIODIC_SIZE;
  295. isp116x_to_hcd(isp116x)->self.bandwidth_allocated -=
  296. ep->load / ep->period;
  297. /* switch irq type? */
  298. if (!--isp116x->periodic_count) {
  299. isp116x->irqenb &= ~HCuPINT_SOF;
  300. isp116x->irqenb |= HCuPINT_ATL;
  301. }
  302. }
  303. /*
  304. Analyze transfer results, handle partial transfers and errors
  305. */
  306. static void postproc_atl_queue(struct isp116x *isp116x)
  307. {
  308. struct isp116x_ep *ep;
  309. struct urb *urb;
  310. struct usb_device *udev;
  311. struct ptd *ptd;
  312. int short_not_ok;
  313. int status;
  314. u8 cc;
  315. for (ep = isp116x->atl_active; ep; ep = ep->active) {
  316. BUG_ON(list_empty(&ep->hep->urb_list));
  317. urb =
  318. container_of(ep->hep->urb_list.next, struct urb, urb_list);
  319. udev = urb->dev;
  320. ptd = &ep->ptd;
  321. cc = PTD_GET_CC(ptd);
  322. short_not_ok = 1;
  323. status = -EINPROGRESS;
  324. /* Data underrun is special. For allowed underrun
  325. we clear the error and continue as normal. For
  326. forbidden underrun we finish the DATA stage
  327. immediately while for control transfer,
  328. we do a STATUS stage. */
  329. if (cc == TD_DATAUNDERRUN) {
  330. if (!(urb->transfer_flags & URB_SHORT_NOT_OK) ||
  331. usb_pipecontrol(urb->pipe)) {
  332. DBG("Allowed or control data underrun\n");
  333. cc = TD_CC_NOERROR;
  334. short_not_ok = 0;
  335. } else {
  336. ep->error_count = 1;
  337. usb_settoggle(udev, ep->epnum,
  338. ep->nextpid == USB_PID_OUT,
  339. PTD_GET_TOGGLE(ptd));
  340. urb->actual_length += PTD_GET_COUNT(ptd);
  341. status = cc_to_error[TD_DATAUNDERRUN];
  342. goto done;
  343. }
  344. }
  345. if (cc != TD_CC_NOERROR && cc != TD_NOTACCESSED
  346. && (++ep->error_count >= 3 || cc == TD_CC_STALL
  347. || cc == TD_DATAOVERRUN)) {
  348. status = cc_to_error[cc];
  349. if (ep->nextpid == USB_PID_ACK)
  350. ep->nextpid = 0;
  351. goto done;
  352. }
  353. /* According to usb spec, zero-length Int transfer signals
  354. finishing of the urb. Hey, does this apply only
  355. for IN endpoints? */
  356. if (usb_pipeint(urb->pipe) && !PTD_GET_LEN(ptd)) {
  357. status = 0;
  358. goto done;
  359. }
  360. /* Relax after previously failed, but later succeeded
  361. or correctly NAK'ed retransmission attempt */
  362. if (ep->error_count
  363. && (cc == TD_CC_NOERROR || cc == TD_NOTACCESSED))
  364. ep->error_count = 0;
  365. /* Take into account idiosyncracies of the isp116x chip
  366. regarding toggle bit for failed transfers */
  367. if (ep->nextpid == USB_PID_OUT)
  368. usb_settoggle(udev, ep->epnum, 1, PTD_GET_TOGGLE(ptd)
  369. ^ (ep->error_count > 0));
  370. else if (ep->nextpid == USB_PID_IN)
  371. usb_settoggle(udev, ep->epnum, 0, PTD_GET_TOGGLE(ptd)
  372. ^ (ep->error_count > 0));
  373. switch (ep->nextpid) {
  374. case USB_PID_IN:
  375. case USB_PID_OUT:
  376. urb->actual_length += PTD_GET_COUNT(ptd);
  377. if (PTD_GET_ACTIVE(ptd)
  378. || (cc != TD_CC_NOERROR && cc < 0x0E))
  379. break;
  380. if (urb->transfer_buffer_length != urb->actual_length) {
  381. if (short_not_ok)
  382. break;
  383. } else {
  384. if (urb->transfer_flags & URB_ZERO_PACKET
  385. && ep->nextpid == USB_PID_OUT
  386. && !(PTD_GET_COUNT(ptd) % ep->maxpacket)) {
  387. DBG("Zero packet requested\n");
  388. break;
  389. }
  390. }
  391. /* All data for this URB is transferred, let's finish */
  392. if (usb_pipecontrol(urb->pipe))
  393. ep->nextpid = USB_PID_ACK;
  394. else
  395. status = 0;
  396. break;
  397. case USB_PID_SETUP:
  398. if (PTD_GET_ACTIVE(ptd)
  399. || (cc != TD_CC_NOERROR && cc < 0x0E))
  400. break;
  401. if (urb->transfer_buffer_length == urb->actual_length)
  402. ep->nextpid = USB_PID_ACK;
  403. else if (usb_pipeout(urb->pipe)) {
  404. usb_settoggle(udev, 0, 1, 1);
  405. ep->nextpid = USB_PID_OUT;
  406. } else {
  407. usb_settoggle(udev, 0, 0, 1);
  408. ep->nextpid = USB_PID_IN;
  409. }
  410. break;
  411. case USB_PID_ACK:
  412. if (PTD_GET_ACTIVE(ptd)
  413. || (cc != TD_CC_NOERROR && cc < 0x0E))
  414. break;
  415. status = 0;
  416. ep->nextpid = 0;
  417. break;
  418. default:
  419. BUG();
  420. }
  421. done:
  422. if (status != -EINPROGRESS || urb->unlinked)
  423. finish_request(isp116x, ep, urb, status);
  424. }
  425. }
  426. /*
  427. Scan transfer lists, schedule transfers, send data off
  428. to chip.
  429. */
  430. static void start_atl_transfers(struct isp116x *isp116x)
  431. {
  432. struct isp116x_ep *last_ep = NULL, *ep;
  433. struct urb *urb;
  434. u16 load = 0;
  435. int len, index, speed, byte_time;
  436. if (atomic_read(&isp116x->atl_finishing))
  437. return;
  438. if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state))
  439. return;
  440. /* FIFO not empty? */
  441. if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL)
  442. return;
  443. isp116x->atl_active = NULL;
  444. isp116x->atl_buflen = isp116x->atl_bufshrt = 0;
  445. /* Schedule int transfers */
  446. if (isp116x->periodic_count) {
  447. isp116x->fmindex = index =
  448. (isp116x->fmindex + 1) & (PERIODIC_SIZE - 1);
  449. load = isp116x->load[index];
  450. if (load) {
  451. /* Bring all int transfers for this frame
  452. into the active queue */
  453. isp116x->atl_active = last_ep =
  454. isp116x->periodic[index];
  455. while (last_ep->next)
  456. last_ep = (last_ep->active = last_ep->next);
  457. last_ep->active = NULL;
  458. }
  459. }
  460. /* Schedule control/bulk transfers */
  461. list_for_each_entry(ep, &isp116x->async, schedule) {
  462. urb = container_of(ep->hep->urb_list.next,
  463. struct urb, urb_list);
  464. speed = urb->dev->speed;
  465. byte_time = speed == USB_SPEED_LOW
  466. ? BYTE_TIME_LOWSPEED : BYTE_TIME_FULLSPEED;
  467. if (ep->nextpid == USB_PID_SETUP) {
  468. len = sizeof(struct usb_ctrlrequest);
  469. } else if (ep->nextpid == USB_PID_ACK) {
  470. len = 0;
  471. } else {
  472. /* Find current free length ... */
  473. len = (MAX_LOAD_LIMIT - load) / byte_time;
  474. /* ... then limit it to configured max size ... */
  475. len = min(len, speed == USB_SPEED_LOW ?
  476. MAX_TRANSFER_SIZE_LOWSPEED :
  477. MAX_TRANSFER_SIZE_FULLSPEED);
  478. /* ... and finally cut to the multiple of MaxPacketSize,
  479. or to the real length if there's enough room. */
  480. if (len <
  481. (urb->transfer_buffer_length -
  482. urb->actual_length)) {
  483. len -= len % ep->maxpacket;
  484. if (!len)
  485. continue;
  486. } else
  487. len = urb->transfer_buffer_length -
  488. urb->actual_length;
  489. BUG_ON(len < 0);
  490. }
  491. load += len * byte_time;
  492. if (load > MAX_LOAD_LIMIT)
  493. break;
  494. ep->active = NULL;
  495. ep->length = len;
  496. if (last_ep)
  497. last_ep->active = ep;
  498. else
  499. isp116x->atl_active = ep;
  500. last_ep = ep;
  501. }
  502. /* Avoid starving of endpoints */
  503. if ((&isp116x->async)->next != (&isp116x->async)->prev)
  504. list_move(&isp116x->async, (&isp116x->async)->next);
  505. if (isp116x->atl_active) {
  506. preproc_atl_queue(isp116x);
  507. pack_fifo(isp116x);
  508. }
  509. }
  510. /*
  511. Finish the processed transfers
  512. */
  513. static void finish_atl_transfers(struct isp116x *isp116x)
  514. {
  515. if (!isp116x->atl_active)
  516. return;
  517. /* Fifo not ready? */
  518. if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE))
  519. return;
  520. atomic_inc(&isp116x->atl_finishing);
  521. unpack_fifo(isp116x);
  522. postproc_atl_queue(isp116x);
  523. atomic_dec(&isp116x->atl_finishing);
  524. }
  525. static irqreturn_t isp116x_irq(struct usb_hcd *hcd)
  526. {
  527. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  528. u16 irqstat;
  529. irqreturn_t ret = IRQ_NONE;
  530. spin_lock(&isp116x->lock);
  531. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  532. irqstat = isp116x_read_reg16(isp116x, HCuPINT);
  533. isp116x_write_reg16(isp116x, HCuPINT, irqstat);
  534. if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
  535. ret = IRQ_HANDLED;
  536. finish_atl_transfers(isp116x);
  537. }
  538. if (irqstat & HCuPINT_OPR) {
  539. u32 intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
  540. isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
  541. if (intstat & HCINT_UE) {
  542. ERR("Unrecoverable error, HC is dead!\n");
  543. /* IRQ's are off, we do no DMA,
  544. perfectly ready to die ... */
  545. hcd->state = HC_STATE_HALT;
  546. usb_hc_died(hcd);
  547. ret = IRQ_HANDLED;
  548. goto done;
  549. }
  550. if (intstat & HCINT_RHSC)
  551. /* When root hub or any of its ports is going
  552. to come out of suspend, it may take more
  553. than 10ms for status bits to stabilize. */
  554. mod_timer(&hcd->rh_timer, jiffies
  555. + msecs_to_jiffies(20) + 1);
  556. if (intstat & HCINT_RD) {
  557. DBG("---- remote wakeup\n");
  558. usb_hcd_resume_root_hub(hcd);
  559. }
  560. irqstat &= ~HCuPINT_OPR;
  561. ret = IRQ_HANDLED;
  562. }
  563. if (irqstat & (HCuPINT_ATL | HCuPINT_SOF)) {
  564. start_atl_transfers(isp116x);
  565. }
  566. isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
  567. done:
  568. spin_unlock(&isp116x->lock);
  569. return ret;
  570. }
  571. /*-----------------------------------------------------------------*/
  572. /* usb 1.1 says max 90% of a frame is available for periodic transfers.
  573. * this driver doesn't promise that much since it's got to handle an
  574. * IRQ per packet; irq handling latencies also use up that time.
  575. */
  576. /* out of 1000 us */
  577. #define MAX_PERIODIC_LOAD 600
  578. static int balance(struct isp116x *isp116x, u16 period, u16 load)
  579. {
  580. int i, branch = -ENOSPC;
  581. /* search for the least loaded schedule branch of that period
  582. which has enough bandwidth left unreserved. */
  583. for (i = 0; i < period; i++) {
  584. if (branch < 0 || isp116x->load[branch] > isp116x->load[i]) {
  585. int j;
  586. for (j = i; j < PERIODIC_SIZE; j += period) {
  587. if ((isp116x->load[j] + load)
  588. > MAX_PERIODIC_LOAD)
  589. break;
  590. }
  591. if (j < PERIODIC_SIZE)
  592. continue;
  593. branch = i;
  594. }
  595. }
  596. return branch;
  597. }
  598. /* NB! ALL the code above this point runs with isp116x->lock
  599. held, irqs off
  600. */
  601. /*-----------------------------------------------------------------*/
  602. static int isp116x_urb_enqueue(struct usb_hcd *hcd,
  603. struct urb *urb,
  604. gfp_t mem_flags)
  605. {
  606. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  607. struct usb_device *udev = urb->dev;
  608. unsigned int pipe = urb->pipe;
  609. int is_out = !usb_pipein(pipe);
  610. int type = usb_pipetype(pipe);
  611. int epnum = usb_pipeendpoint(pipe);
  612. struct usb_host_endpoint *hep = urb->ep;
  613. struct isp116x_ep *ep = NULL;
  614. unsigned long flags;
  615. int i;
  616. int ret = 0;
  617. urb_dbg(urb, "Enqueue");
  618. if (type == PIPE_ISOCHRONOUS) {
  619. ERR("Isochronous transfers not supported\n");
  620. urb_dbg(urb, "Refused to enqueue");
  621. return -ENXIO;
  622. }
  623. /* avoid all allocations within spinlocks: request or endpoint */
  624. if (!hep->hcpriv) {
  625. ep = kzalloc(sizeof *ep, mem_flags);
  626. if (!ep)
  627. return -ENOMEM;
  628. }
  629. spin_lock_irqsave(&isp116x->lock, flags);
  630. if (!HC_IS_RUNNING(hcd->state)) {
  631. kfree(ep);
  632. ret = -ENODEV;
  633. goto fail_not_linked;
  634. }
  635. ret = usb_hcd_link_urb_to_ep(hcd, urb);
  636. if (ret) {
  637. kfree(ep);
  638. goto fail_not_linked;
  639. }
  640. if (hep->hcpriv)
  641. ep = hep->hcpriv;
  642. else {
  643. INIT_LIST_HEAD(&ep->schedule);
  644. ep->udev = udev;
  645. ep->epnum = epnum;
  646. ep->maxpacket = usb_maxpacket(udev, urb->pipe, is_out);
  647. usb_settoggle(udev, epnum, is_out, 0);
  648. if (type == PIPE_CONTROL) {
  649. ep->nextpid = USB_PID_SETUP;
  650. } else if (is_out) {
  651. ep->nextpid = USB_PID_OUT;
  652. } else {
  653. ep->nextpid = USB_PID_IN;
  654. }
  655. if (urb->interval) {
  656. /*
  657. With INT URBs submitted, the driver works with SOF
  658. interrupt enabled and ATL interrupt disabled. After
  659. the PTDs are written to fifo ram, the chip starts
  660. fifo processing and usb transfers after the next
  661. SOF and continues until the transfers are finished
  662. (succeeded or failed) or the frame ends. Therefore,
  663. the transfers occur only in every second frame,
  664. while fifo reading/writing and data processing
  665. occur in every other second frame. */
  666. if (urb->interval < 2)
  667. urb->interval = 2;
  668. if (urb->interval > 2 * PERIODIC_SIZE)
  669. urb->interval = 2 * PERIODIC_SIZE;
  670. ep->period = urb->interval >> 1;
  671. ep->branch = PERIODIC_SIZE;
  672. ep->load = usb_calc_bus_time(udev->speed,
  673. !is_out,
  674. (type == PIPE_ISOCHRONOUS),
  675. usb_maxpacket(udev, pipe,
  676. is_out)) /
  677. 1000;
  678. }
  679. hep->hcpriv = ep;
  680. ep->hep = hep;
  681. }
  682. /* maybe put endpoint into schedule */
  683. switch (type) {
  684. case PIPE_CONTROL:
  685. case PIPE_BULK:
  686. if (list_empty(&ep->schedule))
  687. list_add_tail(&ep->schedule, &isp116x->async);
  688. break;
  689. case PIPE_INTERRUPT:
  690. urb->interval = ep->period;
  691. ep->length = min_t(u32, ep->maxpacket,
  692. urb->transfer_buffer_length);
  693. /* urb submitted for already existing endpoint */
  694. if (ep->branch < PERIODIC_SIZE)
  695. break;
  696. ep->branch = ret = balance(isp116x, ep->period, ep->load);
  697. if (ret < 0)
  698. goto fail;
  699. ret = 0;
  700. urb->start_frame = (isp116x->fmindex & (PERIODIC_SIZE - 1))
  701. + ep->branch;
  702. /* sort each schedule branch by period (slow before fast)
  703. to share the faster parts of the tree without needing
  704. dummy/placeholder nodes */
  705. DBG("schedule qh%d/%p branch %d\n", ep->period, ep, ep->branch);
  706. for (i = ep->branch; i < PERIODIC_SIZE; i += ep->period) {
  707. struct isp116x_ep **prev = &isp116x->periodic[i];
  708. struct isp116x_ep *here = *prev;
  709. while (here && ep != here) {
  710. if (ep->period > here->period)
  711. break;
  712. prev = &here->next;
  713. here = *prev;
  714. }
  715. if (ep != here) {
  716. ep->next = here;
  717. *prev = ep;
  718. }
  719. isp116x->load[i] += ep->load;
  720. }
  721. hcd->self.bandwidth_allocated += ep->load / ep->period;
  722. /* switch over to SOFint */
  723. if (!isp116x->periodic_count++) {
  724. isp116x->irqenb &= ~HCuPINT_ATL;
  725. isp116x->irqenb |= HCuPINT_SOF;
  726. isp116x_write_reg16(isp116x, HCuPINTENB,
  727. isp116x->irqenb);
  728. }
  729. }
  730. urb->hcpriv = hep;
  731. start_atl_transfers(isp116x);
  732. fail:
  733. if (ret)
  734. usb_hcd_unlink_urb_from_ep(hcd, urb);
  735. fail_not_linked:
  736. spin_unlock_irqrestore(&isp116x->lock, flags);
  737. return ret;
  738. }
  739. /*
  740. Dequeue URBs.
  741. */
  742. static int isp116x_urb_dequeue(struct usb_hcd *hcd, struct urb *urb,
  743. int status)
  744. {
  745. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  746. struct usb_host_endpoint *hep;
  747. struct isp116x_ep *ep, *ep_act;
  748. unsigned long flags;
  749. int rc;
  750. spin_lock_irqsave(&isp116x->lock, flags);
  751. rc = usb_hcd_check_unlink_urb(hcd, urb, status);
  752. if (rc)
  753. goto done;
  754. hep = urb->hcpriv;
  755. ep = hep->hcpriv;
  756. WARN_ON(hep != ep->hep);
  757. /* In front of queue? */
  758. if (ep->hep->urb_list.next == &urb->urb_list)
  759. /* active? */
  760. for (ep_act = isp116x->atl_active; ep_act;
  761. ep_act = ep_act->active)
  762. if (ep_act == ep) {
  763. VDBG("dequeue, urb %p active; wait for irq\n",
  764. urb);
  765. urb = NULL;
  766. break;
  767. }
  768. if (urb)
  769. finish_request(isp116x, ep, urb, status);
  770. done:
  771. spin_unlock_irqrestore(&isp116x->lock, flags);
  772. return rc;
  773. }
  774. static void isp116x_endpoint_disable(struct usb_hcd *hcd,
  775. struct usb_host_endpoint *hep)
  776. {
  777. int i;
  778. struct isp116x_ep *ep = hep->hcpriv;
  779. if (!ep)
  780. return;
  781. /* assume we'd just wait for the irq */
  782. for (i = 0; i < 100 && !list_empty(&hep->urb_list); i++)
  783. msleep(3);
  784. if (!list_empty(&hep->urb_list))
  785. WARNING("ep %p not empty?\n", ep);
  786. kfree(ep);
  787. hep->hcpriv = NULL;
  788. }
  789. static int isp116x_get_frame(struct usb_hcd *hcd)
  790. {
  791. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  792. u32 fmnum;
  793. unsigned long flags;
  794. spin_lock_irqsave(&isp116x->lock, flags);
  795. fmnum = isp116x_read_reg32(isp116x, HCFMNUM);
  796. spin_unlock_irqrestore(&isp116x->lock, flags);
  797. return (int)fmnum;
  798. }
  799. /*
  800. Adapted from ohci-hub.c. Currently we don't support autosuspend.
  801. */
  802. static int isp116x_hub_status_data(struct usb_hcd *hcd, char *buf)
  803. {
  804. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  805. int ports, i, changed = 0;
  806. unsigned long flags;
  807. if (!HC_IS_RUNNING(hcd->state))
  808. return -ESHUTDOWN;
  809. /* Report no status change now, if we are scheduled to be
  810. called later */
  811. if (timer_pending(&hcd->rh_timer))
  812. return 0;
  813. ports = isp116x->rhdesca & RH_A_NDP;
  814. spin_lock_irqsave(&isp116x->lock, flags);
  815. isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
  816. if (isp116x->rhstatus & (RH_HS_LPSC | RH_HS_OCIC))
  817. buf[0] = changed = 1;
  818. else
  819. buf[0] = 0;
  820. for (i = 0; i < ports; i++) {
  821. u32 status = isp116x_read_reg32(isp116x, i ? HCRHPORT2 : HCRHPORT1);
  822. if (status & (RH_PS_CSC | RH_PS_PESC | RH_PS_PSSC
  823. | RH_PS_OCIC | RH_PS_PRSC)) {
  824. changed = 1;
  825. buf[0] |= 1 << (i + 1);
  826. }
  827. }
  828. spin_unlock_irqrestore(&isp116x->lock, flags);
  829. return changed;
  830. }
  831. static void isp116x_hub_descriptor(struct isp116x *isp116x,
  832. struct usb_hub_descriptor *desc)
  833. {
  834. u32 reg = isp116x->rhdesca;
  835. desc->bDescriptorType = USB_DT_HUB;
  836. desc->bDescLength = 9;
  837. desc->bHubContrCurrent = 0;
  838. desc->bNbrPorts = (u8) (reg & 0x3);
  839. /* Power switching, device type, overcurrent. */
  840. desc->wHubCharacteristics = cpu_to_le16((u16) ((reg >> 8) &
  841. (HUB_CHAR_LPSM |
  842. HUB_CHAR_COMPOUND |
  843. HUB_CHAR_OCPM)));
  844. desc->bPwrOn2PwrGood = (u8) ((reg >> 24) & 0xff);
  845. /* ports removable, and legacy PortPwrCtrlMask */
  846. desc->u.hs.DeviceRemovable[0] = 0;
  847. desc->u.hs.DeviceRemovable[1] = ~0;
  848. }
  849. /* Perform reset of a given port.
  850. It would be great to just start the reset and let the
  851. USB core to clear the reset in due time. However,
  852. root hub ports should be reset for at least 50 ms, while
  853. our chip stays in reset for about 10 ms. I.e., we must
  854. repeatedly reset it ourself here.
  855. */
  856. static inline void root_port_reset(struct isp116x *isp116x, unsigned port)
  857. {
  858. u32 tmp;
  859. unsigned long flags, t;
  860. /* Root hub reset should be 50 ms, but some devices
  861. want it even longer. */
  862. t = jiffies + msecs_to_jiffies(100);
  863. while (time_before(jiffies, t)) {
  864. spin_lock_irqsave(&isp116x->lock, flags);
  865. /* spin until any current reset finishes */
  866. for (;;) {
  867. tmp = isp116x_read_reg32(isp116x, port ?
  868. HCRHPORT2 : HCRHPORT1);
  869. if (!(tmp & RH_PS_PRS))
  870. break;
  871. udelay(500);
  872. }
  873. /* Don't reset a disconnected port */
  874. if (!(tmp & RH_PS_CCS)) {
  875. spin_unlock_irqrestore(&isp116x->lock, flags);
  876. break;
  877. }
  878. /* Reset lasts 10ms (claims datasheet) */
  879. isp116x_write_reg32(isp116x, port ? HCRHPORT2 :
  880. HCRHPORT1, (RH_PS_PRS));
  881. spin_unlock_irqrestore(&isp116x->lock, flags);
  882. msleep(10);
  883. }
  884. }
  885. /* Adapted from ohci-hub.c */
  886. static int isp116x_hub_control(struct usb_hcd *hcd,
  887. u16 typeReq,
  888. u16 wValue, u16 wIndex, char *buf, u16 wLength)
  889. {
  890. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  891. int ret = 0;
  892. unsigned long flags;
  893. int ports = isp116x->rhdesca & RH_A_NDP;
  894. u32 tmp = 0;
  895. switch (typeReq) {
  896. case ClearHubFeature:
  897. DBG("ClearHubFeature: ");
  898. switch (wValue) {
  899. case C_HUB_OVER_CURRENT:
  900. DBG("C_HUB_OVER_CURRENT\n");
  901. spin_lock_irqsave(&isp116x->lock, flags);
  902. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
  903. spin_unlock_irqrestore(&isp116x->lock, flags);
  904. case C_HUB_LOCAL_POWER:
  905. DBG("C_HUB_LOCAL_POWER\n");
  906. break;
  907. default:
  908. goto error;
  909. }
  910. break;
  911. case SetHubFeature:
  912. DBG("SetHubFeature: ");
  913. switch (wValue) {
  914. case C_HUB_OVER_CURRENT:
  915. case C_HUB_LOCAL_POWER:
  916. DBG("C_HUB_OVER_CURRENT or C_HUB_LOCAL_POWER\n");
  917. break;
  918. default:
  919. goto error;
  920. }
  921. break;
  922. case GetHubDescriptor:
  923. DBG("GetHubDescriptor\n");
  924. isp116x_hub_descriptor(isp116x,
  925. (struct usb_hub_descriptor *)buf);
  926. break;
  927. case GetHubStatus:
  928. DBG("GetHubStatus\n");
  929. *(__le32 *) buf = 0;
  930. break;
  931. case GetPortStatus:
  932. DBG("GetPortStatus\n");
  933. if (!wIndex || wIndex > ports)
  934. goto error;
  935. spin_lock_irqsave(&isp116x->lock, flags);
  936. tmp = isp116x_read_reg32(isp116x, (--wIndex) ? HCRHPORT2 : HCRHPORT1);
  937. spin_unlock_irqrestore(&isp116x->lock, flags);
  938. *(__le32 *) buf = cpu_to_le32(tmp);
  939. DBG("GetPortStatus: port[%d] %08x\n", wIndex + 1, tmp);
  940. break;
  941. case ClearPortFeature:
  942. DBG("ClearPortFeature: ");
  943. if (!wIndex || wIndex > ports)
  944. goto error;
  945. wIndex--;
  946. switch (wValue) {
  947. case USB_PORT_FEAT_ENABLE:
  948. DBG("USB_PORT_FEAT_ENABLE\n");
  949. tmp = RH_PS_CCS;
  950. break;
  951. case USB_PORT_FEAT_C_ENABLE:
  952. DBG("USB_PORT_FEAT_C_ENABLE\n");
  953. tmp = RH_PS_PESC;
  954. break;
  955. case USB_PORT_FEAT_SUSPEND:
  956. DBG("USB_PORT_FEAT_SUSPEND\n");
  957. tmp = RH_PS_POCI;
  958. break;
  959. case USB_PORT_FEAT_C_SUSPEND:
  960. DBG("USB_PORT_FEAT_C_SUSPEND\n");
  961. tmp = RH_PS_PSSC;
  962. break;
  963. case USB_PORT_FEAT_POWER:
  964. DBG("USB_PORT_FEAT_POWER\n");
  965. tmp = RH_PS_LSDA;
  966. break;
  967. case USB_PORT_FEAT_C_CONNECTION:
  968. DBG("USB_PORT_FEAT_C_CONNECTION\n");
  969. tmp = RH_PS_CSC;
  970. break;
  971. case USB_PORT_FEAT_C_OVER_CURRENT:
  972. DBG("USB_PORT_FEAT_C_OVER_CURRENT\n");
  973. tmp = RH_PS_OCIC;
  974. break;
  975. case USB_PORT_FEAT_C_RESET:
  976. DBG("USB_PORT_FEAT_C_RESET\n");
  977. tmp = RH_PS_PRSC;
  978. break;
  979. default:
  980. goto error;
  981. }
  982. spin_lock_irqsave(&isp116x->lock, flags);
  983. isp116x_write_reg32(isp116x, wIndex
  984. ? HCRHPORT2 : HCRHPORT1, tmp);
  985. spin_unlock_irqrestore(&isp116x->lock, flags);
  986. break;
  987. case SetPortFeature:
  988. DBG("SetPortFeature: ");
  989. if (!wIndex || wIndex > ports)
  990. goto error;
  991. wIndex--;
  992. switch (wValue) {
  993. case USB_PORT_FEAT_SUSPEND:
  994. DBG("USB_PORT_FEAT_SUSPEND\n");
  995. spin_lock_irqsave(&isp116x->lock, flags);
  996. isp116x_write_reg32(isp116x, wIndex
  997. ? HCRHPORT2 : HCRHPORT1, RH_PS_PSS);
  998. spin_unlock_irqrestore(&isp116x->lock, flags);
  999. break;
  1000. case USB_PORT_FEAT_POWER:
  1001. DBG("USB_PORT_FEAT_POWER\n");
  1002. spin_lock_irqsave(&isp116x->lock, flags);
  1003. isp116x_write_reg32(isp116x, wIndex
  1004. ? HCRHPORT2 : HCRHPORT1, RH_PS_PPS);
  1005. spin_unlock_irqrestore(&isp116x->lock, flags);
  1006. break;
  1007. case USB_PORT_FEAT_RESET:
  1008. DBG("USB_PORT_FEAT_RESET\n");
  1009. root_port_reset(isp116x, wIndex);
  1010. break;
  1011. default:
  1012. goto error;
  1013. }
  1014. break;
  1015. default:
  1016. error:
  1017. /* "protocol stall" on error */
  1018. DBG("PROTOCOL STALL\n");
  1019. ret = -EPIPE;
  1020. }
  1021. return ret;
  1022. }
  1023. /*-----------------------------------------------------------------*/
  1024. #ifdef CONFIG_DEBUG_FS
  1025. static void dump_irq(struct seq_file *s, char *label, u16 mask)
  1026. {
  1027. seq_printf(s, "%s %04x%s%s%s%s%s%s\n", label, mask,
  1028. mask & HCuPINT_CLKRDY ? " clkrdy" : "",
  1029. mask & HCuPINT_SUSP ? " susp" : "",
  1030. mask & HCuPINT_OPR ? " opr" : "",
  1031. mask & HCuPINT_AIIEOT ? " eot" : "",
  1032. mask & HCuPINT_ATL ? " atl" : "",
  1033. mask & HCuPINT_SOF ? " sof" : "");
  1034. }
  1035. static void dump_int(struct seq_file *s, char *label, u32 mask)
  1036. {
  1037. seq_printf(s, "%s %08x%s%s%s%s%s%s%s\n", label, mask,
  1038. mask & HCINT_MIE ? " MIE" : "",
  1039. mask & HCINT_RHSC ? " rhsc" : "",
  1040. mask & HCINT_FNO ? " fno" : "",
  1041. mask & HCINT_UE ? " ue" : "",
  1042. mask & HCINT_RD ? " rd" : "",
  1043. mask & HCINT_SF ? " sof" : "", mask & HCINT_SO ? " so" : "");
  1044. }
  1045. static int isp116x_show_dbg(struct seq_file *s, void *unused)
  1046. {
  1047. struct isp116x *isp116x = s->private;
  1048. seq_printf(s, "%s\n%s version %s\n",
  1049. isp116x_to_hcd(isp116x)->product_desc, hcd_name,
  1050. DRIVER_VERSION);
  1051. if (HC_IS_SUSPENDED(isp116x_to_hcd(isp116x)->state)) {
  1052. seq_printf(s, "HCD is suspended\n");
  1053. return 0;
  1054. }
  1055. if (!HC_IS_RUNNING(isp116x_to_hcd(isp116x)->state)) {
  1056. seq_printf(s, "HCD not running\n");
  1057. return 0;
  1058. }
  1059. spin_lock_irq(&isp116x->lock);
  1060. dump_irq(s, "hc_irq_enable", isp116x_read_reg16(isp116x, HCuPINTENB));
  1061. dump_irq(s, "hc_irq_status", isp116x_read_reg16(isp116x, HCuPINT));
  1062. dump_int(s, "hc_int_enable", isp116x_read_reg32(isp116x, HCINTENB));
  1063. dump_int(s, "hc_int_status", isp116x_read_reg32(isp116x, HCINTSTAT));
  1064. isp116x_show_regs_seq(isp116x, s);
  1065. spin_unlock_irq(&isp116x->lock);
  1066. seq_printf(s, "\n");
  1067. return 0;
  1068. }
  1069. static int isp116x_open_seq(struct inode *inode, struct file *file)
  1070. {
  1071. return single_open(file, isp116x_show_dbg, inode->i_private);
  1072. }
  1073. static const struct file_operations isp116x_debug_fops = {
  1074. .open = isp116x_open_seq,
  1075. .read = seq_read,
  1076. .llseek = seq_lseek,
  1077. .release = single_release,
  1078. };
  1079. static int create_debug_file(struct isp116x *isp116x)
  1080. {
  1081. isp116x->dentry = debugfs_create_file(hcd_name,
  1082. S_IRUGO, NULL, isp116x,
  1083. &isp116x_debug_fops);
  1084. if (!isp116x->dentry)
  1085. return -ENOMEM;
  1086. return 0;
  1087. }
  1088. static void remove_debug_file(struct isp116x *isp116x)
  1089. {
  1090. debugfs_remove(isp116x->dentry);
  1091. }
  1092. #else
  1093. #define create_debug_file(d) 0
  1094. #define remove_debug_file(d) do{}while(0)
  1095. #endif /* CONFIG_DEBUG_FS */
  1096. /*-----------------------------------------------------------------*/
  1097. /*
  1098. Software reset - can be called from any contect.
  1099. */
  1100. static int isp116x_sw_reset(struct isp116x *isp116x)
  1101. {
  1102. int retries = 15;
  1103. unsigned long flags;
  1104. int ret = 0;
  1105. spin_lock_irqsave(&isp116x->lock, flags);
  1106. isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
  1107. isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
  1108. while (--retries) {
  1109. /* It usually resets within 1 ms */
  1110. mdelay(1);
  1111. if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
  1112. break;
  1113. }
  1114. if (!retries) {
  1115. ERR("Software reset timeout\n");
  1116. ret = -ETIME;
  1117. }
  1118. spin_unlock_irqrestore(&isp116x->lock, flags);
  1119. return ret;
  1120. }
  1121. static int isp116x_reset(struct usb_hcd *hcd)
  1122. {
  1123. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  1124. unsigned long t;
  1125. u16 clkrdy = 0;
  1126. int ret, timeout = 15 /* ms */ ;
  1127. ret = isp116x_sw_reset(isp116x);
  1128. if (ret)
  1129. return ret;
  1130. t = jiffies + msecs_to_jiffies(timeout);
  1131. while (time_before_eq(jiffies, t)) {
  1132. msleep(4);
  1133. spin_lock_irq(&isp116x->lock);
  1134. clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
  1135. spin_unlock_irq(&isp116x->lock);
  1136. if (clkrdy)
  1137. break;
  1138. }
  1139. if (!clkrdy) {
  1140. ERR("Clock not ready after %dms\n", timeout);
  1141. /* After sw_reset the clock won't report to be ready, if
  1142. H_WAKEUP pin is high. */
  1143. ERR("Please make sure that the H_WAKEUP pin is pulled low!\n");
  1144. ret = -ENODEV;
  1145. }
  1146. return ret;
  1147. }
  1148. static void isp116x_stop(struct usb_hcd *hcd)
  1149. {
  1150. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  1151. unsigned long flags;
  1152. u32 val;
  1153. spin_lock_irqsave(&isp116x->lock, flags);
  1154. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  1155. /* Switch off ports' power, some devices don't come up
  1156. after next 'insmod' without this */
  1157. val = isp116x_read_reg32(isp116x, HCRHDESCA);
  1158. val &= ~(RH_A_NPS | RH_A_PSM);
  1159. isp116x_write_reg32(isp116x, HCRHDESCA, val);
  1160. isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
  1161. spin_unlock_irqrestore(&isp116x->lock, flags);
  1162. isp116x_sw_reset(isp116x);
  1163. }
  1164. /*
  1165. Configure the chip. The chip must be successfully reset by now.
  1166. */
  1167. static int isp116x_start(struct usb_hcd *hcd)
  1168. {
  1169. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  1170. struct isp116x_platform_data *board = isp116x->board;
  1171. u32 val;
  1172. unsigned long flags;
  1173. spin_lock_irqsave(&isp116x->lock, flags);
  1174. /* clear interrupt status and disable all interrupt sources */
  1175. isp116x_write_reg16(isp116x, HCuPINT, 0xff);
  1176. isp116x_write_reg16(isp116x, HCuPINTENB, 0);
  1177. val = isp116x_read_reg16(isp116x, HCCHIPID);
  1178. if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
  1179. ERR("Invalid chip ID %04x\n", val);
  1180. spin_unlock_irqrestore(&isp116x->lock, flags);
  1181. return -ENODEV;
  1182. }
  1183. /* To be removed in future */
  1184. hcd->uses_new_polling = 1;
  1185. isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
  1186. isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
  1187. /* ----- HW conf */
  1188. val = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1);
  1189. if (board->sel15Kres)
  1190. val |= HCHWCFG_15KRSEL;
  1191. /* Remote wakeup won't work without working clock */
  1192. if (board->remote_wakeup_enable)
  1193. val |= HCHWCFG_CLKNOTSTOP;
  1194. if (board->oc_enable)
  1195. val |= HCHWCFG_ANALOG_OC;
  1196. if (board->int_act_high)
  1197. val |= HCHWCFG_INT_POL;
  1198. if (board->int_edge_triggered)
  1199. val |= HCHWCFG_INT_TRIGGER;
  1200. isp116x_write_reg16(isp116x, HCHWCFG, val);
  1201. /* ----- Root hub conf */
  1202. val = (25 << 24) & RH_A_POTPGT;
  1203. /* AN10003_1.pdf recommends RH_A_NPS (no power switching) to
  1204. be always set. Yet, instead, we request individual port
  1205. power switching. */
  1206. val |= RH_A_PSM;
  1207. /* Report overcurrent per port */
  1208. val |= RH_A_OCPM;
  1209. isp116x_write_reg32(isp116x, HCRHDESCA, val);
  1210. isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
  1211. val = RH_B_PPCM;
  1212. isp116x_write_reg32(isp116x, HCRHDESCB, val);
  1213. isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
  1214. val = 0;
  1215. if (board->remote_wakeup_enable) {
  1216. if (!device_can_wakeup(hcd->self.controller))
  1217. device_init_wakeup(hcd->self.controller, 1);
  1218. val |= RH_HS_DRWE;
  1219. }
  1220. isp116x_write_reg32(isp116x, HCRHSTATUS, val);
  1221. isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
  1222. isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
  1223. hcd->state = HC_STATE_RUNNING;
  1224. /* Set up interrupts */
  1225. isp116x->intenb = HCINT_MIE | HCINT_RHSC | HCINT_UE;
  1226. if (board->remote_wakeup_enable)
  1227. isp116x->intenb |= HCINT_RD;
  1228. isp116x->irqenb = HCuPINT_ATL | HCuPINT_OPR; /* | HCuPINT_SUSP; */
  1229. isp116x_write_reg32(isp116x, HCINTENB, isp116x->intenb);
  1230. isp116x_write_reg16(isp116x, HCuPINTENB, isp116x->irqenb);
  1231. /* Go operational */
  1232. val = HCCONTROL_USB_OPER;
  1233. if (board->remote_wakeup_enable)
  1234. val |= HCCONTROL_RWE;
  1235. isp116x_write_reg32(isp116x, HCCONTROL, val);
  1236. /* Disable ports to avoid race in device enumeration */
  1237. isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
  1238. isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
  1239. isp116x_show_regs_log(isp116x);
  1240. spin_unlock_irqrestore(&isp116x->lock, flags);
  1241. return 0;
  1242. }
  1243. #ifdef CONFIG_PM
  1244. static int isp116x_bus_suspend(struct usb_hcd *hcd)
  1245. {
  1246. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  1247. unsigned long flags;
  1248. u32 val;
  1249. int ret = 0;
  1250. spin_lock_irqsave(&isp116x->lock, flags);
  1251. val = isp116x_read_reg32(isp116x, HCCONTROL);
  1252. switch (val & HCCONTROL_HCFS) {
  1253. case HCCONTROL_USB_OPER:
  1254. spin_unlock_irqrestore(&isp116x->lock, flags);
  1255. val &= (~HCCONTROL_HCFS & ~HCCONTROL_RWE);
  1256. val |= HCCONTROL_USB_SUSPEND;
  1257. if (hcd->self.root_hub->do_remote_wakeup)
  1258. val |= HCCONTROL_RWE;
  1259. /* Wait for usb transfers to finish */
  1260. msleep(2);
  1261. spin_lock_irqsave(&isp116x->lock, flags);
  1262. isp116x_write_reg32(isp116x, HCCONTROL, val);
  1263. spin_unlock_irqrestore(&isp116x->lock, flags);
  1264. /* Wait for devices to suspend */
  1265. msleep(5);
  1266. break;
  1267. case HCCONTROL_USB_RESUME:
  1268. isp116x_write_reg32(isp116x, HCCONTROL,
  1269. (val & ~HCCONTROL_HCFS) |
  1270. HCCONTROL_USB_RESET);
  1271. case HCCONTROL_USB_RESET:
  1272. ret = -EBUSY;
  1273. default: /* HCCONTROL_USB_SUSPEND */
  1274. spin_unlock_irqrestore(&isp116x->lock, flags);
  1275. break;
  1276. }
  1277. return ret;
  1278. }
  1279. static int isp116x_bus_resume(struct usb_hcd *hcd)
  1280. {
  1281. struct isp116x *isp116x = hcd_to_isp116x(hcd);
  1282. u32 val;
  1283. msleep(5);
  1284. spin_lock_irq(&isp116x->lock);
  1285. val = isp116x_read_reg32(isp116x, HCCONTROL);
  1286. switch (val & HCCONTROL_HCFS) {
  1287. case HCCONTROL_USB_SUSPEND:
  1288. val &= ~HCCONTROL_HCFS;
  1289. val |= HCCONTROL_USB_RESUME;
  1290. isp116x_write_reg32(isp116x, HCCONTROL, val);
  1291. case HCCONTROL_USB_RESUME:
  1292. break;
  1293. case HCCONTROL_USB_OPER:
  1294. spin_unlock_irq(&isp116x->lock);
  1295. return 0;
  1296. default:
  1297. /* HCCONTROL_USB_RESET: this may happen, when during
  1298. suspension the HC lost power. Reinitialize completely */
  1299. spin_unlock_irq(&isp116x->lock);
  1300. DBG("Chip has been reset while suspended. Reinit from scratch.\n");
  1301. isp116x_reset(hcd);
  1302. isp116x_start(hcd);
  1303. isp116x_hub_control(hcd, SetPortFeature,
  1304. USB_PORT_FEAT_POWER, 1, NULL, 0);
  1305. if ((isp116x->rhdesca & RH_A_NDP) == 2)
  1306. isp116x_hub_control(hcd, SetPortFeature,
  1307. USB_PORT_FEAT_POWER, 2, NULL, 0);
  1308. return 0;
  1309. }
  1310. val = isp116x->rhdesca & RH_A_NDP;
  1311. while (val--) {
  1312. u32 stat =
  1313. isp116x_read_reg32(isp116x, val ? HCRHPORT2 : HCRHPORT1);
  1314. /* force global, not selective, resume */
  1315. if (!(stat & RH_PS_PSS))
  1316. continue;
  1317. DBG("%s: Resuming port %d\n", __func__, val);
  1318. isp116x_write_reg32(isp116x, RH_PS_POCI, val
  1319. ? HCRHPORT2 : HCRHPORT1);
  1320. }
  1321. spin_unlock_irq(&isp116x->lock);
  1322. hcd->state = HC_STATE_RESUMING;
  1323. msleep(USB_RESUME_TIMEOUT);
  1324. /* Go operational */
  1325. spin_lock_irq(&isp116x->lock);
  1326. val = isp116x_read_reg32(isp116x, HCCONTROL);
  1327. isp116x_write_reg32(isp116x, HCCONTROL,
  1328. (val & ~HCCONTROL_HCFS) | HCCONTROL_USB_OPER);
  1329. spin_unlock_irq(&isp116x->lock);
  1330. hcd->state = HC_STATE_RUNNING;
  1331. return 0;
  1332. }
  1333. #else
  1334. #define isp116x_bus_suspend NULL
  1335. #define isp116x_bus_resume NULL
  1336. #endif
  1337. static struct hc_driver isp116x_hc_driver = {
  1338. .description = hcd_name,
  1339. .product_desc = "ISP116x Host Controller",
  1340. .hcd_priv_size = sizeof(struct isp116x),
  1341. .irq = isp116x_irq,
  1342. .flags = HCD_USB11,
  1343. .reset = isp116x_reset,
  1344. .start = isp116x_start,
  1345. .stop = isp116x_stop,
  1346. .urb_enqueue = isp116x_urb_enqueue,
  1347. .urb_dequeue = isp116x_urb_dequeue,
  1348. .endpoint_disable = isp116x_endpoint_disable,
  1349. .get_frame_number = isp116x_get_frame,
  1350. .hub_status_data = isp116x_hub_status_data,
  1351. .hub_control = isp116x_hub_control,
  1352. .bus_suspend = isp116x_bus_suspend,
  1353. .bus_resume = isp116x_bus_resume,
  1354. };
  1355. /*----------------------------------------------------------------*/
  1356. static int isp116x_remove(struct platform_device *pdev)
  1357. {
  1358. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  1359. struct isp116x *isp116x;
  1360. struct resource *res;
  1361. if (!hcd)
  1362. return 0;
  1363. isp116x = hcd_to_isp116x(hcd);
  1364. remove_debug_file(isp116x);
  1365. usb_remove_hcd(hcd);
  1366. iounmap(isp116x->data_reg);
  1367. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  1368. release_mem_region(res->start, 2);
  1369. iounmap(isp116x->addr_reg);
  1370. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1371. release_mem_region(res->start, 2);
  1372. usb_put_hcd(hcd);
  1373. return 0;
  1374. }
  1375. static int isp116x_probe(struct platform_device *pdev)
  1376. {
  1377. struct usb_hcd *hcd;
  1378. struct isp116x *isp116x;
  1379. struct resource *addr, *data, *ires;
  1380. void __iomem *addr_reg;
  1381. void __iomem *data_reg;
  1382. int irq;
  1383. int ret = 0;
  1384. unsigned long irqflags;
  1385. if (usb_disabled())
  1386. return -ENODEV;
  1387. if (pdev->num_resources < 3) {
  1388. ret = -ENODEV;
  1389. goto err1;
  1390. }
  1391. data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1392. addr = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  1393. ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1394. if (!addr || !data || !ires) {
  1395. ret = -ENODEV;
  1396. goto err1;
  1397. }
  1398. irq = ires->start;
  1399. irqflags = ires->flags & IRQF_TRIGGER_MASK;
  1400. if (pdev->dev.dma_mask) {
  1401. DBG("DMA not supported\n");
  1402. ret = -EINVAL;
  1403. goto err1;
  1404. }
  1405. if (!request_mem_region(addr->start, 2, hcd_name)) {
  1406. ret = -EBUSY;
  1407. goto err1;
  1408. }
  1409. addr_reg = ioremap(addr->start, resource_size(addr));
  1410. if (addr_reg == NULL) {
  1411. ret = -ENOMEM;
  1412. goto err2;
  1413. }
  1414. if (!request_mem_region(data->start, 2, hcd_name)) {
  1415. ret = -EBUSY;
  1416. goto err3;
  1417. }
  1418. data_reg = ioremap(data->start, resource_size(data));
  1419. if (data_reg == NULL) {
  1420. ret = -ENOMEM;
  1421. goto err4;
  1422. }
  1423. /* allocate and initialize hcd */
  1424. hcd = usb_create_hcd(&isp116x_hc_driver, &pdev->dev, dev_name(&pdev->dev));
  1425. if (!hcd) {
  1426. ret = -ENOMEM;
  1427. goto err5;
  1428. }
  1429. /* this rsrc_start is bogus */
  1430. hcd->rsrc_start = addr->start;
  1431. isp116x = hcd_to_isp116x(hcd);
  1432. isp116x->data_reg = data_reg;
  1433. isp116x->addr_reg = addr_reg;
  1434. spin_lock_init(&isp116x->lock);
  1435. INIT_LIST_HEAD(&isp116x->async);
  1436. isp116x->board = dev_get_platdata(&pdev->dev);
  1437. if (!isp116x->board) {
  1438. ERR("Platform data structure not initialized\n");
  1439. ret = -ENODEV;
  1440. goto err6;
  1441. }
  1442. if (isp116x_check_platform_delay(isp116x)) {
  1443. ERR("USE_PLATFORM_DELAY defined, but delay function not "
  1444. "implemented.\n");
  1445. ERR("See comments in drivers/usb/host/isp116x-hcd.c\n");
  1446. ret = -ENODEV;
  1447. goto err6;
  1448. }
  1449. ret = usb_add_hcd(hcd, irq, irqflags);
  1450. if (ret)
  1451. goto err6;
  1452. device_wakeup_enable(hcd->self.controller);
  1453. ret = create_debug_file(isp116x);
  1454. if (ret) {
  1455. ERR("Couldn't create debugfs entry\n");
  1456. goto err7;
  1457. }
  1458. return 0;
  1459. err7:
  1460. usb_remove_hcd(hcd);
  1461. err6:
  1462. usb_put_hcd(hcd);
  1463. err5:
  1464. iounmap(data_reg);
  1465. err4:
  1466. release_mem_region(data->start, 2);
  1467. err3:
  1468. iounmap(addr_reg);
  1469. err2:
  1470. release_mem_region(addr->start, 2);
  1471. err1:
  1472. ERR("init error, %d\n", ret);
  1473. return ret;
  1474. }
  1475. #ifdef CONFIG_PM
  1476. /*
  1477. Suspend of platform device
  1478. */
  1479. static int isp116x_suspend(struct platform_device *dev, pm_message_t state)
  1480. {
  1481. VDBG("%s: state %x\n", __func__, state.event);
  1482. return 0;
  1483. }
  1484. /*
  1485. Resume platform device
  1486. */
  1487. static int isp116x_resume(struct platform_device *dev)
  1488. {
  1489. VDBG("%s\n", __func__);
  1490. return 0;
  1491. }
  1492. #else
  1493. #define isp116x_suspend NULL
  1494. #define isp116x_resume NULL
  1495. #endif
  1496. /* work with hotplug and coldplug */
  1497. MODULE_ALIAS("platform:isp116x-hcd");
  1498. static struct platform_driver isp116x_driver = {
  1499. .probe = isp116x_probe,
  1500. .remove = isp116x_remove,
  1501. .suspend = isp116x_suspend,
  1502. .resume = isp116x_resume,
  1503. .driver = {
  1504. .name = hcd_name,
  1505. },
  1506. };
  1507. module_platform_driver(isp116x_driver);