max3421-hcd.c 50 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954
  1. /*
  2. * MAX3421 Host Controller driver for USB.
  3. *
  4. * Author: David Mosberger-Tang <davidm@egauge.net>
  5. *
  6. * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
  7. *
  8. * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
  9. * controller on a SPI bus.
  10. *
  11. * Based on:
  12. * o MAX3421E datasheet
  13. * http://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
  14. * o MAX3421E Programming Guide
  15. * http://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
  16. * o gadget/dummy_hcd.c
  17. * For USB HCD implementation.
  18. * o Arduino MAX3421 driver
  19. * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
  20. *
  21. * This file is licenced under the GPL v2.
  22. *
  23. * Important note on worst-case (full-speed) packet size constraints
  24. * (See USB 2.0 Section 5.6.3 and following):
  25. *
  26. * - control: 64 bytes
  27. * - isochronous: 1023 bytes
  28. * - interrupt: 64 bytes
  29. * - bulk: 64 bytes
  30. *
  31. * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
  32. * multi-FIFO writes/reads for a single USB packet *except* for isochronous
  33. * transfers. We don't support isochronous transfers at this time, so we
  34. * just assume that a USB packet always fits into a single FIFO buffer.
  35. *
  36. * NOTE: The June 2006 version of "MAX3421E Programming Guide"
  37. * (AN3785) has conflicting info for the RCVDAVIRQ bit:
  38. *
  39. * The description of RCVDAVIRQ says "The CPU *must* clear
  40. * this IRQ bit (by writing a 1 to it) before reading the
  41. * RCVFIFO data.
  42. *
  43. * However, the earlier section on "Programming BULK-IN
  44. * Transfers" says * that:
  45. *
  46. * After the CPU retrieves the data, it clears the
  47. * RCVDAVIRQ bit.
  48. *
  49. * The December 2006 version has been corrected and it consistently
  50. * states the second behavior is the correct one.
  51. *
  52. * Synchronous SPI transactions sleep so we can't perform any such
  53. * transactions while holding a spin-lock (and/or while interrupts are
  54. * masked). To achieve this, all SPI transactions are issued from a
  55. * single thread (max3421_spi_thread).
  56. */
  57. #include <linux/jiffies.h>
  58. #include <linux/module.h>
  59. #include <linux/spi/spi.h>
  60. #include <linux/usb.h>
  61. #include <linux/usb/hcd.h>
  62. #include <linux/platform_data/max3421-hcd.h>
  63. #define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
  64. #define DRIVER_VERSION "1.0"
  65. /* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
  66. #define USB_MAX_FRAME_NUMBER 0x7ff
  67. #define USB_MAX_RETRIES 3 /* # of retries before error is reported */
  68. /*
  69. * Max. # of times we're willing to retransmit a request immediately in
  70. * resposne to a NAK. Afterwards, we fall back on trying once a frame.
  71. */
  72. #define NAK_MAX_FAST_RETRANSMITS 2
  73. #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
  74. /* Port-change mask: */
  75. #define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
  76. USB_PORT_STAT_C_ENABLE | \
  77. USB_PORT_STAT_C_SUSPEND | \
  78. USB_PORT_STAT_C_OVERCURRENT | \
  79. USB_PORT_STAT_C_RESET) << 16)
  80. enum max3421_rh_state {
  81. MAX3421_RH_RESET,
  82. MAX3421_RH_SUSPENDED,
  83. MAX3421_RH_RUNNING
  84. };
  85. enum pkt_state {
  86. PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
  87. PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
  88. PKT_STATE_TERMINATE /* waiting to terminate control transfer */
  89. };
  90. enum scheduling_pass {
  91. SCHED_PASS_PERIODIC,
  92. SCHED_PASS_NON_PERIODIC,
  93. SCHED_PASS_DONE
  94. };
  95. /* Bit numbers for max3421_hcd->todo: */
  96. enum {
  97. ENABLE_IRQ = 0,
  98. RESET_HCD,
  99. RESET_PORT,
  100. CHECK_UNLINK,
  101. IOPIN_UPDATE
  102. };
  103. struct max3421_dma_buf {
  104. u8 data[2];
  105. };
  106. struct max3421_hcd {
  107. spinlock_t lock;
  108. struct task_struct *spi_thread;
  109. struct max3421_hcd *next;
  110. enum max3421_rh_state rh_state;
  111. /* lower 16 bits contain port status, upper 16 bits the change mask: */
  112. u32 port_status;
  113. unsigned active:1;
  114. struct list_head ep_list; /* list of EP's with work */
  115. /*
  116. * The following are owned by spi_thread (may be accessed by
  117. * SPI-thread without acquiring the HCD lock:
  118. */
  119. u8 rev; /* chip revision */
  120. u16 frame_number;
  121. /*
  122. * kmalloc'd buffers guaranteed to be in separate (DMA)
  123. * cache-lines:
  124. */
  125. struct max3421_dma_buf *tx;
  126. struct max3421_dma_buf *rx;
  127. /*
  128. * URB we're currently processing. Must not be reset to NULL
  129. * unless MAX3421E chip is idle:
  130. */
  131. struct urb *curr_urb;
  132. enum scheduling_pass sched_pass;
  133. struct usb_device *loaded_dev; /* dev that's loaded into the chip */
  134. int loaded_epnum; /* epnum whose toggles are loaded */
  135. int urb_done; /* > 0 -> no errors, < 0: errno */
  136. size_t curr_len;
  137. u8 hien;
  138. u8 mode;
  139. u8 iopins[2];
  140. unsigned long todo;
  141. #ifdef DEBUG
  142. unsigned long err_stat[16];
  143. #endif
  144. };
  145. struct max3421_ep {
  146. struct usb_host_endpoint *ep;
  147. struct list_head ep_list;
  148. u32 naks;
  149. u16 last_active; /* frame # this ep was last active */
  150. enum pkt_state pkt_state;
  151. u8 retries;
  152. u8 retransmit; /* packet needs retransmission */
  153. };
  154. static struct max3421_hcd *max3421_hcd_list;
  155. #define MAX3421_FIFO_SIZE 64
  156. #define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
  157. #define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
  158. /* SPI commands: */
  159. #define MAX3421_SPI_DIR_SHIFT 1
  160. #define MAX3421_SPI_REG_SHIFT 3
  161. #define MAX3421_REG_RCVFIFO 1
  162. #define MAX3421_REG_SNDFIFO 2
  163. #define MAX3421_REG_SUDFIFO 4
  164. #define MAX3421_REG_RCVBC 6
  165. #define MAX3421_REG_SNDBC 7
  166. #define MAX3421_REG_USBIRQ 13
  167. #define MAX3421_REG_USBIEN 14
  168. #define MAX3421_REG_USBCTL 15
  169. #define MAX3421_REG_CPUCTL 16
  170. #define MAX3421_REG_PINCTL 17
  171. #define MAX3421_REG_REVISION 18
  172. #define MAX3421_REG_IOPINS1 20
  173. #define MAX3421_REG_IOPINS2 21
  174. #define MAX3421_REG_GPINIRQ 22
  175. #define MAX3421_REG_GPINIEN 23
  176. #define MAX3421_REG_GPINPOL 24
  177. #define MAX3421_REG_HIRQ 25
  178. #define MAX3421_REG_HIEN 26
  179. #define MAX3421_REG_MODE 27
  180. #define MAX3421_REG_PERADDR 28
  181. #define MAX3421_REG_HCTL 29
  182. #define MAX3421_REG_HXFR 30
  183. #define MAX3421_REG_HRSL 31
  184. enum {
  185. MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
  186. MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
  187. MAX3421_USBIRQ_VBUSIRQ_BIT
  188. };
  189. enum {
  190. MAX3421_CPUCTL_IE_BIT = 0,
  191. MAX3421_CPUCTL_PULSEWID0_BIT = 6,
  192. MAX3421_CPUCTL_PULSEWID1_BIT
  193. };
  194. enum {
  195. MAX3421_USBCTL_PWRDOWN_BIT = 4,
  196. MAX3421_USBCTL_CHIPRES_BIT
  197. };
  198. enum {
  199. MAX3421_PINCTL_GPXA_BIT = 0,
  200. MAX3421_PINCTL_GPXB_BIT,
  201. MAX3421_PINCTL_POSINT_BIT,
  202. MAX3421_PINCTL_INTLEVEL_BIT,
  203. MAX3421_PINCTL_FDUPSPI_BIT,
  204. MAX3421_PINCTL_EP0INAK_BIT,
  205. MAX3421_PINCTL_EP2INAK_BIT,
  206. MAX3421_PINCTL_EP3INAK_BIT,
  207. };
  208. enum {
  209. MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
  210. MAX3421_HI_RWU_BIT, /* remote wakeup */
  211. MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
  212. MAX3421_HI_SNDBAV_BIT, /* send buffer available */
  213. MAX3421_HI_SUSDN_BIT, /* suspend operation done */
  214. MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
  215. MAX3421_HI_FRAME_BIT, /* frame generator */
  216. MAX3421_HI_HXFRDN_BIT, /* host transfer done */
  217. };
  218. enum {
  219. MAX3421_HCTL_BUSRST_BIT = 0,
  220. MAX3421_HCTL_FRMRST_BIT,
  221. MAX3421_HCTL_SAMPLEBUS_BIT,
  222. MAX3421_HCTL_SIGRSM_BIT,
  223. MAX3421_HCTL_RCVTOG0_BIT,
  224. MAX3421_HCTL_RCVTOG1_BIT,
  225. MAX3421_HCTL_SNDTOG0_BIT,
  226. MAX3421_HCTL_SNDTOG1_BIT
  227. };
  228. enum {
  229. MAX3421_MODE_HOST_BIT = 0,
  230. MAX3421_MODE_LOWSPEED_BIT,
  231. MAX3421_MODE_HUBPRE_BIT,
  232. MAX3421_MODE_SOFKAENAB_BIT,
  233. MAX3421_MODE_SEPIRQ_BIT,
  234. MAX3421_MODE_DELAYISO_BIT,
  235. MAX3421_MODE_DMPULLDN_BIT,
  236. MAX3421_MODE_DPPULLDN_BIT
  237. };
  238. enum {
  239. MAX3421_HRSL_OK = 0,
  240. MAX3421_HRSL_BUSY,
  241. MAX3421_HRSL_BADREQ,
  242. MAX3421_HRSL_UNDEF,
  243. MAX3421_HRSL_NAK,
  244. MAX3421_HRSL_STALL,
  245. MAX3421_HRSL_TOGERR,
  246. MAX3421_HRSL_WRONGPID,
  247. MAX3421_HRSL_BADBC,
  248. MAX3421_HRSL_PIDERR,
  249. MAX3421_HRSL_PKTERR,
  250. MAX3421_HRSL_CRCERR,
  251. MAX3421_HRSL_KERR,
  252. MAX3421_HRSL_JERR,
  253. MAX3421_HRSL_TIMEOUT,
  254. MAX3421_HRSL_BABBLE,
  255. MAX3421_HRSL_RESULT_MASK = 0xf,
  256. MAX3421_HRSL_RCVTOGRD_BIT = 4,
  257. MAX3421_HRSL_SNDTOGRD_BIT,
  258. MAX3421_HRSL_KSTATUS_BIT,
  259. MAX3421_HRSL_JSTATUS_BIT
  260. };
  261. /* Return same error-codes as ohci.h:cc_to_error: */
  262. static const int hrsl_to_error[] = {
  263. [MAX3421_HRSL_OK] = 0,
  264. [MAX3421_HRSL_BUSY] = -EINVAL,
  265. [MAX3421_HRSL_BADREQ] = -EINVAL,
  266. [MAX3421_HRSL_UNDEF] = -EINVAL,
  267. [MAX3421_HRSL_NAK] = -EAGAIN,
  268. [MAX3421_HRSL_STALL] = -EPIPE,
  269. [MAX3421_HRSL_TOGERR] = -EILSEQ,
  270. [MAX3421_HRSL_WRONGPID] = -EPROTO,
  271. [MAX3421_HRSL_BADBC] = -EREMOTEIO,
  272. [MAX3421_HRSL_PIDERR] = -EPROTO,
  273. [MAX3421_HRSL_PKTERR] = -EPROTO,
  274. [MAX3421_HRSL_CRCERR] = -EILSEQ,
  275. [MAX3421_HRSL_KERR] = -EIO,
  276. [MAX3421_HRSL_JERR] = -EIO,
  277. [MAX3421_HRSL_TIMEOUT] = -ETIME,
  278. [MAX3421_HRSL_BABBLE] = -EOVERFLOW
  279. };
  280. /*
  281. * See http://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
  282. * reasonable overview of how control transfers use the the IN/OUT
  283. * tokens.
  284. */
  285. #define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
  286. #define MAX3421_HXFR_SETUP 0x10
  287. #define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
  288. #define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
  289. #define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
  290. #define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
  291. #define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
  292. #define field(val, bit) ((val) << (bit))
  293. static inline s16
  294. frame_diff(u16 left, u16 right)
  295. {
  296. return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
  297. }
  298. static inline struct max3421_hcd *
  299. hcd_to_max3421(struct usb_hcd *hcd)
  300. {
  301. return (struct max3421_hcd *) hcd->hcd_priv;
  302. }
  303. static inline struct usb_hcd *
  304. max3421_to_hcd(struct max3421_hcd *max3421_hcd)
  305. {
  306. return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
  307. }
  308. static u8
  309. spi_rd8(struct usb_hcd *hcd, unsigned int reg)
  310. {
  311. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  312. struct spi_device *spi = to_spi_device(hcd->self.controller);
  313. struct spi_transfer transfer;
  314. struct spi_message msg;
  315. memset(&transfer, 0, sizeof(transfer));
  316. spi_message_init(&msg);
  317. max3421_hcd->tx->data[0] =
  318. (field(reg, MAX3421_SPI_REG_SHIFT) |
  319. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  320. transfer.tx_buf = max3421_hcd->tx->data;
  321. transfer.rx_buf = max3421_hcd->rx->data;
  322. transfer.len = 2;
  323. spi_message_add_tail(&transfer, &msg);
  324. spi_sync(spi, &msg);
  325. return max3421_hcd->rx->data[1];
  326. }
  327. static void
  328. spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
  329. {
  330. struct spi_device *spi = to_spi_device(hcd->self.controller);
  331. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  332. struct spi_transfer transfer;
  333. struct spi_message msg;
  334. memset(&transfer, 0, sizeof(transfer));
  335. spi_message_init(&msg);
  336. max3421_hcd->tx->data[0] =
  337. (field(reg, MAX3421_SPI_REG_SHIFT) |
  338. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  339. max3421_hcd->tx->data[1] = val;
  340. transfer.tx_buf = max3421_hcd->tx->data;
  341. transfer.len = 2;
  342. spi_message_add_tail(&transfer, &msg);
  343. spi_sync(spi, &msg);
  344. }
  345. static void
  346. spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  347. {
  348. struct spi_device *spi = to_spi_device(hcd->self.controller);
  349. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  350. struct spi_transfer transfer[2];
  351. struct spi_message msg;
  352. memset(transfer, 0, sizeof(transfer));
  353. spi_message_init(&msg);
  354. max3421_hcd->tx->data[0] =
  355. (field(reg, MAX3421_SPI_REG_SHIFT) |
  356. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  357. transfer[0].tx_buf = max3421_hcd->tx->data;
  358. transfer[0].len = 1;
  359. transfer[1].rx_buf = buf;
  360. transfer[1].len = len;
  361. spi_message_add_tail(&transfer[0], &msg);
  362. spi_message_add_tail(&transfer[1], &msg);
  363. spi_sync(spi, &msg);
  364. }
  365. static void
  366. spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  367. {
  368. struct spi_device *spi = to_spi_device(hcd->self.controller);
  369. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  370. struct spi_transfer transfer[2];
  371. struct spi_message msg;
  372. memset(transfer, 0, sizeof(transfer));
  373. spi_message_init(&msg);
  374. max3421_hcd->tx->data[0] =
  375. (field(reg, MAX3421_SPI_REG_SHIFT) |
  376. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  377. transfer[0].tx_buf = max3421_hcd->tx->data;
  378. transfer[0].len = 1;
  379. transfer[1].tx_buf = buf;
  380. transfer[1].len = len;
  381. spi_message_add_tail(&transfer[0], &msg);
  382. spi_message_add_tail(&transfer[1], &msg);
  383. spi_sync(spi, &msg);
  384. }
  385. /*
  386. * Figure out the correct setting for the LOWSPEED and HUBPRE mode
  387. * bits. The HUBPRE bit needs to be set when MAX3421E operates at
  388. * full speed, but it's talking to a low-speed device (i.e., through a
  389. * hub). Setting that bit ensures that every low-speed packet is
  390. * preceded by a full-speed PRE PID. Possible configurations:
  391. *
  392. * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
  393. * FULL FULL => 0 0
  394. * FULL LOW => 1 1
  395. * LOW LOW => 1 0
  396. * LOW FULL => 1 0
  397. */
  398. static void
  399. max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
  400. {
  401. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  402. u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
  403. mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
  404. mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
  405. if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
  406. mode |= mode_lowspeed;
  407. mode &= ~mode_hubpre;
  408. } else if (dev->speed == USB_SPEED_LOW) {
  409. mode |= mode_lowspeed | mode_hubpre;
  410. } else {
  411. mode &= ~(mode_lowspeed | mode_hubpre);
  412. }
  413. if (mode != max3421_hcd->mode) {
  414. max3421_hcd->mode = mode;
  415. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  416. }
  417. }
  418. /*
  419. * Caller must NOT hold HCD spinlock.
  420. */
  421. static void
  422. max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum,
  423. int force_toggles)
  424. {
  425. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  426. int old_epnum, same_ep, rcvtog, sndtog;
  427. struct usb_device *old_dev;
  428. u8 hctl;
  429. old_dev = max3421_hcd->loaded_dev;
  430. old_epnum = max3421_hcd->loaded_epnum;
  431. same_ep = (dev == old_dev && epnum == old_epnum);
  432. if (same_ep && !force_toggles)
  433. return;
  434. if (old_dev && !same_ep) {
  435. /* save the old end-points toggles: */
  436. u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  437. rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
  438. sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  439. /* no locking: HCD (i.e., we) own toggles, don't we? */
  440. usb_settoggle(old_dev, old_epnum, 0, rcvtog);
  441. usb_settoggle(old_dev, old_epnum, 1, sndtog);
  442. }
  443. /* setup new endpoint's toggle bits: */
  444. rcvtog = usb_gettoggle(dev, epnum, 0);
  445. sndtog = usb_gettoggle(dev, epnum, 1);
  446. hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
  447. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  448. max3421_hcd->loaded_epnum = epnum;
  449. spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
  450. /*
  451. * Note: devnum for one and the same device can change during
  452. * address-assignment so it's best to just always load the
  453. * address whenever the end-point changed/was forced.
  454. */
  455. max3421_hcd->loaded_dev = dev;
  456. spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
  457. }
  458. static int
  459. max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
  460. {
  461. spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
  462. return MAX3421_HXFR_SETUP;
  463. }
  464. static int
  465. max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
  466. {
  467. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  468. int epnum = usb_pipeendpoint(urb->pipe);
  469. max3421_hcd->curr_len = 0;
  470. max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
  471. return MAX3421_HXFR_BULK_IN(epnum);
  472. }
  473. static int
  474. max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
  475. {
  476. struct spi_device *spi = to_spi_device(hcd->self.controller);
  477. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  478. int epnum = usb_pipeendpoint(urb->pipe);
  479. u32 max_packet;
  480. void *src;
  481. src = urb->transfer_buffer + urb->actual_length;
  482. if (fast_retransmit) {
  483. if (max3421_hcd->rev == 0x12) {
  484. /* work around rev 0x12 bug: */
  485. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  486. spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
  487. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  488. }
  489. return MAX3421_HXFR_BULK_OUT(epnum);
  490. }
  491. max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  492. if (max_packet > MAX3421_FIFO_SIZE) {
  493. /*
  494. * We do not support isochronous transfers at this
  495. * time.
  496. */
  497. dev_err(&spi->dev,
  498. "%s: packet-size of %u too big (limit is %u bytes)",
  499. __func__, max_packet, MAX3421_FIFO_SIZE);
  500. max3421_hcd->urb_done = -EMSGSIZE;
  501. return -EMSGSIZE;
  502. }
  503. max3421_hcd->curr_len = min((urb->transfer_buffer_length -
  504. urb->actual_length), max_packet);
  505. spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
  506. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  507. return MAX3421_HXFR_BULK_OUT(epnum);
  508. }
  509. /*
  510. * Issue the next host-transfer command.
  511. * Caller must NOT hold HCD spinlock.
  512. */
  513. static void
  514. max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
  515. {
  516. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  517. struct urb *urb = max3421_hcd->curr_urb;
  518. struct max3421_ep *max3421_ep;
  519. int cmd = -EINVAL;
  520. if (!urb)
  521. return; /* nothing to do */
  522. max3421_ep = urb->ep->hcpriv;
  523. switch (max3421_ep->pkt_state) {
  524. case PKT_STATE_SETUP:
  525. cmd = max3421_ctrl_setup(hcd, urb);
  526. break;
  527. case PKT_STATE_TRANSFER:
  528. if (usb_urb_dir_in(urb))
  529. cmd = max3421_transfer_in(hcd, urb);
  530. else
  531. cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
  532. break;
  533. case PKT_STATE_TERMINATE:
  534. /*
  535. * IN transfers are terminated with HS_OUT token,
  536. * OUT transfers with HS_IN:
  537. */
  538. if (usb_urb_dir_in(urb))
  539. cmd = MAX3421_HXFR_HS_OUT;
  540. else
  541. cmd = MAX3421_HXFR_HS_IN;
  542. break;
  543. }
  544. if (cmd < 0)
  545. return;
  546. /* issue the command and wait for host-xfer-done interrupt: */
  547. spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
  548. max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
  549. }
  550. /*
  551. * Find the next URB to process and start its execution.
  552. *
  553. * At this time, we do not anticipate ever connecting a USB hub to the
  554. * MAX3421 chip, so at most USB device can be connected and we can use
  555. * a simplistic scheduler: at the start of a frame, schedule all
  556. * periodic transfers. Once that is done, use the remainder of the
  557. * frame to process non-periodic (bulk & control) transfers.
  558. *
  559. * Preconditions:
  560. * o Caller must NOT hold HCD spinlock.
  561. * o max3421_hcd->curr_urb MUST BE NULL.
  562. * o MAX3421E chip must be idle.
  563. */
  564. static int
  565. max3421_select_and_start_urb(struct usb_hcd *hcd)
  566. {
  567. struct spi_device *spi = to_spi_device(hcd->self.controller);
  568. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  569. struct urb *urb, *curr_urb = NULL;
  570. struct max3421_ep *max3421_ep;
  571. int epnum, force_toggles = 0;
  572. struct usb_host_endpoint *ep;
  573. struct list_head *pos;
  574. unsigned long flags;
  575. spin_lock_irqsave(&max3421_hcd->lock, flags);
  576. for (;
  577. max3421_hcd->sched_pass < SCHED_PASS_DONE;
  578. ++max3421_hcd->sched_pass)
  579. list_for_each(pos, &max3421_hcd->ep_list) {
  580. urb = NULL;
  581. max3421_ep = container_of(pos, struct max3421_ep,
  582. ep_list);
  583. ep = max3421_ep->ep;
  584. switch (usb_endpoint_type(&ep->desc)) {
  585. case USB_ENDPOINT_XFER_ISOC:
  586. case USB_ENDPOINT_XFER_INT:
  587. if (max3421_hcd->sched_pass !=
  588. SCHED_PASS_PERIODIC)
  589. continue;
  590. break;
  591. case USB_ENDPOINT_XFER_CONTROL:
  592. case USB_ENDPOINT_XFER_BULK:
  593. if (max3421_hcd->sched_pass !=
  594. SCHED_PASS_NON_PERIODIC)
  595. continue;
  596. break;
  597. }
  598. if (list_empty(&ep->urb_list))
  599. continue; /* nothing to do */
  600. urb = list_first_entry(&ep->urb_list, struct urb,
  601. urb_list);
  602. if (urb->unlinked) {
  603. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  604. __func__, urb, urb->unlinked);
  605. max3421_hcd->curr_urb = urb;
  606. max3421_hcd->urb_done = 1;
  607. spin_unlock_irqrestore(&max3421_hcd->lock,
  608. flags);
  609. return 1;
  610. }
  611. switch (usb_endpoint_type(&ep->desc)) {
  612. case USB_ENDPOINT_XFER_CONTROL:
  613. /*
  614. * Allow one control transaction per
  615. * frame per endpoint:
  616. */
  617. if (frame_diff(max3421_ep->last_active,
  618. max3421_hcd->frame_number) == 0)
  619. continue;
  620. break;
  621. case USB_ENDPOINT_XFER_BULK:
  622. if (max3421_ep->retransmit
  623. && (frame_diff(max3421_ep->last_active,
  624. max3421_hcd->frame_number)
  625. == 0))
  626. /*
  627. * We already tried this EP
  628. * during this frame and got a
  629. * NAK or error; wait for next frame
  630. */
  631. continue;
  632. break;
  633. case USB_ENDPOINT_XFER_ISOC:
  634. case USB_ENDPOINT_XFER_INT:
  635. if (frame_diff(max3421_hcd->frame_number,
  636. max3421_ep->last_active)
  637. < urb->interval)
  638. /*
  639. * We already processed this
  640. * end-point in the current
  641. * frame
  642. */
  643. continue;
  644. break;
  645. }
  646. /* move current ep to tail: */
  647. list_move_tail(pos, &max3421_hcd->ep_list);
  648. curr_urb = urb;
  649. goto done;
  650. }
  651. done:
  652. if (!curr_urb) {
  653. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  654. return 0;
  655. }
  656. urb = max3421_hcd->curr_urb = curr_urb;
  657. epnum = usb_endpoint_num(&urb->ep->desc);
  658. if (max3421_ep->retransmit)
  659. /* restart (part of) a USB transaction: */
  660. max3421_ep->retransmit = 0;
  661. else {
  662. /* start USB transaction: */
  663. if (usb_endpoint_xfer_control(&ep->desc)) {
  664. /*
  665. * See USB 2.0 spec section 8.6.1
  666. * Initialization via SETUP Token:
  667. */
  668. usb_settoggle(urb->dev, epnum, 0, 1);
  669. usb_settoggle(urb->dev, epnum, 1, 1);
  670. max3421_ep->pkt_state = PKT_STATE_SETUP;
  671. force_toggles = 1;
  672. } else
  673. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  674. }
  675. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  676. max3421_ep->last_active = max3421_hcd->frame_number;
  677. max3421_set_address(hcd, urb->dev, epnum, force_toggles);
  678. max3421_set_speed(hcd, urb->dev);
  679. max3421_next_transfer(hcd, 0);
  680. return 1;
  681. }
  682. /*
  683. * Check all endpoints for URBs that got unlinked.
  684. *
  685. * Caller must NOT hold HCD spinlock.
  686. */
  687. static int
  688. max3421_check_unlink(struct usb_hcd *hcd)
  689. {
  690. struct spi_device *spi = to_spi_device(hcd->self.controller);
  691. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  692. struct list_head *pos, *upos, *next_upos;
  693. struct max3421_ep *max3421_ep;
  694. struct usb_host_endpoint *ep;
  695. struct urb *urb;
  696. unsigned long flags;
  697. int retval = 0;
  698. spin_lock_irqsave(&max3421_hcd->lock, flags);
  699. list_for_each(pos, &max3421_hcd->ep_list) {
  700. max3421_ep = container_of(pos, struct max3421_ep, ep_list);
  701. ep = max3421_ep->ep;
  702. list_for_each_safe(upos, next_upos, &ep->urb_list) {
  703. urb = container_of(upos, struct urb, urb_list);
  704. if (urb->unlinked) {
  705. retval = 1;
  706. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  707. __func__, urb, urb->unlinked);
  708. usb_hcd_unlink_urb_from_ep(hcd, urb);
  709. spin_unlock_irqrestore(&max3421_hcd->lock,
  710. flags);
  711. usb_hcd_giveback_urb(hcd, urb, 0);
  712. spin_lock_irqsave(&max3421_hcd->lock, flags);
  713. }
  714. }
  715. }
  716. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  717. return retval;
  718. }
  719. /*
  720. * Caller must NOT hold HCD spinlock.
  721. */
  722. static void
  723. max3421_slow_retransmit(struct usb_hcd *hcd)
  724. {
  725. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  726. struct urb *urb = max3421_hcd->curr_urb;
  727. struct max3421_ep *max3421_ep;
  728. max3421_ep = urb->ep->hcpriv;
  729. max3421_ep->retransmit = 1;
  730. max3421_hcd->curr_urb = NULL;
  731. }
  732. /*
  733. * Caller must NOT hold HCD spinlock.
  734. */
  735. static void
  736. max3421_recv_data_available(struct usb_hcd *hcd)
  737. {
  738. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  739. struct urb *urb = max3421_hcd->curr_urb;
  740. size_t remaining, transfer_size;
  741. u8 rcvbc;
  742. rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
  743. if (rcvbc > MAX3421_FIFO_SIZE)
  744. rcvbc = MAX3421_FIFO_SIZE;
  745. if (urb->actual_length >= urb->transfer_buffer_length)
  746. remaining = 0;
  747. else
  748. remaining = urb->transfer_buffer_length - urb->actual_length;
  749. transfer_size = rcvbc;
  750. if (transfer_size > remaining)
  751. transfer_size = remaining;
  752. if (transfer_size > 0) {
  753. void *dst = urb->transfer_buffer + urb->actual_length;
  754. spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
  755. urb->actual_length += transfer_size;
  756. max3421_hcd->curr_len = transfer_size;
  757. }
  758. /* ack the RCVDAV irq now that the FIFO has been read: */
  759. spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
  760. }
  761. static void
  762. max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
  763. {
  764. struct spi_device *spi = to_spi_device(hcd->self.controller);
  765. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  766. u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  767. struct urb *urb = max3421_hcd->curr_urb;
  768. struct max3421_ep *max3421_ep = urb->ep->hcpriv;
  769. int switch_sndfifo;
  770. /*
  771. * If an OUT command results in any response other than OK
  772. * (i.e., error or NAK), we have to perform a dummy-write to
  773. * SNDBC so the FIFO gets switched back to us. Otherwise, we
  774. * get out of sync with the SNDFIFO double buffer.
  775. */
  776. switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
  777. usb_urb_dir_out(urb));
  778. switch (result_code) {
  779. case MAX3421_HRSL_OK:
  780. return; /* this shouldn't happen */
  781. case MAX3421_HRSL_WRONGPID: /* received wrong PID */
  782. case MAX3421_HRSL_BUSY: /* SIE busy */
  783. case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
  784. case MAX3421_HRSL_UNDEF: /* reserved */
  785. case MAX3421_HRSL_KERR: /* K-state instead of response */
  786. case MAX3421_HRSL_JERR: /* J-state instead of response */
  787. /*
  788. * packet experienced an error that we cannot recover
  789. * from; report error
  790. */
  791. max3421_hcd->urb_done = hrsl_to_error[result_code];
  792. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  793. __func__, hrsl);
  794. break;
  795. case MAX3421_HRSL_TOGERR:
  796. if (usb_urb_dir_in(urb))
  797. ; /* don't do anything (device will switch toggle) */
  798. else {
  799. /* flip the send toggle bit: */
  800. int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  801. sndtog ^= 1;
  802. spi_wr8(hcd, MAX3421_REG_HCTL,
  803. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  804. }
  805. /* FALL THROUGH */
  806. case MAX3421_HRSL_BADBC: /* bad byte count */
  807. case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
  808. case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
  809. case MAX3421_HRSL_CRCERR: /* CRC error */
  810. case MAX3421_HRSL_BABBLE: /* device talked too long */
  811. case MAX3421_HRSL_TIMEOUT:
  812. if (max3421_ep->retries++ < USB_MAX_RETRIES)
  813. /* retry the packet again in the next frame */
  814. max3421_slow_retransmit(hcd);
  815. else {
  816. /* Based on ohci.h cc_to_err[]: */
  817. max3421_hcd->urb_done = hrsl_to_error[result_code];
  818. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  819. __func__, hrsl);
  820. }
  821. break;
  822. case MAX3421_HRSL_STALL:
  823. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  824. __func__, hrsl);
  825. max3421_hcd->urb_done = hrsl_to_error[result_code];
  826. break;
  827. case MAX3421_HRSL_NAK:
  828. /*
  829. * Device wasn't ready for data or has no data
  830. * available: retry the packet again.
  831. */
  832. if (max3421_ep->naks++ < NAK_MAX_FAST_RETRANSMITS) {
  833. max3421_next_transfer(hcd, 1);
  834. switch_sndfifo = 0;
  835. } else
  836. max3421_slow_retransmit(hcd);
  837. break;
  838. }
  839. if (switch_sndfifo)
  840. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  841. }
  842. /*
  843. * Caller must NOT hold HCD spinlock.
  844. */
  845. static int
  846. max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
  847. {
  848. struct spi_device *spi = to_spi_device(hcd->self.controller);
  849. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  850. u32 max_packet;
  851. if (urb->actual_length >= urb->transfer_buffer_length)
  852. return 1; /* read is complete, so we're done */
  853. /*
  854. * USB 2.0 Section 5.3.2 Pipes: packets must be full size
  855. * except for last one.
  856. */
  857. max_packet = usb_maxpacket(urb->dev, urb->pipe, 0);
  858. if (max_packet > MAX3421_FIFO_SIZE) {
  859. /*
  860. * We do not support isochronous transfers at this
  861. * time...
  862. */
  863. dev_err(&spi->dev,
  864. "%s: packet-size of %u too big (limit is %u bytes)",
  865. __func__, max_packet, MAX3421_FIFO_SIZE);
  866. return -EINVAL;
  867. }
  868. if (max3421_hcd->curr_len < max_packet) {
  869. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  870. /*
  871. * remaining > 0 and received an
  872. * unexpected partial packet ->
  873. * error
  874. */
  875. return -EREMOTEIO;
  876. } else
  877. /* short read, but it's OK */
  878. return 1;
  879. }
  880. return 0; /* not done */
  881. }
  882. /*
  883. * Caller must NOT hold HCD spinlock.
  884. */
  885. static int
  886. max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
  887. {
  888. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  889. urb->actual_length += max3421_hcd->curr_len;
  890. if (urb->actual_length < urb->transfer_buffer_length)
  891. return 0;
  892. if (urb->transfer_flags & URB_ZERO_PACKET) {
  893. /*
  894. * Some hardware needs a zero-size packet at the end
  895. * of a bulk-out transfer if the last transfer was a
  896. * full-sized packet (i.e., such hardware use <
  897. * max_packet as an indicator that the end of the
  898. * packet has been reached).
  899. */
  900. u32 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  901. if (max3421_hcd->curr_len == max_packet)
  902. return 0;
  903. }
  904. return 1;
  905. }
  906. /*
  907. * Caller must NOT hold HCD spinlock.
  908. */
  909. static void
  910. max3421_host_transfer_done(struct usb_hcd *hcd)
  911. {
  912. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  913. struct urb *urb = max3421_hcd->curr_urb;
  914. struct max3421_ep *max3421_ep;
  915. u8 result_code, hrsl;
  916. int urb_done = 0;
  917. max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
  918. BIT(MAX3421_HI_RCVDAV_BIT));
  919. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  920. result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  921. #ifdef DEBUG
  922. ++max3421_hcd->err_stat[result_code];
  923. #endif
  924. max3421_ep = urb->ep->hcpriv;
  925. if (unlikely(result_code != MAX3421_HRSL_OK)) {
  926. max3421_handle_error(hcd, hrsl);
  927. return;
  928. }
  929. max3421_ep->naks = 0;
  930. max3421_ep->retries = 0;
  931. switch (max3421_ep->pkt_state) {
  932. case PKT_STATE_SETUP:
  933. if (urb->transfer_buffer_length > 0)
  934. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  935. else
  936. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  937. break;
  938. case PKT_STATE_TRANSFER:
  939. if (usb_urb_dir_in(urb))
  940. urb_done = max3421_transfer_in_done(hcd, urb);
  941. else
  942. urb_done = max3421_transfer_out_done(hcd, urb);
  943. if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
  944. /*
  945. * We aren't really done - we still need to
  946. * terminate the control transfer:
  947. */
  948. max3421_hcd->urb_done = urb_done = 0;
  949. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  950. }
  951. break;
  952. case PKT_STATE_TERMINATE:
  953. urb_done = 1;
  954. break;
  955. }
  956. if (urb_done)
  957. max3421_hcd->urb_done = urb_done;
  958. else
  959. max3421_next_transfer(hcd, 0);
  960. }
  961. /*
  962. * Caller must NOT hold HCD spinlock.
  963. */
  964. static void
  965. max3421_detect_conn(struct usb_hcd *hcd)
  966. {
  967. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  968. unsigned int jk, have_conn = 0;
  969. u32 old_port_status, chg;
  970. unsigned long flags;
  971. u8 hrsl, mode;
  972. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  973. jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
  974. (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
  975. mode = max3421_hcd->mode;
  976. switch (jk) {
  977. case 0x0: /* SE0: disconnect */
  978. /*
  979. * Turn off SOFKAENAB bit to avoid getting interrupt
  980. * every milli-second:
  981. */
  982. mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
  983. break;
  984. case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
  985. case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
  986. if (jk == 0x2)
  987. /* need to switch to the other speed: */
  988. mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
  989. /* turn on SOFKAENAB bit: */
  990. mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
  991. have_conn = 1;
  992. break;
  993. case 0x3: /* illegal */
  994. break;
  995. }
  996. max3421_hcd->mode = mode;
  997. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  998. spin_lock_irqsave(&max3421_hcd->lock, flags);
  999. old_port_status = max3421_hcd->port_status;
  1000. if (have_conn)
  1001. max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
  1002. else
  1003. max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
  1004. if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
  1005. max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
  1006. else
  1007. max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
  1008. chg = (old_port_status ^ max3421_hcd->port_status);
  1009. max3421_hcd->port_status |= chg << 16;
  1010. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1011. }
  1012. static irqreturn_t
  1013. max3421_irq_handler(int irq, void *dev_id)
  1014. {
  1015. struct usb_hcd *hcd = dev_id;
  1016. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1017. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1018. if (max3421_hcd->spi_thread &&
  1019. max3421_hcd->spi_thread->state != TASK_RUNNING)
  1020. wake_up_process(max3421_hcd->spi_thread);
  1021. if (!test_and_set_bit(ENABLE_IRQ, &max3421_hcd->todo))
  1022. disable_irq_nosync(spi->irq);
  1023. return IRQ_HANDLED;
  1024. }
  1025. #ifdef DEBUG
  1026. static void
  1027. dump_eps(struct usb_hcd *hcd)
  1028. {
  1029. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1030. struct max3421_ep *max3421_ep;
  1031. struct usb_host_endpoint *ep;
  1032. struct list_head *pos, *upos;
  1033. char ubuf[512], *dp, *end;
  1034. unsigned long flags;
  1035. struct urb *urb;
  1036. int epnum, ret;
  1037. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1038. list_for_each(pos, &max3421_hcd->ep_list) {
  1039. max3421_ep = container_of(pos, struct max3421_ep, ep_list);
  1040. ep = max3421_ep->ep;
  1041. dp = ubuf;
  1042. end = dp + sizeof(ubuf);
  1043. *dp = '\0';
  1044. list_for_each(upos, &ep->urb_list) {
  1045. urb = container_of(upos, struct urb, urb_list);
  1046. ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
  1047. usb_pipetype(urb->pipe),
  1048. usb_urb_dir_in(urb) ? "IN" : "OUT",
  1049. urb->actual_length,
  1050. urb->transfer_buffer_length);
  1051. if (ret < 0 || ret >= end - dp)
  1052. break; /* error or buffer full */
  1053. dp += ret;
  1054. }
  1055. epnum = usb_endpoint_num(&ep->desc);
  1056. pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
  1057. epnum, max3421_ep->pkt_state, max3421_ep->last_active,
  1058. max3421_ep->retries, max3421_ep->naks,
  1059. max3421_ep->retransmit, ubuf);
  1060. }
  1061. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1062. }
  1063. #endif /* DEBUG */
  1064. /* Return zero if no work was performed, 1 otherwise. */
  1065. static int
  1066. max3421_handle_irqs(struct usb_hcd *hcd)
  1067. {
  1068. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1069. u32 chg, old_port_status;
  1070. unsigned long flags;
  1071. u8 hirq;
  1072. /*
  1073. * Read and ack pending interrupts (CPU must never
  1074. * clear SNDBAV directly and RCVDAV must be cleared by
  1075. * max3421_recv_data_available()!):
  1076. */
  1077. hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
  1078. hirq &= max3421_hcd->hien;
  1079. if (!hirq)
  1080. return 0;
  1081. spi_wr8(hcd, MAX3421_REG_HIRQ,
  1082. hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
  1083. BIT(MAX3421_HI_RCVDAV_BIT)));
  1084. if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
  1085. max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
  1086. & USB_MAX_FRAME_NUMBER);
  1087. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1088. }
  1089. if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
  1090. max3421_recv_data_available(hcd);
  1091. if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
  1092. max3421_host_transfer_done(hcd);
  1093. if (hirq & BIT(MAX3421_HI_CONDET_BIT))
  1094. max3421_detect_conn(hcd);
  1095. /*
  1096. * Now process interrupts that may affect HCD state
  1097. * other than the end-points:
  1098. */
  1099. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1100. old_port_status = max3421_hcd->port_status;
  1101. if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
  1102. if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
  1103. /* BUSEVENT due to completion of Bus Reset */
  1104. max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
  1105. max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
  1106. } else {
  1107. /* BUSEVENT due to completion of Bus Resume */
  1108. pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
  1109. }
  1110. }
  1111. if (hirq & BIT(MAX3421_HI_RWU_BIT))
  1112. pr_info("%s: RWU\n", __func__);
  1113. if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
  1114. pr_info("%s: SUSDN\n", __func__);
  1115. chg = (old_port_status ^ max3421_hcd->port_status);
  1116. max3421_hcd->port_status |= chg << 16;
  1117. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1118. #ifdef DEBUG
  1119. {
  1120. static unsigned long last_time;
  1121. char sbuf[16 * 16], *dp, *end;
  1122. int i;
  1123. if (time_after(jiffies, last_time + 5*HZ)) {
  1124. dp = sbuf;
  1125. end = sbuf + sizeof(sbuf);
  1126. *dp = '\0';
  1127. for (i = 0; i < 16; ++i) {
  1128. int ret = snprintf(dp, end - dp, " %lu",
  1129. max3421_hcd->err_stat[i]);
  1130. if (ret < 0 || ret >= end - dp)
  1131. break; /* error or buffer full */
  1132. dp += ret;
  1133. }
  1134. pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
  1135. memset(max3421_hcd->err_stat, 0,
  1136. sizeof(max3421_hcd->err_stat));
  1137. last_time = jiffies;
  1138. dump_eps(hcd);
  1139. }
  1140. }
  1141. #endif
  1142. return 1;
  1143. }
  1144. static int
  1145. max3421_reset_hcd(struct usb_hcd *hcd)
  1146. {
  1147. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1148. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1149. int timeout;
  1150. /* perform a chip reset and wait for OSCIRQ signal to appear: */
  1151. spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
  1152. /* clear reset: */
  1153. spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
  1154. timeout = 1000;
  1155. while (1) {
  1156. if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
  1157. & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
  1158. break;
  1159. if (--timeout < 0) {
  1160. dev_err(&spi->dev,
  1161. "timed out waiting for oscillator OK signal");
  1162. return 1;
  1163. }
  1164. cond_resched();
  1165. }
  1166. /*
  1167. * Turn on host mode, automatic generation of SOF packets, and
  1168. * enable pull-down registers on DM/DP:
  1169. */
  1170. max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
  1171. BIT(MAX3421_MODE_SOFKAENAB_BIT) |
  1172. BIT(MAX3421_MODE_DMPULLDN_BIT) |
  1173. BIT(MAX3421_MODE_DPPULLDN_BIT));
  1174. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  1175. /* reset frame-number: */
  1176. max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
  1177. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
  1178. /* sample the state of the D+ and D- lines */
  1179. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
  1180. max3421_detect_conn(hcd);
  1181. /* enable frame, connection-detected, and bus-event interrupts: */
  1182. max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
  1183. BIT(MAX3421_HI_CONDET_BIT) |
  1184. BIT(MAX3421_HI_BUSEVENT_BIT));
  1185. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1186. /* enable interrupts: */
  1187. spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
  1188. return 1;
  1189. }
  1190. static int
  1191. max3421_urb_done(struct usb_hcd *hcd)
  1192. {
  1193. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1194. unsigned long flags;
  1195. struct urb *urb;
  1196. int status;
  1197. status = max3421_hcd->urb_done;
  1198. max3421_hcd->urb_done = 0;
  1199. if (status > 0)
  1200. status = 0;
  1201. urb = max3421_hcd->curr_urb;
  1202. if (urb) {
  1203. max3421_hcd->curr_urb = NULL;
  1204. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1205. usb_hcd_unlink_urb_from_ep(hcd, urb);
  1206. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1207. /* must be called without the HCD spinlock: */
  1208. usb_hcd_giveback_urb(hcd, urb, status);
  1209. }
  1210. return 1;
  1211. }
  1212. static int
  1213. max3421_spi_thread(void *dev_id)
  1214. {
  1215. struct usb_hcd *hcd = dev_id;
  1216. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1217. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1218. int i, i_worked = 1;
  1219. /* set full-duplex SPI mode, low-active interrupt pin: */
  1220. spi_wr8(hcd, MAX3421_REG_PINCTL,
  1221. (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
  1222. BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
  1223. while (!kthread_should_stop()) {
  1224. max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
  1225. if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
  1226. break;
  1227. dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
  1228. msleep(10000);
  1229. }
  1230. dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
  1231. max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
  1232. spi->irq);
  1233. while (!kthread_should_stop()) {
  1234. if (!i_worked) {
  1235. /*
  1236. * We'll be waiting for wakeups from the hard
  1237. * interrupt handler, so now is a good time to
  1238. * sync our hien with the chip:
  1239. */
  1240. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1241. set_current_state(TASK_INTERRUPTIBLE);
  1242. if (test_and_clear_bit(ENABLE_IRQ, &max3421_hcd->todo))
  1243. enable_irq(spi->irq);
  1244. schedule();
  1245. __set_current_state(TASK_RUNNING);
  1246. }
  1247. i_worked = 0;
  1248. if (max3421_hcd->urb_done)
  1249. i_worked |= max3421_urb_done(hcd);
  1250. else if (max3421_handle_irqs(hcd))
  1251. i_worked = 1;
  1252. else if (!max3421_hcd->curr_urb)
  1253. i_worked |= max3421_select_and_start_urb(hcd);
  1254. if (test_and_clear_bit(RESET_HCD, &max3421_hcd->todo))
  1255. /* reset the HCD: */
  1256. i_worked |= max3421_reset_hcd(hcd);
  1257. if (test_and_clear_bit(RESET_PORT, &max3421_hcd->todo)) {
  1258. /* perform a USB bus reset: */
  1259. spi_wr8(hcd, MAX3421_REG_HCTL,
  1260. BIT(MAX3421_HCTL_BUSRST_BIT));
  1261. i_worked = 1;
  1262. }
  1263. if (test_and_clear_bit(CHECK_UNLINK, &max3421_hcd->todo))
  1264. i_worked |= max3421_check_unlink(hcd);
  1265. if (test_and_clear_bit(IOPIN_UPDATE, &max3421_hcd->todo)) {
  1266. /*
  1267. * IOPINS1/IOPINS2 do not auto-increment, so we can't
  1268. * use spi_wr_buf().
  1269. */
  1270. for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
  1271. u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1);
  1272. val = ((val & 0xf0) |
  1273. (max3421_hcd->iopins[i] & 0x0f));
  1274. spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
  1275. max3421_hcd->iopins[i] = val;
  1276. }
  1277. i_worked = 1;
  1278. }
  1279. }
  1280. set_current_state(TASK_RUNNING);
  1281. dev_info(&spi->dev, "SPI thread exiting");
  1282. return 0;
  1283. }
  1284. static int
  1285. max3421_reset_port(struct usb_hcd *hcd)
  1286. {
  1287. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1288. max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
  1289. USB_PORT_STAT_LOW_SPEED);
  1290. max3421_hcd->port_status |= USB_PORT_STAT_RESET;
  1291. set_bit(RESET_PORT, &max3421_hcd->todo);
  1292. wake_up_process(max3421_hcd->spi_thread);
  1293. return 0;
  1294. }
  1295. static int
  1296. max3421_reset(struct usb_hcd *hcd)
  1297. {
  1298. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1299. hcd->self.sg_tablesize = 0;
  1300. hcd->speed = HCD_USB2;
  1301. hcd->self.root_hub->speed = USB_SPEED_FULL;
  1302. set_bit(RESET_HCD, &max3421_hcd->todo);
  1303. wake_up_process(max3421_hcd->spi_thread);
  1304. return 0;
  1305. }
  1306. static int
  1307. max3421_start(struct usb_hcd *hcd)
  1308. {
  1309. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1310. spin_lock_init(&max3421_hcd->lock);
  1311. max3421_hcd->rh_state = MAX3421_RH_RUNNING;
  1312. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1313. hcd->power_budget = POWER_BUDGET;
  1314. hcd->state = HC_STATE_RUNNING;
  1315. hcd->uses_new_polling = 1;
  1316. return 0;
  1317. }
  1318. static void
  1319. max3421_stop(struct usb_hcd *hcd)
  1320. {
  1321. }
  1322. static int
  1323. max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1324. {
  1325. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1326. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1327. struct max3421_ep *max3421_ep;
  1328. unsigned long flags;
  1329. int retval;
  1330. switch (usb_pipetype(urb->pipe)) {
  1331. case PIPE_INTERRUPT:
  1332. case PIPE_ISOCHRONOUS:
  1333. if (urb->interval < 0) {
  1334. dev_err(&spi->dev,
  1335. "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
  1336. __func__, urb->interval);
  1337. return -EINVAL;
  1338. }
  1339. default:
  1340. break;
  1341. }
  1342. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1343. max3421_ep = urb->ep->hcpriv;
  1344. if (!max3421_ep) {
  1345. /* gets freed in max3421_endpoint_disable: */
  1346. max3421_ep = kzalloc(sizeof(struct max3421_ep), GFP_ATOMIC);
  1347. if (!max3421_ep) {
  1348. retval = -ENOMEM;
  1349. goto out;
  1350. }
  1351. max3421_ep->ep = urb->ep;
  1352. max3421_ep->last_active = max3421_hcd->frame_number;
  1353. urb->ep->hcpriv = max3421_ep;
  1354. list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
  1355. }
  1356. retval = usb_hcd_link_urb_to_ep(hcd, urb);
  1357. if (retval == 0) {
  1358. /* Since we added to the queue, restart scheduling: */
  1359. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1360. wake_up_process(max3421_hcd->spi_thread);
  1361. }
  1362. out:
  1363. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1364. return retval;
  1365. }
  1366. static int
  1367. max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  1368. {
  1369. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1370. unsigned long flags;
  1371. int retval;
  1372. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1373. /*
  1374. * This will set urb->unlinked which in turn causes the entry
  1375. * to be dropped at the next opportunity.
  1376. */
  1377. retval = usb_hcd_check_unlink_urb(hcd, urb, status);
  1378. if (retval == 0) {
  1379. set_bit(CHECK_UNLINK, &max3421_hcd->todo);
  1380. wake_up_process(max3421_hcd->spi_thread);
  1381. }
  1382. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1383. return retval;
  1384. }
  1385. static void
  1386. max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  1387. {
  1388. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1389. unsigned long flags;
  1390. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1391. if (ep->hcpriv) {
  1392. struct max3421_ep *max3421_ep = ep->hcpriv;
  1393. /* remove myself from the ep_list: */
  1394. if (!list_empty(&max3421_ep->ep_list))
  1395. list_del(&max3421_ep->ep_list);
  1396. kfree(max3421_ep);
  1397. ep->hcpriv = NULL;
  1398. }
  1399. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1400. }
  1401. static int
  1402. max3421_get_frame_number(struct usb_hcd *hcd)
  1403. {
  1404. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1405. return max3421_hcd->frame_number;
  1406. }
  1407. /*
  1408. * Should return a non-zero value when any port is undergoing a resume
  1409. * transition while the root hub is suspended.
  1410. */
  1411. static int
  1412. max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
  1413. {
  1414. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1415. unsigned long flags;
  1416. int retval = 0;
  1417. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1418. if (!HCD_HW_ACCESSIBLE(hcd))
  1419. goto done;
  1420. *buf = 0;
  1421. if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
  1422. *buf = (1 << 1); /* a hub over-current condition exists */
  1423. dev_dbg(hcd->self.controller,
  1424. "port status 0x%08x has changes\n",
  1425. max3421_hcd->port_status);
  1426. retval = 1;
  1427. if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
  1428. usb_hcd_resume_root_hub(hcd);
  1429. }
  1430. done:
  1431. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1432. return retval;
  1433. }
  1434. static inline void
  1435. hub_descriptor(struct usb_hub_descriptor *desc)
  1436. {
  1437. memset(desc, 0, sizeof(*desc));
  1438. /*
  1439. * See Table 11-13: Hub Descriptor in USB 2.0 spec.
  1440. */
  1441. desc->bDescriptorType = USB_DT_HUB; /* hub descriptor */
  1442. desc->bDescLength = 9;
  1443. desc->wHubCharacteristics = cpu_to_le16(HUB_CHAR_INDV_PORT_LPSM |
  1444. HUB_CHAR_COMMON_OCPM);
  1445. desc->bNbrPorts = 1;
  1446. }
  1447. /*
  1448. * Set the MAX3421E general-purpose output with number PIN_NUMBER to
  1449. * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
  1450. * any other value, this function acts as a no-op.
  1451. */
  1452. static void
  1453. max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
  1454. {
  1455. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1456. u8 mask, idx;
  1457. --pin_number;
  1458. if (pin_number > 7)
  1459. return;
  1460. mask = 1u << pin_number;
  1461. idx = pin_number / 4;
  1462. if (value)
  1463. max3421_hcd->iopins[idx] |= mask;
  1464. else
  1465. max3421_hcd->iopins[idx] &= ~mask;
  1466. set_bit(IOPIN_UPDATE, &max3421_hcd->todo);
  1467. wake_up_process(max3421_hcd->spi_thread);
  1468. }
  1469. static int
  1470. max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
  1471. char *buf, u16 length)
  1472. {
  1473. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1474. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1475. struct max3421_hcd_platform_data *pdata;
  1476. unsigned long flags;
  1477. int retval = 0;
  1478. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1479. pdata = spi->dev.platform_data;
  1480. switch (type_req) {
  1481. case ClearHubFeature:
  1482. break;
  1483. case ClearPortFeature:
  1484. switch (value) {
  1485. case USB_PORT_FEAT_SUSPEND:
  1486. break;
  1487. case USB_PORT_FEAT_POWER:
  1488. dev_dbg(hcd->self.controller, "power-off\n");
  1489. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1490. !pdata->vbus_active_level);
  1491. /* FALLS THROUGH */
  1492. default:
  1493. max3421_hcd->port_status &= ~(1 << value);
  1494. }
  1495. break;
  1496. case GetHubDescriptor:
  1497. hub_descriptor((struct usb_hub_descriptor *) buf);
  1498. break;
  1499. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  1500. case GetPortErrorCount:
  1501. case SetHubDepth:
  1502. /* USB3 only */
  1503. goto error;
  1504. case GetHubStatus:
  1505. *(__le32 *) buf = cpu_to_le32(0);
  1506. break;
  1507. case GetPortStatus:
  1508. if (index != 1) {
  1509. retval = -EPIPE;
  1510. goto error;
  1511. }
  1512. ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
  1513. ((__le16 *) buf)[1] =
  1514. cpu_to_le16(max3421_hcd->port_status >> 16);
  1515. break;
  1516. case SetHubFeature:
  1517. retval = -EPIPE;
  1518. break;
  1519. case SetPortFeature:
  1520. switch (value) {
  1521. case USB_PORT_FEAT_LINK_STATE:
  1522. case USB_PORT_FEAT_U1_TIMEOUT:
  1523. case USB_PORT_FEAT_U2_TIMEOUT:
  1524. case USB_PORT_FEAT_BH_PORT_RESET:
  1525. goto error;
  1526. case USB_PORT_FEAT_SUSPEND:
  1527. if (max3421_hcd->active)
  1528. max3421_hcd->port_status |=
  1529. USB_PORT_STAT_SUSPEND;
  1530. break;
  1531. case USB_PORT_FEAT_POWER:
  1532. dev_dbg(hcd->self.controller, "power-on\n");
  1533. max3421_hcd->port_status |= USB_PORT_STAT_POWER;
  1534. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1535. pdata->vbus_active_level);
  1536. break;
  1537. case USB_PORT_FEAT_RESET:
  1538. max3421_reset_port(hcd);
  1539. /* FALLS THROUGH */
  1540. default:
  1541. if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
  1542. != 0)
  1543. max3421_hcd->port_status |= (1 << value);
  1544. }
  1545. break;
  1546. default:
  1547. dev_dbg(hcd->self.controller,
  1548. "hub control req%04x v%04x i%04x l%d\n",
  1549. type_req, value, index, length);
  1550. error: /* "protocol stall" on error */
  1551. retval = -EPIPE;
  1552. }
  1553. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1554. return retval;
  1555. }
  1556. static int
  1557. max3421_bus_suspend(struct usb_hcd *hcd)
  1558. {
  1559. return -1;
  1560. }
  1561. static int
  1562. max3421_bus_resume(struct usb_hcd *hcd)
  1563. {
  1564. return -1;
  1565. }
  1566. /*
  1567. * The SPI driver already takes care of DMA-mapping/unmapping, so no
  1568. * reason to do it twice.
  1569. */
  1570. static int
  1571. max3421_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1572. {
  1573. return 0;
  1574. }
  1575. static void
  1576. max3421_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
  1577. {
  1578. }
  1579. static struct hc_driver max3421_hcd_desc = {
  1580. .description = "max3421",
  1581. .product_desc = DRIVER_DESC,
  1582. .hcd_priv_size = sizeof(struct max3421_hcd),
  1583. .flags = HCD_USB11,
  1584. .reset = max3421_reset,
  1585. .start = max3421_start,
  1586. .stop = max3421_stop,
  1587. .get_frame_number = max3421_get_frame_number,
  1588. .urb_enqueue = max3421_urb_enqueue,
  1589. .urb_dequeue = max3421_urb_dequeue,
  1590. .map_urb_for_dma = max3421_map_urb_for_dma,
  1591. .unmap_urb_for_dma = max3421_unmap_urb_for_dma,
  1592. .endpoint_disable = max3421_endpoint_disable,
  1593. .hub_status_data = max3421_hub_status_data,
  1594. .hub_control = max3421_hub_control,
  1595. .bus_suspend = max3421_bus_suspend,
  1596. .bus_resume = max3421_bus_resume,
  1597. };
  1598. static int
  1599. max3421_probe(struct spi_device *spi)
  1600. {
  1601. struct max3421_hcd *max3421_hcd;
  1602. struct usb_hcd *hcd = NULL;
  1603. int retval = -ENOMEM;
  1604. if (spi_setup(spi) < 0) {
  1605. dev_err(&spi->dev, "Unable to setup SPI bus");
  1606. return -EFAULT;
  1607. }
  1608. hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
  1609. dev_name(&spi->dev));
  1610. if (!hcd) {
  1611. dev_err(&spi->dev, "failed to create HCD structure\n");
  1612. goto error;
  1613. }
  1614. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  1615. max3421_hcd = hcd_to_max3421(hcd);
  1616. max3421_hcd->next = max3421_hcd_list;
  1617. max3421_hcd_list = max3421_hcd;
  1618. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1619. max3421_hcd->tx = kmalloc(sizeof(*max3421_hcd->tx), GFP_KERNEL);
  1620. if (!max3421_hcd->tx) {
  1621. dev_err(&spi->dev, "failed to kmalloc tx buffer\n");
  1622. goto error;
  1623. }
  1624. max3421_hcd->rx = kmalloc(sizeof(*max3421_hcd->rx), GFP_KERNEL);
  1625. if (!max3421_hcd->rx) {
  1626. dev_err(&spi->dev, "failed to kmalloc rx buffer\n");
  1627. goto error;
  1628. }
  1629. max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
  1630. "max3421_spi_thread");
  1631. if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
  1632. dev_err(&spi->dev,
  1633. "failed to create SPI thread (out of memory)\n");
  1634. goto error;
  1635. }
  1636. retval = usb_add_hcd(hcd, 0, 0);
  1637. if (retval) {
  1638. dev_err(&spi->dev, "failed to add HCD\n");
  1639. goto error;
  1640. }
  1641. retval = request_irq(spi->irq, max3421_irq_handler,
  1642. IRQF_TRIGGER_LOW, "max3421", hcd);
  1643. if (retval < 0) {
  1644. dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
  1645. goto error;
  1646. }
  1647. return 0;
  1648. error:
  1649. if (hcd) {
  1650. kfree(max3421_hcd->tx);
  1651. kfree(max3421_hcd->rx);
  1652. if (max3421_hcd->spi_thread)
  1653. kthread_stop(max3421_hcd->spi_thread);
  1654. usb_put_hcd(hcd);
  1655. }
  1656. return retval;
  1657. }
  1658. static int
  1659. max3421_remove(struct spi_device *spi)
  1660. {
  1661. struct max3421_hcd *max3421_hcd = NULL, **prev;
  1662. struct usb_hcd *hcd = NULL;
  1663. unsigned long flags;
  1664. for (prev = &max3421_hcd_list; *prev; prev = &(*prev)->next) {
  1665. max3421_hcd = *prev;
  1666. hcd = max3421_to_hcd(max3421_hcd);
  1667. if (hcd->self.controller == &spi->dev)
  1668. break;
  1669. }
  1670. if (!max3421_hcd) {
  1671. dev_err(&spi->dev, "no MAX3421 HCD found for SPI device %p\n",
  1672. spi);
  1673. return -ENODEV;
  1674. }
  1675. usb_remove_hcd(hcd);
  1676. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1677. kthread_stop(max3421_hcd->spi_thread);
  1678. *prev = max3421_hcd->next;
  1679. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1680. free_irq(spi->irq, hcd);
  1681. usb_put_hcd(hcd);
  1682. return 0;
  1683. }
  1684. static struct spi_driver max3421_driver = {
  1685. .probe = max3421_probe,
  1686. .remove = max3421_remove,
  1687. .driver = {
  1688. .name = "max3421-hcd",
  1689. },
  1690. };
  1691. module_spi_driver(max3421_driver);
  1692. MODULE_DESCRIPTION(DRIVER_DESC);
  1693. MODULE_AUTHOR("David Mosberger <davidm@egauge.net>");
  1694. MODULE_LICENSE("GPL");