uhci-grlib.c 5.0 KB

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  1. /*
  2. * UHCI HCD (Host Controller Driver) for GRLIB GRUSBHC
  3. *
  4. * Copyright (c) 2011 Jan Andersson <jan@gaisler.com>
  5. *
  6. * This file is based on UHCI PCI HCD:
  7. * (C) Copyright 1999 Linus Torvalds
  8. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  9. * (C) Copyright 1999 Randy Dunlap
  10. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  11. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  12. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  13. * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  14. * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  15. * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  16. * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  17. * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
  18. */
  19. #include <linux/device.h>
  20. #include <linux/of_irq.h>
  21. #include <linux/of_address.h>
  22. #include <linux/of_platform.h>
  23. static int uhci_grlib_init(struct usb_hcd *hcd)
  24. {
  25. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  26. /*
  27. * Probe to determine the endianness of the controller.
  28. * We know that bit 7 of the PORTSC1 register is always set
  29. * and bit 15 is always clear. If uhci_readw() yields a value
  30. * with bit 7 (0x80) turned on then the current little-endian
  31. * setting is correct. Otherwise we assume the value was
  32. * byte-swapped; hence the register interface and presumably
  33. * also the descriptors are big-endian.
  34. */
  35. if (!(uhci_readw(uhci, USBPORTSC1) & 0x80)) {
  36. uhci->big_endian_mmio = 1;
  37. uhci->big_endian_desc = 1;
  38. }
  39. uhci->rh_numports = uhci_count_ports(hcd);
  40. /* Set up pointers to to generic functions */
  41. uhci->reset_hc = uhci_generic_reset_hc;
  42. uhci->check_and_reset_hc = uhci_generic_check_and_reset_hc;
  43. /* No special actions need to be taken for the functions below */
  44. uhci->configure_hc = NULL;
  45. uhci->resume_detect_interrupts_are_broken = NULL;
  46. uhci->global_suspend_mode_is_broken = NULL;
  47. /* Reset if the controller isn't already safely quiescent. */
  48. check_and_reset_hc(uhci);
  49. return 0;
  50. }
  51. static const struct hc_driver uhci_grlib_hc_driver = {
  52. .description = hcd_name,
  53. .product_desc = "GRLIB GRUSBHC UHCI Host Controller",
  54. .hcd_priv_size = sizeof(struct uhci_hcd),
  55. /* Generic hardware linkage */
  56. .irq = uhci_irq,
  57. .flags = HCD_MEMORY | HCD_USB11,
  58. /* Basic lifecycle operations */
  59. .reset = uhci_grlib_init,
  60. .start = uhci_start,
  61. #ifdef CONFIG_PM
  62. .pci_suspend = NULL,
  63. .pci_resume = NULL,
  64. .bus_suspend = uhci_rh_suspend,
  65. .bus_resume = uhci_rh_resume,
  66. #endif
  67. .stop = uhci_stop,
  68. .urb_enqueue = uhci_urb_enqueue,
  69. .urb_dequeue = uhci_urb_dequeue,
  70. .endpoint_disable = uhci_hcd_endpoint_disable,
  71. .get_frame_number = uhci_hcd_get_frame_number,
  72. .hub_status_data = uhci_hub_status_data,
  73. .hub_control = uhci_hub_control,
  74. };
  75. static int uhci_hcd_grlib_probe(struct platform_device *op)
  76. {
  77. struct device_node *dn = op->dev.of_node;
  78. struct usb_hcd *hcd;
  79. struct uhci_hcd *uhci = NULL;
  80. struct resource res;
  81. int irq;
  82. int rv;
  83. if (usb_disabled())
  84. return -ENODEV;
  85. dev_dbg(&op->dev, "initializing GRUSBHC UHCI USB Controller\n");
  86. rv = of_address_to_resource(dn, 0, &res);
  87. if (rv)
  88. return rv;
  89. /* usb_create_hcd requires dma_mask != NULL */
  90. op->dev.dma_mask = &op->dev.coherent_dma_mask;
  91. hcd = usb_create_hcd(&uhci_grlib_hc_driver, &op->dev,
  92. "GRUSBHC UHCI USB");
  93. if (!hcd)
  94. return -ENOMEM;
  95. hcd->rsrc_start = res.start;
  96. hcd->rsrc_len = resource_size(&res);
  97. irq = irq_of_parse_and_map(dn, 0);
  98. if (irq == NO_IRQ) {
  99. printk(KERN_ERR "%s: irq_of_parse_and_map failed\n", __FILE__);
  100. rv = -EBUSY;
  101. goto err_usb;
  102. }
  103. hcd->regs = devm_ioremap_resource(&op->dev, &res);
  104. if (IS_ERR(hcd->regs)) {
  105. rv = PTR_ERR(hcd->regs);
  106. goto err_irq;
  107. }
  108. uhci = hcd_to_uhci(hcd);
  109. uhci->regs = hcd->regs;
  110. rv = usb_add_hcd(hcd, irq, 0);
  111. if (rv)
  112. goto err_irq;
  113. device_wakeup_enable(hcd->self.controller);
  114. return 0;
  115. err_irq:
  116. irq_dispose_mapping(irq);
  117. err_usb:
  118. usb_put_hcd(hcd);
  119. return rv;
  120. }
  121. static int uhci_hcd_grlib_remove(struct platform_device *op)
  122. {
  123. struct usb_hcd *hcd = platform_get_drvdata(op);
  124. dev_dbg(&op->dev, "stopping GRLIB GRUSBHC UHCI USB Controller\n");
  125. usb_remove_hcd(hcd);
  126. irq_dispose_mapping(hcd->irq);
  127. usb_put_hcd(hcd);
  128. return 0;
  129. }
  130. /* Make sure the controller is quiescent and that we're not using it
  131. * any more. This is mainly for the benefit of programs which, like kexec,
  132. * expect the hardware to be idle: not doing DMA or generating IRQs.
  133. *
  134. * This routine may be called in a damaged or failing kernel. Hence we
  135. * do not acquire the spinlock before shutting down the controller.
  136. */
  137. static void uhci_hcd_grlib_shutdown(struct platform_device *op)
  138. {
  139. struct usb_hcd *hcd = platform_get_drvdata(op);
  140. uhci_hc_died(hcd_to_uhci(hcd));
  141. }
  142. static const struct of_device_id uhci_hcd_grlib_of_match[] = {
  143. { .name = "GAISLER_UHCI", },
  144. { .name = "01_027", },
  145. {},
  146. };
  147. MODULE_DEVICE_TABLE(of, uhci_hcd_grlib_of_match);
  148. static struct platform_driver uhci_grlib_driver = {
  149. .probe = uhci_hcd_grlib_probe,
  150. .remove = uhci_hcd_grlib_remove,
  151. .shutdown = uhci_hcd_grlib_shutdown,
  152. .driver = {
  153. .name = "grlib-uhci",
  154. .of_match_table = uhci_hcd_grlib_of_match,
  155. },
  156. };