uhci-hub.c 11 KB

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  1. /*
  2. * Universal Host Controller Interface driver for USB.
  3. *
  4. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  5. *
  6. * (C) Copyright 1999 Linus Torvalds
  7. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  8. * (C) Copyright 1999 Randy Dunlap
  9. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12. * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
  13. */
  14. static const __u8 root_hub_hub_des[] =
  15. {
  16. 0x09, /* __u8 bLength; */
  17. USB_DT_HUB, /* __u8 bDescriptorType; Hub-descriptor */
  18. 0x02, /* __u8 bNbrPorts; */
  19. HUB_CHAR_NO_LPSM | /* __u16 wHubCharacteristics; */
  20. HUB_CHAR_INDV_PORT_OCPM, /* (per-port OC, no power switching) */
  21. 0x00,
  22. 0x01, /* __u8 bPwrOn2pwrGood; 2ms */
  23. 0x00, /* __u8 bHubContrCurrent; 0 mA */
  24. 0x00, /* __u8 DeviceRemovable; *** 7 Ports max */
  25. 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max */
  26. };
  27. #define UHCI_RH_MAXCHILD 7
  28. /* must write as zeroes */
  29. #define WZ_BITS (USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4)
  30. /* status change bits: nonzero writes will clear */
  31. #define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)
  32. /* suspend/resume bits: port suspended or port resuming */
  33. #define SUSPEND_BITS (USBPORTSC_SUSP | USBPORTSC_RD)
  34. /* A port that either is connected or has a changed-bit set will prevent
  35. * us from AUTO_STOPPING.
  36. */
  37. static int any_ports_active(struct uhci_hcd *uhci)
  38. {
  39. int port;
  40. for (port = 0; port < uhci->rh_numports; ++port) {
  41. if ((uhci_readw(uhci, USBPORTSC1 + port * 2) &
  42. (USBPORTSC_CCS | RWC_BITS)) ||
  43. test_bit(port, &uhci->port_c_suspend))
  44. return 1;
  45. }
  46. return 0;
  47. }
  48. static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
  49. {
  50. int port;
  51. int mask = RWC_BITS;
  52. /* Some boards (both VIA and Intel apparently) report bogus
  53. * overcurrent indications, causing massive log spam unless
  54. * we completely ignore them. This doesn't seem to be a problem
  55. * with the chipset so much as with the way it is connected on
  56. * the motherboard; if the overcurrent input is left to float
  57. * then it may constantly register false positives. */
  58. if (ignore_oc)
  59. mask &= ~USBPORTSC_OCC;
  60. *buf = 0;
  61. for (port = 0; port < uhci->rh_numports; ++port) {
  62. if ((uhci_readw(uhci, USBPORTSC1 + port * 2) & mask) ||
  63. test_bit(port, &uhci->port_c_suspend))
  64. *buf |= (1 << (port + 1));
  65. }
  66. return !!*buf;
  67. }
  68. #define CLR_RH_PORTSTAT(x) \
  69. status = uhci_readw(uhci, port_addr); \
  70. status &= ~(RWC_BITS|WZ_BITS); \
  71. status &= ~(x); \
  72. status |= RWC_BITS & (x); \
  73. uhci_writew(uhci, status, port_addr)
  74. #define SET_RH_PORTSTAT(x) \
  75. status = uhci_readw(uhci, port_addr); \
  76. status |= (x); \
  77. status &= ~(RWC_BITS|WZ_BITS); \
  78. uhci_writew(uhci, status, port_addr)
  79. /* UHCI controllers don't automatically stop resume signalling after 20 msec,
  80. * so we have to poll and check timeouts in order to take care of it.
  81. */
  82. static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
  83. unsigned long port_addr)
  84. {
  85. int status;
  86. int i;
  87. if (uhci_readw(uhci, port_addr) & SUSPEND_BITS) {
  88. CLR_RH_PORTSTAT(SUSPEND_BITS);
  89. if (test_bit(port, &uhci->resuming_ports))
  90. set_bit(port, &uhci->port_c_suspend);
  91. /* The controller won't actually turn off the RD bit until
  92. * it has had a chance to send a low-speed EOP sequence,
  93. * which is supposed to take 3 bit times (= 2 microseconds).
  94. * Experiments show that some controllers take longer, so
  95. * we'll poll for completion. */
  96. for (i = 0; i < 10; ++i) {
  97. if (!(uhci_readw(uhci, port_addr) & SUSPEND_BITS))
  98. break;
  99. udelay(1);
  100. }
  101. }
  102. clear_bit(port, &uhci->resuming_ports);
  103. usb_hcd_end_port_resume(&uhci_to_hcd(uhci)->self, port);
  104. }
  105. /* Wait for the UHCI controller in HP's iLO2 server management chip.
  106. * It can take up to 250 us to finish a reset and set the CSC bit.
  107. */
  108. static void wait_for_HP(struct uhci_hcd *uhci, unsigned long port_addr)
  109. {
  110. int i;
  111. for (i = 10; i < 250; i += 10) {
  112. if (uhci_readw(uhci, port_addr) & USBPORTSC_CSC)
  113. return;
  114. udelay(10);
  115. }
  116. /* Log a warning? */
  117. }
  118. static void uhci_check_ports(struct uhci_hcd *uhci)
  119. {
  120. unsigned int port;
  121. unsigned long port_addr;
  122. int status;
  123. for (port = 0; port < uhci->rh_numports; ++port) {
  124. port_addr = USBPORTSC1 + 2 * port;
  125. status = uhci_readw(uhci, port_addr);
  126. if (unlikely(status & USBPORTSC_PR)) {
  127. if (time_after_eq(jiffies, uhci->ports_timeout)) {
  128. CLR_RH_PORTSTAT(USBPORTSC_PR);
  129. udelay(10);
  130. /* HP's server management chip requires
  131. * a longer delay. */
  132. if (uhci->wait_for_hp)
  133. wait_for_HP(uhci, port_addr);
  134. /* If the port was enabled before, turning
  135. * reset on caused a port enable change.
  136. * Turning reset off causes a port connect
  137. * status change. Clear these changes. */
  138. CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC);
  139. SET_RH_PORTSTAT(USBPORTSC_PE);
  140. }
  141. }
  142. if (unlikely(status & USBPORTSC_RD)) {
  143. if (!test_bit(port, &uhci->resuming_ports)) {
  144. /* Port received a wakeup request */
  145. set_bit(port, &uhci->resuming_ports);
  146. uhci->ports_timeout = jiffies +
  147. msecs_to_jiffies(USB_RESUME_TIMEOUT);
  148. usb_hcd_start_port_resume(
  149. &uhci_to_hcd(uhci)->self, port);
  150. /* Make sure we see the port again
  151. * after the resuming period is over. */
  152. mod_timer(&uhci_to_hcd(uhci)->rh_timer,
  153. uhci->ports_timeout);
  154. } else if (time_after_eq(jiffies,
  155. uhci->ports_timeout)) {
  156. uhci_finish_suspend(uhci, port, port_addr);
  157. }
  158. }
  159. }
  160. }
  161. static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
  162. {
  163. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  164. unsigned long flags;
  165. int status = 0;
  166. spin_lock_irqsave(&uhci->lock, flags);
  167. uhci_scan_schedule(uhci);
  168. if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
  169. goto done;
  170. uhci_check_ports(uhci);
  171. status = get_hub_status_data(uhci, buf);
  172. switch (uhci->rh_state) {
  173. case UHCI_RH_SUSPENDED:
  174. /* if port change, ask to be resumed */
  175. if (status || uhci->resuming_ports) {
  176. status = 1;
  177. usb_hcd_resume_root_hub(hcd);
  178. }
  179. break;
  180. case UHCI_RH_AUTO_STOPPED:
  181. /* if port change, auto start */
  182. if (status)
  183. wakeup_rh(uhci);
  184. break;
  185. case UHCI_RH_RUNNING:
  186. /* are any devices attached? */
  187. if (!any_ports_active(uhci)) {
  188. uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
  189. uhci->auto_stop_time = jiffies + HZ;
  190. }
  191. break;
  192. case UHCI_RH_RUNNING_NODEVS:
  193. /* auto-stop if nothing connected for 1 second */
  194. if (any_ports_active(uhci))
  195. uhci->rh_state = UHCI_RH_RUNNING;
  196. else if (time_after_eq(jiffies, uhci->auto_stop_time) &&
  197. !uhci->wait_for_hp)
  198. suspend_rh(uhci, UHCI_RH_AUTO_STOPPED);
  199. break;
  200. default:
  201. break;
  202. }
  203. done:
  204. spin_unlock_irqrestore(&uhci->lock, flags);
  205. return status;
  206. }
  207. /* size of returned buffer is part of USB spec */
  208. static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
  209. u16 wIndex, char *buf, u16 wLength)
  210. {
  211. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  212. int status, lstatus, retval = 0;
  213. unsigned int port = wIndex - 1;
  214. unsigned long port_addr = USBPORTSC1 + 2 * port;
  215. u16 wPortChange, wPortStatus;
  216. unsigned long flags;
  217. if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
  218. return -ETIMEDOUT;
  219. spin_lock_irqsave(&uhci->lock, flags);
  220. switch (typeReq) {
  221. case GetHubStatus:
  222. *(__le32 *)buf = cpu_to_le32(0);
  223. retval = 4; /* hub power */
  224. break;
  225. case GetPortStatus:
  226. if (port >= uhci->rh_numports)
  227. goto err;
  228. uhci_check_ports(uhci);
  229. status = uhci_readw(uhci, port_addr);
  230. /* Intel controllers report the OverCurrent bit active on.
  231. * VIA controllers report it active off, so we'll adjust the
  232. * bit value. (It's not standardized in the UHCI spec.)
  233. */
  234. if (uhci->oc_low)
  235. status ^= USBPORTSC_OC;
  236. /* UHCI doesn't support C_RESET (always false) */
  237. wPortChange = lstatus = 0;
  238. if (status & USBPORTSC_CSC)
  239. wPortChange |= USB_PORT_STAT_C_CONNECTION;
  240. if (status & USBPORTSC_PEC)
  241. wPortChange |= USB_PORT_STAT_C_ENABLE;
  242. if ((status & USBPORTSC_OCC) && !ignore_oc)
  243. wPortChange |= USB_PORT_STAT_C_OVERCURRENT;
  244. if (test_bit(port, &uhci->port_c_suspend)) {
  245. wPortChange |= USB_PORT_STAT_C_SUSPEND;
  246. lstatus |= 1;
  247. }
  248. if (test_bit(port, &uhci->resuming_ports))
  249. lstatus |= 4;
  250. /* UHCI has no power switching (always on) */
  251. wPortStatus = USB_PORT_STAT_POWER;
  252. if (status & USBPORTSC_CCS)
  253. wPortStatus |= USB_PORT_STAT_CONNECTION;
  254. if (status & USBPORTSC_PE) {
  255. wPortStatus |= USB_PORT_STAT_ENABLE;
  256. if (status & SUSPEND_BITS)
  257. wPortStatus |= USB_PORT_STAT_SUSPEND;
  258. }
  259. if (status & USBPORTSC_OC)
  260. wPortStatus |= USB_PORT_STAT_OVERCURRENT;
  261. if (status & USBPORTSC_PR)
  262. wPortStatus |= USB_PORT_STAT_RESET;
  263. if (status & USBPORTSC_LSDA)
  264. wPortStatus |= USB_PORT_STAT_LOW_SPEED;
  265. if (wPortChange)
  266. dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n",
  267. wIndex, status, lstatus);
  268. *(__le16 *)buf = cpu_to_le16(wPortStatus);
  269. *(__le16 *)(buf + 2) = cpu_to_le16(wPortChange);
  270. retval = 4;
  271. break;
  272. case SetHubFeature: /* We don't implement these */
  273. case ClearHubFeature:
  274. switch (wValue) {
  275. case C_HUB_OVER_CURRENT:
  276. case C_HUB_LOCAL_POWER:
  277. break;
  278. default:
  279. goto err;
  280. }
  281. break;
  282. case SetPortFeature:
  283. if (port >= uhci->rh_numports)
  284. goto err;
  285. switch (wValue) {
  286. case USB_PORT_FEAT_SUSPEND:
  287. SET_RH_PORTSTAT(USBPORTSC_SUSP);
  288. break;
  289. case USB_PORT_FEAT_RESET:
  290. SET_RH_PORTSTAT(USBPORTSC_PR);
  291. /* Reset terminates Resume signalling */
  292. uhci_finish_suspend(uhci, port, port_addr);
  293. /* USB v2.0 7.1.7.5 */
  294. uhci->ports_timeout = jiffies +
  295. msecs_to_jiffies(USB_RESUME_TIMEOUT);
  296. break;
  297. case USB_PORT_FEAT_POWER:
  298. /* UHCI has no power switching */
  299. break;
  300. default:
  301. goto err;
  302. }
  303. break;
  304. case ClearPortFeature:
  305. if (port >= uhci->rh_numports)
  306. goto err;
  307. switch (wValue) {
  308. case USB_PORT_FEAT_ENABLE:
  309. CLR_RH_PORTSTAT(USBPORTSC_PE);
  310. /* Disable terminates Resume signalling */
  311. uhci_finish_suspend(uhci, port, port_addr);
  312. break;
  313. case USB_PORT_FEAT_C_ENABLE:
  314. CLR_RH_PORTSTAT(USBPORTSC_PEC);
  315. break;
  316. case USB_PORT_FEAT_SUSPEND:
  317. if (!(uhci_readw(uhci, port_addr) & USBPORTSC_SUSP)) {
  318. /* Make certain the port isn't suspended */
  319. uhci_finish_suspend(uhci, port, port_addr);
  320. } else if (!test_and_set_bit(port,
  321. &uhci->resuming_ports)) {
  322. SET_RH_PORTSTAT(USBPORTSC_RD);
  323. /* The controller won't allow RD to be set
  324. * if the port is disabled. When this happens
  325. * just skip the Resume signalling.
  326. */
  327. if (!(uhci_readw(uhci, port_addr) &
  328. USBPORTSC_RD))
  329. uhci_finish_suspend(uhci, port,
  330. port_addr);
  331. else
  332. /* USB v2.0 7.1.7.7 */
  333. uhci->ports_timeout = jiffies +
  334. msecs_to_jiffies(20);
  335. }
  336. break;
  337. case USB_PORT_FEAT_C_SUSPEND:
  338. clear_bit(port, &uhci->port_c_suspend);
  339. break;
  340. case USB_PORT_FEAT_POWER:
  341. /* UHCI has no power switching */
  342. goto err;
  343. case USB_PORT_FEAT_C_CONNECTION:
  344. CLR_RH_PORTSTAT(USBPORTSC_CSC);
  345. break;
  346. case USB_PORT_FEAT_C_OVER_CURRENT:
  347. CLR_RH_PORTSTAT(USBPORTSC_OCC);
  348. break;
  349. case USB_PORT_FEAT_C_RESET:
  350. /* this driver won't report these */
  351. break;
  352. default:
  353. goto err;
  354. }
  355. break;
  356. case GetHubDescriptor:
  357. retval = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
  358. memcpy(buf, root_hub_hub_des, retval);
  359. if (retval > 2)
  360. buf[2] = uhci->rh_numports;
  361. break;
  362. default:
  363. err:
  364. retval = -EPIPE;
  365. }
  366. spin_unlock_irqrestore(&uhci->lock, flags);
  367. return retval;
  368. }