uhci-pci.c 8.4 KB

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  1. /*
  2. * UHCI HCD (Host Controller Driver) PCI Bus Glue.
  3. *
  4. * Extracted from uhci-hcd.c:
  5. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  6. *
  7. * (C) Copyright 1999 Linus Torvalds
  8. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  9. * (C) Copyright 1999 Randy Dunlap
  10. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  11. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  12. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  13. * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  14. * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  15. * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  16. * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  17. * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
  18. */
  19. #include "pci-quirks.h"
  20. /*
  21. * Make sure the controller is completely inactive, unable to
  22. * generate interrupts or do DMA.
  23. */
  24. static void uhci_pci_reset_hc(struct uhci_hcd *uhci)
  25. {
  26. uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
  27. }
  28. /*
  29. * Initialize a controller that was newly discovered or has just been
  30. * resumed. In either case we can't be sure of its previous state.
  31. *
  32. * Returns: 1 if the controller was reset, 0 otherwise.
  33. */
  34. static int uhci_pci_check_and_reset_hc(struct uhci_hcd *uhci)
  35. {
  36. return uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)),
  37. uhci->io_addr);
  38. }
  39. /*
  40. * Store the basic register settings needed by the controller.
  41. * This function is called at the end of configure_hc in uhci-hcd.c.
  42. */
  43. static void uhci_pci_configure_hc(struct uhci_hcd *uhci)
  44. {
  45. struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
  46. /* Enable PIRQ */
  47. pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
  48. /* Disable platform-specific non-PME# wakeup */
  49. if (pdev->vendor == PCI_VENDOR_ID_INTEL)
  50. pci_write_config_byte(pdev, USBRES_INTEL, 0);
  51. }
  52. static int uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
  53. {
  54. int port;
  55. switch (to_pci_dev(uhci_dev(uhci))->vendor) {
  56. default:
  57. break;
  58. case PCI_VENDOR_ID_GENESYS:
  59. /* Genesys Logic's GL880S controllers don't generate
  60. * resume-detect interrupts.
  61. */
  62. return 1;
  63. case PCI_VENDOR_ID_INTEL:
  64. /* Some of Intel's USB controllers have a bug that causes
  65. * resume-detect interrupts if any port has an over-current
  66. * condition. To make matters worse, some motherboards
  67. * hardwire unused USB ports' over-current inputs active!
  68. * To prevent problems, we will not enable resume-detect
  69. * interrupts if any ports are OC.
  70. */
  71. for (port = 0; port < uhci->rh_numports; ++port) {
  72. if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
  73. USBPORTSC_OC)
  74. return 1;
  75. }
  76. break;
  77. }
  78. return 0;
  79. }
  80. static int uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd *uhci)
  81. {
  82. int port;
  83. const char *sys_info;
  84. static const char bad_Asus_board[] = "A7V8X";
  85. /* One of Asus's motherboards has a bug which causes it to
  86. * wake up immediately from suspend-to-RAM if any of the ports
  87. * are connected. In such cases we will not set EGSM.
  88. */
  89. sys_info = dmi_get_system_info(DMI_BOARD_NAME);
  90. if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
  91. for (port = 0; port < uhci->rh_numports; ++port) {
  92. if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
  93. USBPORTSC_CCS)
  94. return 1;
  95. }
  96. }
  97. return 0;
  98. }
  99. static int uhci_pci_init(struct usb_hcd *hcd)
  100. {
  101. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  102. uhci->io_addr = (unsigned long) hcd->rsrc_start;
  103. uhci->rh_numports = uhci_count_ports(hcd);
  104. /* Intel controllers report the OverCurrent bit active on.
  105. * VIA controllers report it active off, so we'll adjust the
  106. * bit value. (It's not standardized in the UHCI spec.)
  107. */
  108. if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA)
  109. uhci->oc_low = 1;
  110. /* HP's server management chip requires a longer port reset delay. */
  111. if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP)
  112. uhci->wait_for_hp = 1;
  113. /* Intel controllers use non-PME wakeup signalling */
  114. if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_INTEL)
  115. device_set_run_wake(uhci_dev(uhci), 1);
  116. /* Set up pointers to PCI-specific functions */
  117. uhci->reset_hc = uhci_pci_reset_hc;
  118. uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc;
  119. uhci->configure_hc = uhci_pci_configure_hc;
  120. uhci->resume_detect_interrupts_are_broken =
  121. uhci_pci_resume_detect_interrupts_are_broken;
  122. uhci->global_suspend_mode_is_broken =
  123. uhci_pci_global_suspend_mode_is_broken;
  124. /* Kick BIOS off this hardware and reset if the controller
  125. * isn't already safely quiescent.
  126. */
  127. check_and_reset_hc(uhci);
  128. return 0;
  129. }
  130. /* Make sure the controller is quiescent and that we're not using it
  131. * any more. This is mainly for the benefit of programs which, like kexec,
  132. * expect the hardware to be idle: not doing DMA or generating IRQs.
  133. *
  134. * This routine may be called in a damaged or failing kernel. Hence we
  135. * do not acquire the spinlock before shutting down the controller.
  136. */
  137. static void uhci_shutdown(struct pci_dev *pdev)
  138. {
  139. struct usb_hcd *hcd = pci_get_drvdata(pdev);
  140. uhci_hc_died(hcd_to_uhci(hcd));
  141. }
  142. #ifdef CONFIG_PM
  143. static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated);
  144. static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
  145. {
  146. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  147. struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
  148. int rc = 0;
  149. dev_dbg(uhci_dev(uhci), "%s\n", __func__);
  150. spin_lock_irq(&uhci->lock);
  151. if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
  152. goto done_okay; /* Already suspended or dead */
  153. /* All PCI host controllers are required to disable IRQ generation
  154. * at the source, so we must turn off PIRQ.
  155. */
  156. pci_write_config_word(pdev, USBLEGSUP, 0);
  157. clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  158. /* Enable platform-specific non-PME# wakeup */
  159. if (do_wakeup) {
  160. if (pdev->vendor == PCI_VENDOR_ID_INTEL)
  161. pci_write_config_byte(pdev, USBRES_INTEL,
  162. USBPORT1EN | USBPORT2EN);
  163. }
  164. done_okay:
  165. clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  166. spin_unlock_irq(&uhci->lock);
  167. synchronize_irq(hcd->irq);
  168. /* Check for race with a wakeup request */
  169. if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
  170. uhci_pci_resume(hcd, false);
  171. rc = -EBUSY;
  172. }
  173. return rc;
  174. }
  175. static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
  176. {
  177. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  178. dev_dbg(uhci_dev(uhci), "%s\n", __func__);
  179. /* Since we aren't in D3 any more, it's safe to set this flag
  180. * even if the controller was dead.
  181. */
  182. set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  183. spin_lock_irq(&uhci->lock);
  184. /* Make sure resume from hibernation re-enumerates everything */
  185. if (hibernated) {
  186. uhci->reset_hc(uhci);
  187. finish_reset(uhci);
  188. }
  189. /* The firmware may have changed the controller settings during
  190. * a system wakeup. Check it and reconfigure to avoid problems.
  191. */
  192. else {
  193. check_and_reset_hc(uhci);
  194. }
  195. configure_hc(uhci);
  196. /* Tell the core if the controller had to be reset */
  197. if (uhci->rh_state == UHCI_RH_RESET)
  198. usb_root_hub_lost_power(hcd->self.root_hub);
  199. spin_unlock_irq(&uhci->lock);
  200. /* If interrupts don't work and remote wakeup is enabled then
  201. * the suspended root hub needs to be polled.
  202. */
  203. if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
  204. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  205. /* Does the root hub have a port wakeup pending? */
  206. usb_hcd_poll_rh_status(hcd);
  207. return 0;
  208. }
  209. #endif
  210. static const struct hc_driver uhci_driver = {
  211. .description = hcd_name,
  212. .product_desc = "UHCI Host Controller",
  213. .hcd_priv_size = sizeof(struct uhci_hcd),
  214. /* Generic hardware linkage */
  215. .irq = uhci_irq,
  216. .flags = HCD_USB11,
  217. /* Basic lifecycle operations */
  218. .reset = uhci_pci_init,
  219. .start = uhci_start,
  220. #ifdef CONFIG_PM
  221. .pci_suspend = uhci_pci_suspend,
  222. .pci_resume = uhci_pci_resume,
  223. .bus_suspend = uhci_rh_suspend,
  224. .bus_resume = uhci_rh_resume,
  225. #endif
  226. .stop = uhci_stop,
  227. .urb_enqueue = uhci_urb_enqueue,
  228. .urb_dequeue = uhci_urb_dequeue,
  229. .endpoint_disable = uhci_hcd_endpoint_disable,
  230. .get_frame_number = uhci_hcd_get_frame_number,
  231. .hub_status_data = uhci_hub_status_data,
  232. .hub_control = uhci_hub_control,
  233. };
  234. static const struct pci_device_id uhci_pci_ids[] = { {
  235. /* handle any USB UHCI controller */
  236. PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
  237. .driver_data = (unsigned long) &uhci_driver,
  238. }, { /* end: all zeroes */ }
  239. };
  240. MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
  241. static struct pci_driver uhci_pci_driver = {
  242. .name = (char *)hcd_name,
  243. .id_table = uhci_pci_ids,
  244. .probe = usb_hcd_pci_probe,
  245. .remove = usb_hcd_pci_remove,
  246. .shutdown = uhci_shutdown,
  247. #ifdef CONFIG_PM
  248. .driver = {
  249. .pm = &usb_hcd_pci_pm_ops
  250. },
  251. #endif
  252. };
  253. MODULE_SOFTDEP("pre: ehci_pci");