phy-mv-usb.c 21 KB

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  1. /*
  2. * Copyright (C) 2011 Marvell International Ltd. All rights reserved.
  3. * Author: Chao Xie <chao.xie@marvell.com>
  4. * Neil Zhang <zhangwm@marvell.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/io.h>
  14. #include <linux/uaccess.h>
  15. #include <linux/device.h>
  16. #include <linux/proc_fs.h>
  17. #include <linux/clk.h>
  18. #include <linux/workqueue.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/usb.h>
  21. #include <linux/usb/ch9.h>
  22. #include <linux/usb/otg.h>
  23. #include <linux/usb/gadget.h>
  24. #include <linux/usb/hcd.h>
  25. #include <linux/platform_data/mv_usb.h>
  26. #include "phy-mv-usb.h"
  27. #define DRIVER_DESC "Marvell USB OTG transceiver driver"
  28. #define DRIVER_VERSION "Jan 20, 2010"
  29. MODULE_DESCRIPTION(DRIVER_DESC);
  30. MODULE_VERSION(DRIVER_VERSION);
  31. MODULE_LICENSE("GPL");
  32. static const char driver_name[] = "mv-otg";
  33. static char *state_string[] = {
  34. "undefined",
  35. "b_idle",
  36. "b_srp_init",
  37. "b_peripheral",
  38. "b_wait_acon",
  39. "b_host",
  40. "a_idle",
  41. "a_wait_vrise",
  42. "a_wait_bcon",
  43. "a_host",
  44. "a_suspend",
  45. "a_peripheral",
  46. "a_wait_vfall",
  47. "a_vbus_err"
  48. };
  49. static int mv_otg_set_vbus(struct usb_otg *otg, bool on)
  50. {
  51. struct mv_otg *mvotg = container_of(otg->usb_phy, struct mv_otg, phy);
  52. if (mvotg->pdata->set_vbus == NULL)
  53. return -ENODEV;
  54. return mvotg->pdata->set_vbus(on);
  55. }
  56. static int mv_otg_set_host(struct usb_otg *otg,
  57. struct usb_bus *host)
  58. {
  59. otg->host = host;
  60. return 0;
  61. }
  62. static int mv_otg_set_peripheral(struct usb_otg *otg,
  63. struct usb_gadget *gadget)
  64. {
  65. otg->gadget = gadget;
  66. return 0;
  67. }
  68. static void mv_otg_run_state_machine(struct mv_otg *mvotg,
  69. unsigned long delay)
  70. {
  71. dev_dbg(&mvotg->pdev->dev, "transceiver is updated\n");
  72. if (!mvotg->qwork)
  73. return;
  74. queue_delayed_work(mvotg->qwork, &mvotg->work, delay);
  75. }
  76. static void mv_otg_timer_await_bcon(unsigned long data)
  77. {
  78. struct mv_otg *mvotg = (struct mv_otg *) data;
  79. mvotg->otg_ctrl.a_wait_bcon_timeout = 1;
  80. dev_info(&mvotg->pdev->dev, "B Device No Response!\n");
  81. if (spin_trylock(&mvotg->wq_lock)) {
  82. mv_otg_run_state_machine(mvotg, 0);
  83. spin_unlock(&mvotg->wq_lock);
  84. }
  85. }
  86. static int mv_otg_cancel_timer(struct mv_otg *mvotg, unsigned int id)
  87. {
  88. struct timer_list *timer;
  89. if (id >= OTG_TIMER_NUM)
  90. return -EINVAL;
  91. timer = &mvotg->otg_ctrl.timer[id];
  92. if (timer_pending(timer))
  93. del_timer(timer);
  94. return 0;
  95. }
  96. static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id,
  97. unsigned long interval,
  98. void (*callback) (unsigned long))
  99. {
  100. struct timer_list *timer;
  101. if (id >= OTG_TIMER_NUM)
  102. return -EINVAL;
  103. timer = &mvotg->otg_ctrl.timer[id];
  104. if (timer_pending(timer)) {
  105. dev_err(&mvotg->pdev->dev, "Timer%d is already running\n", id);
  106. return -EBUSY;
  107. }
  108. init_timer(timer);
  109. timer->data = (unsigned long) mvotg;
  110. timer->function = callback;
  111. timer->expires = jiffies + interval;
  112. add_timer(timer);
  113. return 0;
  114. }
  115. static int mv_otg_reset(struct mv_otg *mvotg)
  116. {
  117. unsigned int loops;
  118. u32 tmp;
  119. /* Stop the controller */
  120. tmp = readl(&mvotg->op_regs->usbcmd);
  121. tmp &= ~USBCMD_RUN_STOP;
  122. writel(tmp, &mvotg->op_regs->usbcmd);
  123. /* Reset the controller to get default values */
  124. writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
  125. loops = 500;
  126. while (readl(&mvotg->op_regs->usbcmd) & USBCMD_CTRL_RESET) {
  127. if (loops == 0) {
  128. dev_err(&mvotg->pdev->dev,
  129. "Wait for RESET completed TIMEOUT\n");
  130. return -ETIMEDOUT;
  131. }
  132. loops--;
  133. udelay(20);
  134. }
  135. writel(0x0, &mvotg->op_regs->usbintr);
  136. tmp = readl(&mvotg->op_regs->usbsts);
  137. writel(tmp, &mvotg->op_regs->usbsts);
  138. return 0;
  139. }
  140. static void mv_otg_init_irq(struct mv_otg *mvotg)
  141. {
  142. u32 otgsc;
  143. mvotg->irq_en = OTGSC_INTR_A_SESSION_VALID
  144. | OTGSC_INTR_A_VBUS_VALID;
  145. mvotg->irq_status = OTGSC_INTSTS_A_SESSION_VALID
  146. | OTGSC_INTSTS_A_VBUS_VALID;
  147. if (mvotg->pdata->vbus == NULL) {
  148. mvotg->irq_en |= OTGSC_INTR_B_SESSION_VALID
  149. | OTGSC_INTR_B_SESSION_END;
  150. mvotg->irq_status |= OTGSC_INTSTS_B_SESSION_VALID
  151. | OTGSC_INTSTS_B_SESSION_END;
  152. }
  153. if (mvotg->pdata->id == NULL) {
  154. mvotg->irq_en |= OTGSC_INTR_USB_ID;
  155. mvotg->irq_status |= OTGSC_INTSTS_USB_ID;
  156. }
  157. otgsc = readl(&mvotg->op_regs->otgsc);
  158. otgsc |= mvotg->irq_en;
  159. writel(otgsc, &mvotg->op_regs->otgsc);
  160. }
  161. static void mv_otg_start_host(struct mv_otg *mvotg, int on)
  162. {
  163. #ifdef CONFIG_USB
  164. struct usb_otg *otg = mvotg->phy.otg;
  165. struct usb_hcd *hcd;
  166. if (!otg->host)
  167. return;
  168. dev_info(&mvotg->pdev->dev, "%s host\n", on ? "start" : "stop");
  169. hcd = bus_to_hcd(otg->host);
  170. if (on) {
  171. usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
  172. device_wakeup_enable(hcd->self.controller);
  173. } else {
  174. usb_remove_hcd(hcd);
  175. }
  176. #endif /* CONFIG_USB */
  177. }
  178. static void mv_otg_start_periphrals(struct mv_otg *mvotg, int on)
  179. {
  180. struct usb_otg *otg = mvotg->phy.otg;
  181. if (!otg->gadget)
  182. return;
  183. dev_info(mvotg->phy.dev, "gadget %s\n", on ? "on" : "off");
  184. if (on)
  185. usb_gadget_vbus_connect(otg->gadget);
  186. else
  187. usb_gadget_vbus_disconnect(otg->gadget);
  188. }
  189. static void otg_clock_enable(struct mv_otg *mvotg)
  190. {
  191. clk_prepare_enable(mvotg->clk);
  192. }
  193. static void otg_clock_disable(struct mv_otg *mvotg)
  194. {
  195. clk_disable_unprepare(mvotg->clk);
  196. }
  197. static int mv_otg_enable_internal(struct mv_otg *mvotg)
  198. {
  199. int retval = 0;
  200. if (mvotg->active)
  201. return 0;
  202. dev_dbg(&mvotg->pdev->dev, "otg enabled\n");
  203. otg_clock_enable(mvotg);
  204. if (mvotg->pdata->phy_init) {
  205. retval = mvotg->pdata->phy_init(mvotg->phy_regs);
  206. if (retval) {
  207. dev_err(&mvotg->pdev->dev,
  208. "init phy error %d\n", retval);
  209. otg_clock_disable(mvotg);
  210. return retval;
  211. }
  212. }
  213. mvotg->active = 1;
  214. return 0;
  215. }
  216. static int mv_otg_enable(struct mv_otg *mvotg)
  217. {
  218. if (mvotg->clock_gating)
  219. return mv_otg_enable_internal(mvotg);
  220. return 0;
  221. }
  222. static void mv_otg_disable_internal(struct mv_otg *mvotg)
  223. {
  224. if (mvotg->active) {
  225. dev_dbg(&mvotg->pdev->dev, "otg disabled\n");
  226. if (mvotg->pdata->phy_deinit)
  227. mvotg->pdata->phy_deinit(mvotg->phy_regs);
  228. otg_clock_disable(mvotg);
  229. mvotg->active = 0;
  230. }
  231. }
  232. static void mv_otg_disable(struct mv_otg *mvotg)
  233. {
  234. if (mvotg->clock_gating)
  235. mv_otg_disable_internal(mvotg);
  236. }
  237. static void mv_otg_update_inputs(struct mv_otg *mvotg)
  238. {
  239. struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
  240. u32 otgsc;
  241. otgsc = readl(&mvotg->op_regs->otgsc);
  242. if (mvotg->pdata->vbus) {
  243. if (mvotg->pdata->vbus->poll() == VBUS_HIGH) {
  244. otg_ctrl->b_sess_vld = 1;
  245. otg_ctrl->b_sess_end = 0;
  246. } else {
  247. otg_ctrl->b_sess_vld = 0;
  248. otg_ctrl->b_sess_end = 1;
  249. }
  250. } else {
  251. otg_ctrl->b_sess_vld = !!(otgsc & OTGSC_STS_B_SESSION_VALID);
  252. otg_ctrl->b_sess_end = !!(otgsc & OTGSC_STS_B_SESSION_END);
  253. }
  254. if (mvotg->pdata->id)
  255. otg_ctrl->id = !!mvotg->pdata->id->poll();
  256. else
  257. otg_ctrl->id = !!(otgsc & OTGSC_STS_USB_ID);
  258. if (mvotg->pdata->otg_force_a_bus_req && !otg_ctrl->id)
  259. otg_ctrl->a_bus_req = 1;
  260. otg_ctrl->a_sess_vld = !!(otgsc & OTGSC_STS_A_SESSION_VALID);
  261. otg_ctrl->a_vbus_vld = !!(otgsc & OTGSC_STS_A_VBUS_VALID);
  262. dev_dbg(&mvotg->pdev->dev, "%s: ", __func__);
  263. dev_dbg(&mvotg->pdev->dev, "id %d\n", otg_ctrl->id);
  264. dev_dbg(&mvotg->pdev->dev, "b_sess_vld %d\n", otg_ctrl->b_sess_vld);
  265. dev_dbg(&mvotg->pdev->dev, "b_sess_end %d\n", otg_ctrl->b_sess_end);
  266. dev_dbg(&mvotg->pdev->dev, "a_vbus_vld %d\n", otg_ctrl->a_vbus_vld);
  267. dev_dbg(&mvotg->pdev->dev, "a_sess_vld %d\n", otg_ctrl->a_sess_vld);
  268. }
  269. static void mv_otg_update_state(struct mv_otg *mvotg)
  270. {
  271. struct mv_otg_ctrl *otg_ctrl = &mvotg->otg_ctrl;
  272. int old_state = mvotg->phy.otg->state;
  273. switch (old_state) {
  274. case OTG_STATE_UNDEFINED:
  275. mvotg->phy.otg->state = OTG_STATE_B_IDLE;
  276. /* FALL THROUGH */
  277. case OTG_STATE_B_IDLE:
  278. if (otg_ctrl->id == 0)
  279. mvotg->phy.otg->state = OTG_STATE_A_IDLE;
  280. else if (otg_ctrl->b_sess_vld)
  281. mvotg->phy.otg->state = OTG_STATE_B_PERIPHERAL;
  282. break;
  283. case OTG_STATE_B_PERIPHERAL:
  284. if (!otg_ctrl->b_sess_vld || otg_ctrl->id == 0)
  285. mvotg->phy.otg->state = OTG_STATE_B_IDLE;
  286. break;
  287. case OTG_STATE_A_IDLE:
  288. if (otg_ctrl->id)
  289. mvotg->phy.otg->state = OTG_STATE_B_IDLE;
  290. else if (!(otg_ctrl->a_bus_drop) &&
  291. (otg_ctrl->a_bus_req || otg_ctrl->a_srp_det))
  292. mvotg->phy.otg->state = OTG_STATE_A_WAIT_VRISE;
  293. break;
  294. case OTG_STATE_A_WAIT_VRISE:
  295. if (otg_ctrl->a_vbus_vld)
  296. mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON;
  297. break;
  298. case OTG_STATE_A_WAIT_BCON:
  299. if (otg_ctrl->id || otg_ctrl->a_bus_drop
  300. || otg_ctrl->a_wait_bcon_timeout) {
  301. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  302. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  303. mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
  304. otg_ctrl->a_bus_req = 0;
  305. } else if (!otg_ctrl->a_vbus_vld) {
  306. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  307. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  308. mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR;
  309. } else if (otg_ctrl->b_conn) {
  310. mv_otg_cancel_timer(mvotg, A_WAIT_BCON_TIMER);
  311. mvotg->otg_ctrl.a_wait_bcon_timeout = 0;
  312. mvotg->phy.otg->state = OTG_STATE_A_HOST;
  313. }
  314. break;
  315. case OTG_STATE_A_HOST:
  316. if (otg_ctrl->id || !otg_ctrl->b_conn
  317. || otg_ctrl->a_bus_drop)
  318. mvotg->phy.otg->state = OTG_STATE_A_WAIT_BCON;
  319. else if (!otg_ctrl->a_vbus_vld)
  320. mvotg->phy.otg->state = OTG_STATE_A_VBUS_ERR;
  321. break;
  322. case OTG_STATE_A_WAIT_VFALL:
  323. if (otg_ctrl->id
  324. || (!otg_ctrl->b_conn && otg_ctrl->a_sess_vld)
  325. || otg_ctrl->a_bus_req)
  326. mvotg->phy.otg->state = OTG_STATE_A_IDLE;
  327. break;
  328. case OTG_STATE_A_VBUS_ERR:
  329. if (otg_ctrl->id || otg_ctrl->a_clr_err
  330. || otg_ctrl->a_bus_drop) {
  331. otg_ctrl->a_clr_err = 0;
  332. mvotg->phy.otg->state = OTG_STATE_A_WAIT_VFALL;
  333. }
  334. break;
  335. default:
  336. break;
  337. }
  338. }
  339. static void mv_otg_work(struct work_struct *work)
  340. {
  341. struct mv_otg *mvotg;
  342. struct usb_phy *phy;
  343. struct usb_otg *otg;
  344. int old_state;
  345. mvotg = container_of(to_delayed_work(work), struct mv_otg, work);
  346. run:
  347. /* work queue is single thread, or we need spin_lock to protect */
  348. phy = &mvotg->phy;
  349. otg = mvotg->phy.otg;
  350. old_state = otg->state;
  351. if (!mvotg->active)
  352. return;
  353. mv_otg_update_inputs(mvotg);
  354. mv_otg_update_state(mvotg);
  355. if (old_state != mvotg->phy.otg->state) {
  356. dev_info(&mvotg->pdev->dev, "change from state %s to %s\n",
  357. state_string[old_state],
  358. state_string[mvotg->phy.otg->state]);
  359. switch (mvotg->phy.otg->state) {
  360. case OTG_STATE_B_IDLE:
  361. otg->default_a = 0;
  362. if (old_state == OTG_STATE_B_PERIPHERAL)
  363. mv_otg_start_periphrals(mvotg, 0);
  364. mv_otg_reset(mvotg);
  365. mv_otg_disable(mvotg);
  366. usb_phy_set_event(&mvotg->phy, USB_EVENT_NONE);
  367. break;
  368. case OTG_STATE_B_PERIPHERAL:
  369. mv_otg_enable(mvotg);
  370. mv_otg_start_periphrals(mvotg, 1);
  371. usb_phy_set_event(&mvotg->phy, USB_EVENT_ENUMERATED);
  372. break;
  373. case OTG_STATE_A_IDLE:
  374. otg->default_a = 1;
  375. mv_otg_enable(mvotg);
  376. if (old_state == OTG_STATE_A_WAIT_VFALL)
  377. mv_otg_start_host(mvotg, 0);
  378. mv_otg_reset(mvotg);
  379. break;
  380. case OTG_STATE_A_WAIT_VRISE:
  381. mv_otg_set_vbus(otg, 1);
  382. break;
  383. case OTG_STATE_A_WAIT_BCON:
  384. if (old_state != OTG_STATE_A_HOST)
  385. mv_otg_start_host(mvotg, 1);
  386. mv_otg_set_timer(mvotg, A_WAIT_BCON_TIMER,
  387. T_A_WAIT_BCON,
  388. mv_otg_timer_await_bcon);
  389. /*
  390. * Now, we directly enter A_HOST. So set b_conn = 1
  391. * here. In fact, it need host driver to notify us.
  392. */
  393. mvotg->otg_ctrl.b_conn = 1;
  394. break;
  395. case OTG_STATE_A_HOST:
  396. break;
  397. case OTG_STATE_A_WAIT_VFALL:
  398. /*
  399. * Now, we has exited A_HOST. So set b_conn = 0
  400. * here. In fact, it need host driver to notify us.
  401. */
  402. mvotg->otg_ctrl.b_conn = 0;
  403. mv_otg_set_vbus(otg, 0);
  404. break;
  405. case OTG_STATE_A_VBUS_ERR:
  406. break;
  407. default:
  408. break;
  409. }
  410. goto run;
  411. }
  412. }
  413. static irqreturn_t mv_otg_irq(int irq, void *dev)
  414. {
  415. struct mv_otg *mvotg = dev;
  416. u32 otgsc;
  417. otgsc = readl(&mvotg->op_regs->otgsc);
  418. writel(otgsc, &mvotg->op_regs->otgsc);
  419. /*
  420. * if we have vbus, then the vbus detection for B-device
  421. * will be done by mv_otg_inputs_irq().
  422. */
  423. if (mvotg->pdata->vbus)
  424. if ((otgsc & OTGSC_STS_USB_ID) &&
  425. !(otgsc & OTGSC_INTSTS_USB_ID))
  426. return IRQ_NONE;
  427. if ((otgsc & mvotg->irq_status) == 0)
  428. return IRQ_NONE;
  429. mv_otg_run_state_machine(mvotg, 0);
  430. return IRQ_HANDLED;
  431. }
  432. static irqreturn_t mv_otg_inputs_irq(int irq, void *dev)
  433. {
  434. struct mv_otg *mvotg = dev;
  435. /* The clock may disabled at this time */
  436. if (!mvotg->active) {
  437. mv_otg_enable(mvotg);
  438. mv_otg_init_irq(mvotg);
  439. }
  440. mv_otg_run_state_machine(mvotg, 0);
  441. return IRQ_HANDLED;
  442. }
  443. static ssize_t
  444. get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
  445. {
  446. struct mv_otg *mvotg = dev_get_drvdata(dev);
  447. return scnprintf(buf, PAGE_SIZE, "%d\n",
  448. mvotg->otg_ctrl.a_bus_req);
  449. }
  450. static ssize_t
  451. set_a_bus_req(struct device *dev, struct device_attribute *attr,
  452. const char *buf, size_t count)
  453. {
  454. struct mv_otg *mvotg = dev_get_drvdata(dev);
  455. if (count > 2)
  456. return -1;
  457. /* We will use this interface to change to A device */
  458. if (mvotg->phy.otg->state != OTG_STATE_B_IDLE
  459. && mvotg->phy.otg->state != OTG_STATE_A_IDLE)
  460. return -1;
  461. /* The clock may disabled and we need to set irq for ID detected */
  462. mv_otg_enable(mvotg);
  463. mv_otg_init_irq(mvotg);
  464. if (buf[0] == '1') {
  465. mvotg->otg_ctrl.a_bus_req = 1;
  466. mvotg->otg_ctrl.a_bus_drop = 0;
  467. dev_dbg(&mvotg->pdev->dev,
  468. "User request: a_bus_req = 1\n");
  469. if (spin_trylock(&mvotg->wq_lock)) {
  470. mv_otg_run_state_machine(mvotg, 0);
  471. spin_unlock(&mvotg->wq_lock);
  472. }
  473. }
  474. return count;
  475. }
  476. static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req,
  477. set_a_bus_req);
  478. static ssize_t
  479. set_a_clr_err(struct device *dev, struct device_attribute *attr,
  480. const char *buf, size_t count)
  481. {
  482. struct mv_otg *mvotg = dev_get_drvdata(dev);
  483. if (!mvotg->phy.otg->default_a)
  484. return -1;
  485. if (count > 2)
  486. return -1;
  487. if (buf[0] == '1') {
  488. mvotg->otg_ctrl.a_clr_err = 1;
  489. dev_dbg(&mvotg->pdev->dev,
  490. "User request: a_clr_err = 1\n");
  491. }
  492. if (spin_trylock(&mvotg->wq_lock)) {
  493. mv_otg_run_state_machine(mvotg, 0);
  494. spin_unlock(&mvotg->wq_lock);
  495. }
  496. return count;
  497. }
  498. static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
  499. static ssize_t
  500. get_a_bus_drop(struct device *dev, struct device_attribute *attr,
  501. char *buf)
  502. {
  503. struct mv_otg *mvotg = dev_get_drvdata(dev);
  504. return scnprintf(buf, PAGE_SIZE, "%d\n",
  505. mvotg->otg_ctrl.a_bus_drop);
  506. }
  507. static ssize_t
  508. set_a_bus_drop(struct device *dev, struct device_attribute *attr,
  509. const char *buf, size_t count)
  510. {
  511. struct mv_otg *mvotg = dev_get_drvdata(dev);
  512. if (!mvotg->phy.otg->default_a)
  513. return -1;
  514. if (count > 2)
  515. return -1;
  516. if (buf[0] == '0') {
  517. mvotg->otg_ctrl.a_bus_drop = 0;
  518. dev_dbg(&mvotg->pdev->dev,
  519. "User request: a_bus_drop = 0\n");
  520. } else if (buf[0] == '1') {
  521. mvotg->otg_ctrl.a_bus_drop = 1;
  522. mvotg->otg_ctrl.a_bus_req = 0;
  523. dev_dbg(&mvotg->pdev->dev,
  524. "User request: a_bus_drop = 1\n");
  525. dev_dbg(&mvotg->pdev->dev,
  526. "User request: and a_bus_req = 0\n");
  527. }
  528. if (spin_trylock(&mvotg->wq_lock)) {
  529. mv_otg_run_state_machine(mvotg, 0);
  530. spin_unlock(&mvotg->wq_lock);
  531. }
  532. return count;
  533. }
  534. static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR,
  535. get_a_bus_drop, set_a_bus_drop);
  536. static struct attribute *inputs_attrs[] = {
  537. &dev_attr_a_bus_req.attr,
  538. &dev_attr_a_clr_err.attr,
  539. &dev_attr_a_bus_drop.attr,
  540. NULL,
  541. };
  542. static struct attribute_group inputs_attr_group = {
  543. .name = "inputs",
  544. .attrs = inputs_attrs,
  545. };
  546. static int mv_otg_remove(struct platform_device *pdev)
  547. {
  548. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  549. sysfs_remove_group(&mvotg->pdev->dev.kobj, &inputs_attr_group);
  550. if (mvotg->qwork) {
  551. flush_workqueue(mvotg->qwork);
  552. destroy_workqueue(mvotg->qwork);
  553. }
  554. mv_otg_disable(mvotg);
  555. usb_remove_phy(&mvotg->phy);
  556. return 0;
  557. }
  558. static int mv_otg_probe(struct platform_device *pdev)
  559. {
  560. struct mv_usb_platform_data *pdata = dev_get_platdata(&pdev->dev);
  561. struct mv_otg *mvotg;
  562. struct usb_otg *otg;
  563. struct resource *r;
  564. int retval = 0, i;
  565. if (pdata == NULL) {
  566. dev_err(&pdev->dev, "failed to get platform data\n");
  567. return -ENODEV;
  568. }
  569. mvotg = devm_kzalloc(&pdev->dev, sizeof(*mvotg), GFP_KERNEL);
  570. if (!mvotg)
  571. return -ENOMEM;
  572. otg = devm_kzalloc(&pdev->dev, sizeof(*otg), GFP_KERNEL);
  573. if (!otg)
  574. return -ENOMEM;
  575. platform_set_drvdata(pdev, mvotg);
  576. mvotg->pdev = pdev;
  577. mvotg->pdata = pdata;
  578. mvotg->clk = devm_clk_get(&pdev->dev, NULL);
  579. if (IS_ERR(mvotg->clk))
  580. return PTR_ERR(mvotg->clk);
  581. mvotg->qwork = create_singlethread_workqueue("mv_otg_queue");
  582. if (!mvotg->qwork) {
  583. dev_dbg(&pdev->dev, "cannot create workqueue for OTG\n");
  584. return -ENOMEM;
  585. }
  586. INIT_DELAYED_WORK(&mvotg->work, mv_otg_work);
  587. /* OTG common part */
  588. mvotg->pdev = pdev;
  589. mvotg->phy.dev = &pdev->dev;
  590. mvotg->phy.otg = otg;
  591. mvotg->phy.label = driver_name;
  592. otg->state = OTG_STATE_UNDEFINED;
  593. otg->usb_phy = &mvotg->phy;
  594. otg->set_host = mv_otg_set_host;
  595. otg->set_peripheral = mv_otg_set_peripheral;
  596. otg->set_vbus = mv_otg_set_vbus;
  597. for (i = 0; i < OTG_TIMER_NUM; i++)
  598. init_timer(&mvotg->otg_ctrl.timer[i]);
  599. r = platform_get_resource_byname(mvotg->pdev,
  600. IORESOURCE_MEM, "phyregs");
  601. if (r == NULL) {
  602. dev_err(&pdev->dev, "no phy I/O memory resource defined\n");
  603. retval = -ENODEV;
  604. goto err_destroy_workqueue;
  605. }
  606. mvotg->phy_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  607. if (mvotg->phy_regs == NULL) {
  608. dev_err(&pdev->dev, "failed to map phy I/O memory\n");
  609. retval = -EFAULT;
  610. goto err_destroy_workqueue;
  611. }
  612. r = platform_get_resource_byname(mvotg->pdev,
  613. IORESOURCE_MEM, "capregs");
  614. if (r == NULL) {
  615. dev_err(&pdev->dev, "no I/O memory resource defined\n");
  616. retval = -ENODEV;
  617. goto err_destroy_workqueue;
  618. }
  619. mvotg->cap_regs = devm_ioremap(&pdev->dev, r->start, resource_size(r));
  620. if (mvotg->cap_regs == NULL) {
  621. dev_err(&pdev->dev, "failed to map I/O memory\n");
  622. retval = -EFAULT;
  623. goto err_destroy_workqueue;
  624. }
  625. /* we will acces controller register, so enable the udc controller */
  626. retval = mv_otg_enable_internal(mvotg);
  627. if (retval) {
  628. dev_err(&pdev->dev, "mv otg enable error %d\n", retval);
  629. goto err_destroy_workqueue;
  630. }
  631. mvotg->op_regs =
  632. (struct mv_otg_regs __iomem *) ((unsigned long) mvotg->cap_regs
  633. + (readl(mvotg->cap_regs) & CAPLENGTH_MASK));
  634. if (pdata->id) {
  635. retval = devm_request_threaded_irq(&pdev->dev, pdata->id->irq,
  636. NULL, mv_otg_inputs_irq,
  637. IRQF_ONESHOT, "id", mvotg);
  638. if (retval) {
  639. dev_info(&pdev->dev,
  640. "Failed to request irq for ID\n");
  641. pdata->id = NULL;
  642. }
  643. }
  644. if (pdata->vbus) {
  645. mvotg->clock_gating = 1;
  646. retval = devm_request_threaded_irq(&pdev->dev, pdata->vbus->irq,
  647. NULL, mv_otg_inputs_irq,
  648. IRQF_ONESHOT, "vbus", mvotg);
  649. if (retval) {
  650. dev_info(&pdev->dev,
  651. "Failed to request irq for VBUS, "
  652. "disable clock gating\n");
  653. mvotg->clock_gating = 0;
  654. pdata->vbus = NULL;
  655. }
  656. }
  657. if (pdata->disable_otg_clock_gating)
  658. mvotg->clock_gating = 0;
  659. mv_otg_reset(mvotg);
  660. mv_otg_init_irq(mvotg);
  661. r = platform_get_resource(mvotg->pdev, IORESOURCE_IRQ, 0);
  662. if (r == NULL) {
  663. dev_err(&pdev->dev, "no IRQ resource defined\n");
  664. retval = -ENODEV;
  665. goto err_disable_clk;
  666. }
  667. mvotg->irq = r->start;
  668. if (devm_request_irq(&pdev->dev, mvotg->irq, mv_otg_irq, IRQF_SHARED,
  669. driver_name, mvotg)) {
  670. dev_err(&pdev->dev, "Request irq %d for OTG failed\n",
  671. mvotg->irq);
  672. mvotg->irq = 0;
  673. retval = -ENODEV;
  674. goto err_disable_clk;
  675. }
  676. retval = usb_add_phy(&mvotg->phy, USB_PHY_TYPE_USB2);
  677. if (retval < 0) {
  678. dev_err(&pdev->dev, "can't register transceiver, %d\n",
  679. retval);
  680. goto err_disable_clk;
  681. }
  682. retval = sysfs_create_group(&pdev->dev.kobj, &inputs_attr_group);
  683. if (retval < 0) {
  684. dev_dbg(&pdev->dev,
  685. "Can't register sysfs attr group: %d\n", retval);
  686. goto err_remove_phy;
  687. }
  688. spin_lock_init(&mvotg->wq_lock);
  689. if (spin_trylock(&mvotg->wq_lock)) {
  690. mv_otg_run_state_machine(mvotg, 2 * HZ);
  691. spin_unlock(&mvotg->wq_lock);
  692. }
  693. dev_info(&pdev->dev,
  694. "successful probe OTG device %s clock gating.\n",
  695. mvotg->clock_gating ? "with" : "without");
  696. return 0;
  697. err_remove_phy:
  698. usb_remove_phy(&mvotg->phy);
  699. err_disable_clk:
  700. mv_otg_disable_internal(mvotg);
  701. err_destroy_workqueue:
  702. flush_workqueue(mvotg->qwork);
  703. destroy_workqueue(mvotg->qwork);
  704. return retval;
  705. }
  706. #ifdef CONFIG_PM
  707. static int mv_otg_suspend(struct platform_device *pdev, pm_message_t state)
  708. {
  709. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  710. if (mvotg->phy.otg->state != OTG_STATE_B_IDLE) {
  711. dev_info(&pdev->dev,
  712. "OTG state is not B_IDLE, it is %d!\n",
  713. mvotg->phy.otg->state);
  714. return -EAGAIN;
  715. }
  716. if (!mvotg->clock_gating)
  717. mv_otg_disable_internal(mvotg);
  718. return 0;
  719. }
  720. static int mv_otg_resume(struct platform_device *pdev)
  721. {
  722. struct mv_otg *mvotg = platform_get_drvdata(pdev);
  723. u32 otgsc;
  724. if (!mvotg->clock_gating) {
  725. mv_otg_enable_internal(mvotg);
  726. otgsc = readl(&mvotg->op_regs->otgsc);
  727. otgsc |= mvotg->irq_en;
  728. writel(otgsc, &mvotg->op_regs->otgsc);
  729. if (spin_trylock(&mvotg->wq_lock)) {
  730. mv_otg_run_state_machine(mvotg, 0);
  731. spin_unlock(&mvotg->wq_lock);
  732. }
  733. }
  734. return 0;
  735. }
  736. #endif
  737. static struct platform_driver mv_otg_driver = {
  738. .probe = mv_otg_probe,
  739. .remove = mv_otg_remove,
  740. .driver = {
  741. .name = driver_name,
  742. },
  743. #ifdef CONFIG_PM
  744. .suspend = mv_otg_suspend,
  745. .resume = mv_otg_resume,
  746. #endif
  747. };
  748. module_platform_driver(mv_otg_driver);