vfio_pci_intrs.c 16 KB

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  1. /*
  2. * VFIO PCI interrupt handling
  3. *
  4. * Copyright (C) 2012 Red Hat, Inc. All rights reserved.
  5. * Author: Alex Williamson <alex.williamson@redhat.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Derived from original vfio:
  12. * Copyright 2010 Cisco Systems, Inc. All rights reserved.
  13. * Author: Tom Lyon, pugs@cisco.com
  14. */
  15. #include <linux/device.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/eventfd.h>
  18. #include <linux/msi.h>
  19. #include <linux/pci.h>
  20. #include <linux/file.h>
  21. #include <linux/vfio.h>
  22. #include <linux/wait.h>
  23. #include <linux/slab.h>
  24. #include "vfio_pci_private.h"
  25. /*
  26. * INTx
  27. */
  28. static void vfio_send_intx_eventfd(void *opaque, void *unused)
  29. {
  30. struct vfio_pci_device *vdev = opaque;
  31. if (likely(is_intx(vdev) && !vdev->virq_disabled))
  32. eventfd_signal(vdev->ctx[0].trigger, 1);
  33. }
  34. void vfio_pci_intx_mask(struct vfio_pci_device *vdev)
  35. {
  36. struct pci_dev *pdev = vdev->pdev;
  37. unsigned long flags;
  38. spin_lock_irqsave(&vdev->irqlock, flags);
  39. /*
  40. * Masking can come from interrupt, ioctl, or config space
  41. * via INTx disable. The latter means this can get called
  42. * even when not using intx delivery. In this case, just
  43. * try to have the physical bit follow the virtual bit.
  44. */
  45. if (unlikely(!is_intx(vdev))) {
  46. if (vdev->pci_2_3)
  47. pci_intx(pdev, 0);
  48. } else if (!vdev->ctx[0].masked) {
  49. /*
  50. * Can't use check_and_mask here because we always want to
  51. * mask, not just when something is pending.
  52. */
  53. if (vdev->pci_2_3)
  54. pci_intx(pdev, 0);
  55. else
  56. disable_irq_nosync(pdev->irq);
  57. vdev->ctx[0].masked = true;
  58. }
  59. spin_unlock_irqrestore(&vdev->irqlock, flags);
  60. }
  61. /*
  62. * If this is triggered by an eventfd, we can't call eventfd_signal
  63. * or else we'll deadlock on the eventfd wait queue. Return >0 when
  64. * a signal is necessary, which can then be handled via a work queue
  65. * or directly depending on the caller.
  66. */
  67. static int vfio_pci_intx_unmask_handler(void *opaque, void *unused)
  68. {
  69. struct vfio_pci_device *vdev = opaque;
  70. struct pci_dev *pdev = vdev->pdev;
  71. unsigned long flags;
  72. int ret = 0;
  73. spin_lock_irqsave(&vdev->irqlock, flags);
  74. /*
  75. * Unmasking comes from ioctl or config, so again, have the
  76. * physical bit follow the virtual even when not using INTx.
  77. */
  78. if (unlikely(!is_intx(vdev))) {
  79. if (vdev->pci_2_3)
  80. pci_intx(pdev, 1);
  81. } else if (vdev->ctx[0].masked && !vdev->virq_disabled) {
  82. /*
  83. * A pending interrupt here would immediately trigger,
  84. * but we can avoid that overhead by just re-sending
  85. * the interrupt to the user.
  86. */
  87. if (vdev->pci_2_3) {
  88. if (!pci_check_and_unmask_intx(pdev))
  89. ret = 1;
  90. } else
  91. enable_irq(pdev->irq);
  92. vdev->ctx[0].masked = (ret > 0);
  93. }
  94. spin_unlock_irqrestore(&vdev->irqlock, flags);
  95. return ret;
  96. }
  97. void vfio_pci_intx_unmask(struct vfio_pci_device *vdev)
  98. {
  99. if (vfio_pci_intx_unmask_handler(vdev, NULL) > 0)
  100. vfio_send_intx_eventfd(vdev, NULL);
  101. }
  102. static irqreturn_t vfio_intx_handler(int irq, void *dev_id)
  103. {
  104. struct vfio_pci_device *vdev = dev_id;
  105. unsigned long flags;
  106. int ret = IRQ_NONE;
  107. spin_lock_irqsave(&vdev->irqlock, flags);
  108. if (!vdev->pci_2_3) {
  109. disable_irq_nosync(vdev->pdev->irq);
  110. vdev->ctx[0].masked = true;
  111. ret = IRQ_HANDLED;
  112. } else if (!vdev->ctx[0].masked && /* may be shared */
  113. pci_check_and_mask_intx(vdev->pdev)) {
  114. vdev->ctx[0].masked = true;
  115. ret = IRQ_HANDLED;
  116. }
  117. spin_unlock_irqrestore(&vdev->irqlock, flags);
  118. if (ret == IRQ_HANDLED)
  119. vfio_send_intx_eventfd(vdev, NULL);
  120. return ret;
  121. }
  122. static int vfio_intx_enable(struct vfio_pci_device *vdev)
  123. {
  124. if (!is_irq_none(vdev))
  125. return -EINVAL;
  126. if (!vdev->pdev->irq)
  127. return -ENODEV;
  128. vdev->ctx = kzalloc(sizeof(struct vfio_pci_irq_ctx), GFP_KERNEL);
  129. if (!vdev->ctx)
  130. return -ENOMEM;
  131. vdev->num_ctx = 1;
  132. /*
  133. * If the virtual interrupt is masked, restore it. Devices
  134. * supporting DisINTx can be masked at the hardware level
  135. * here, non-PCI-2.3 devices will have to wait until the
  136. * interrupt is enabled.
  137. */
  138. vdev->ctx[0].masked = vdev->virq_disabled;
  139. if (vdev->pci_2_3)
  140. pci_intx(vdev->pdev, !vdev->ctx[0].masked);
  141. vdev->irq_type = VFIO_PCI_INTX_IRQ_INDEX;
  142. return 0;
  143. }
  144. static int vfio_intx_set_signal(struct vfio_pci_device *vdev, int fd)
  145. {
  146. struct pci_dev *pdev = vdev->pdev;
  147. unsigned long irqflags = IRQF_SHARED;
  148. struct eventfd_ctx *trigger;
  149. unsigned long flags;
  150. int ret;
  151. if (vdev->ctx[0].trigger) {
  152. free_irq(pdev->irq, vdev);
  153. kfree(vdev->ctx[0].name);
  154. eventfd_ctx_put(vdev->ctx[0].trigger);
  155. vdev->ctx[0].trigger = NULL;
  156. }
  157. if (fd < 0) /* Disable only */
  158. return 0;
  159. vdev->ctx[0].name = kasprintf(GFP_KERNEL, "vfio-intx(%s)",
  160. pci_name(pdev));
  161. if (!vdev->ctx[0].name)
  162. return -ENOMEM;
  163. trigger = eventfd_ctx_fdget(fd);
  164. if (IS_ERR(trigger)) {
  165. kfree(vdev->ctx[0].name);
  166. return PTR_ERR(trigger);
  167. }
  168. vdev->ctx[0].trigger = trigger;
  169. if (!vdev->pci_2_3)
  170. irqflags = 0;
  171. ret = request_irq(pdev->irq, vfio_intx_handler,
  172. irqflags, vdev->ctx[0].name, vdev);
  173. if (ret) {
  174. vdev->ctx[0].trigger = NULL;
  175. kfree(vdev->ctx[0].name);
  176. eventfd_ctx_put(trigger);
  177. return ret;
  178. }
  179. /*
  180. * INTx disable will stick across the new irq setup,
  181. * disable_irq won't.
  182. */
  183. spin_lock_irqsave(&vdev->irqlock, flags);
  184. if (!vdev->pci_2_3 && vdev->ctx[0].masked)
  185. disable_irq_nosync(pdev->irq);
  186. spin_unlock_irqrestore(&vdev->irqlock, flags);
  187. return 0;
  188. }
  189. static void vfio_intx_disable(struct vfio_pci_device *vdev)
  190. {
  191. vfio_intx_set_signal(vdev, -1);
  192. vfio_virqfd_disable(&vdev->ctx[0].unmask);
  193. vfio_virqfd_disable(&vdev->ctx[0].mask);
  194. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  195. vdev->num_ctx = 0;
  196. kfree(vdev->ctx);
  197. }
  198. /*
  199. * MSI/MSI-X
  200. */
  201. static irqreturn_t vfio_msihandler(int irq, void *arg)
  202. {
  203. struct eventfd_ctx *trigger = arg;
  204. eventfd_signal(trigger, 1);
  205. return IRQ_HANDLED;
  206. }
  207. static int vfio_msi_enable(struct vfio_pci_device *vdev, int nvec, bool msix)
  208. {
  209. struct pci_dev *pdev = vdev->pdev;
  210. int ret;
  211. if (!is_irq_none(vdev))
  212. return -EINVAL;
  213. vdev->ctx = kcalloc(nvec, sizeof(struct vfio_pci_irq_ctx), GFP_KERNEL);
  214. if (!vdev->ctx)
  215. return -ENOMEM;
  216. if (msix) {
  217. int i;
  218. vdev->msix = kzalloc(nvec * sizeof(struct msix_entry),
  219. GFP_KERNEL);
  220. if (!vdev->msix) {
  221. kfree(vdev->ctx);
  222. return -ENOMEM;
  223. }
  224. for (i = 0; i < nvec; i++)
  225. vdev->msix[i].entry = i;
  226. ret = pci_enable_msix_range(pdev, vdev->msix, 1, nvec);
  227. if (ret < nvec) {
  228. if (ret > 0)
  229. pci_disable_msix(pdev);
  230. kfree(vdev->msix);
  231. kfree(vdev->ctx);
  232. return ret;
  233. }
  234. } else {
  235. ret = pci_enable_msi_range(pdev, 1, nvec);
  236. if (ret < nvec) {
  237. if (ret > 0)
  238. pci_disable_msi(pdev);
  239. kfree(vdev->ctx);
  240. return ret;
  241. }
  242. }
  243. vdev->num_ctx = nvec;
  244. vdev->irq_type = msix ? VFIO_PCI_MSIX_IRQ_INDEX :
  245. VFIO_PCI_MSI_IRQ_INDEX;
  246. if (!msix) {
  247. /*
  248. * Compute the virtual hardware field for max msi vectors -
  249. * it is the log base 2 of the number of vectors.
  250. */
  251. vdev->msi_qmax = fls(nvec * 2 - 1) - 1;
  252. }
  253. return 0;
  254. }
  255. static int vfio_msi_set_vector_signal(struct vfio_pci_device *vdev,
  256. int vector, int fd, bool msix)
  257. {
  258. struct pci_dev *pdev = vdev->pdev;
  259. int irq = msix ? vdev->msix[vector].vector : pdev->irq + vector;
  260. char *name = msix ? "vfio-msix" : "vfio-msi";
  261. struct eventfd_ctx *trigger;
  262. int ret;
  263. if (vector >= vdev->num_ctx)
  264. return -EINVAL;
  265. if (vdev->ctx[vector].trigger) {
  266. free_irq(irq, vdev->ctx[vector].trigger);
  267. irq_bypass_unregister_producer(&vdev->ctx[vector].producer);
  268. kfree(vdev->ctx[vector].name);
  269. eventfd_ctx_put(vdev->ctx[vector].trigger);
  270. vdev->ctx[vector].trigger = NULL;
  271. }
  272. if (fd < 0)
  273. return 0;
  274. vdev->ctx[vector].name = kasprintf(GFP_KERNEL, "%s[%d](%s)",
  275. name, vector, pci_name(pdev));
  276. if (!vdev->ctx[vector].name)
  277. return -ENOMEM;
  278. trigger = eventfd_ctx_fdget(fd);
  279. if (IS_ERR(trigger)) {
  280. kfree(vdev->ctx[vector].name);
  281. return PTR_ERR(trigger);
  282. }
  283. /*
  284. * The MSIx vector table resides in device memory which may be cleared
  285. * via backdoor resets. We don't allow direct access to the vector
  286. * table so even if a userspace driver attempts to save/restore around
  287. * such a reset it would be unsuccessful. To avoid this, restore the
  288. * cached value of the message prior to enabling.
  289. */
  290. if (msix) {
  291. struct msi_msg msg;
  292. get_cached_msi_msg(irq, &msg);
  293. pci_write_msi_msg(irq, &msg);
  294. }
  295. ret = request_irq(irq, vfio_msihandler, 0,
  296. vdev->ctx[vector].name, trigger);
  297. if (ret) {
  298. kfree(vdev->ctx[vector].name);
  299. eventfd_ctx_put(trigger);
  300. return ret;
  301. }
  302. vdev->ctx[vector].producer.token = trigger;
  303. vdev->ctx[vector].producer.irq = irq;
  304. ret = irq_bypass_register_producer(&vdev->ctx[vector].producer);
  305. if (unlikely(ret))
  306. dev_info(&pdev->dev,
  307. "irq bypass producer (token %p) registration fails: %d\n",
  308. vdev->ctx[vector].producer.token, ret);
  309. vdev->ctx[vector].trigger = trigger;
  310. return 0;
  311. }
  312. static int vfio_msi_set_block(struct vfio_pci_device *vdev, unsigned start,
  313. unsigned count, int32_t *fds, bool msix)
  314. {
  315. int i, j, ret = 0;
  316. if (start + count > vdev->num_ctx)
  317. return -EINVAL;
  318. for (i = 0, j = start; i < count && !ret; i++, j++) {
  319. int fd = fds ? fds[i] : -1;
  320. ret = vfio_msi_set_vector_signal(vdev, j, fd, msix);
  321. }
  322. if (ret) {
  323. for (--j; j >= start; j--)
  324. vfio_msi_set_vector_signal(vdev, j, -1, msix);
  325. }
  326. return ret;
  327. }
  328. static void vfio_msi_disable(struct vfio_pci_device *vdev, bool msix)
  329. {
  330. struct pci_dev *pdev = vdev->pdev;
  331. int i;
  332. vfio_msi_set_block(vdev, 0, vdev->num_ctx, NULL, msix);
  333. for (i = 0; i < vdev->num_ctx; i++) {
  334. vfio_virqfd_disable(&vdev->ctx[i].unmask);
  335. vfio_virqfd_disable(&vdev->ctx[i].mask);
  336. }
  337. if (msix) {
  338. pci_disable_msix(vdev->pdev);
  339. kfree(vdev->msix);
  340. } else
  341. pci_disable_msi(pdev);
  342. vdev->irq_type = VFIO_PCI_NUM_IRQS;
  343. vdev->num_ctx = 0;
  344. kfree(vdev->ctx);
  345. }
  346. /*
  347. * IOCTL support
  348. */
  349. static int vfio_pci_set_intx_unmask(struct vfio_pci_device *vdev,
  350. unsigned index, unsigned start,
  351. unsigned count, uint32_t flags, void *data)
  352. {
  353. if (!is_intx(vdev) || start != 0 || count != 1)
  354. return -EINVAL;
  355. if (flags & VFIO_IRQ_SET_DATA_NONE) {
  356. vfio_pci_intx_unmask(vdev);
  357. } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
  358. uint8_t unmask = *(uint8_t *)data;
  359. if (unmask)
  360. vfio_pci_intx_unmask(vdev);
  361. } else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
  362. int32_t fd = *(int32_t *)data;
  363. if (fd >= 0)
  364. return vfio_virqfd_enable((void *) vdev,
  365. vfio_pci_intx_unmask_handler,
  366. vfio_send_intx_eventfd, NULL,
  367. &vdev->ctx[0].unmask, fd);
  368. vfio_virqfd_disable(&vdev->ctx[0].unmask);
  369. }
  370. return 0;
  371. }
  372. static int vfio_pci_set_intx_mask(struct vfio_pci_device *vdev,
  373. unsigned index, unsigned start,
  374. unsigned count, uint32_t flags, void *data)
  375. {
  376. if (!is_intx(vdev) || start != 0 || count != 1)
  377. return -EINVAL;
  378. if (flags & VFIO_IRQ_SET_DATA_NONE) {
  379. vfio_pci_intx_mask(vdev);
  380. } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
  381. uint8_t mask = *(uint8_t *)data;
  382. if (mask)
  383. vfio_pci_intx_mask(vdev);
  384. } else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
  385. return -ENOTTY; /* XXX implement me */
  386. }
  387. return 0;
  388. }
  389. static int vfio_pci_set_intx_trigger(struct vfio_pci_device *vdev,
  390. unsigned index, unsigned start,
  391. unsigned count, uint32_t flags, void *data)
  392. {
  393. if (is_intx(vdev) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
  394. vfio_intx_disable(vdev);
  395. return 0;
  396. }
  397. if (!(is_intx(vdev) || is_irq_none(vdev)) || start != 0 || count != 1)
  398. return -EINVAL;
  399. if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
  400. int32_t fd = *(int32_t *)data;
  401. int ret;
  402. if (is_intx(vdev))
  403. return vfio_intx_set_signal(vdev, fd);
  404. ret = vfio_intx_enable(vdev);
  405. if (ret)
  406. return ret;
  407. ret = vfio_intx_set_signal(vdev, fd);
  408. if (ret)
  409. vfio_intx_disable(vdev);
  410. return ret;
  411. }
  412. if (!is_intx(vdev))
  413. return -EINVAL;
  414. if (flags & VFIO_IRQ_SET_DATA_NONE) {
  415. vfio_send_intx_eventfd(vdev, NULL);
  416. } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
  417. uint8_t trigger = *(uint8_t *)data;
  418. if (trigger)
  419. vfio_send_intx_eventfd(vdev, NULL);
  420. }
  421. return 0;
  422. }
  423. static int vfio_pci_set_msi_trigger(struct vfio_pci_device *vdev,
  424. unsigned index, unsigned start,
  425. unsigned count, uint32_t flags, void *data)
  426. {
  427. int i;
  428. bool msix = (index == VFIO_PCI_MSIX_IRQ_INDEX) ? true : false;
  429. if (irq_is(vdev, index) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
  430. vfio_msi_disable(vdev, msix);
  431. return 0;
  432. }
  433. if (!(irq_is(vdev, index) || is_irq_none(vdev)))
  434. return -EINVAL;
  435. if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
  436. int32_t *fds = data;
  437. int ret;
  438. if (vdev->irq_type == index)
  439. return vfio_msi_set_block(vdev, start, count,
  440. fds, msix);
  441. ret = vfio_msi_enable(vdev, start + count, msix);
  442. if (ret)
  443. return ret;
  444. ret = vfio_msi_set_block(vdev, start, count, fds, msix);
  445. if (ret)
  446. vfio_msi_disable(vdev, msix);
  447. return ret;
  448. }
  449. if (!irq_is(vdev, index) || start + count > vdev->num_ctx)
  450. return -EINVAL;
  451. for (i = start; i < start + count; i++) {
  452. if (!vdev->ctx[i].trigger)
  453. continue;
  454. if (flags & VFIO_IRQ_SET_DATA_NONE) {
  455. eventfd_signal(vdev->ctx[i].trigger, 1);
  456. } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
  457. uint8_t *bools = data;
  458. if (bools[i - start])
  459. eventfd_signal(vdev->ctx[i].trigger, 1);
  460. }
  461. }
  462. return 0;
  463. }
  464. static int vfio_pci_set_ctx_trigger_single(struct eventfd_ctx **ctx,
  465. unsigned int count, uint32_t flags,
  466. void *data)
  467. {
  468. /* DATA_NONE/DATA_BOOL enables loopback testing */
  469. if (flags & VFIO_IRQ_SET_DATA_NONE) {
  470. if (*ctx) {
  471. if (count) {
  472. eventfd_signal(*ctx, 1);
  473. } else {
  474. eventfd_ctx_put(*ctx);
  475. *ctx = NULL;
  476. }
  477. return 0;
  478. }
  479. } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
  480. uint8_t trigger;
  481. if (!count)
  482. return -EINVAL;
  483. trigger = *(uint8_t *)data;
  484. if (trigger && *ctx)
  485. eventfd_signal(*ctx, 1);
  486. return 0;
  487. } else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
  488. int32_t fd;
  489. if (!count)
  490. return -EINVAL;
  491. fd = *(int32_t *)data;
  492. if (fd == -1) {
  493. if (*ctx)
  494. eventfd_ctx_put(*ctx);
  495. *ctx = NULL;
  496. } else if (fd >= 0) {
  497. struct eventfd_ctx *efdctx;
  498. efdctx = eventfd_ctx_fdget(fd);
  499. if (IS_ERR(efdctx))
  500. return PTR_ERR(efdctx);
  501. if (*ctx)
  502. eventfd_ctx_put(*ctx);
  503. *ctx = efdctx;
  504. }
  505. return 0;
  506. }
  507. return -EINVAL;
  508. }
  509. static int vfio_pci_set_err_trigger(struct vfio_pci_device *vdev,
  510. unsigned index, unsigned start,
  511. unsigned count, uint32_t flags, void *data)
  512. {
  513. if (index != VFIO_PCI_ERR_IRQ_INDEX || start != 0 || count > 1)
  514. return -EINVAL;
  515. return vfio_pci_set_ctx_trigger_single(&vdev->err_trigger,
  516. count, flags, data);
  517. }
  518. static int vfio_pci_set_req_trigger(struct vfio_pci_device *vdev,
  519. unsigned index, unsigned start,
  520. unsigned count, uint32_t flags, void *data)
  521. {
  522. if (index != VFIO_PCI_REQ_IRQ_INDEX || start != 0 || count > 1)
  523. return -EINVAL;
  524. return vfio_pci_set_ctx_trigger_single(&vdev->req_trigger,
  525. count, flags, data);
  526. }
  527. int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev, uint32_t flags,
  528. unsigned index, unsigned start, unsigned count,
  529. void *data)
  530. {
  531. int (*func)(struct vfio_pci_device *vdev, unsigned index,
  532. unsigned start, unsigned count, uint32_t flags,
  533. void *data) = NULL;
  534. switch (index) {
  535. case VFIO_PCI_INTX_IRQ_INDEX:
  536. switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
  537. case VFIO_IRQ_SET_ACTION_MASK:
  538. func = vfio_pci_set_intx_mask;
  539. break;
  540. case VFIO_IRQ_SET_ACTION_UNMASK:
  541. func = vfio_pci_set_intx_unmask;
  542. break;
  543. case VFIO_IRQ_SET_ACTION_TRIGGER:
  544. func = vfio_pci_set_intx_trigger;
  545. break;
  546. }
  547. break;
  548. case VFIO_PCI_MSI_IRQ_INDEX:
  549. case VFIO_PCI_MSIX_IRQ_INDEX:
  550. switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
  551. case VFIO_IRQ_SET_ACTION_MASK:
  552. case VFIO_IRQ_SET_ACTION_UNMASK:
  553. /* XXX Need masking support exported */
  554. break;
  555. case VFIO_IRQ_SET_ACTION_TRIGGER:
  556. func = vfio_pci_set_msi_trigger;
  557. break;
  558. }
  559. break;
  560. case VFIO_PCI_ERR_IRQ_INDEX:
  561. switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
  562. case VFIO_IRQ_SET_ACTION_TRIGGER:
  563. if (pci_is_pcie(vdev->pdev))
  564. func = vfio_pci_set_err_trigger;
  565. break;
  566. }
  567. break;
  568. case VFIO_PCI_REQ_IRQ_INDEX:
  569. switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
  570. case VFIO_IRQ_SET_ACTION_TRIGGER:
  571. func = vfio_pci_set_req_trigger;
  572. break;
  573. }
  574. break;
  575. }
  576. if (!func)
  577. return -ENOTTY;
  578. return func(vdev, index, start, count, flags, data);
  579. }