bfin_adv7393fb.c 20 KB

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  1. /*
  2. * Frame buffer driver for ADV7393/2 video encoder
  3. *
  4. * Copyright 2006-2009 Analog Devices Inc.
  5. * Licensed under the GPL-2 or late.
  6. */
  7. /*
  8. * TODO: Remove Globals
  9. * TODO: Code Cleanup
  10. */
  11. #define pr_fmt(fmt) DRIVER_NAME ": " fmt
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/errno.h>
  15. #include <linux/string.h>
  16. #include <linux/mm.h>
  17. #include <linux/tty.h>
  18. #include <linux/slab.h>
  19. #include <linux/delay.h>
  20. #include <linux/fb.h>
  21. #include <linux/ioport.h>
  22. #include <linux/init.h>
  23. #include <linux/types.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/sched.h>
  26. #include <asm/blackfin.h>
  27. #include <asm/irq.h>
  28. #include <asm/dma.h>
  29. #include <linux/uaccess.h>
  30. #include <linux/gpio.h>
  31. #include <asm/portmux.h>
  32. #include <linux/dma-mapping.h>
  33. #include <linux/proc_fs.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/i2c.h>
  36. #include "bfin_adv7393fb.h"
  37. static int mode = VMODE;
  38. static int mem = VMEM;
  39. static int nocursor = 1;
  40. static const unsigned short ppi_pins[] = {
  41. P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
  42. P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
  43. P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
  44. P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
  45. P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
  46. 0
  47. };
  48. /*
  49. * card parameters
  50. */
  51. static struct bfin_adv7393_fb_par {
  52. /* structure holding blackfin / adv7393 parameters when
  53. screen is blanked */
  54. struct {
  55. u8 Mode; /* ntsc/pal/? */
  56. } vga_state;
  57. atomic_t ref_count;
  58. } bfin_par;
  59. /* --------------------------------------------------------------------- */
  60. static struct fb_var_screeninfo bfin_adv7393_fb_defined = {
  61. .xres = 720,
  62. .yres = 480,
  63. .xres_virtual = 720,
  64. .yres_virtual = 480,
  65. .bits_per_pixel = 16,
  66. .activate = FB_ACTIVATE_TEST,
  67. .height = -1,
  68. .width = -1,
  69. .left_margin = 0,
  70. .right_margin = 0,
  71. .upper_margin = 0,
  72. .lower_margin = 0,
  73. .vmode = FB_VMODE_INTERLACED,
  74. .red = {11, 5, 0},
  75. .green = {5, 6, 0},
  76. .blue = {0, 5, 0},
  77. .transp = {0, 0, 0},
  78. };
  79. static struct fb_fix_screeninfo bfin_adv7393_fb_fix = {
  80. .id = "BFIN ADV7393",
  81. .smem_len = 720 * 480 * 2,
  82. .type = FB_TYPE_PACKED_PIXELS,
  83. .visual = FB_VISUAL_TRUECOLOR,
  84. .xpanstep = 0,
  85. .ypanstep = 0,
  86. .line_length = 720 * 2,
  87. .accel = FB_ACCEL_NONE
  88. };
  89. static struct fb_ops bfin_adv7393_fb_ops = {
  90. .owner = THIS_MODULE,
  91. .fb_open = bfin_adv7393_fb_open,
  92. .fb_release = bfin_adv7393_fb_release,
  93. .fb_check_var = bfin_adv7393_fb_check_var,
  94. .fb_pan_display = bfin_adv7393_fb_pan_display,
  95. .fb_blank = bfin_adv7393_fb_blank,
  96. .fb_fillrect = cfb_fillrect,
  97. .fb_copyarea = cfb_copyarea,
  98. .fb_imageblit = cfb_imageblit,
  99. .fb_cursor = bfin_adv7393_fb_cursor,
  100. .fb_setcolreg = bfin_adv7393_fb_setcolreg,
  101. };
  102. static int dma_desc_list(struct adv7393fb_device *fbdev, u16 arg)
  103. {
  104. if (arg == BUILD) { /* Build */
  105. fbdev->vb1 = l1_data_sram_zalloc(sizeof(struct dmasg));
  106. if (fbdev->vb1 == NULL)
  107. goto error;
  108. fbdev->av1 = l1_data_sram_zalloc(sizeof(struct dmasg));
  109. if (fbdev->av1 == NULL)
  110. goto error;
  111. fbdev->vb2 = l1_data_sram_zalloc(sizeof(struct dmasg));
  112. if (fbdev->vb2 == NULL)
  113. goto error;
  114. fbdev->av2 = l1_data_sram_zalloc(sizeof(struct dmasg));
  115. if (fbdev->av2 == NULL)
  116. goto error;
  117. /* Build linked DMA descriptor list */
  118. fbdev->vb1->next_desc_addr = fbdev->av1;
  119. fbdev->av1->next_desc_addr = fbdev->vb2;
  120. fbdev->vb2->next_desc_addr = fbdev->av2;
  121. fbdev->av2->next_desc_addr = fbdev->vb1;
  122. /* Save list head */
  123. fbdev->descriptor_list_head = fbdev->av2;
  124. /* Vertical Blanking Field 1 */
  125. fbdev->vb1->start_addr = VB_DUMMY_MEMORY_SOURCE;
  126. fbdev->vb1->cfg = DMA_CFG_VAL;
  127. fbdev->vb1->x_count =
  128. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  129. fbdev->vb1->x_modify = 0;
  130. fbdev->vb1->y_count = fbdev->modes[mode].vb1_lines;
  131. fbdev->vb1->y_modify = 0;
  132. /* Active Video Field 1 */
  133. fbdev->av1->start_addr = (unsigned long)fbdev->fb_mem;
  134. fbdev->av1->cfg = DMA_CFG_VAL;
  135. fbdev->av1->x_count =
  136. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  137. fbdev->av1->x_modify = fbdev->modes[mode].bpp / 8;
  138. fbdev->av1->y_count = fbdev->modes[mode].a_lines;
  139. fbdev->av1->y_modify =
  140. (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
  141. 1) * (fbdev->modes[mode].bpp / 8);
  142. /* Vertical Blanking Field 2 */
  143. fbdev->vb2->start_addr = VB_DUMMY_MEMORY_SOURCE;
  144. fbdev->vb2->cfg = DMA_CFG_VAL;
  145. fbdev->vb2->x_count =
  146. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  147. fbdev->vb2->x_modify = 0;
  148. fbdev->vb2->y_count = fbdev->modes[mode].vb2_lines;
  149. fbdev->vb2->y_modify = 0;
  150. /* Active Video Field 2 */
  151. fbdev->av2->start_addr =
  152. (unsigned long)fbdev->fb_mem + fbdev->line_len;
  153. fbdev->av2->cfg = DMA_CFG_VAL;
  154. fbdev->av2->x_count =
  155. fbdev->modes[mode].xres + fbdev->modes[mode].boeft_blank;
  156. fbdev->av2->x_modify = (fbdev->modes[mode].bpp / 8);
  157. fbdev->av2->y_count = fbdev->modes[mode].a_lines;
  158. fbdev->av2->y_modify =
  159. (fbdev->modes[mode].xres - fbdev->modes[mode].boeft_blank +
  160. 1) * (fbdev->modes[mode].bpp / 8);
  161. return 1;
  162. }
  163. error:
  164. l1_data_sram_free(fbdev->vb1);
  165. l1_data_sram_free(fbdev->av1);
  166. l1_data_sram_free(fbdev->vb2);
  167. l1_data_sram_free(fbdev->av2);
  168. return 0;
  169. }
  170. static int bfin_config_dma(struct adv7393fb_device *fbdev)
  171. {
  172. BUG_ON(!(fbdev->fb_mem));
  173. set_dma_x_count(CH_PPI, fbdev->descriptor_list_head->x_count);
  174. set_dma_x_modify(CH_PPI, fbdev->descriptor_list_head->x_modify);
  175. set_dma_y_count(CH_PPI, fbdev->descriptor_list_head->y_count);
  176. set_dma_y_modify(CH_PPI, fbdev->descriptor_list_head->y_modify);
  177. set_dma_start_addr(CH_PPI, fbdev->descriptor_list_head->start_addr);
  178. set_dma_next_desc_addr(CH_PPI,
  179. fbdev->descriptor_list_head->next_desc_addr);
  180. set_dma_config(CH_PPI, fbdev->descriptor_list_head->cfg);
  181. return 1;
  182. }
  183. static void bfin_disable_dma(void)
  184. {
  185. bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() & ~DMAEN);
  186. }
  187. static void bfin_config_ppi(struct adv7393fb_device *fbdev)
  188. {
  189. if (ANOMALY_05000183) {
  190. bfin_write_TIMER2_CONFIG(WDTH_CAP);
  191. bfin_write_TIMER_ENABLE(TIMEN2);
  192. }
  193. bfin_write_PPI_CONTROL(0x381E);
  194. bfin_write_PPI_FRAME(fbdev->modes[mode].tot_lines);
  195. bfin_write_PPI_COUNT(fbdev->modes[mode].xres +
  196. fbdev->modes[mode].boeft_blank - 1);
  197. bfin_write_PPI_DELAY(fbdev->modes[mode].aoeft_blank - 1);
  198. }
  199. static void bfin_enable_ppi(void)
  200. {
  201. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
  202. }
  203. static void bfin_disable_ppi(void)
  204. {
  205. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
  206. }
  207. static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value)
  208. {
  209. return i2c_smbus_write_byte_data(client, reg, value);
  210. }
  211. static inline int adv7393_read(struct i2c_client *client, u8 reg)
  212. {
  213. return i2c_smbus_read_byte_data(client, reg);
  214. }
  215. static int
  216. adv7393_write_block(struct i2c_client *client,
  217. const u8 *data, unsigned int len)
  218. {
  219. int ret = -1;
  220. u8 reg;
  221. while (len >= 2) {
  222. reg = *data++;
  223. ret = adv7393_write(client, reg, *data++);
  224. if (ret < 0)
  225. break;
  226. len -= 2;
  227. }
  228. return ret;
  229. }
  230. static int adv7393_mode(struct i2c_client *client, u16 mode)
  231. {
  232. switch (mode) {
  233. case POWER_ON: /* ADV7393 Sleep mode OFF */
  234. adv7393_write(client, 0x00, 0x1E);
  235. break;
  236. case POWER_DOWN: /* ADV7393 Sleep mode ON */
  237. adv7393_write(client, 0x00, 0x1F);
  238. break;
  239. case BLANK_OFF: /* Pixel Data Valid */
  240. adv7393_write(client, 0x82, 0xCB);
  241. break;
  242. case BLANK_ON: /* Pixel Data Invalid */
  243. adv7393_write(client, 0x82, 0x8B);
  244. break;
  245. default:
  246. return -EINVAL;
  247. break;
  248. }
  249. return 0;
  250. }
  251. static irqreturn_t ppi_irq_error(int irq, void *dev_id)
  252. {
  253. struct adv7393fb_device *fbdev = (struct adv7393fb_device *)dev_id;
  254. u16 status = bfin_read_PPI_STATUS();
  255. pr_debug("%s: PPI Status = 0x%X\n", __func__, status);
  256. if (status) {
  257. bfin_disable_dma(); /* TODO: Check Sequence */
  258. bfin_disable_ppi();
  259. bfin_clear_PPI_STATUS();
  260. bfin_config_dma(fbdev);
  261. bfin_enable_ppi();
  262. }
  263. return IRQ_HANDLED;
  264. }
  265. static int proc_output(char *buf)
  266. {
  267. char *p = buf;
  268. p += sprintf(p,
  269. "Usage:\n"
  270. "echo 0x[REG][Value] > adv7393\n"
  271. "example: echo 0x1234 >adv7393\n"
  272. "writes 0x34 into Register 0x12\n");
  273. return p - buf;
  274. }
  275. static ssize_t
  276. adv7393_read_proc(struct file *file, char __user *buf,
  277. size_t size, loff_t *ppos)
  278. {
  279. static const char message[] = "Usage:\n"
  280. "echo 0x[REG][Value] > adv7393\n"
  281. "example: echo 0x1234 >adv7393\n"
  282. "writes 0x34 into Register 0x12\n";
  283. return simple_read_from_buffer(buf, size, ppos, message,
  284. sizeof(message));
  285. }
  286. static ssize_t
  287. adv7393_write_proc(struct file *file, const char __user * buffer,
  288. size_t count, loff_t *ppos)
  289. {
  290. struct adv7393fb_device *fbdev = PDE_DATA(file_inode(file));
  291. unsigned int val;
  292. int ret;
  293. ret = kstrtouint_from_user(buffer, count, 0, &val);
  294. if (ret)
  295. return -EFAULT;
  296. adv7393_write(fbdev->client, val >> 8, val & 0xff);
  297. return count;
  298. }
  299. static const struct file_operations fops = {
  300. .read = adv7393_read_proc,
  301. .write = adv7393_write_proc,
  302. .llseek = default_llseek,
  303. };
  304. static int bfin_adv7393_fb_probe(struct i2c_client *client,
  305. const struct i2c_device_id *id)
  306. {
  307. int ret = 0;
  308. struct proc_dir_entry *entry;
  309. int num_modes = ARRAY_SIZE(known_modes);
  310. struct adv7393fb_device *fbdev = NULL;
  311. if (mem > 2) {
  312. dev_err(&client->dev, "mem out of allowed range [1;2]\n");
  313. return -EINVAL;
  314. }
  315. if (mode > num_modes) {
  316. dev_err(&client->dev, "mode %d: not supported", mode);
  317. return -EFAULT;
  318. }
  319. fbdev = kzalloc(sizeof(*fbdev), GFP_KERNEL);
  320. if (!fbdev) {
  321. dev_err(&client->dev, "failed to allocate device private record");
  322. return -ENOMEM;
  323. }
  324. i2c_set_clientdata(client, fbdev);
  325. fbdev->modes = known_modes;
  326. fbdev->client = client;
  327. fbdev->fb_len =
  328. mem * fbdev->modes[mode].xres * fbdev->modes[mode].xres *
  329. (fbdev->modes[mode].bpp / 8);
  330. fbdev->line_len =
  331. fbdev->modes[mode].xres * (fbdev->modes[mode].bpp / 8);
  332. /* Workaround "PPI Does Not Start Properly In Specific Mode" */
  333. if (ANOMALY_05000400) {
  334. ret = gpio_request_one(P_IDENT(P_PPI0_FS3), GPIOF_OUT_INIT_LOW,
  335. "PPI0_FS3");
  336. if (ret) {
  337. dev_err(&client->dev, "PPI0_FS3 GPIO request failed\n");
  338. ret = -EBUSY;
  339. goto free_fbdev;
  340. }
  341. }
  342. if (peripheral_request_list(ppi_pins, DRIVER_NAME)) {
  343. dev_err(&client->dev, "requesting PPI peripheral failed\n");
  344. ret = -EFAULT;
  345. goto free_gpio;
  346. }
  347. fbdev->fb_mem =
  348. dma_alloc_coherent(NULL, fbdev->fb_len, &fbdev->dma_handle,
  349. GFP_KERNEL);
  350. if (NULL == fbdev->fb_mem) {
  351. dev_err(&client->dev, "couldn't allocate dma buffer (%d bytes)\n",
  352. (u32) fbdev->fb_len);
  353. ret = -ENOMEM;
  354. goto free_ppi_pins;
  355. }
  356. fbdev->info.screen_base = (void *)fbdev->fb_mem;
  357. bfin_adv7393_fb_fix.smem_start = (int)fbdev->fb_mem;
  358. bfin_adv7393_fb_fix.smem_len = fbdev->fb_len;
  359. bfin_adv7393_fb_fix.line_length = fbdev->line_len;
  360. if (mem > 1)
  361. bfin_adv7393_fb_fix.ypanstep = 1;
  362. bfin_adv7393_fb_defined.red.length = 5;
  363. bfin_adv7393_fb_defined.green.length = 6;
  364. bfin_adv7393_fb_defined.blue.length = 5;
  365. bfin_adv7393_fb_defined.xres = fbdev->modes[mode].xres;
  366. bfin_adv7393_fb_defined.yres = fbdev->modes[mode].yres;
  367. bfin_adv7393_fb_defined.xres_virtual = fbdev->modes[mode].xres;
  368. bfin_adv7393_fb_defined.yres_virtual = mem * fbdev->modes[mode].yres;
  369. bfin_adv7393_fb_defined.bits_per_pixel = fbdev->modes[mode].bpp;
  370. fbdev->info.fbops = &bfin_adv7393_fb_ops;
  371. fbdev->info.var = bfin_adv7393_fb_defined;
  372. fbdev->info.fix = bfin_adv7393_fb_fix;
  373. fbdev->info.par = &bfin_par;
  374. fbdev->info.flags = FBINFO_DEFAULT;
  375. fbdev->info.pseudo_palette = kzalloc(sizeof(u32) * 16, GFP_KERNEL);
  376. if (!fbdev->info.pseudo_palette) {
  377. dev_err(&client->dev, "failed to allocate pseudo_palette\n");
  378. ret = -ENOMEM;
  379. goto free_fb_mem;
  380. }
  381. if (fb_alloc_cmap(&fbdev->info.cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
  382. dev_err(&client->dev, "failed to allocate colormap (%d entries)\n",
  383. BFIN_LCD_NBR_PALETTE_ENTRIES);
  384. ret = -EFAULT;
  385. goto free_palette;
  386. }
  387. if (request_dma(CH_PPI, "BF5xx_PPI_DMA") < 0) {
  388. dev_err(&client->dev, "unable to request PPI DMA\n");
  389. ret = -EFAULT;
  390. goto free_cmap;
  391. }
  392. if (request_irq(IRQ_PPI_ERROR, ppi_irq_error, 0,
  393. "PPI ERROR", fbdev) < 0) {
  394. dev_err(&client->dev, "unable to request PPI ERROR IRQ\n");
  395. ret = -EFAULT;
  396. goto free_ch_ppi;
  397. }
  398. fbdev->open = 0;
  399. ret = adv7393_write_block(client, fbdev->modes[mode].adv7393_i2c_initd,
  400. fbdev->modes[mode].adv7393_i2c_initd_len);
  401. if (ret) {
  402. dev_err(&client->dev, "i2c attach: init error\n");
  403. goto free_irq_ppi;
  404. }
  405. if (register_framebuffer(&fbdev->info) < 0) {
  406. dev_err(&client->dev, "unable to register framebuffer\n");
  407. ret = -EFAULT;
  408. goto free_irq_ppi;
  409. }
  410. dev_info(&client->dev, "fb%d: %s frame buffer device\n",
  411. fbdev->info.node, fbdev->info.fix.id);
  412. dev_info(&client->dev, "fb memory address : 0x%p\n", fbdev->fb_mem);
  413. entry = proc_create_data("driver/adv7393", 0, NULL, &fops, fbdev);
  414. if (!entry) {
  415. dev_err(&client->dev, "unable to create /proc entry\n");
  416. ret = -EFAULT;
  417. goto free_fb;
  418. }
  419. return 0;
  420. free_fb:
  421. unregister_framebuffer(&fbdev->info);
  422. free_irq_ppi:
  423. free_irq(IRQ_PPI_ERROR, fbdev);
  424. free_ch_ppi:
  425. free_dma(CH_PPI);
  426. free_cmap:
  427. fb_dealloc_cmap(&fbdev->info.cmap);
  428. free_palette:
  429. kfree(fbdev->info.pseudo_palette);
  430. free_fb_mem:
  431. dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem,
  432. fbdev->dma_handle);
  433. free_ppi_pins:
  434. peripheral_free_list(ppi_pins);
  435. free_gpio:
  436. if (ANOMALY_05000400)
  437. gpio_free(P_IDENT(P_PPI0_FS3));
  438. free_fbdev:
  439. kfree(fbdev);
  440. return ret;
  441. }
  442. static int bfin_adv7393_fb_open(struct fb_info *info, int user)
  443. {
  444. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  445. fbdev->info.screen_base = (void *)fbdev->fb_mem;
  446. if (!fbdev->info.screen_base) {
  447. dev_err(&fbdev->client->dev, "unable to map device\n");
  448. return -ENOMEM;
  449. }
  450. fbdev->open = 1;
  451. dma_desc_list(fbdev, BUILD);
  452. adv7393_mode(fbdev->client, BLANK_OFF);
  453. bfin_config_ppi(fbdev);
  454. bfin_config_dma(fbdev);
  455. bfin_enable_ppi();
  456. return 0;
  457. }
  458. static int bfin_adv7393_fb_release(struct fb_info *info, int user)
  459. {
  460. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  461. adv7393_mode(fbdev->client, BLANK_ON);
  462. bfin_disable_dma();
  463. bfin_disable_ppi();
  464. dma_desc_list(fbdev, DESTRUCT);
  465. fbdev->open = 0;
  466. return 0;
  467. }
  468. static int
  469. bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  470. {
  471. switch (var->bits_per_pixel) {
  472. case 16:/* DIRECTCOLOUR, 64k */
  473. var->red.offset = info->var.red.offset;
  474. var->green.offset = info->var.green.offset;
  475. var->blue.offset = info->var.blue.offset;
  476. var->red.length = info->var.red.length;
  477. var->green.length = info->var.green.length;
  478. var->blue.length = info->var.blue.length;
  479. var->transp.offset = 0;
  480. var->transp.length = 0;
  481. var->transp.msb_right = 0;
  482. var->red.msb_right = 0;
  483. var->green.msb_right = 0;
  484. var->blue.msb_right = 0;
  485. break;
  486. default:
  487. pr_debug("%s: depth not supported: %u BPP\n", __func__,
  488. var->bits_per_pixel);
  489. return -EINVAL;
  490. }
  491. if (info->var.xres != var->xres ||
  492. info->var.yres != var->yres ||
  493. info->var.xres_virtual != var->xres_virtual ||
  494. info->var.yres_virtual != var->yres_virtual) {
  495. pr_debug("%s: Resolution not supported: X%u x Y%u\n",
  496. __func__, var->xres, var->yres);
  497. return -EINVAL;
  498. }
  499. /*
  500. * Memory limit
  501. */
  502. if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
  503. pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
  504. __func__, var->yres_virtual);
  505. return -ENOMEM;
  506. }
  507. return 0;
  508. }
  509. static int
  510. bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
  511. {
  512. int dy;
  513. u32 dmaaddr;
  514. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  515. if (!var || !info)
  516. return -EINVAL;
  517. if (var->xoffset - info->var.xoffset) {
  518. /* No support for X panning for now! */
  519. return -EINVAL;
  520. }
  521. dy = var->yoffset - info->var.yoffset;
  522. if (dy) {
  523. pr_debug("%s: Panning screen of %d lines\n", __func__, dy);
  524. dmaaddr = fbdev->av1->start_addr;
  525. dmaaddr += (info->fix.line_length * dy);
  526. /* TODO: Wait for current frame to finished */
  527. fbdev->av1->start_addr = (unsigned long)dmaaddr;
  528. fbdev->av2->start_addr = (unsigned long)dmaaddr + fbdev->line_len;
  529. }
  530. return 0;
  531. }
  532. /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
  533. static int bfin_adv7393_fb_blank(int blank, struct fb_info *info)
  534. {
  535. struct adv7393fb_device *fbdev = to_adv7393fb_device(info);
  536. switch (blank) {
  537. case VESA_NO_BLANKING:
  538. /* Turn on panel */
  539. adv7393_mode(fbdev->client, BLANK_OFF);
  540. break;
  541. case VESA_VSYNC_SUSPEND:
  542. case VESA_HSYNC_SUSPEND:
  543. case VESA_POWERDOWN:
  544. /* Turn off panel */
  545. adv7393_mode(fbdev->client, BLANK_ON);
  546. break;
  547. default:
  548. return -EINVAL;
  549. break;
  550. }
  551. return 0;
  552. }
  553. int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
  554. {
  555. if (nocursor)
  556. return 0;
  557. else
  558. return -EINVAL; /* just to force soft_cursor() call */
  559. }
  560. static int bfin_adv7393_fb_setcolreg(u_int regno, u_int red, u_int green,
  561. u_int blue, u_int transp,
  562. struct fb_info *info)
  563. {
  564. if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
  565. return -EINVAL;
  566. if (info->var.grayscale)
  567. /* grayscale = 0.30*R + 0.59*G + 0.11*B */
  568. red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  569. if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
  570. u32 value;
  571. /* Place color in the pseudopalette */
  572. if (regno > 16)
  573. return -EINVAL;
  574. red >>= (16 - info->var.red.length);
  575. green >>= (16 - info->var.green.length);
  576. blue >>= (16 - info->var.blue.length);
  577. value = (red << info->var.red.offset) |
  578. (green << info->var.green.offset)|
  579. (blue << info->var.blue.offset);
  580. value &= 0xFFFF;
  581. ((u32 *) (info->pseudo_palette))[regno] = value;
  582. }
  583. return 0;
  584. }
  585. static int bfin_adv7393_fb_remove(struct i2c_client *client)
  586. {
  587. struct adv7393fb_device *fbdev = i2c_get_clientdata(client);
  588. adv7393_mode(client, POWER_DOWN);
  589. if (fbdev->fb_mem)
  590. dma_free_coherent(NULL, fbdev->fb_len, fbdev->fb_mem, fbdev->dma_handle);
  591. free_dma(CH_PPI);
  592. free_irq(IRQ_PPI_ERROR, fbdev);
  593. unregister_framebuffer(&fbdev->info);
  594. remove_proc_entry("driver/adv7393", NULL);
  595. fb_dealloc_cmap(&fbdev->info.cmap);
  596. kfree(fbdev->info.pseudo_palette);
  597. if (ANOMALY_05000400)
  598. gpio_free(P_IDENT(P_PPI0_FS3)); /* FS3 */
  599. peripheral_free_list(ppi_pins);
  600. kfree(fbdev);
  601. return 0;
  602. }
  603. #ifdef CONFIG_PM
  604. static int bfin_adv7393_fb_suspend(struct device *dev)
  605. {
  606. struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
  607. if (fbdev->open) {
  608. bfin_disable_dma();
  609. bfin_disable_ppi();
  610. dma_desc_list(fbdev, DESTRUCT);
  611. }
  612. adv7393_mode(fbdev->client, POWER_DOWN);
  613. return 0;
  614. }
  615. static int bfin_adv7393_fb_resume(struct device *dev)
  616. {
  617. struct adv7393fb_device *fbdev = dev_get_drvdata(dev);
  618. adv7393_mode(fbdev->client, POWER_ON);
  619. if (fbdev->open) {
  620. dma_desc_list(fbdev, BUILD);
  621. bfin_config_ppi(fbdev);
  622. bfin_config_dma(fbdev);
  623. bfin_enable_ppi();
  624. }
  625. return 0;
  626. }
  627. static const struct dev_pm_ops bfin_adv7393_dev_pm_ops = {
  628. .suspend = bfin_adv7393_fb_suspend,
  629. .resume = bfin_adv7393_fb_resume,
  630. };
  631. #endif
  632. static const struct i2c_device_id bfin_adv7393_id[] = {
  633. {DRIVER_NAME, 0},
  634. {}
  635. };
  636. MODULE_DEVICE_TABLE(i2c, bfin_adv7393_id);
  637. static struct i2c_driver bfin_adv7393_fb_driver = {
  638. .driver = {
  639. .name = DRIVER_NAME,
  640. #ifdef CONFIG_PM
  641. .pm = &bfin_adv7393_dev_pm_ops,
  642. #endif
  643. },
  644. .probe = bfin_adv7393_fb_probe,
  645. .remove = bfin_adv7393_fb_remove,
  646. .id_table = bfin_adv7393_id,
  647. };
  648. static int __init bfin_adv7393_fb_driver_init(void)
  649. {
  650. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  651. request_module("i2c-bfin-twi");
  652. #else
  653. request_module("i2c-gpio");
  654. #endif
  655. return i2c_add_driver(&bfin_adv7393_fb_driver);
  656. }
  657. module_init(bfin_adv7393_fb_driver_init);
  658. static void __exit bfin_adv7393_fb_driver_cleanup(void)
  659. {
  660. i2c_del_driver(&bfin_adv7393_fb_driver);
  661. }
  662. module_exit(bfin_adv7393_fb_driver_cleanup);
  663. MODULE_LICENSE("GPL");
  664. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  665. MODULE_DESCRIPTION("Frame buffer driver for ADV7393/2 Video Encoder");
  666. module_param(mode, int, 0);
  667. MODULE_PARM_DESC(mode,
  668. "Video Mode (0=NTSC,1=PAL,2=NTSC 640x480,3=PAL 640x480,4=NTSC YCbCr input,5=PAL YCbCr input)");
  669. module_param(mem, int, 0);
  670. MODULE_PARM_DESC(mem,
  671. "Size of frame buffer memory 1=Single 2=Double Size (allows y-panning / frame stacking)");
  672. module_param(nocursor, int, 0644);
  673. MODULE_PARM_DESC(nocursor, "cursor enable/disable");