f71808e_wdt.c 20 KB

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  1. /***************************************************************************
  2. * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
  3. * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
  4. * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
  5. * *
  6. * This program is free software; you can redistribute it and/or modify *
  7. * it under the terms of the GNU General Public License as published by *
  8. * the Free Software Foundation; either version 2 of the License, or *
  9. * (at your option) any later version. *
  10. * *
  11. * This program is distributed in the hope that it will be useful, *
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  14. * GNU General Public License for more details. *
  15. * *
  16. * You should have received a copy of the GNU General Public License *
  17. * along with this program; if not, write to the *
  18. * Free Software Foundation, Inc., *
  19. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  20. ***************************************************************************/
  21. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22. #include <linux/err.h>
  23. #include <linux/fs.h>
  24. #include <linux/init.h>
  25. #include <linux/io.h>
  26. #include <linux/ioport.h>
  27. #include <linux/miscdevice.h>
  28. #include <linux/module.h>
  29. #include <linux/mutex.h>
  30. #include <linux/notifier.h>
  31. #include <linux/reboot.h>
  32. #include <linux/uaccess.h>
  33. #include <linux/watchdog.h>
  34. #define DRVNAME "f71808e_wdt"
  35. #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
  36. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  37. #define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
  38. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  39. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  40. #define SIO_REG_DEVREV 0x22 /* Device revision */
  41. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  42. #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
  43. #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
  44. #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
  45. #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
  46. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  47. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  48. #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
  49. #define SIO_F71808_ID 0x0901 /* Chipset ID */
  50. #define SIO_F71858_ID 0x0507 /* Chipset ID */
  51. #define SIO_F71862_ID 0x0601 /* Chipset ID */
  52. #define SIO_F71869_ID 0x0814 /* Chipset ID */
  53. #define SIO_F71869A_ID 0x1007 /* Chipset ID */
  54. #define SIO_F71882_ID 0x0541 /* Chipset ID */
  55. #define SIO_F71889_ID 0x0723 /* Chipset ID */
  56. #define F71808FG_REG_WDO_CONF 0xf0
  57. #define F71808FG_REG_WDT_CONF 0xf5
  58. #define F71808FG_REG_WD_TIME 0xf6
  59. #define F71808FG_FLAG_WDOUT_EN 7
  60. #define F71808FG_FLAG_WDTMOUT_STS 5
  61. #define F71808FG_FLAG_WD_EN 5
  62. #define F71808FG_FLAG_WD_PULSE 4
  63. #define F71808FG_FLAG_WD_UNIT 3
  64. /* Default values */
  65. #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
  66. #define WATCHDOG_MAX_TIMEOUT (60 * 255)
  67. #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
  68. watchdog signal */
  69. #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
  70. pin number 63 */
  71. static unsigned short force_id;
  72. module_param(force_id, ushort, 0);
  73. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  74. static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
  75. static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
  76. module_param(timeout, int, 0);
  77. MODULE_PARM_DESC(timeout,
  78. "Watchdog timeout in seconds. 1<= timeout <="
  79. __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
  80. __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
  81. static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
  82. module_param(pulse_width, uint, 0);
  83. MODULE_PARM_DESC(pulse_width,
  84. "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
  85. " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
  86. static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
  87. module_param(f71862fg_pin, uint, 0);
  88. MODULE_PARM_DESC(f71862fg_pin,
  89. "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
  90. " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
  91. static bool nowayout = WATCHDOG_NOWAYOUT;
  92. module_param(nowayout, bool, 0444);
  93. MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
  94. static unsigned int start_withtimeout;
  95. module_param(start_withtimeout, uint, 0);
  96. MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
  97. " given initial timeout. Zero (default) disables this feature.");
  98. enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg };
  99. static const char *f71808e_names[] = {
  100. "f71808fg",
  101. "f71858fg",
  102. "f71862fg",
  103. "f71869",
  104. "f71882fg",
  105. "f71889fg",
  106. };
  107. /* Super-I/O Function prototypes */
  108. static inline int superio_inb(int base, int reg);
  109. static inline int superio_inw(int base, int reg);
  110. static inline void superio_outb(int base, int reg, u8 val);
  111. static inline void superio_set_bit(int base, int reg, int bit);
  112. static inline void superio_clear_bit(int base, int reg, int bit);
  113. static inline int superio_enter(int base);
  114. static inline void superio_select(int base, int ld);
  115. static inline void superio_exit(int base);
  116. struct watchdog_data {
  117. unsigned short sioaddr;
  118. enum chips type;
  119. unsigned long opened;
  120. struct mutex lock;
  121. char expect_close;
  122. struct watchdog_info ident;
  123. unsigned short timeout;
  124. u8 timer_val; /* content for the wd_time register */
  125. char minutes_mode;
  126. u8 pulse_val; /* pulse width flag */
  127. char pulse_mode; /* enable pulse output mode? */
  128. char caused_reboot; /* last reboot was by the watchdog */
  129. };
  130. static struct watchdog_data watchdog = {
  131. .lock = __MUTEX_INITIALIZER(watchdog.lock),
  132. };
  133. /* Super I/O functions */
  134. static inline int superio_inb(int base, int reg)
  135. {
  136. outb(reg, base);
  137. return inb(base + 1);
  138. }
  139. static int superio_inw(int base, int reg)
  140. {
  141. int val;
  142. val = superio_inb(base, reg) << 8;
  143. val |= superio_inb(base, reg + 1);
  144. return val;
  145. }
  146. static inline void superio_outb(int base, int reg, u8 val)
  147. {
  148. outb(reg, base);
  149. outb(val, base + 1);
  150. }
  151. static inline void superio_set_bit(int base, int reg, int bit)
  152. {
  153. unsigned long val = superio_inb(base, reg);
  154. __set_bit(bit, &val);
  155. superio_outb(base, reg, val);
  156. }
  157. static inline void superio_clear_bit(int base, int reg, int bit)
  158. {
  159. unsigned long val = superio_inb(base, reg);
  160. __clear_bit(bit, &val);
  161. superio_outb(base, reg, val);
  162. }
  163. static inline int superio_enter(int base)
  164. {
  165. /* Don't step on other drivers' I/O space by accident */
  166. if (!request_muxed_region(base, 2, DRVNAME)) {
  167. pr_err("I/O address 0x%04x already in use\n", (int)base);
  168. return -EBUSY;
  169. }
  170. /* according to the datasheet the key must be sent twice! */
  171. outb(SIO_UNLOCK_KEY, base);
  172. outb(SIO_UNLOCK_KEY, base);
  173. return 0;
  174. }
  175. static inline void superio_select(int base, int ld)
  176. {
  177. outb(SIO_REG_LDSEL, base);
  178. outb(ld, base + 1);
  179. }
  180. static inline void superio_exit(int base)
  181. {
  182. outb(SIO_LOCK_KEY, base);
  183. release_region(base, 2);
  184. }
  185. static int watchdog_set_timeout(int timeout)
  186. {
  187. if (timeout <= 0
  188. || timeout > max_timeout) {
  189. pr_err("watchdog timeout out of range\n");
  190. return -EINVAL;
  191. }
  192. mutex_lock(&watchdog.lock);
  193. watchdog.timeout = timeout;
  194. if (timeout > 0xff) {
  195. watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
  196. watchdog.minutes_mode = true;
  197. } else {
  198. watchdog.timer_val = timeout;
  199. watchdog.minutes_mode = false;
  200. }
  201. mutex_unlock(&watchdog.lock);
  202. return 0;
  203. }
  204. static int watchdog_set_pulse_width(unsigned int pw)
  205. {
  206. int err = 0;
  207. mutex_lock(&watchdog.lock);
  208. if (pw <= 1) {
  209. watchdog.pulse_val = 0;
  210. } else if (pw <= 25) {
  211. watchdog.pulse_val = 1;
  212. } else if (pw <= 125) {
  213. watchdog.pulse_val = 2;
  214. } else if (pw <= 5000) {
  215. watchdog.pulse_val = 3;
  216. } else {
  217. pr_err("pulse width out of range\n");
  218. err = -EINVAL;
  219. goto exit_unlock;
  220. }
  221. watchdog.pulse_mode = pw;
  222. exit_unlock:
  223. mutex_unlock(&watchdog.lock);
  224. return err;
  225. }
  226. static int watchdog_keepalive(void)
  227. {
  228. int err = 0;
  229. mutex_lock(&watchdog.lock);
  230. err = superio_enter(watchdog.sioaddr);
  231. if (err)
  232. goto exit_unlock;
  233. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  234. if (watchdog.minutes_mode)
  235. /* select minutes for timer units */
  236. superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  237. F71808FG_FLAG_WD_UNIT);
  238. else
  239. /* select seconds for timer units */
  240. superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  241. F71808FG_FLAG_WD_UNIT);
  242. /* Set timer value */
  243. superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
  244. watchdog.timer_val);
  245. superio_exit(watchdog.sioaddr);
  246. exit_unlock:
  247. mutex_unlock(&watchdog.lock);
  248. return err;
  249. }
  250. static int f71862fg_pin_configure(unsigned short ioaddr)
  251. {
  252. /* When ioaddr is non-zero the calling function has to take care of
  253. mutex handling and superio preparation! */
  254. if (f71862fg_pin == 63) {
  255. if (ioaddr) {
  256. /* SPI must be disabled first to use this pin! */
  257. superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
  258. superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
  259. }
  260. } else if (f71862fg_pin == 56) {
  261. if (ioaddr)
  262. superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
  263. } else {
  264. pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin);
  265. return -EINVAL;
  266. }
  267. return 0;
  268. }
  269. static int watchdog_start(void)
  270. {
  271. /* Make sure we don't die as soon as the watchdog is enabled below */
  272. int err = watchdog_keepalive();
  273. if (err)
  274. return err;
  275. mutex_lock(&watchdog.lock);
  276. err = superio_enter(watchdog.sioaddr);
  277. if (err)
  278. goto exit_unlock;
  279. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  280. /* Watchdog pin configuration */
  281. switch (watchdog.type) {
  282. case f71808fg:
  283. /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
  284. superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
  285. superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
  286. break;
  287. case f71862fg:
  288. err = f71862fg_pin_configure(watchdog.sioaddr);
  289. if (err)
  290. goto exit_superio;
  291. break;
  292. case f71869:
  293. /* GPIO14 --> WDTRST# */
  294. superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
  295. break;
  296. case f71882fg:
  297. /* Set pin 56 to WDTRST# */
  298. superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
  299. break;
  300. case f71889fg:
  301. /* set pin 40 to WDTRST# */
  302. superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
  303. superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
  304. break;
  305. default:
  306. /*
  307. * 'default' label to shut up the compiler and catch
  308. * programmer errors
  309. */
  310. err = -ENODEV;
  311. goto exit_superio;
  312. }
  313. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  314. superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
  315. superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
  316. F71808FG_FLAG_WDOUT_EN);
  317. superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  318. F71808FG_FLAG_WD_EN);
  319. if (watchdog.pulse_mode) {
  320. /* Select "pulse" output mode with given duration */
  321. u8 wdt_conf = superio_inb(watchdog.sioaddr,
  322. F71808FG_REG_WDT_CONF);
  323. /* Set WD_PSWIDTH bits (1:0) */
  324. wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
  325. /* Set WD_PULSE to "pulse" mode */
  326. wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
  327. superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  328. wdt_conf);
  329. } else {
  330. /* Select "level" output mode */
  331. superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  332. F71808FG_FLAG_WD_PULSE);
  333. }
  334. exit_superio:
  335. superio_exit(watchdog.sioaddr);
  336. exit_unlock:
  337. mutex_unlock(&watchdog.lock);
  338. return err;
  339. }
  340. static int watchdog_stop(void)
  341. {
  342. int err = 0;
  343. mutex_lock(&watchdog.lock);
  344. err = superio_enter(watchdog.sioaddr);
  345. if (err)
  346. goto exit_unlock;
  347. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  348. superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  349. F71808FG_FLAG_WD_EN);
  350. superio_exit(watchdog.sioaddr);
  351. exit_unlock:
  352. mutex_unlock(&watchdog.lock);
  353. return err;
  354. }
  355. static int watchdog_get_status(void)
  356. {
  357. int status = 0;
  358. mutex_lock(&watchdog.lock);
  359. status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
  360. mutex_unlock(&watchdog.lock);
  361. return status;
  362. }
  363. static bool watchdog_is_running(void)
  364. {
  365. /*
  366. * if we fail to determine the watchdog's status assume it to be
  367. * running to be on the safe side
  368. */
  369. bool is_running = true;
  370. mutex_lock(&watchdog.lock);
  371. if (superio_enter(watchdog.sioaddr))
  372. goto exit_unlock;
  373. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  374. is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
  375. && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
  376. & BIT(F71808FG_FLAG_WD_EN));
  377. superio_exit(watchdog.sioaddr);
  378. exit_unlock:
  379. mutex_unlock(&watchdog.lock);
  380. return is_running;
  381. }
  382. /* /dev/watchdog api */
  383. static int watchdog_open(struct inode *inode, struct file *file)
  384. {
  385. int err;
  386. /* If the watchdog is alive we don't need to start it again */
  387. if (test_and_set_bit(0, &watchdog.opened))
  388. return -EBUSY;
  389. err = watchdog_start();
  390. if (err) {
  391. clear_bit(0, &watchdog.opened);
  392. return err;
  393. }
  394. if (nowayout)
  395. __module_get(THIS_MODULE);
  396. watchdog.expect_close = 0;
  397. return nonseekable_open(inode, file);
  398. }
  399. static int watchdog_release(struct inode *inode, struct file *file)
  400. {
  401. clear_bit(0, &watchdog.opened);
  402. if (!watchdog.expect_close) {
  403. watchdog_keepalive();
  404. pr_crit("Unexpected close, not stopping watchdog!\n");
  405. } else if (!nowayout) {
  406. watchdog_stop();
  407. }
  408. return 0;
  409. }
  410. /*
  411. * watchdog_write:
  412. * @file: file handle to the watchdog
  413. * @buf: buffer to write
  414. * @count: count of bytes
  415. * @ppos: pointer to the position to write. No seeks allowed
  416. *
  417. * A write to a watchdog device is defined as a keepalive signal. Any
  418. * write of data will do, as we we don't define content meaning.
  419. */
  420. static ssize_t watchdog_write(struct file *file, const char __user *buf,
  421. size_t count, loff_t *ppos)
  422. {
  423. if (count) {
  424. if (!nowayout) {
  425. size_t i;
  426. /* In case it was set long ago */
  427. bool expect_close = false;
  428. for (i = 0; i != count; i++) {
  429. char c;
  430. if (get_user(c, buf + i))
  431. return -EFAULT;
  432. if (c == 'V')
  433. expect_close = true;
  434. }
  435. /* Properly order writes across fork()ed processes */
  436. mutex_lock(&watchdog.lock);
  437. watchdog.expect_close = expect_close;
  438. mutex_unlock(&watchdog.lock);
  439. }
  440. /* someone wrote to us, we should restart timer */
  441. watchdog_keepalive();
  442. }
  443. return count;
  444. }
  445. /*
  446. * watchdog_ioctl:
  447. * @inode: inode of the device
  448. * @file: file handle to the device
  449. * @cmd: watchdog command
  450. * @arg: argument pointer
  451. *
  452. * The watchdog API defines a common set of functions for all watchdogs
  453. * according to their available features.
  454. */
  455. static long watchdog_ioctl(struct file *file, unsigned int cmd,
  456. unsigned long arg)
  457. {
  458. int status;
  459. int new_options;
  460. int new_timeout;
  461. union {
  462. struct watchdog_info __user *ident;
  463. int __user *i;
  464. } uarg;
  465. uarg.i = (int __user *)arg;
  466. switch (cmd) {
  467. case WDIOC_GETSUPPORT:
  468. return copy_to_user(uarg.ident, &watchdog.ident,
  469. sizeof(watchdog.ident)) ? -EFAULT : 0;
  470. case WDIOC_GETSTATUS:
  471. status = watchdog_get_status();
  472. if (status < 0)
  473. return status;
  474. return put_user(status, uarg.i);
  475. case WDIOC_GETBOOTSTATUS:
  476. return put_user(0, uarg.i);
  477. case WDIOC_SETOPTIONS:
  478. if (get_user(new_options, uarg.i))
  479. return -EFAULT;
  480. if (new_options & WDIOS_DISABLECARD)
  481. watchdog_stop();
  482. if (new_options & WDIOS_ENABLECARD)
  483. return watchdog_start();
  484. case WDIOC_KEEPALIVE:
  485. watchdog_keepalive();
  486. return 0;
  487. case WDIOC_SETTIMEOUT:
  488. if (get_user(new_timeout, uarg.i))
  489. return -EFAULT;
  490. if (watchdog_set_timeout(new_timeout))
  491. return -EINVAL;
  492. watchdog_keepalive();
  493. /* Fall */
  494. case WDIOC_GETTIMEOUT:
  495. return put_user(watchdog.timeout, uarg.i);
  496. default:
  497. return -ENOTTY;
  498. }
  499. }
  500. static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
  501. void *unused)
  502. {
  503. if (code == SYS_DOWN || code == SYS_HALT)
  504. watchdog_stop();
  505. return NOTIFY_DONE;
  506. }
  507. static const struct file_operations watchdog_fops = {
  508. .owner = THIS_MODULE,
  509. .llseek = no_llseek,
  510. .open = watchdog_open,
  511. .release = watchdog_release,
  512. .write = watchdog_write,
  513. .unlocked_ioctl = watchdog_ioctl,
  514. };
  515. static struct miscdevice watchdog_miscdev = {
  516. .minor = WATCHDOG_MINOR,
  517. .name = "watchdog",
  518. .fops = &watchdog_fops,
  519. };
  520. static struct notifier_block watchdog_notifier = {
  521. .notifier_call = watchdog_notify_sys,
  522. };
  523. static int __init watchdog_init(int sioaddr)
  524. {
  525. int wdt_conf, err = 0;
  526. /* No need to lock watchdog.lock here because no entry points
  527. * into the module have been registered yet.
  528. */
  529. watchdog.sioaddr = sioaddr;
  530. watchdog.ident.options = WDIOC_SETTIMEOUT
  531. | WDIOF_MAGICCLOSE
  532. | WDIOF_KEEPALIVEPING;
  533. snprintf(watchdog.ident.identity,
  534. sizeof(watchdog.ident.identity), "%s watchdog",
  535. f71808e_names[watchdog.type]);
  536. err = superio_enter(sioaddr);
  537. if (err)
  538. return err;
  539. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  540. wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
  541. watchdog.caused_reboot = wdt_conf & F71808FG_FLAG_WDTMOUT_STS;
  542. superio_exit(sioaddr);
  543. err = watchdog_set_timeout(timeout);
  544. if (err)
  545. return err;
  546. err = watchdog_set_pulse_width(pulse_width);
  547. if (err)
  548. return err;
  549. err = register_reboot_notifier(&watchdog_notifier);
  550. if (err)
  551. return err;
  552. err = misc_register(&watchdog_miscdev);
  553. if (err) {
  554. pr_err("cannot register miscdev on minor=%d\n",
  555. watchdog_miscdev.minor);
  556. goto exit_reboot;
  557. }
  558. if (start_withtimeout) {
  559. if (start_withtimeout <= 0
  560. || start_withtimeout > max_timeout) {
  561. pr_err("starting timeout out of range\n");
  562. err = -EINVAL;
  563. goto exit_miscdev;
  564. }
  565. err = watchdog_start();
  566. if (err) {
  567. pr_err("cannot start watchdog timer\n");
  568. goto exit_miscdev;
  569. }
  570. mutex_lock(&watchdog.lock);
  571. err = superio_enter(sioaddr);
  572. if (err)
  573. goto exit_unlock;
  574. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  575. if (start_withtimeout > 0xff) {
  576. /* select minutes for timer units */
  577. superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
  578. F71808FG_FLAG_WD_UNIT);
  579. superio_outb(sioaddr, F71808FG_REG_WD_TIME,
  580. DIV_ROUND_UP(start_withtimeout, 60));
  581. } else {
  582. /* select seconds for timer units */
  583. superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
  584. F71808FG_FLAG_WD_UNIT);
  585. superio_outb(sioaddr, F71808FG_REG_WD_TIME,
  586. start_withtimeout);
  587. }
  588. superio_exit(sioaddr);
  589. mutex_unlock(&watchdog.lock);
  590. if (nowayout)
  591. __module_get(THIS_MODULE);
  592. pr_info("watchdog started with initial timeout of %u sec\n",
  593. start_withtimeout);
  594. }
  595. return 0;
  596. exit_unlock:
  597. mutex_unlock(&watchdog.lock);
  598. exit_miscdev:
  599. misc_deregister(&watchdog_miscdev);
  600. exit_reboot:
  601. unregister_reboot_notifier(&watchdog_notifier);
  602. return err;
  603. }
  604. static int __init f71808e_find(int sioaddr)
  605. {
  606. u16 devid;
  607. int err = superio_enter(sioaddr);
  608. if (err)
  609. return err;
  610. devid = superio_inw(sioaddr, SIO_REG_MANID);
  611. if (devid != SIO_FINTEK_ID) {
  612. pr_debug("Not a Fintek device\n");
  613. err = -ENODEV;
  614. goto exit;
  615. }
  616. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  617. switch (devid) {
  618. case SIO_F71808_ID:
  619. watchdog.type = f71808fg;
  620. break;
  621. case SIO_F71862_ID:
  622. watchdog.type = f71862fg;
  623. err = f71862fg_pin_configure(0); /* validate module parameter */
  624. break;
  625. case SIO_F71869_ID:
  626. case SIO_F71869A_ID:
  627. watchdog.type = f71869;
  628. break;
  629. case SIO_F71882_ID:
  630. watchdog.type = f71882fg;
  631. break;
  632. case SIO_F71889_ID:
  633. watchdog.type = f71889fg;
  634. break;
  635. case SIO_F71858_ID:
  636. /* Confirmed (by datasheet) not to have a watchdog. */
  637. err = -ENODEV;
  638. goto exit;
  639. default:
  640. pr_info("Unrecognized Fintek device: %04x\n",
  641. (unsigned int)devid);
  642. err = -ENODEV;
  643. goto exit;
  644. }
  645. pr_info("Found %s watchdog chip, revision %d\n",
  646. f71808e_names[watchdog.type],
  647. (int)superio_inb(sioaddr, SIO_REG_DEVREV));
  648. exit:
  649. superio_exit(sioaddr);
  650. return err;
  651. }
  652. static int __init f71808e_init(void)
  653. {
  654. static const unsigned short addrs[] = { 0x2e, 0x4e };
  655. int err = -ENODEV;
  656. int i;
  657. for (i = 0; i < ARRAY_SIZE(addrs); i++) {
  658. err = f71808e_find(addrs[i]);
  659. if (err == 0)
  660. break;
  661. }
  662. if (i == ARRAY_SIZE(addrs))
  663. return err;
  664. return watchdog_init(addrs[i]);
  665. }
  666. static void __exit f71808e_exit(void)
  667. {
  668. if (watchdog_is_running()) {
  669. pr_warn("Watchdog timer still running, stopping it\n");
  670. watchdog_stop();
  671. }
  672. misc_deregister(&watchdog_miscdev);
  673. unregister_reboot_notifier(&watchdog_notifier);
  674. }
  675. MODULE_DESCRIPTION("F71808E Watchdog Driver");
  676. MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
  677. MODULE_LICENSE("GPL");
  678. module_init(f71808e_init);
  679. module_exit(f71808e_exit);