lantiq_wdt.c 5.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245
  1. /*
  2. * This program is free software; you can redistribute it and/or modify it
  3. * under the terms of the GNU General Public License version 2 as published
  4. * by the Free Software Foundation.
  5. *
  6. * Copyright (C) 2010 John Crispin <blogic@openwrt.org>
  7. * Based on EP93xx wdt driver
  8. */
  9. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  10. #include <linux/module.h>
  11. #include <linux/fs.h>
  12. #include <linux/miscdevice.h>
  13. #include <linux/watchdog.h>
  14. #include <linux/of_platform.h>
  15. #include <linux/uaccess.h>
  16. #include <linux/clk.h>
  17. #include <linux/io.h>
  18. #include <lantiq_soc.h>
  19. /*
  20. * Section 3.4 of the datasheet
  21. * The password sequence protects the WDT control register from unintended
  22. * write actions, which might cause malfunction of the WDT.
  23. *
  24. * essentially the following two magic passwords need to be written to allow
  25. * IO access to the WDT core
  26. */
  27. #define LTQ_WDT_PW1 0x00BE0000
  28. #define LTQ_WDT_PW2 0x00DC0000
  29. #define LTQ_WDT_CR 0x0 /* watchdog control register */
  30. #define LTQ_WDT_SR 0x8 /* watchdog status register */
  31. #define LTQ_WDT_SR_EN (0x1 << 31) /* enable bit */
  32. #define LTQ_WDT_SR_PWD (0x3 << 26) /* turn on power */
  33. #define LTQ_WDT_SR_CLKDIV (0x3 << 24) /* turn on clock and set */
  34. /* divider to 0x40000 */
  35. #define LTQ_WDT_DIVIDER 0x40000
  36. #define LTQ_MAX_TIMEOUT ((1 << 16) - 1) /* the reload field is 16 bit */
  37. static bool nowayout = WATCHDOG_NOWAYOUT;
  38. static void __iomem *ltq_wdt_membase;
  39. static unsigned long ltq_io_region_clk_rate;
  40. static unsigned long ltq_wdt_bootstatus;
  41. static unsigned long ltq_wdt_in_use;
  42. static int ltq_wdt_timeout = 30;
  43. static int ltq_wdt_ok_to_close;
  44. static void
  45. ltq_wdt_enable(void)
  46. {
  47. unsigned long int timeout = ltq_wdt_timeout *
  48. (ltq_io_region_clk_rate / LTQ_WDT_DIVIDER) + 0x1000;
  49. if (timeout > LTQ_MAX_TIMEOUT)
  50. timeout = LTQ_MAX_TIMEOUT;
  51. /* write the first password magic */
  52. ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
  53. /* write the second magic plus the configuration and new timeout */
  54. ltq_w32(LTQ_WDT_SR_EN | LTQ_WDT_SR_PWD | LTQ_WDT_SR_CLKDIV |
  55. LTQ_WDT_PW2 | timeout, ltq_wdt_membase + LTQ_WDT_CR);
  56. }
  57. static void
  58. ltq_wdt_disable(void)
  59. {
  60. /* write the first password magic */
  61. ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
  62. /*
  63. * write the second password magic with no config
  64. * this turns the watchdog off
  65. */
  66. ltq_w32(LTQ_WDT_PW2, ltq_wdt_membase + LTQ_WDT_CR);
  67. }
  68. static ssize_t
  69. ltq_wdt_write(struct file *file, const char __user *data,
  70. size_t len, loff_t *ppos)
  71. {
  72. if (len) {
  73. if (!nowayout) {
  74. size_t i;
  75. ltq_wdt_ok_to_close = 0;
  76. for (i = 0; i != len; i++) {
  77. char c;
  78. if (get_user(c, data + i))
  79. return -EFAULT;
  80. if (c == 'V')
  81. ltq_wdt_ok_to_close = 1;
  82. else
  83. ltq_wdt_ok_to_close = 0;
  84. }
  85. }
  86. ltq_wdt_enable();
  87. }
  88. return len;
  89. }
  90. static struct watchdog_info ident = {
  91. .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
  92. WDIOF_CARDRESET,
  93. .identity = "ltq_wdt",
  94. };
  95. static long
  96. ltq_wdt_ioctl(struct file *file,
  97. unsigned int cmd, unsigned long arg)
  98. {
  99. int ret = -ENOTTY;
  100. switch (cmd) {
  101. case WDIOC_GETSUPPORT:
  102. ret = copy_to_user((struct watchdog_info __user *)arg, &ident,
  103. sizeof(ident)) ? -EFAULT : 0;
  104. break;
  105. case WDIOC_GETBOOTSTATUS:
  106. ret = put_user(ltq_wdt_bootstatus, (int __user *)arg);
  107. break;
  108. case WDIOC_GETSTATUS:
  109. ret = put_user(0, (int __user *)arg);
  110. break;
  111. case WDIOC_SETTIMEOUT:
  112. ret = get_user(ltq_wdt_timeout, (int __user *)arg);
  113. if (!ret)
  114. ltq_wdt_enable();
  115. /* intentional drop through */
  116. case WDIOC_GETTIMEOUT:
  117. ret = put_user(ltq_wdt_timeout, (int __user *)arg);
  118. break;
  119. case WDIOC_KEEPALIVE:
  120. ltq_wdt_enable();
  121. ret = 0;
  122. break;
  123. }
  124. return ret;
  125. }
  126. static int
  127. ltq_wdt_open(struct inode *inode, struct file *file)
  128. {
  129. if (test_and_set_bit(0, &ltq_wdt_in_use))
  130. return -EBUSY;
  131. ltq_wdt_in_use = 1;
  132. ltq_wdt_enable();
  133. return nonseekable_open(inode, file);
  134. }
  135. static int
  136. ltq_wdt_release(struct inode *inode, struct file *file)
  137. {
  138. if (ltq_wdt_ok_to_close)
  139. ltq_wdt_disable();
  140. else
  141. pr_err("watchdog closed without warning\n");
  142. ltq_wdt_ok_to_close = 0;
  143. clear_bit(0, &ltq_wdt_in_use);
  144. return 0;
  145. }
  146. static const struct file_operations ltq_wdt_fops = {
  147. .owner = THIS_MODULE,
  148. .write = ltq_wdt_write,
  149. .unlocked_ioctl = ltq_wdt_ioctl,
  150. .open = ltq_wdt_open,
  151. .release = ltq_wdt_release,
  152. .llseek = no_llseek,
  153. };
  154. static struct miscdevice ltq_wdt_miscdev = {
  155. .minor = WATCHDOG_MINOR,
  156. .name = "watchdog",
  157. .fops = &ltq_wdt_fops,
  158. };
  159. static int
  160. ltq_wdt_probe(struct platform_device *pdev)
  161. {
  162. struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  163. struct clk *clk;
  164. ltq_wdt_membase = devm_ioremap_resource(&pdev->dev, res);
  165. if (IS_ERR(ltq_wdt_membase))
  166. return PTR_ERR(ltq_wdt_membase);
  167. /* we do not need to enable the clock as it is always running */
  168. clk = clk_get_io();
  169. if (IS_ERR(clk)) {
  170. dev_err(&pdev->dev, "Failed to get clock\n");
  171. return -ENOENT;
  172. }
  173. ltq_io_region_clk_rate = clk_get_rate(clk);
  174. clk_put(clk);
  175. /* find out if the watchdog caused the last reboot */
  176. if (ltq_reset_cause() == LTQ_RST_CAUSE_WDTRST)
  177. ltq_wdt_bootstatus = WDIOF_CARDRESET;
  178. dev_info(&pdev->dev, "Init done\n");
  179. return misc_register(&ltq_wdt_miscdev);
  180. }
  181. static int
  182. ltq_wdt_remove(struct platform_device *pdev)
  183. {
  184. misc_deregister(&ltq_wdt_miscdev);
  185. return 0;
  186. }
  187. static const struct of_device_id ltq_wdt_match[] = {
  188. { .compatible = "lantiq,wdt" },
  189. {},
  190. };
  191. MODULE_DEVICE_TABLE(of, ltq_wdt_match);
  192. static struct platform_driver ltq_wdt_driver = {
  193. .probe = ltq_wdt_probe,
  194. .remove = ltq_wdt_remove,
  195. .driver = {
  196. .name = "wdt",
  197. .of_match_table = ltq_wdt_match,
  198. },
  199. };
  200. module_platform_driver(ltq_wdt_driver);
  201. module_param(nowayout, bool, 0);
  202. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
  203. MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
  204. MODULE_DESCRIPTION("Lantiq SoC Watchdog");
  205. MODULE_LICENSE("GPL");