rt2880_wdt.c 5.0 KB

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  1. /*
  2. * Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer
  3. *
  4. * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  6. *
  7. * This driver was based on: drivers/watchdog/softdog.c
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License version 2 as published
  11. * by the Free Software Foundation.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/reset.h>
  15. #include <linux/module.h>
  16. #include <linux/kernel.h>
  17. #include <linux/watchdog.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/platform_device.h>
  20. #include <asm/mach-ralink/ralink_regs.h>
  21. #define SYSC_RSTSTAT 0x38
  22. #define WDT_RST_CAUSE BIT(1)
  23. #define RALINK_WDT_TIMEOUT 30
  24. #define RALINK_WDT_PRESCALE 65536
  25. #define TIMER_REG_TMR1LOAD 0x00
  26. #define TIMER_REG_TMR1CTL 0x08
  27. #define TMRSTAT_TMR1RST BIT(5)
  28. #define TMR1CTL_ENABLE BIT(7)
  29. #define TMR1CTL_MODE_SHIFT 4
  30. #define TMR1CTL_MODE_MASK 0x3
  31. #define TMR1CTL_MODE_FREE_RUNNING 0x0
  32. #define TMR1CTL_MODE_PERIODIC 0x1
  33. #define TMR1CTL_MODE_TIMEOUT 0x2
  34. #define TMR1CTL_MODE_WDT 0x3
  35. #define TMR1CTL_PRESCALE_MASK 0xf
  36. #define TMR1CTL_PRESCALE_65536 0xf
  37. static struct clk *rt288x_wdt_clk;
  38. static unsigned long rt288x_wdt_freq;
  39. static void __iomem *rt288x_wdt_base;
  40. static struct reset_control *rt288x_wdt_reset;
  41. static bool nowayout = WATCHDOG_NOWAYOUT;
  42. module_param(nowayout, bool, 0);
  43. MODULE_PARM_DESC(nowayout,
  44. "Watchdog cannot be stopped once started (default="
  45. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  46. static inline void rt_wdt_w32(unsigned reg, u32 val)
  47. {
  48. iowrite32(val, rt288x_wdt_base + reg);
  49. }
  50. static inline u32 rt_wdt_r32(unsigned reg)
  51. {
  52. return ioread32(rt288x_wdt_base + reg);
  53. }
  54. static int rt288x_wdt_ping(struct watchdog_device *w)
  55. {
  56. rt_wdt_w32(TIMER_REG_TMR1LOAD, w->timeout * rt288x_wdt_freq);
  57. return 0;
  58. }
  59. static int rt288x_wdt_start(struct watchdog_device *w)
  60. {
  61. u32 t;
  62. t = rt_wdt_r32(TIMER_REG_TMR1CTL);
  63. t &= ~(TMR1CTL_MODE_MASK << TMR1CTL_MODE_SHIFT |
  64. TMR1CTL_PRESCALE_MASK);
  65. t |= (TMR1CTL_MODE_WDT << TMR1CTL_MODE_SHIFT |
  66. TMR1CTL_PRESCALE_65536);
  67. rt_wdt_w32(TIMER_REG_TMR1CTL, t);
  68. rt288x_wdt_ping(w);
  69. t = rt_wdt_r32(TIMER_REG_TMR1CTL);
  70. t |= TMR1CTL_ENABLE;
  71. rt_wdt_w32(TIMER_REG_TMR1CTL, t);
  72. return 0;
  73. }
  74. static int rt288x_wdt_stop(struct watchdog_device *w)
  75. {
  76. u32 t;
  77. rt288x_wdt_ping(w);
  78. t = rt_wdt_r32(TIMER_REG_TMR1CTL);
  79. t &= ~TMR1CTL_ENABLE;
  80. rt_wdt_w32(TIMER_REG_TMR1CTL, t);
  81. return 0;
  82. }
  83. static int rt288x_wdt_set_timeout(struct watchdog_device *w, unsigned int t)
  84. {
  85. w->timeout = t;
  86. rt288x_wdt_ping(w);
  87. return 0;
  88. }
  89. static int rt288x_wdt_bootcause(void)
  90. {
  91. if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE)
  92. return WDIOF_CARDRESET;
  93. return 0;
  94. }
  95. static struct watchdog_info rt288x_wdt_info = {
  96. .identity = "Ralink Watchdog",
  97. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
  98. };
  99. static struct watchdog_ops rt288x_wdt_ops = {
  100. .owner = THIS_MODULE,
  101. .start = rt288x_wdt_start,
  102. .stop = rt288x_wdt_stop,
  103. .ping = rt288x_wdt_ping,
  104. .set_timeout = rt288x_wdt_set_timeout,
  105. };
  106. static struct watchdog_device rt288x_wdt_dev = {
  107. .info = &rt288x_wdt_info,
  108. .ops = &rt288x_wdt_ops,
  109. .min_timeout = 1,
  110. };
  111. static int rt288x_wdt_probe(struct platform_device *pdev)
  112. {
  113. struct resource *res;
  114. int ret;
  115. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  116. rt288x_wdt_base = devm_ioremap_resource(&pdev->dev, res);
  117. if (IS_ERR(rt288x_wdt_base))
  118. return PTR_ERR(rt288x_wdt_base);
  119. rt288x_wdt_clk = devm_clk_get(&pdev->dev, NULL);
  120. if (IS_ERR(rt288x_wdt_clk))
  121. return PTR_ERR(rt288x_wdt_clk);
  122. rt288x_wdt_reset = devm_reset_control_get(&pdev->dev, NULL);
  123. if (!IS_ERR(rt288x_wdt_reset))
  124. reset_control_deassert(rt288x_wdt_reset);
  125. rt288x_wdt_freq = clk_get_rate(rt288x_wdt_clk) / RALINK_WDT_PRESCALE;
  126. rt288x_wdt_dev.dev = &pdev->dev;
  127. rt288x_wdt_dev.bootstatus = rt288x_wdt_bootcause();
  128. rt288x_wdt_dev.max_timeout = (0xfffful / rt288x_wdt_freq);
  129. rt288x_wdt_dev.parent = &pdev->dev;
  130. watchdog_init_timeout(&rt288x_wdt_dev, rt288x_wdt_dev.max_timeout,
  131. &pdev->dev);
  132. watchdog_set_nowayout(&rt288x_wdt_dev, nowayout);
  133. ret = watchdog_register_device(&rt288x_wdt_dev);
  134. if (!ret)
  135. dev_info(&pdev->dev, "Initialized\n");
  136. return 0;
  137. }
  138. static int rt288x_wdt_remove(struct platform_device *pdev)
  139. {
  140. watchdog_unregister_device(&rt288x_wdt_dev);
  141. return 0;
  142. }
  143. static void rt288x_wdt_shutdown(struct platform_device *pdev)
  144. {
  145. rt288x_wdt_stop(&rt288x_wdt_dev);
  146. }
  147. static const struct of_device_id rt288x_wdt_match[] = {
  148. { .compatible = "ralink,rt2880-wdt" },
  149. {},
  150. };
  151. MODULE_DEVICE_TABLE(of, rt288x_wdt_match);
  152. static struct platform_driver rt288x_wdt_driver = {
  153. .probe = rt288x_wdt_probe,
  154. .remove = rt288x_wdt_remove,
  155. .shutdown = rt288x_wdt_shutdown,
  156. .driver = {
  157. .name = KBUILD_MODNAME,
  158. .of_match_table = rt288x_wdt_match,
  159. },
  160. };
  161. module_platform_driver(rt288x_wdt_driver);
  162. MODULE_DESCRIPTION("MediaTek/Ralink RT288x/RT3xxx hardware watchdog driver");
  163. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
  164. MODULE_LICENSE("GPL v2");