w83627hf_wdt.c 11 KB

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  1. /*
  2. * w83627hf/thf WDT driver
  3. *
  4. * (c) Copyright 2013 Guenter Roeck
  5. * converted to watchdog infrastructure
  6. *
  7. * (c) Copyright 2007 Vlad Drukker <vlad@storewiz.com>
  8. * added support for W83627THF.
  9. *
  10. * (c) Copyright 2003,2007 Pádraig Brady <P@draigBrady.com>
  11. *
  12. * Based on advantechwdt.c which is based on wdt.c.
  13. * Original copyright messages:
  14. *
  15. * (c) Copyright 2000-2001 Marek Michalkiewicz <marekm@linux.org.pl>
  16. *
  17. * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
  18. * All Rights Reserved.
  19. *
  20. * This program is free software; you can redistribute it and/or
  21. * modify it under the terms of the GNU General Public License
  22. * as published by the Free Software Foundation; either version
  23. * 2 of the License, or (at your option) any later version.
  24. *
  25. * Neither Alan Cox nor CymruNet Ltd. admit liability nor provide
  26. * warranty for any of this software. This material is provided
  27. * "AS-IS" and at no charge.
  28. *
  29. * (c) Copyright 1995 Alan Cox <alan@lxorguk.ukuu.org.uk>
  30. */
  31. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  32. #include <linux/module.h>
  33. #include <linux/moduleparam.h>
  34. #include <linux/types.h>
  35. #include <linux/watchdog.h>
  36. #include <linux/ioport.h>
  37. #include <linux/notifier.h>
  38. #include <linux/reboot.h>
  39. #include <linux/init.h>
  40. #include <linux/io.h>
  41. #define WATCHDOG_NAME "w83627hf/thf/hg/dhg WDT"
  42. #define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */
  43. static int wdt_io;
  44. static int cr_wdt_timeout; /* WDT timeout register */
  45. static int cr_wdt_control; /* WDT control register */
  46. enum chips { w83627hf, w83627s, w83697hf, w83697ug, w83637hf, w83627thf,
  47. w83687thf, w83627ehf, w83627dhg, w83627uhg, w83667hg, w83627dhg_p,
  48. w83667hg_b, nct6775, nct6776, nct6779, nct6791, nct6792 };
  49. static int timeout; /* in seconds */
  50. module_param(timeout, int, 0);
  51. MODULE_PARM_DESC(timeout,
  52. "Watchdog timeout in seconds. 1 <= timeout <= 255, default="
  53. __MODULE_STRING(WATCHDOG_TIMEOUT) ".");
  54. static bool nowayout = WATCHDOG_NOWAYOUT;
  55. module_param(nowayout, bool, 0);
  56. MODULE_PARM_DESC(nowayout,
  57. "Watchdog cannot be stopped once started (default="
  58. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  59. static int early_disable;
  60. module_param(early_disable, int, 0);
  61. MODULE_PARM_DESC(early_disable, "Disable watchdog at boot time (default=0)");
  62. /*
  63. * Kernel methods.
  64. */
  65. #define WDT_EFER (wdt_io+0) /* Extended Function Enable Registers */
  66. #define WDT_EFIR (wdt_io+0) /* Extended Function Index Register
  67. (same as EFER) */
  68. #define WDT_EFDR (WDT_EFIR+1) /* Extended Function Data Register */
  69. #define W83627HF_LD_WDT 0x08
  70. #define W83627HF_ID 0x52
  71. #define W83627S_ID 0x59
  72. #define W83697HF_ID 0x60
  73. #define W83697UG_ID 0x68
  74. #define W83637HF_ID 0x70
  75. #define W83627THF_ID 0x82
  76. #define W83687THF_ID 0x85
  77. #define W83627EHF_ID 0x88
  78. #define W83627DHG_ID 0xa0
  79. #define W83627UHG_ID 0xa2
  80. #define W83667HG_ID 0xa5
  81. #define W83627DHG_P_ID 0xb0
  82. #define W83667HG_B_ID 0xb3
  83. #define NCT6775_ID 0xb4
  84. #define NCT6776_ID 0xc3
  85. #define NCT6779_ID 0xc5
  86. #define NCT6791_ID 0xc8
  87. #define NCT6792_ID 0xc9
  88. #define W83627HF_WDT_TIMEOUT 0xf6
  89. #define W83697HF_WDT_TIMEOUT 0xf4
  90. #define W83627HF_WDT_CONTROL 0xf5
  91. #define W83697HF_WDT_CONTROL 0xf3
  92. static void superio_outb(int reg, int val)
  93. {
  94. outb(reg, WDT_EFER);
  95. outb(val, WDT_EFDR);
  96. }
  97. static inline int superio_inb(int reg)
  98. {
  99. outb(reg, WDT_EFER);
  100. return inb(WDT_EFDR);
  101. }
  102. static int superio_enter(void)
  103. {
  104. if (!request_muxed_region(wdt_io, 2, WATCHDOG_NAME))
  105. return -EBUSY;
  106. outb_p(0x87, WDT_EFER); /* Enter extended function mode */
  107. outb_p(0x87, WDT_EFER); /* Again according to manual */
  108. return 0;
  109. }
  110. static void superio_select(int ld)
  111. {
  112. superio_outb(0x07, ld);
  113. }
  114. static void superio_exit(void)
  115. {
  116. outb_p(0xAA, WDT_EFER); /* Leave extended function mode */
  117. release_region(wdt_io, 2);
  118. }
  119. static int w83627hf_init(struct watchdog_device *wdog, enum chips chip)
  120. {
  121. int ret;
  122. unsigned char t;
  123. ret = superio_enter();
  124. if (ret)
  125. return ret;
  126. superio_select(W83627HF_LD_WDT);
  127. /* set CR30 bit 0 to activate GPIO2 */
  128. t = superio_inb(0x30);
  129. if (!(t & 0x01))
  130. superio_outb(0x30, t | 0x01);
  131. switch (chip) {
  132. case w83627hf:
  133. case w83627s:
  134. t = superio_inb(0x2B) & ~0x10;
  135. superio_outb(0x2B, t); /* set GPIO24 to WDT0 */
  136. break;
  137. case w83697hf:
  138. /* Set pin 119 to WDTO# mode (= CR29, WDT0) */
  139. t = superio_inb(0x29) & ~0x60;
  140. t |= 0x20;
  141. superio_outb(0x29, t);
  142. break;
  143. case w83697ug:
  144. /* Set pin 118 to WDTO# mode */
  145. t = superio_inb(0x2b) & ~0x04;
  146. superio_outb(0x2b, t);
  147. break;
  148. case w83627thf:
  149. t = (superio_inb(0x2B) & ~0x08) | 0x04;
  150. superio_outb(0x2B, t); /* set GPIO3 to WDT0 */
  151. break;
  152. case w83627dhg:
  153. case w83627dhg_p:
  154. t = superio_inb(0x2D) & ~0x01; /* PIN77 -> WDT0# */
  155. superio_outb(0x2D, t); /* set GPIO5 to WDT0 */
  156. t = superio_inb(cr_wdt_control);
  157. t |= 0x02; /* enable the WDTO# output low pulse
  158. * to the KBRST# pin */
  159. superio_outb(cr_wdt_control, t);
  160. break;
  161. case w83637hf:
  162. break;
  163. case w83687thf:
  164. t = superio_inb(0x2C) & ~0x80; /* PIN47 -> WDT0# */
  165. superio_outb(0x2C, t);
  166. break;
  167. case w83627ehf:
  168. case w83627uhg:
  169. case w83667hg:
  170. case w83667hg_b:
  171. case nct6775:
  172. case nct6776:
  173. case nct6779:
  174. case nct6791:
  175. case nct6792:
  176. /*
  177. * These chips have a fixed WDTO# output pin (W83627UHG),
  178. * or support more than one WDTO# output pin.
  179. * Don't touch its configuration, and hope the BIOS
  180. * does the right thing.
  181. */
  182. t = superio_inb(cr_wdt_control);
  183. t |= 0x02; /* enable the WDTO# output low pulse
  184. * to the KBRST# pin */
  185. superio_outb(cr_wdt_control, t);
  186. break;
  187. default:
  188. break;
  189. }
  190. t = superio_inb(cr_wdt_timeout);
  191. if (t != 0) {
  192. if (early_disable) {
  193. pr_warn("Stopping previously enabled watchdog until userland kicks in\n");
  194. superio_outb(cr_wdt_timeout, 0);
  195. } else {
  196. pr_info("Watchdog already running. Resetting timeout to %d sec\n",
  197. wdog->timeout);
  198. superio_outb(cr_wdt_timeout, wdog->timeout);
  199. }
  200. }
  201. /* set second mode & disable keyboard turning off watchdog */
  202. t = superio_inb(cr_wdt_control) & ~0x0C;
  203. superio_outb(cr_wdt_control, t);
  204. /* reset trigger, disable keyboard & mouse turning off watchdog */
  205. t = superio_inb(0xF7) & ~0xD0;
  206. superio_outb(0xF7, t);
  207. superio_exit();
  208. return 0;
  209. }
  210. static int wdt_set_time(unsigned int timeout)
  211. {
  212. int ret;
  213. ret = superio_enter();
  214. if (ret)
  215. return ret;
  216. superio_select(W83627HF_LD_WDT);
  217. superio_outb(cr_wdt_timeout, timeout);
  218. superio_exit();
  219. return 0;
  220. }
  221. static int wdt_start(struct watchdog_device *wdog)
  222. {
  223. return wdt_set_time(wdog->timeout);
  224. }
  225. static int wdt_stop(struct watchdog_device *wdog)
  226. {
  227. return wdt_set_time(0);
  228. }
  229. static int wdt_set_timeout(struct watchdog_device *wdog, unsigned int timeout)
  230. {
  231. wdog->timeout = timeout;
  232. return 0;
  233. }
  234. static unsigned int wdt_get_time(struct watchdog_device *wdog)
  235. {
  236. unsigned int timeleft;
  237. int ret;
  238. ret = superio_enter();
  239. if (ret)
  240. return 0;
  241. superio_select(W83627HF_LD_WDT);
  242. timeleft = superio_inb(cr_wdt_timeout);
  243. superio_exit();
  244. return timeleft;
  245. }
  246. /*
  247. * Notifier for system down
  248. */
  249. static int wdt_notify_sys(struct notifier_block *this, unsigned long code,
  250. void *unused)
  251. {
  252. if (code == SYS_DOWN || code == SYS_HALT)
  253. wdt_set_time(0); /* Turn the WDT off */
  254. return NOTIFY_DONE;
  255. }
  256. /*
  257. * Kernel Interfaces
  258. */
  259. static struct watchdog_info wdt_info = {
  260. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
  261. .identity = "W83627HF Watchdog",
  262. };
  263. static struct watchdog_ops wdt_ops = {
  264. .owner = THIS_MODULE,
  265. .start = wdt_start,
  266. .stop = wdt_stop,
  267. .set_timeout = wdt_set_timeout,
  268. .get_timeleft = wdt_get_time,
  269. };
  270. static struct watchdog_device wdt_dev = {
  271. .info = &wdt_info,
  272. .ops = &wdt_ops,
  273. .timeout = WATCHDOG_TIMEOUT,
  274. .min_timeout = 1,
  275. .max_timeout = 255,
  276. };
  277. /*
  278. * The WDT needs to learn about soft shutdowns in order to
  279. * turn the timebomb registers off.
  280. */
  281. static struct notifier_block wdt_notifier = {
  282. .notifier_call = wdt_notify_sys,
  283. };
  284. static int wdt_find(int addr)
  285. {
  286. u8 val;
  287. int ret;
  288. cr_wdt_timeout = W83627HF_WDT_TIMEOUT;
  289. cr_wdt_control = W83627HF_WDT_CONTROL;
  290. ret = superio_enter();
  291. if (ret)
  292. return ret;
  293. superio_select(W83627HF_LD_WDT);
  294. val = superio_inb(0x20);
  295. switch (val) {
  296. case W83627HF_ID:
  297. ret = w83627hf;
  298. break;
  299. case W83627S_ID:
  300. ret = w83627s;
  301. break;
  302. case W83697HF_ID:
  303. ret = w83697hf;
  304. cr_wdt_timeout = W83697HF_WDT_TIMEOUT;
  305. cr_wdt_control = W83697HF_WDT_CONTROL;
  306. break;
  307. case W83697UG_ID:
  308. ret = w83697ug;
  309. cr_wdt_timeout = W83697HF_WDT_TIMEOUT;
  310. cr_wdt_control = W83697HF_WDT_CONTROL;
  311. break;
  312. case W83637HF_ID:
  313. ret = w83637hf;
  314. break;
  315. case W83627THF_ID:
  316. ret = w83627thf;
  317. break;
  318. case W83687THF_ID:
  319. ret = w83687thf;
  320. break;
  321. case W83627EHF_ID:
  322. ret = w83627ehf;
  323. break;
  324. case W83627DHG_ID:
  325. ret = w83627dhg;
  326. break;
  327. case W83627DHG_P_ID:
  328. ret = w83627dhg_p;
  329. break;
  330. case W83627UHG_ID:
  331. ret = w83627uhg;
  332. break;
  333. case W83667HG_ID:
  334. ret = w83667hg;
  335. break;
  336. case W83667HG_B_ID:
  337. ret = w83667hg_b;
  338. break;
  339. case NCT6775_ID:
  340. ret = nct6775;
  341. break;
  342. case NCT6776_ID:
  343. ret = nct6776;
  344. break;
  345. case NCT6779_ID:
  346. ret = nct6779;
  347. break;
  348. case NCT6791_ID:
  349. ret = nct6791;
  350. break;
  351. case NCT6792_ID:
  352. ret = nct6792;
  353. break;
  354. case 0xff:
  355. ret = -ENODEV;
  356. break;
  357. default:
  358. ret = -ENODEV;
  359. pr_err("Unsupported chip ID: 0x%02x\n", val);
  360. break;
  361. }
  362. superio_exit();
  363. return ret;
  364. }
  365. static int __init wdt_init(void)
  366. {
  367. int ret;
  368. int chip;
  369. const char * const chip_name[] = {
  370. "W83627HF",
  371. "W83627S",
  372. "W83697HF",
  373. "W83697UG",
  374. "W83637HF",
  375. "W83627THF",
  376. "W83687THF",
  377. "W83627EHF",
  378. "W83627DHG",
  379. "W83627UHG",
  380. "W83667HG",
  381. "W83667DHG-P",
  382. "W83667HG-B",
  383. "NCT6775",
  384. "NCT6776",
  385. "NCT6779",
  386. "NCT6791",
  387. "NCT6792",
  388. };
  389. wdt_io = 0x2e;
  390. chip = wdt_find(0x2e);
  391. if (chip < 0) {
  392. wdt_io = 0x4e;
  393. chip = wdt_find(0x4e);
  394. if (chip < 0)
  395. return chip;
  396. }
  397. pr_info("WDT driver for %s Super I/O chip initialising\n",
  398. chip_name[chip]);
  399. watchdog_init_timeout(&wdt_dev, timeout, NULL);
  400. watchdog_set_nowayout(&wdt_dev, nowayout);
  401. ret = w83627hf_init(&wdt_dev, chip);
  402. if (ret) {
  403. pr_err("failed to initialize watchdog (err=%d)\n", ret);
  404. return ret;
  405. }
  406. ret = register_reboot_notifier(&wdt_notifier);
  407. if (ret != 0) {
  408. pr_err("cannot register reboot notifier (err=%d)\n", ret);
  409. return ret;
  410. }
  411. ret = watchdog_register_device(&wdt_dev);
  412. if (ret)
  413. goto unreg_reboot;
  414. pr_info("initialized. timeout=%d sec (nowayout=%d)\n",
  415. wdt_dev.timeout, nowayout);
  416. return ret;
  417. unreg_reboot:
  418. unregister_reboot_notifier(&wdt_notifier);
  419. return ret;
  420. }
  421. static void __exit wdt_exit(void)
  422. {
  423. watchdog_unregister_device(&wdt_dev);
  424. unregister_reboot_notifier(&wdt_notifier);
  425. }
  426. module_init(wdt_init);
  427. module_exit(wdt_exit);
  428. MODULE_LICENSE("GPL");
  429. MODULE_AUTHOR("Pádraig Brady <P@draigBrady.com>");
  430. MODULE_DESCRIPTION("w83627hf/thf WDT driver");