max8907.h 7.5 KB

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  1. /*
  2. * Functions to access MAX8907 power management chip.
  3. *
  4. * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
  5. * Copyright (C) 2012, NVIDIA CORPORATION. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #ifndef __LINUX_MFD_MAX8907_H
  12. #define __LINUX_MFD_MAX8907_H
  13. #include <linux/mutex.h>
  14. #include <linux/pm.h>
  15. #define MAX8907_GEN_I2C_ADDR (0x78 >> 1)
  16. #define MAX8907_ADC_I2C_ADDR (0x8e >> 1)
  17. #define MAX8907_RTC_I2C_ADDR (0xd0 >> 1)
  18. /* MAX8907 register map */
  19. #define MAX8907_REG_SYSENSEL 0x00
  20. #define MAX8907_REG_ON_OFF_IRQ1 0x01
  21. #define MAX8907_REG_ON_OFF_IRQ1_MASK 0x02
  22. #define MAX8907_REG_ON_OFF_STAT 0x03
  23. #define MAX8907_REG_SDCTL1 0x04
  24. #define MAX8907_REG_SDSEQCNT1 0x05
  25. #define MAX8907_REG_SDV1 0x06
  26. #define MAX8907_REG_SDCTL2 0x07
  27. #define MAX8907_REG_SDSEQCNT2 0x08
  28. #define MAX8907_REG_SDV2 0x09
  29. #define MAX8907_REG_SDCTL3 0x0A
  30. #define MAX8907_REG_SDSEQCNT3 0x0B
  31. #define MAX8907_REG_SDV3 0x0C
  32. #define MAX8907_REG_ON_OFF_IRQ2 0x0D
  33. #define MAX8907_REG_ON_OFF_IRQ2_MASK 0x0E
  34. #define MAX8907_REG_RESET_CNFG 0x0F
  35. #define MAX8907_REG_LDOCTL16 0x10
  36. #define MAX8907_REG_LDOSEQCNT16 0x11
  37. #define MAX8907_REG_LDO16VOUT 0x12
  38. #define MAX8907_REG_SDBYSEQCNT 0x13
  39. #define MAX8907_REG_LDOCTL17 0x14
  40. #define MAX8907_REG_LDOSEQCNT17 0x15
  41. #define MAX8907_REG_LDO17VOUT 0x16
  42. #define MAX8907_REG_LDOCTL1 0x18
  43. #define MAX8907_REG_LDOSEQCNT1 0x19
  44. #define MAX8907_REG_LDO1VOUT 0x1A
  45. #define MAX8907_REG_LDOCTL2 0x1C
  46. #define MAX8907_REG_LDOSEQCNT2 0x1D
  47. #define MAX8907_REG_LDO2VOUT 0x1E
  48. #define MAX8907_REG_LDOCTL3 0x20
  49. #define MAX8907_REG_LDOSEQCNT3 0x21
  50. #define MAX8907_REG_LDO3VOUT 0x22
  51. #define MAX8907_REG_LDOCTL4 0x24
  52. #define MAX8907_REG_LDOSEQCNT4 0x25
  53. #define MAX8907_REG_LDO4VOUT 0x26
  54. #define MAX8907_REG_LDOCTL5 0x28
  55. #define MAX8907_REG_LDOSEQCNT5 0x29
  56. #define MAX8907_REG_LDO5VOUT 0x2A
  57. #define MAX8907_REG_LDOCTL6 0x2C
  58. #define MAX8907_REG_LDOSEQCNT6 0x2D
  59. #define MAX8907_REG_LDO6VOUT 0x2E
  60. #define MAX8907_REG_LDOCTL7 0x30
  61. #define MAX8907_REG_LDOSEQCNT7 0x31
  62. #define MAX8907_REG_LDO7VOUT 0x32
  63. #define MAX8907_REG_LDOCTL8 0x34
  64. #define MAX8907_REG_LDOSEQCNT8 0x35
  65. #define MAX8907_REG_LDO8VOUT 0x36
  66. #define MAX8907_REG_LDOCTL9 0x38
  67. #define MAX8907_REG_LDOSEQCNT9 0x39
  68. #define MAX8907_REG_LDO9VOUT 0x3A
  69. #define MAX8907_REG_LDOCTL10 0x3C
  70. #define MAX8907_REG_LDOSEQCNT10 0x3D
  71. #define MAX8907_REG_LDO10VOUT 0x3E
  72. #define MAX8907_REG_LDOCTL11 0x40
  73. #define MAX8907_REG_LDOSEQCNT11 0x41
  74. #define MAX8907_REG_LDO11VOUT 0x42
  75. #define MAX8907_REG_LDOCTL12 0x44
  76. #define MAX8907_REG_LDOSEQCNT12 0x45
  77. #define MAX8907_REG_LDO12VOUT 0x46
  78. #define MAX8907_REG_LDOCTL13 0x48
  79. #define MAX8907_REG_LDOSEQCNT13 0x49
  80. #define MAX8907_REG_LDO13VOUT 0x4A
  81. #define MAX8907_REG_LDOCTL14 0x4C
  82. #define MAX8907_REG_LDOSEQCNT14 0x4D
  83. #define MAX8907_REG_LDO14VOUT 0x4E
  84. #define MAX8907_REG_LDOCTL15 0x50
  85. #define MAX8907_REG_LDOSEQCNT15 0x51
  86. #define MAX8907_REG_LDO15VOUT 0x52
  87. #define MAX8907_REG_OUT5VEN 0x54
  88. #define MAX8907_REG_OUT5VSEQ 0x55
  89. #define MAX8907_REG_OUT33VEN 0x58
  90. #define MAX8907_REG_OUT33VSEQ 0x59
  91. #define MAX8907_REG_LDOCTL19 0x5C
  92. #define MAX8907_REG_LDOSEQCNT19 0x5D
  93. #define MAX8907_REG_LDO19VOUT 0x5E
  94. #define MAX8907_REG_LBCNFG 0x60
  95. #define MAX8907_REG_SEQ1CNFG 0x64
  96. #define MAX8907_REG_SEQ2CNFG 0x65
  97. #define MAX8907_REG_SEQ3CNFG 0x66
  98. #define MAX8907_REG_SEQ4CNFG 0x67
  99. #define MAX8907_REG_SEQ5CNFG 0x68
  100. #define MAX8907_REG_SEQ6CNFG 0x69
  101. #define MAX8907_REG_SEQ7CNFG 0x6A
  102. #define MAX8907_REG_LDOCTL18 0x72
  103. #define MAX8907_REG_LDOSEQCNT18 0x73
  104. #define MAX8907_REG_LDO18VOUT 0x74
  105. #define MAX8907_REG_BBAT_CNFG 0x78
  106. #define MAX8907_REG_CHG_CNTL1 0x7C
  107. #define MAX8907_REG_CHG_CNTL2 0x7D
  108. #define MAX8907_REG_CHG_IRQ1 0x7E
  109. #define MAX8907_REG_CHG_IRQ2 0x7F
  110. #define MAX8907_REG_CHG_IRQ1_MASK 0x80
  111. #define MAX8907_REG_CHG_IRQ2_MASK 0x81
  112. #define MAX8907_REG_CHG_STAT 0x82
  113. #define MAX8907_REG_WLED_MODE_CNTL 0x84
  114. #define MAX8907_REG_ILED_CNTL 0x84
  115. #define MAX8907_REG_II1RR 0x8E
  116. #define MAX8907_REG_II2RR 0x8F
  117. #define MAX8907_REG_LDOCTL20 0x9C
  118. #define MAX8907_REG_LDOSEQCNT20 0x9D
  119. #define MAX8907_REG_LDO20VOUT 0x9E
  120. /* RTC register map */
  121. #define MAX8907_REG_RTC_SEC 0x00
  122. #define MAX8907_REG_RTC_MIN 0x01
  123. #define MAX8907_REG_RTC_HOURS 0x02
  124. #define MAX8907_REG_RTC_WEEKDAY 0x03
  125. #define MAX8907_REG_RTC_DATE 0x04
  126. #define MAX8907_REG_RTC_MONTH 0x05
  127. #define MAX8907_REG_RTC_YEAR1 0x06
  128. #define MAX8907_REG_RTC_YEAR2 0x07
  129. #define MAX8907_REG_ALARM0_SEC 0x08
  130. #define MAX8907_REG_ALARM0_MIN 0x09
  131. #define MAX8907_REG_ALARM0_HOURS 0x0A
  132. #define MAX8907_REG_ALARM0_WEEKDAY 0x0B
  133. #define MAX8907_REG_ALARM0_DATE 0x0C
  134. #define MAX8907_REG_ALARM0_MONTH 0x0D
  135. #define MAX8907_REG_ALARM0_YEAR1 0x0E
  136. #define MAX8907_REG_ALARM0_YEAR2 0x0F
  137. #define MAX8907_REG_ALARM1_SEC 0x10
  138. #define MAX8907_REG_ALARM1_MIN 0x11
  139. #define MAX8907_REG_ALARM1_HOURS 0x12
  140. #define MAX8907_REG_ALARM1_WEEKDAY 0x13
  141. #define MAX8907_REG_ALARM1_DATE 0x14
  142. #define MAX8907_REG_ALARM1_MONTH 0x15
  143. #define MAX8907_REG_ALARM1_YEAR1 0x16
  144. #define MAX8907_REG_ALARM1_YEAR2 0x17
  145. #define MAX8907_REG_ALARM0_CNTL 0x18
  146. #define MAX8907_REG_ALARM1_CNTL 0x19
  147. #define MAX8907_REG_RTC_STATUS 0x1A
  148. #define MAX8907_REG_RTC_CNTL 0x1B
  149. #define MAX8907_REG_RTC_IRQ 0x1C
  150. #define MAX8907_REG_RTC_IRQ_MASK 0x1D
  151. #define MAX8907_REG_MPL_CNTL 0x1E
  152. /* ADC and Touch Screen Controller register map */
  153. #define MAX8907_CTL 0
  154. #define MAX8907_SEQCNT 1
  155. #define MAX8907_VOUT 2
  156. /* mask bit fields */
  157. #define MAX8907_MASK_LDO_SEQ 0x1C
  158. #define MAX8907_MASK_LDO_EN 0x01
  159. #define MAX8907_MASK_VBBATTCV 0x03
  160. #define MAX8907_MASK_OUT5V_VINEN 0x10
  161. #define MAX8907_MASK_OUT5V_ENSRC 0x0E
  162. #define MAX8907_MASK_OUT5V_EN 0x01
  163. #define MAX8907_MASK_POWER_OFF 0x40
  164. /* Regulator IDs */
  165. #define MAX8907_MBATT 0
  166. #define MAX8907_SD1 1
  167. #define MAX8907_SD2 2
  168. #define MAX8907_SD3 3
  169. #define MAX8907_LDO1 4
  170. #define MAX8907_LDO2 5
  171. #define MAX8907_LDO3 6
  172. #define MAX8907_LDO4 7
  173. #define MAX8907_LDO5 8
  174. #define MAX8907_LDO6 9
  175. #define MAX8907_LDO7 10
  176. #define MAX8907_LDO8 11
  177. #define MAX8907_LDO9 12
  178. #define MAX8907_LDO10 13
  179. #define MAX8907_LDO11 14
  180. #define MAX8907_LDO12 15
  181. #define MAX8907_LDO13 16
  182. #define MAX8907_LDO14 17
  183. #define MAX8907_LDO15 18
  184. #define MAX8907_LDO16 19
  185. #define MAX8907_LDO17 20
  186. #define MAX8907_LDO18 21
  187. #define MAX8907_LDO19 22
  188. #define MAX8907_LDO20 23
  189. #define MAX8907_OUT5V 24
  190. #define MAX8907_OUT33V 25
  191. #define MAX8907_BBAT 26
  192. #define MAX8907_SDBY 27
  193. #define MAX8907_VRTC 28
  194. #define MAX8907_NUM_REGULATORS (MAX8907_VRTC + 1)
  195. /* IRQ definitions */
  196. enum {
  197. MAX8907_IRQ_VCHG_DC_OVP = 0,
  198. MAX8907_IRQ_VCHG_DC_F,
  199. MAX8907_IRQ_VCHG_DC_R,
  200. MAX8907_IRQ_VCHG_THM_OK_R,
  201. MAX8907_IRQ_VCHG_THM_OK_F,
  202. MAX8907_IRQ_VCHG_MBATTLOW_F,
  203. MAX8907_IRQ_VCHG_MBATTLOW_R,
  204. MAX8907_IRQ_VCHG_RST,
  205. MAX8907_IRQ_VCHG_DONE,
  206. MAX8907_IRQ_VCHG_TOPOFF,
  207. MAX8907_IRQ_VCHG_TMR_FAULT,
  208. MAX8907_IRQ_GPM_RSTIN = 0,
  209. MAX8907_IRQ_GPM_MPL,
  210. MAX8907_IRQ_GPM_SW_3SEC,
  211. MAX8907_IRQ_GPM_EXTON_F,
  212. MAX8907_IRQ_GPM_EXTON_R,
  213. MAX8907_IRQ_GPM_SW_1SEC,
  214. MAX8907_IRQ_GPM_SW_F,
  215. MAX8907_IRQ_GPM_SW_R,
  216. MAX8907_IRQ_GPM_SYSCKEN_F,
  217. MAX8907_IRQ_GPM_SYSCKEN_R,
  218. MAX8907_IRQ_RTC_ALARM1 = 0,
  219. MAX8907_IRQ_RTC_ALARM0,
  220. };
  221. struct max8907_platform_data {
  222. struct regulator_init_data *init_data[MAX8907_NUM_REGULATORS];
  223. bool pm_off;
  224. };
  225. struct regmap_irq_chips_data;
  226. struct max8907 {
  227. struct device *dev;
  228. struct mutex irq_lock;
  229. struct i2c_client *i2c_gen;
  230. struct i2c_client *i2c_rtc;
  231. struct regmap *regmap_gen;
  232. struct regmap *regmap_rtc;
  233. struct regmap_irq_chip_data *irqc_chg;
  234. struct regmap_irq_chip_data *irqc_on_off;
  235. struct regmap_irq_chip_data *irqc_rtc;
  236. };
  237. #endif