mtd-nand-omap2.h 2.5 KB

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  1. /*
  2. * Copyright (C) 2006 Micron Technology Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #ifndef _MTD_NAND_OMAP2_H
  9. #define _MTD_NAND_OMAP2_H
  10. #include <linux/mtd/partitions.h>
  11. #define GPMC_BCH_NUM_REMAINDER 8
  12. enum nand_io {
  13. NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */
  14. NAND_OMAP_POLLED, /* polled mode, without prefetch */
  15. NAND_OMAP_PREFETCH_DMA, /* prefetch enabled sDMA mode */
  16. NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */
  17. };
  18. enum omap_ecc {
  19. /*
  20. * 1-bit ECC: calculation and correction by SW
  21. * ECC stored at end of spare area
  22. */
  23. OMAP_ECC_HAM1_CODE_SW = 0,
  24. /*
  25. * 1-bit ECC: calculation by GPMC, Error detection by Software
  26. * ECC layout compatible with ROM code layout
  27. */
  28. OMAP_ECC_HAM1_CODE_HW,
  29. /* 4-bit ECC calculation by GPMC, Error detection by Software */
  30. OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
  31. /* 4-bit ECC calculation by GPMC, Error detection by ELM */
  32. OMAP_ECC_BCH4_CODE_HW,
  33. /* 8-bit ECC calculation by GPMC, Error detection by Software */
  34. OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
  35. /* 8-bit ECC calculation by GPMC, Error detection by ELM */
  36. OMAP_ECC_BCH8_CODE_HW,
  37. /* 16-bit ECC calculation by GPMC, Error detection by ELM */
  38. OMAP_ECC_BCH16_CODE_HW,
  39. };
  40. struct gpmc_nand_regs {
  41. void __iomem *gpmc_status;
  42. void __iomem *gpmc_nand_command;
  43. void __iomem *gpmc_nand_address;
  44. void __iomem *gpmc_nand_data;
  45. void __iomem *gpmc_prefetch_config1;
  46. void __iomem *gpmc_prefetch_config2;
  47. void __iomem *gpmc_prefetch_control;
  48. void __iomem *gpmc_prefetch_status;
  49. void __iomem *gpmc_ecc_config;
  50. void __iomem *gpmc_ecc_control;
  51. void __iomem *gpmc_ecc_size_config;
  52. void __iomem *gpmc_ecc1_result;
  53. void __iomem *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER];
  54. void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
  55. void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
  56. void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
  57. void __iomem *gpmc_bch_result4[GPMC_BCH_NUM_REMAINDER];
  58. void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER];
  59. void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER];
  60. };
  61. struct omap_nand_platform_data {
  62. int cs;
  63. struct mtd_partition *parts;
  64. int nr_parts;
  65. bool dev_ready;
  66. bool flash_bbt;
  67. enum nand_io xfer_type;
  68. int devsize;
  69. enum omap_ecc ecc_opt;
  70. struct gpmc_nand_regs reg;
  71. /* for passing the partitions */
  72. struct device_node *of_node;
  73. struct device_node *elm_of_node;
  74. };
  75. #endif