ucb1400.h 4.3 KB

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  1. /*
  2. * Register definitions and functions for:
  3. * Philips UCB1400 driver
  4. *
  5. * Based on ucb1400_ts:
  6. * Author: Nicolas Pitre
  7. * Created: September 25, 2006
  8. * Copyright: MontaVista Software, Inc.
  9. *
  10. * Spliting done by: Marek Vasut <marek.vasut@gmail.com>
  11. * If something doesn't work and it worked before spliting, e-mail me,
  12. * dont bother Nicolas please ;-)
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. *
  18. * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
  19. * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has
  20. * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
  21. */
  22. #ifndef _LINUX__UCB1400_H
  23. #define _LINUX__UCB1400_H
  24. #include <sound/ac97_codec.h>
  25. #include <linux/mutex.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/gpio.h>
  28. /*
  29. * UCB1400 AC-link registers
  30. */
  31. #define UCB_IO_DATA 0x5a
  32. #define UCB_IO_DIR 0x5c
  33. #define UCB_IE_RIS 0x5e
  34. #define UCB_IE_FAL 0x60
  35. #define UCB_IE_STATUS 0x62
  36. #define UCB_IE_CLEAR 0x62
  37. #define UCB_IE_ADC (1 << 11)
  38. #define UCB_IE_TSPX (1 << 12)
  39. #define UCB_TS_CR 0x64
  40. #define UCB_TS_CR_TSMX_POW (1 << 0)
  41. #define UCB_TS_CR_TSPX_POW (1 << 1)
  42. #define UCB_TS_CR_TSMY_POW (1 << 2)
  43. #define UCB_TS_CR_TSPY_POW (1 << 3)
  44. #define UCB_TS_CR_TSMX_GND (1 << 4)
  45. #define UCB_TS_CR_TSPX_GND (1 << 5)
  46. #define UCB_TS_CR_TSMY_GND (1 << 6)
  47. #define UCB_TS_CR_TSPY_GND (1 << 7)
  48. #define UCB_TS_CR_MODE_INT (0 << 8)
  49. #define UCB_TS_CR_MODE_PRES (1 << 8)
  50. #define UCB_TS_CR_MODE_POS (2 << 8)
  51. #define UCB_TS_CR_BIAS_ENA (1 << 11)
  52. #define UCB_TS_CR_TSPX_LOW (1 << 12)
  53. #define UCB_TS_CR_TSMX_LOW (1 << 13)
  54. #define UCB_ADC_CR 0x66
  55. #define UCB_ADC_SYNC_ENA (1 << 0)
  56. #define UCB_ADC_VREFBYP_CON (1 << 1)
  57. #define UCB_ADC_INP_TSPX (0 << 2)
  58. #define UCB_ADC_INP_TSMX (1 << 2)
  59. #define UCB_ADC_INP_TSPY (2 << 2)
  60. #define UCB_ADC_INP_TSMY (3 << 2)
  61. #define UCB_ADC_INP_AD0 (4 << 2)
  62. #define UCB_ADC_INP_AD1 (5 << 2)
  63. #define UCB_ADC_INP_AD2 (6 << 2)
  64. #define UCB_ADC_INP_AD3 (7 << 2)
  65. #define UCB_ADC_EXT_REF (1 << 5)
  66. #define UCB_ADC_START (1 << 7)
  67. #define UCB_ADC_ENA (1 << 15)
  68. #define UCB_ADC_DATA 0x68
  69. #define UCB_ADC_DAT_VALID (1 << 15)
  70. #define UCB_FCSR 0x6c
  71. #define UCB_FCSR_AVE (1 << 12)
  72. #define UCB_ADC_DAT_MASK 0x3ff
  73. #define UCB_ID 0x7e
  74. #define UCB_ID_1400 0x4304
  75. struct ucb1400_gpio {
  76. struct gpio_chip gc;
  77. struct snd_ac97 *ac97;
  78. int gpio_offset;
  79. int (*gpio_setup)(struct device *dev, int ngpio);
  80. int (*gpio_teardown)(struct device *dev, int ngpio);
  81. };
  82. struct ucb1400_ts {
  83. struct input_dev *ts_idev;
  84. int id;
  85. int irq;
  86. struct snd_ac97 *ac97;
  87. wait_queue_head_t ts_wait;
  88. bool stopped;
  89. };
  90. struct ucb1400 {
  91. struct platform_device *ucb1400_ts;
  92. struct platform_device *ucb1400_gpio;
  93. };
  94. struct ucb1400_pdata {
  95. int irq;
  96. int gpio_offset;
  97. int (*gpio_setup)(struct device *dev, int ngpio);
  98. int (*gpio_teardown)(struct device *dev, int ngpio);
  99. };
  100. static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg)
  101. {
  102. return ac97->bus->ops->read(ac97, reg);
  103. }
  104. static inline void ucb1400_reg_write(struct snd_ac97 *ac97, u16 reg, u16 val)
  105. {
  106. ac97->bus->ops->write(ac97, reg, val);
  107. }
  108. static inline u16 ucb1400_gpio_get_value(struct snd_ac97 *ac97, u16 gpio)
  109. {
  110. return ucb1400_reg_read(ac97, UCB_IO_DATA) & (1 << gpio);
  111. }
  112. static inline void ucb1400_gpio_set_value(struct snd_ac97 *ac97, u16 gpio,
  113. u16 val)
  114. {
  115. ucb1400_reg_write(ac97, UCB_IO_DATA, val ?
  116. ucb1400_reg_read(ac97, UCB_IO_DATA) | (1 << gpio) :
  117. ucb1400_reg_read(ac97, UCB_IO_DATA) & ~(1 << gpio));
  118. }
  119. static inline u16 ucb1400_gpio_get_direction(struct snd_ac97 *ac97, u16 gpio)
  120. {
  121. return ucb1400_reg_read(ac97, UCB_IO_DIR) & (1 << gpio);
  122. }
  123. static inline void ucb1400_gpio_set_direction(struct snd_ac97 *ac97, u16 gpio,
  124. u16 dir)
  125. {
  126. ucb1400_reg_write(ac97, UCB_IO_DIR, dir ?
  127. ucb1400_reg_read(ac97, UCB_IO_DIR) | (1 << gpio) :
  128. ucb1400_reg_read(ac97, UCB_IO_DIR) & ~(1 << gpio));
  129. }
  130. static inline void ucb1400_adc_enable(struct snd_ac97 *ac97)
  131. {
  132. ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA);
  133. }
  134. static inline void ucb1400_adc_disable(struct snd_ac97 *ac97)
  135. {
  136. ucb1400_reg_write(ac97, UCB_ADC_CR, 0);
  137. }
  138. unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel,
  139. int adcsync);
  140. #endif