isp1362.h 1.6 KB

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  1. /*
  2. * board initialization code should put one of these into dev->platform_data
  3. * and place the isp1362 onto platform_bus.
  4. */
  5. #ifndef __LINUX_USB_ISP1362_H__
  6. #define __LINUX_USB_ISP1362_H__
  7. struct isp1362_platform_data {
  8. /* Enable internal pulldown resistors on downstream ports */
  9. unsigned sel15Kres:1;
  10. /* Clock cannot be stopped */
  11. unsigned clknotstop:1;
  12. /* On-chip overcurrent protection */
  13. unsigned oc_enable:1;
  14. /* INT output polarity */
  15. unsigned int_act_high:1;
  16. /* INT edge or level triggered */
  17. unsigned int_edge_triggered:1;
  18. /* DREQ output polarity */
  19. unsigned dreq_act_high:1;
  20. /* DACK input polarity */
  21. unsigned dack_act_high:1;
  22. /* chip can be resumed via H_WAKEUP pin */
  23. unsigned remote_wakeup_connected:1;
  24. /* Switch or not to switch (keep always powered) */
  25. unsigned no_power_switching:1;
  26. /* Ganged port power switching (0) or individual port power switching (1) */
  27. unsigned power_switching_mode:1;
  28. /* Given port_power, msec/2 after power on till power good */
  29. u8 potpg;
  30. /* Hardware reset set/clear */
  31. void (*reset) (struct device *dev, int set);
  32. /* Clock start/stop */
  33. void (*clock) (struct device *dev, int start);
  34. /* Inter-io delay (ns). The chip is picky about access timings; it
  35. * expects at least:
  36. * 110ns delay between consecutive accesses to DATA_REG,
  37. * 300ns delay between access to ADDR_REG and DATA_REG (registers)
  38. * 462ns delay between access to ADDR_REG and DATA_REG (buffer memory)
  39. * WE MUST NOT be activated during these intervals (even without CS!)
  40. */
  41. void (*delay) (struct device *dev, unsigned int delay);
  42. };
  43. #endif