vpbe_osd.h 10 KB

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  1. /*
  2. * Copyright (C) 2007-2009 Texas Instruments Inc
  3. * Copyright (C) 2007 MontaVista Software, Inc.
  4. *
  5. * Andy Lowe (alowe@mvista.com), MontaVista Software
  6. * - Initial version
  7. * Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd.
  8. * - ported to sub device interface
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation version 2..
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #ifndef _OSD_H
  25. #define _OSD_H
  26. #include <media/davinci/vpbe_types.h>
  27. #define DM644X_VPBE_OSD_SUBDEV_NAME "dm644x,vpbe-osd"
  28. #define DM365_VPBE_OSD_SUBDEV_NAME "dm365,vpbe-osd"
  29. #define DM355_VPBE_OSD_SUBDEV_NAME "dm355,vpbe-osd"
  30. /**
  31. * enum osd_layer
  32. * @WIN_OSD0: On-Screen Display Window 0
  33. * @WIN_VID0: Video Window 0
  34. * @WIN_OSD1: On-Screen Display Window 1
  35. * @WIN_VID1: Video Window 1
  36. *
  37. * Description:
  38. * An enumeration of the osd display layers.
  39. */
  40. enum osd_layer {
  41. WIN_OSD0,
  42. WIN_VID0,
  43. WIN_OSD1,
  44. WIN_VID1,
  45. };
  46. /**
  47. * enum osd_win_layer
  48. * @OSDWIN_OSD0: On-Screen Display Window 0
  49. * @OSDWIN_OSD1: On-Screen Display Window 1
  50. *
  51. * Description:
  52. * An enumeration of the OSD Window layers.
  53. */
  54. enum osd_win_layer {
  55. OSDWIN_OSD0,
  56. OSDWIN_OSD1,
  57. };
  58. /**
  59. * enum osd_pix_format
  60. * @PIXFMT_1BPP: 1-bit-per-pixel bitmap
  61. * @PIXFMT_2BPP: 2-bits-per-pixel bitmap
  62. * @PIXFMT_4BPP: 4-bits-per-pixel bitmap
  63. * @PIXFMT_8BPP: 8-bits-per-pixel bitmap
  64. * @PIXFMT_RGB565: 16-bits-per-pixel RGB565
  65. * @PIXFMT_YCbCrI: YUV 4:2:2
  66. * @PIXFMT_RGB888: 24-bits-per-pixel RGB888
  67. * @PIXFMT_YCrCbI: YUV 4:2:2 with chroma swap
  68. * @PIXFMT_NV12: YUV 4:2:0 planar
  69. * @PIXFMT_OSD_ATTR: OSD Attribute Window pixel format (4bpp)
  70. *
  71. * Description:
  72. * An enumeration of the DaVinci pixel formats.
  73. */
  74. enum osd_pix_format {
  75. PIXFMT_1BPP = 0,
  76. PIXFMT_2BPP,
  77. PIXFMT_4BPP,
  78. PIXFMT_8BPP,
  79. PIXFMT_RGB565,
  80. PIXFMT_YCBCRI,
  81. PIXFMT_RGB888,
  82. PIXFMT_YCRCBI,
  83. PIXFMT_NV12,
  84. PIXFMT_OSD_ATTR,
  85. };
  86. /**
  87. * enum osd_h_exp_ratio
  88. * @H_EXP_OFF: no expansion (1/1)
  89. * @H_EXP_9_OVER_8: 9/8 expansion ratio
  90. * @H_EXP_3_OVER_2: 3/2 expansion ratio
  91. *
  92. * Description:
  93. * An enumeration of the available horizontal expansion ratios.
  94. */
  95. enum osd_h_exp_ratio {
  96. H_EXP_OFF,
  97. H_EXP_9_OVER_8,
  98. H_EXP_3_OVER_2,
  99. };
  100. /**
  101. * enum osd_v_exp_ratio
  102. * @V_EXP_OFF: no expansion (1/1)
  103. * @V_EXP_6_OVER_5: 6/5 expansion ratio
  104. *
  105. * Description:
  106. * An enumeration of the available vertical expansion ratios.
  107. */
  108. enum osd_v_exp_ratio {
  109. V_EXP_OFF,
  110. V_EXP_6_OVER_5,
  111. };
  112. /**
  113. * enum osd_zoom_factor
  114. * @ZOOM_X1: no zoom (x1)
  115. * @ZOOM_X2: x2 zoom
  116. * @ZOOM_X4: x4 zoom
  117. *
  118. * Description:
  119. * An enumeration of the available zoom factors.
  120. */
  121. enum osd_zoom_factor {
  122. ZOOM_X1,
  123. ZOOM_X2,
  124. ZOOM_X4,
  125. };
  126. /**
  127. * enum osd_clut
  128. * @ROM_CLUT: ROM CLUT
  129. * @RAM_CLUT: RAM CLUT
  130. *
  131. * Description:
  132. * An enumeration of the available Color Lookup Tables (CLUTs).
  133. */
  134. enum osd_clut {
  135. ROM_CLUT,
  136. RAM_CLUT,
  137. };
  138. /**
  139. * enum osd_rom_clut
  140. * @ROM_CLUT0: Macintosh CLUT
  141. * @ROM_CLUT1: CLUT from DM270 and prior devices
  142. *
  143. * Description:
  144. * An enumeration of the ROM Color Lookup Table (CLUT) options.
  145. */
  146. enum osd_rom_clut {
  147. ROM_CLUT0,
  148. ROM_CLUT1,
  149. };
  150. /**
  151. * enum osd_blending_factor
  152. * @OSD_0_VID_8: OSD pixels are fully transparent
  153. * @OSD_1_VID_7: OSD pixels contribute 1/8, video pixels contribute 7/8
  154. * @OSD_2_VID_6: OSD pixels contribute 2/8, video pixels contribute 6/8
  155. * @OSD_3_VID_5: OSD pixels contribute 3/8, video pixels contribute 5/8
  156. * @OSD_4_VID_4: OSD pixels contribute 4/8, video pixels contribute 4/8
  157. * @OSD_5_VID_3: OSD pixels contribute 5/8, video pixels contribute 3/8
  158. * @OSD_6_VID_2: OSD pixels contribute 6/8, video pixels contribute 2/8
  159. * @OSD_8_VID_0: OSD pixels are fully opaque
  160. *
  161. * Description:
  162. * An enumeration of the DaVinci pixel blending factor options.
  163. */
  164. enum osd_blending_factor {
  165. OSD_0_VID_8,
  166. OSD_1_VID_7,
  167. OSD_2_VID_6,
  168. OSD_3_VID_5,
  169. OSD_4_VID_4,
  170. OSD_5_VID_3,
  171. OSD_6_VID_2,
  172. OSD_8_VID_0,
  173. };
  174. /**
  175. * enum osd_blink_interval
  176. * @BLINK_X1: blink interval is 1 vertical refresh cycle
  177. * @BLINK_X2: blink interval is 2 vertical refresh cycles
  178. * @BLINK_X3: blink interval is 3 vertical refresh cycles
  179. * @BLINK_X4: blink interval is 4 vertical refresh cycles
  180. *
  181. * Description:
  182. * An enumeration of the DaVinci pixel blinking interval options.
  183. */
  184. enum osd_blink_interval {
  185. BLINK_X1,
  186. BLINK_X2,
  187. BLINK_X3,
  188. BLINK_X4,
  189. };
  190. /**
  191. * enum osd_cursor_h_width
  192. * @H_WIDTH_1: horizontal line width is 1 pixel
  193. * @H_WIDTH_4: horizontal line width is 4 pixels
  194. * @H_WIDTH_8: horizontal line width is 8 pixels
  195. * @H_WIDTH_12: horizontal line width is 12 pixels
  196. * @H_WIDTH_16: horizontal line width is 16 pixels
  197. * @H_WIDTH_20: horizontal line width is 20 pixels
  198. * @H_WIDTH_24: horizontal line width is 24 pixels
  199. * @H_WIDTH_28: horizontal line width is 28 pixels
  200. */
  201. enum osd_cursor_h_width {
  202. H_WIDTH_1,
  203. H_WIDTH_4,
  204. H_WIDTH_8,
  205. H_WIDTH_12,
  206. H_WIDTH_16,
  207. H_WIDTH_20,
  208. H_WIDTH_24,
  209. H_WIDTH_28,
  210. };
  211. /**
  212. * enum davinci_cursor_v_width
  213. * @V_WIDTH_1: vertical line width is 1 line
  214. * @V_WIDTH_2: vertical line width is 2 lines
  215. * @V_WIDTH_4: vertical line width is 4 lines
  216. * @V_WIDTH_6: vertical line width is 6 lines
  217. * @V_WIDTH_8: vertical line width is 8 lines
  218. * @V_WIDTH_10: vertical line width is 10 lines
  219. * @V_WIDTH_12: vertical line width is 12 lines
  220. * @V_WIDTH_14: vertical line width is 14 lines
  221. */
  222. enum osd_cursor_v_width {
  223. V_WIDTH_1,
  224. V_WIDTH_2,
  225. V_WIDTH_4,
  226. V_WIDTH_6,
  227. V_WIDTH_8,
  228. V_WIDTH_10,
  229. V_WIDTH_12,
  230. V_WIDTH_14,
  231. };
  232. /**
  233. * struct osd_cursor_config
  234. * @xsize: horizontal size in pixels
  235. * @ysize: vertical size in lines
  236. * @xpos: horizontal offset in pixels from the left edge of the display
  237. * @ypos: vertical offset in lines from the top of the display
  238. * @interlaced: Non-zero if the display is interlaced, or zero otherwise
  239. * @h_width: horizontal line width
  240. * @v_width: vertical line width
  241. * @clut: the CLUT selector (ROM or RAM) for the cursor color
  242. * @clut_index: an index into the CLUT for the cursor color
  243. *
  244. * Description:
  245. * A structure describing the configuration parameters of the hardware
  246. * rectangular cursor.
  247. */
  248. struct osd_cursor_config {
  249. unsigned xsize;
  250. unsigned ysize;
  251. unsigned xpos;
  252. unsigned ypos;
  253. int interlaced;
  254. enum osd_cursor_h_width h_width;
  255. enum osd_cursor_v_width v_width;
  256. enum osd_clut clut;
  257. unsigned char clut_index;
  258. };
  259. /**
  260. * struct osd_layer_config
  261. * @pixfmt: pixel format
  262. * @line_length: offset in bytes between start of each line in memory
  263. * @xsize: number of horizontal pixels displayed per line
  264. * @ysize: number of lines displayed
  265. * @xpos: horizontal offset in pixels from the left edge of the display
  266. * @ypos: vertical offset in lines from the top of the display
  267. * @interlaced: Non-zero if the display is interlaced, or zero otherwise
  268. *
  269. * Description:
  270. * A structure describing the configuration parameters of an On-Screen Display
  271. * (OSD) or video layer related to how the image is stored in memory.
  272. * @line_length must be a multiple of the cache line size (32 bytes).
  273. */
  274. struct osd_layer_config {
  275. enum osd_pix_format pixfmt;
  276. unsigned line_length;
  277. unsigned xsize;
  278. unsigned ysize;
  279. unsigned xpos;
  280. unsigned ypos;
  281. int interlaced;
  282. };
  283. /* parameters that apply on a per-window (OSD or video) basis */
  284. struct osd_window_state {
  285. int is_allocated;
  286. int is_enabled;
  287. unsigned long fb_base_phys;
  288. enum osd_zoom_factor h_zoom;
  289. enum osd_zoom_factor v_zoom;
  290. struct osd_layer_config lconfig;
  291. };
  292. /* parameters that apply on a per-OSD-window basis */
  293. struct osd_osdwin_state {
  294. enum osd_clut clut;
  295. enum osd_blending_factor blend;
  296. int colorkey_blending;
  297. unsigned colorkey;
  298. int rec601_attenuation;
  299. /* index is pixel value */
  300. unsigned char palette_map[16];
  301. };
  302. /* hardware rectangular cursor parameters */
  303. struct osd_cursor_state {
  304. int is_enabled;
  305. struct osd_cursor_config config;
  306. };
  307. struct osd_state;
  308. struct vpbe_osd_ops {
  309. int (*initialize)(struct osd_state *sd);
  310. int (*request_layer)(struct osd_state *sd, enum osd_layer layer);
  311. void (*release_layer)(struct osd_state *sd, enum osd_layer layer);
  312. int (*enable_layer)(struct osd_state *sd, enum osd_layer layer,
  313. int otherwin);
  314. void (*disable_layer)(struct osd_state *sd, enum osd_layer layer);
  315. int (*set_layer_config)(struct osd_state *sd, enum osd_layer layer,
  316. struct osd_layer_config *lconfig);
  317. void (*get_layer_config)(struct osd_state *sd, enum osd_layer layer,
  318. struct osd_layer_config *lconfig);
  319. void (*start_layer)(struct osd_state *sd, enum osd_layer layer,
  320. unsigned long fb_base_phys,
  321. unsigned long cbcr_ofst);
  322. void (*set_left_margin)(struct osd_state *sd, u32 val);
  323. void (*set_top_margin)(struct osd_state *sd, u32 val);
  324. void (*set_interpolation_filter)(struct osd_state *sd, int filter);
  325. int (*set_vid_expansion)(struct osd_state *sd,
  326. enum osd_h_exp_ratio h_exp,
  327. enum osd_v_exp_ratio v_exp);
  328. void (*get_vid_expansion)(struct osd_state *sd,
  329. enum osd_h_exp_ratio *h_exp,
  330. enum osd_v_exp_ratio *v_exp);
  331. void (*set_zoom)(struct osd_state *sd, enum osd_layer layer,
  332. enum osd_zoom_factor h_zoom,
  333. enum osd_zoom_factor v_zoom);
  334. };
  335. struct osd_state {
  336. enum vpbe_version vpbe_type;
  337. spinlock_t lock;
  338. struct device *dev;
  339. dma_addr_t osd_base_phys;
  340. void __iomem *osd_base;
  341. unsigned long osd_size;
  342. /* 1-->the isr will toggle the VID0 ping-pong buffer */
  343. int pingpong;
  344. int interpolation_filter;
  345. int field_inversion;
  346. enum osd_h_exp_ratio osd_h_exp;
  347. enum osd_v_exp_ratio osd_v_exp;
  348. enum osd_h_exp_ratio vid_h_exp;
  349. enum osd_v_exp_ratio vid_v_exp;
  350. enum osd_clut backg_clut;
  351. unsigned backg_clut_index;
  352. enum osd_rom_clut rom_clut;
  353. int is_blinking;
  354. /* attribute window blinking enabled */
  355. enum osd_blink_interval blink;
  356. /* YCbCrI or YCrCbI */
  357. enum osd_pix_format yc_pixfmt;
  358. /* columns are Y, Cb, Cr */
  359. unsigned char clut_ram[256][3];
  360. struct osd_cursor_state cursor;
  361. /* OSD0, VID0, OSD1, VID1 */
  362. struct osd_window_state win[4];
  363. /* OSD0, OSD1 */
  364. struct osd_osdwin_state osdwin[2];
  365. /* OSD device Operations */
  366. struct vpbe_osd_ops ops;
  367. };
  368. struct osd_platform_data {
  369. int field_inv_wa_enable;
  370. };
  371. #endif