vx_core.h 15 KB

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  1. /*
  2. * Driver for Digigram VX soundcards
  3. *
  4. * Hardware core part
  5. *
  6. * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #ifndef __SOUND_VX_COMMON_H
  23. #define __SOUND_VX_COMMON_H
  24. #include <sound/pcm.h>
  25. #include <sound/hwdep.h>
  26. #include <linux/interrupt.h>
  27. struct firmware;
  28. struct device;
  29. #define VX_DRIVER_VERSION 0x010000 /* 1.0.0 */
  30. /*
  31. */
  32. #define SIZE_MAX_CMD 0x10
  33. #define SIZE_MAX_STATUS 0x10
  34. struct vx_rmh {
  35. u16 LgCmd; /* length of the command to send (WORDs) */
  36. u16 LgStat; /* length of the status received (WORDs) */
  37. u32 Cmd[SIZE_MAX_CMD];
  38. u32 Stat[SIZE_MAX_STATUS];
  39. u16 DspStat; /* status type, RMP_SSIZE_XXX */
  40. };
  41. typedef u64 pcx_time_t;
  42. #define VX_MAX_PIPES 16
  43. #define VX_MAX_PERIODS 32
  44. #define VX_MAX_CODECS 2
  45. struct vx_ibl_info {
  46. int size; /* the current IBL size (0 = query) in bytes */
  47. int max_size; /* max. IBL size in bytes */
  48. int min_size; /* min. IBL size in bytes */
  49. int granularity; /* granularity */
  50. };
  51. struct vx_pipe {
  52. int number;
  53. unsigned int is_capture: 1;
  54. unsigned int data_mode: 1;
  55. unsigned int running: 1;
  56. unsigned int prepared: 1;
  57. int channels;
  58. unsigned int differed_type;
  59. pcx_time_t pcx_time;
  60. struct snd_pcm_substream *substream;
  61. int hbuf_size; /* H-buffer size in bytes */
  62. int buffer_bytes; /* the ALSA pcm buffer size in bytes */
  63. int period_bytes; /* the ALSA pcm period size in bytes */
  64. int hw_ptr; /* the current hardware pointer in bytes */
  65. int position; /* the current position in frames (playback only) */
  66. int transferred; /* the transferred size (per period) in frames */
  67. int align; /* size of alignment */
  68. u64 cur_count; /* current sample position (for playback) */
  69. unsigned int references; /* an output pipe may be used for monitoring and/or playback */
  70. struct vx_pipe *monitoring_pipe; /* pointer to the monitoring pipe (capture pipe only)*/
  71. };
  72. struct vx_core;
  73. struct snd_vx_ops {
  74. /* low-level i/o */
  75. unsigned char (*in8)(struct vx_core *chip, int reg);
  76. unsigned int (*in32)(struct vx_core *chip, int reg);
  77. void (*out8)(struct vx_core *chip, int reg, unsigned char val);
  78. void (*out32)(struct vx_core *chip, int reg, unsigned int val);
  79. /* irq */
  80. int (*test_and_ack)(struct vx_core *chip);
  81. void (*validate_irq)(struct vx_core *chip, int enable);
  82. /* codec */
  83. void (*write_codec)(struct vx_core *chip, int codec, unsigned int data);
  84. void (*akm_write)(struct vx_core *chip, int reg, unsigned int data);
  85. void (*reset_codec)(struct vx_core *chip);
  86. void (*change_audio_source)(struct vx_core *chip, int src);
  87. void (*set_clock_source)(struct vx_core *chp, int src);
  88. /* chip init */
  89. int (*load_dsp)(struct vx_core *chip, int idx, const struct firmware *fw);
  90. void (*reset_dsp)(struct vx_core *chip);
  91. void (*reset_board)(struct vx_core *chip, int cold_reset);
  92. int (*add_controls)(struct vx_core *chip);
  93. /* pcm */
  94. void (*dma_write)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
  95. struct vx_pipe *pipe, int count);
  96. void (*dma_read)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
  97. struct vx_pipe *pipe, int count);
  98. };
  99. struct snd_vx_hardware {
  100. const char *name;
  101. int type; /* VX_TYPE_XXX */
  102. /* hardware specs */
  103. unsigned int num_codecs;
  104. unsigned int num_ins;
  105. unsigned int num_outs;
  106. unsigned int output_level_max;
  107. const unsigned int *output_level_db_scale;
  108. };
  109. /* hwdep id string */
  110. #define SND_VX_HWDEP_ID "VX Loader"
  111. /* hardware type */
  112. enum {
  113. /* VX222 PCI */
  114. VX_TYPE_BOARD, /* old VX222 PCI */
  115. VX_TYPE_V2, /* VX222 V2 PCI */
  116. VX_TYPE_MIC, /* VX222 Mic PCI */
  117. /* VX-pocket */
  118. VX_TYPE_VXPOCKET, /* VXpocket V2 */
  119. VX_TYPE_VXP440, /* VXpocket 440 */
  120. VX_TYPE_NUMS
  121. };
  122. /* chip status */
  123. enum {
  124. VX_STAT_XILINX_LOADED = (1 << 0), /* devices are registered */
  125. VX_STAT_DEVICE_INIT = (1 << 1), /* devices are registered */
  126. VX_STAT_CHIP_INIT = (1 << 2), /* all operational */
  127. VX_STAT_IN_SUSPEND = (1 << 10), /* in suspend phase */
  128. VX_STAT_IS_STALE = (1 << 15) /* device is stale */
  129. };
  130. /* min/max values for analog output for old codecs */
  131. #define VX_ANALOG_OUT_LEVEL_MAX 0xe3
  132. struct vx_core {
  133. /* ALSA stuff */
  134. struct snd_card *card;
  135. struct snd_pcm *pcm[VX_MAX_CODECS];
  136. int type; /* VX_TYPE_XXX */
  137. int irq;
  138. /* ports are defined externally */
  139. /* low-level functions */
  140. struct snd_vx_hardware *hw;
  141. struct snd_vx_ops *ops;
  142. struct mutex lock;
  143. unsigned int chip_status;
  144. unsigned int pcm_running;
  145. struct device *dev;
  146. struct snd_hwdep *hwdep;
  147. struct vx_rmh irq_rmh; /* RMH used in interrupts */
  148. unsigned int audio_info; /* see VX_AUDIO_INFO */
  149. unsigned int audio_ins;
  150. unsigned int audio_outs;
  151. struct vx_pipe **playback_pipes;
  152. struct vx_pipe **capture_pipes;
  153. /* clock and audio sources */
  154. unsigned int audio_source; /* current audio input source */
  155. unsigned int audio_source_target;
  156. unsigned int clock_mode; /* clock mode (VX_CLOCK_MODE_XXX) */
  157. unsigned int clock_source; /* current clock source (INTERNAL_QUARTZ or UER_SYNC) */
  158. unsigned int freq; /* current frequency */
  159. unsigned int freq_detected; /* detected frequency from digital in */
  160. unsigned int uer_detected; /* VX_UER_MODE_XXX */
  161. unsigned int uer_bits; /* IEC958 status bits */
  162. struct vx_ibl_info ibl; /* IBL information */
  163. /* mixer setting */
  164. int output_level[VX_MAX_CODECS][2]; /* analog output level */
  165. int audio_gain[2][4]; /* digital audio level (playback/capture) */
  166. unsigned char audio_active[4]; /* mute/unmute on digital playback */
  167. int audio_monitor[4]; /* playback hw-monitor level */
  168. unsigned char audio_monitor_active[4]; /* playback hw-monitor mute/unmute */
  169. struct mutex mixer_mutex;
  170. const struct firmware *firmware[4]; /* loaded firmware data */
  171. };
  172. /*
  173. * constructor
  174. */
  175. struct vx_core *snd_vx_create(struct snd_card *card, struct snd_vx_hardware *hw,
  176. struct snd_vx_ops *ops, int extra_size);
  177. int snd_vx_setup_firmware(struct vx_core *chip);
  178. int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *dsp);
  179. int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *dsp);
  180. int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp);
  181. void snd_vx_free_firmware(struct vx_core *chip);
  182. /*
  183. * interrupt handler; exported for pcmcia
  184. */
  185. irqreturn_t snd_vx_irq_handler(int irq, void *dev);
  186. irqreturn_t snd_vx_threaded_irq_handler(int irq, void *dev);
  187. /*
  188. * lowlevel functions
  189. */
  190. static inline int vx_test_and_ack(struct vx_core *chip)
  191. {
  192. return chip->ops->test_and_ack(chip);
  193. }
  194. static inline void vx_validate_irq(struct vx_core *chip, int enable)
  195. {
  196. chip->ops->validate_irq(chip, enable);
  197. }
  198. static inline unsigned char snd_vx_inb(struct vx_core *chip, int reg)
  199. {
  200. return chip->ops->in8(chip, reg);
  201. }
  202. static inline unsigned int snd_vx_inl(struct vx_core *chip, int reg)
  203. {
  204. return chip->ops->in32(chip, reg);
  205. }
  206. static inline void snd_vx_outb(struct vx_core *chip, int reg, unsigned char val)
  207. {
  208. chip->ops->out8(chip, reg, val);
  209. }
  210. static inline void snd_vx_outl(struct vx_core *chip, int reg, unsigned int val)
  211. {
  212. chip->ops->out32(chip, reg, val);
  213. }
  214. #define vx_inb(chip,reg) snd_vx_inb(chip, VX_##reg)
  215. #define vx_outb(chip,reg,val) snd_vx_outb(chip, VX_##reg,val)
  216. #define vx_inl(chip,reg) snd_vx_inl(chip, VX_##reg)
  217. #define vx_outl(chip,reg,val) snd_vx_outl(chip, VX_##reg,val)
  218. static inline void vx_reset_dsp(struct vx_core *chip)
  219. {
  220. chip->ops->reset_dsp(chip);
  221. }
  222. int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh);
  223. int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh);
  224. int vx_send_rih(struct vx_core *chip, int cmd);
  225. int vx_send_rih_nolock(struct vx_core *chip, int cmd);
  226. void vx_reset_codec(struct vx_core *chip, int cold_reset);
  227. /*
  228. * check the bit on the specified register
  229. * returns zero if a bit matches, or a negative error code.
  230. * exported for vxpocket driver
  231. */
  232. int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time);
  233. #define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time)
  234. #define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200)
  235. #define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL)
  236. /*
  237. * pseudo-DMA transfer
  238. */
  239. static inline void vx_pseudo_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
  240. struct vx_pipe *pipe, int count)
  241. {
  242. chip->ops->dma_write(chip, runtime, pipe, count);
  243. }
  244. static inline void vx_pseudo_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
  245. struct vx_pipe *pipe, int count)
  246. {
  247. chip->ops->dma_read(chip, runtime, pipe, count);
  248. }
  249. /* error with hardware code,
  250. * the return value is -(VX_ERR_MASK | actual-hw-error-code)
  251. */
  252. #define VX_ERR_MASK 0x1000000
  253. #define vx_get_error(err) (-(err) & ~VX_ERR_MASK)
  254. /*
  255. * pcm stuff
  256. */
  257. int snd_vx_pcm_new(struct vx_core *chip);
  258. void vx_pcm_update_intr(struct vx_core *chip, unsigned int events);
  259. /*
  260. * mixer stuff
  261. */
  262. int snd_vx_mixer_new(struct vx_core *chip);
  263. void vx_toggle_dac_mute(struct vx_core *chip, int mute);
  264. int vx_sync_audio_source(struct vx_core *chip);
  265. int vx_set_monitor_level(struct vx_core *chip, int audio, int level, int active);
  266. /*
  267. * IEC958 & clock stuff
  268. */
  269. void vx_set_iec958_status(struct vx_core *chip, unsigned int bits);
  270. int vx_set_clock(struct vx_core *chip, unsigned int freq);
  271. void vx_set_internal_clock(struct vx_core *chip, unsigned int freq);
  272. int vx_change_frequency(struct vx_core *chip);
  273. /*
  274. * PM
  275. */
  276. int snd_vx_suspend(struct vx_core *card);
  277. int snd_vx_resume(struct vx_core *card);
  278. /*
  279. * hardware constants
  280. */
  281. #define vx_has_new_dsp(chip) ((chip)->type != VX_TYPE_BOARD)
  282. #define vx_is_pcmcia(chip) ((chip)->type >= VX_TYPE_VXPOCKET)
  283. /* audio input source */
  284. enum {
  285. VX_AUDIO_SRC_DIGITAL,
  286. VX_AUDIO_SRC_LINE,
  287. VX_AUDIO_SRC_MIC
  288. };
  289. /* clock source */
  290. enum {
  291. INTERNAL_QUARTZ,
  292. UER_SYNC
  293. };
  294. /* clock mode */
  295. enum {
  296. VX_CLOCK_MODE_AUTO, /* depending on the current audio source */
  297. VX_CLOCK_MODE_INTERNAL, /* fixed to internal quartz */
  298. VX_CLOCK_MODE_EXTERNAL /* fixed to UER sync */
  299. };
  300. /* SPDIF/UER type */
  301. enum {
  302. VX_UER_MODE_CONSUMER,
  303. VX_UER_MODE_PROFESSIONAL,
  304. VX_UER_MODE_NOT_PRESENT,
  305. };
  306. /* register indices */
  307. enum {
  308. VX_ICR,
  309. VX_CVR,
  310. VX_ISR,
  311. VX_IVR,
  312. VX_RXH,
  313. VX_TXH = VX_RXH,
  314. VX_RXM,
  315. VX_TXM = VX_RXM,
  316. VX_RXL,
  317. VX_TXL = VX_RXL,
  318. VX_DMA,
  319. VX_CDSP,
  320. VX_RFREQ,
  321. VX_RUER_V2,
  322. VX_GAIN,
  323. VX_DATA = VX_GAIN,
  324. VX_MEMIRQ,
  325. VX_ACQ,
  326. VX_BIT0,
  327. VX_BIT1,
  328. VX_MIC0,
  329. VX_MIC1,
  330. VX_MIC2,
  331. VX_MIC3,
  332. VX_PLX0,
  333. VX_PLX1,
  334. VX_PLX2,
  335. VX_LOFREQ, // V2: ACQ, VP: RFREQ
  336. VX_HIFREQ, // V2: BIT0, VP: RUER_V2
  337. VX_CSUER, // V2: BIT1, VP: BIT0
  338. VX_RUER, // V2: RUER_V2, VP: BIT1
  339. VX_REG_MAX,
  340. /* aliases for VX board */
  341. VX_RESET_DMA = VX_ISR,
  342. VX_CFG = VX_RFREQ,
  343. VX_STATUS = VX_MEMIRQ,
  344. VX_SELMIC = VX_MIC0,
  345. VX_COMPOT = VX_MIC1,
  346. VX_SCOMPR = VX_MIC2,
  347. VX_GLIMIT = VX_MIC3,
  348. VX_INTCSR = VX_PLX0,
  349. VX_CNTRL = VX_PLX1,
  350. VX_GPIOC = VX_PLX2,
  351. /* aliases for VXPOCKET board */
  352. VX_MICRO = VX_MEMIRQ,
  353. VX_CODEC2 = VX_MEMIRQ,
  354. VX_DIALOG = VX_ACQ,
  355. };
  356. /* RMH status type */
  357. enum {
  358. RMH_SSIZE_FIXED = 0, /* status size given by the driver (in LgStat) */
  359. RMH_SSIZE_ARG = 1, /* status size given in the LSB byte */
  360. RMH_SSIZE_MASK = 2, /* status size given in bitmask */
  361. };
  362. /* bits for ICR register */
  363. #define ICR_HF1 0x10
  364. #define ICR_HF0 0x08
  365. #define ICR_TREQ 0x02 /* Interrupt mode + HREQ set on for transfer (->DSP) request */
  366. #define ICR_RREQ 0x01 /* Interrupt mode + RREQ set on for transfer (->PC) request */
  367. /* bits for CVR register */
  368. #define CVR_HC 0x80
  369. /* bits for ISR register */
  370. #define ISR_HF3 0x10
  371. #define ISR_HF2 0x08
  372. #define ISR_CHK 0x10
  373. #define ISR_ERR 0x08
  374. #define ISR_TX_READY 0x04
  375. #define ISR_TX_EMPTY 0x02
  376. #define ISR_RX_FULL 0x01
  377. /* Constants used to access the DATA register */
  378. #define VX_DATA_CODEC_MASK 0x80
  379. #define VX_DATA_XICOR_MASK 0x80
  380. /* Constants used to access the CSUER register (both for VX2 and VXP) */
  381. #define VX_SUER_FREQ_MASK 0x0c
  382. #define VX_SUER_FREQ_32KHz_MASK 0x0c
  383. #define VX_SUER_FREQ_44KHz_MASK 0x00
  384. #define VX_SUER_FREQ_48KHz_MASK 0x04
  385. #define VX_SUER_DATA_PRESENT_MASK 0x02
  386. #define VX_SUER_CLOCK_PRESENT_MASK 0x01
  387. #define VX_CUER_HH_BITC_SEL_MASK 0x08
  388. #define VX_CUER_MH_BITC_SEL_MASK 0x04
  389. #define VX_CUER_ML_BITC_SEL_MASK 0x02
  390. #define VX_CUER_LL_BITC_SEL_MASK 0x01
  391. #define XX_UER_CBITS_OFFSET_MASK 0x1f
  392. /* bits for audio_info */
  393. #define VX_AUDIO_INFO_REAL_TIME (1<<0) /* real-time processing available */
  394. #define VX_AUDIO_INFO_OFFLINE (1<<1) /* offline processing available */
  395. #define VX_AUDIO_INFO_MPEG1 (1<<5)
  396. #define VX_AUDIO_INFO_MPEG2 (1<<6)
  397. #define VX_AUDIO_INFO_LINEAR_8 (1<<7)
  398. #define VX_AUDIO_INFO_LINEAR_16 (1<<8)
  399. #define VX_AUDIO_INFO_LINEAR_24 (1<<9)
  400. /* DSP Interrupt Request values */
  401. #define VXP_IRQ_OFFSET 0x40 /* add 0x40 offset for vxpocket and vx222/v2 */
  402. /* call with vx_send_irq_dsp() */
  403. #define IRQ_MESS_WRITE_END 0x30
  404. #define IRQ_MESS_WRITE_NEXT 0x32
  405. #define IRQ_MESS_READ_NEXT 0x34
  406. #define IRQ_MESS_READ_END 0x36
  407. #define IRQ_MESSAGE 0x38
  408. #define IRQ_RESET_CHK 0x3A
  409. #define IRQ_CONNECT_STREAM_NEXT 0x26
  410. #define IRQ_CONNECT_STREAM_END 0x28
  411. #define IRQ_PAUSE_START_CONNECT 0x2A
  412. #define IRQ_END_CONNECTION 0x2C
  413. /* Is there async. events pending ( IT Source Test ) */
  414. #define ASYNC_EVENTS_PENDING 0x008000
  415. #define HBUFFER_EVENTS_PENDING 0x004000 // Not always accurate
  416. #define NOTIF_EVENTS_PENDING 0x002000
  417. #define TIME_CODE_EVENT_PENDING 0x001000
  418. #define FREQUENCY_CHANGE_EVENT_PENDING 0x000800
  419. #define END_OF_BUFFER_EVENTS_PENDING 0x000400
  420. #define FATAL_DSP_ERROR 0xff0000
  421. /* Stream Format Header Defines */
  422. #define HEADER_FMT_BASE 0xFED00000
  423. #define HEADER_FMT_MONO 0x000000C0
  424. #define HEADER_FMT_INTEL 0x00008000
  425. #define HEADER_FMT_16BITS 0x00002000
  426. #define HEADER_FMT_24BITS 0x00004000
  427. #define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k.*/
  428. #define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less then 32k.*/
  429. /* Constants used to access the Codec */
  430. #define XX_CODEC_SELECTOR 0x20
  431. /* codec commands */
  432. #define XX_CODEC_ADC_CONTROL_REGISTER 0x01
  433. #define XX_CODEC_DAC_CONTROL_REGISTER 0x02
  434. #define XX_CODEC_LEVEL_LEFT_REGISTER 0x03
  435. #define XX_CODEC_LEVEL_RIGHT_REGISTER 0x04
  436. #define XX_CODEC_PORT_MODE_REGISTER 0x05
  437. #define XX_CODEC_STATUS_REPORT_REGISTER 0x06
  438. #define XX_CODEC_CLOCK_CONTROL_REGISTER 0x07
  439. /*
  440. * Audio-level control values
  441. */
  442. #define CVAL_M110DB 0x000 /* -110dB */
  443. #define CVAL_M99DB 0x02C
  444. #define CVAL_M21DB 0x163
  445. #define CVAL_M18DB 0x16F
  446. #define CVAL_M10DB 0x18F
  447. #define CVAL_0DB 0x1B7
  448. #define CVAL_18DB 0x1FF /* +18dB */
  449. #define CVAL_MAX 0x1FF
  450. #define AUDIO_IO_HAS_MUTE_LEVEL 0x400000
  451. #define AUDIO_IO_HAS_MUTE_MONITORING_1 0x200000
  452. #define AUDIO_IO_HAS_MUTE_MONITORING_2 0x100000
  453. #define VALID_AUDIO_IO_DIGITAL_LEVEL 0x01
  454. #define VALID_AUDIO_IO_MONITORING_LEVEL 0x02
  455. #define VALID_AUDIO_IO_MUTE_LEVEL 0x04
  456. #define VALID_AUDIO_IO_MUTE_MONITORING_1 0x08
  457. #define VALID_AUDIO_IO_MUTE_MONITORING_2 0x10
  458. #endif /* __SOUND_VX_COMMON_H */