chip.c 27 KB

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  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include <linux/irqdomain.h>
  18. #include <trace/events/irq.h>
  19. #include "internals.h"
  20. static irqreturn_t bad_chained_irq(int irq, void *dev_id)
  21. {
  22. WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
  23. return IRQ_NONE;
  24. }
  25. /*
  26. * Chained handlers should never call action on their IRQ. This default
  27. * action will emit warning if such thing happens.
  28. */
  29. struct irqaction chained_action = {
  30. .handler = bad_chained_irq,
  31. };
  32. /**
  33. * irq_set_chip - set the irq chip for an irq
  34. * @irq: irq number
  35. * @chip: pointer to irq chip description structure
  36. */
  37. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  38. {
  39. unsigned long flags;
  40. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  41. if (!desc)
  42. return -EINVAL;
  43. if (!chip)
  44. chip = &no_irq_chip;
  45. desc->irq_data.chip = chip;
  46. irq_put_desc_unlock(desc, flags);
  47. /*
  48. * For !CONFIG_SPARSE_IRQ make the irq show up in
  49. * allocated_irqs.
  50. */
  51. irq_mark_irq(irq);
  52. return 0;
  53. }
  54. EXPORT_SYMBOL(irq_set_chip);
  55. /**
  56. * irq_set_type - set the irq trigger type for an irq
  57. * @irq: irq number
  58. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  59. */
  60. int irq_set_irq_type(unsigned int irq, unsigned int type)
  61. {
  62. unsigned long flags;
  63. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  64. int ret = 0;
  65. if (!desc)
  66. return -EINVAL;
  67. type &= IRQ_TYPE_SENSE_MASK;
  68. ret = __irq_set_trigger(desc, type);
  69. irq_put_desc_busunlock(desc, flags);
  70. return ret;
  71. }
  72. EXPORT_SYMBOL(irq_set_irq_type);
  73. /**
  74. * irq_set_handler_data - set irq handler data for an irq
  75. * @irq: Interrupt number
  76. * @data: Pointer to interrupt specific data
  77. *
  78. * Set the hardware irq controller data for an irq
  79. */
  80. int irq_set_handler_data(unsigned int irq, void *data)
  81. {
  82. unsigned long flags;
  83. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  84. if (!desc)
  85. return -EINVAL;
  86. desc->irq_common_data.handler_data = data;
  87. irq_put_desc_unlock(desc, flags);
  88. return 0;
  89. }
  90. EXPORT_SYMBOL(irq_set_handler_data);
  91. /**
  92. * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
  93. * @irq_base: Interrupt number base
  94. * @irq_offset: Interrupt number offset
  95. * @entry: Pointer to MSI descriptor data
  96. *
  97. * Set the MSI descriptor entry for an irq at offset
  98. */
  99. int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
  100. struct msi_desc *entry)
  101. {
  102. unsigned long flags;
  103. struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
  104. if (!desc)
  105. return -EINVAL;
  106. desc->irq_common_data.msi_desc = entry;
  107. if (entry && !irq_offset)
  108. entry->irq = irq_base;
  109. irq_put_desc_unlock(desc, flags);
  110. return 0;
  111. }
  112. /**
  113. * irq_set_msi_desc - set MSI descriptor data for an irq
  114. * @irq: Interrupt number
  115. * @entry: Pointer to MSI descriptor data
  116. *
  117. * Set the MSI descriptor entry for an irq
  118. */
  119. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  120. {
  121. return irq_set_msi_desc_off(irq, 0, entry);
  122. }
  123. /**
  124. * irq_set_chip_data - set irq chip data for an irq
  125. * @irq: Interrupt number
  126. * @data: Pointer to chip specific data
  127. *
  128. * Set the hardware irq chip data for an irq
  129. */
  130. int irq_set_chip_data(unsigned int irq, void *data)
  131. {
  132. unsigned long flags;
  133. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  134. if (!desc)
  135. return -EINVAL;
  136. desc->irq_data.chip_data = data;
  137. irq_put_desc_unlock(desc, flags);
  138. return 0;
  139. }
  140. EXPORT_SYMBOL(irq_set_chip_data);
  141. struct irq_data *irq_get_irq_data(unsigned int irq)
  142. {
  143. struct irq_desc *desc = irq_to_desc(irq);
  144. return desc ? &desc->irq_data : NULL;
  145. }
  146. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  147. static void irq_state_clr_disabled(struct irq_desc *desc)
  148. {
  149. irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
  150. }
  151. static void irq_state_set_disabled(struct irq_desc *desc)
  152. {
  153. irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
  154. }
  155. static void irq_state_clr_masked(struct irq_desc *desc)
  156. {
  157. irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
  158. }
  159. static void irq_state_set_masked(struct irq_desc *desc)
  160. {
  161. irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
  162. }
  163. int irq_startup(struct irq_desc *desc, bool resend)
  164. {
  165. int ret = 0;
  166. irq_state_clr_disabled(desc);
  167. desc->depth = 0;
  168. irq_domain_activate_irq(&desc->irq_data);
  169. if (desc->irq_data.chip->irq_startup) {
  170. ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  171. irq_state_clr_masked(desc);
  172. } else {
  173. irq_enable(desc);
  174. }
  175. if (resend)
  176. check_irq_resend(desc);
  177. return ret;
  178. }
  179. void irq_shutdown(struct irq_desc *desc)
  180. {
  181. irq_state_set_disabled(desc);
  182. desc->depth = 1;
  183. if (desc->irq_data.chip->irq_shutdown)
  184. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  185. else if (desc->irq_data.chip->irq_disable)
  186. desc->irq_data.chip->irq_disable(&desc->irq_data);
  187. else
  188. desc->irq_data.chip->irq_mask(&desc->irq_data);
  189. irq_domain_deactivate_irq(&desc->irq_data);
  190. irq_state_set_masked(desc);
  191. }
  192. void irq_enable(struct irq_desc *desc)
  193. {
  194. irq_state_clr_disabled(desc);
  195. if (desc->irq_data.chip->irq_enable)
  196. desc->irq_data.chip->irq_enable(&desc->irq_data);
  197. else
  198. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  199. irq_state_clr_masked(desc);
  200. }
  201. /**
  202. * irq_disable - Mark interrupt disabled
  203. * @desc: irq descriptor which should be disabled
  204. *
  205. * If the chip does not implement the irq_disable callback, we
  206. * use a lazy disable approach. That means we mark the interrupt
  207. * disabled, but leave the hardware unmasked. That's an
  208. * optimization because we avoid the hardware access for the
  209. * common case where no interrupt happens after we marked it
  210. * disabled. If an interrupt happens, then the interrupt flow
  211. * handler masks the line at the hardware level and marks it
  212. * pending.
  213. *
  214. * If the interrupt chip does not implement the irq_disable callback,
  215. * a driver can disable the lazy approach for a particular irq line by
  216. * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
  217. * be used for devices which cannot disable the interrupt at the
  218. * device level under certain circumstances and have to use
  219. * disable_irq[_nosync] instead.
  220. */
  221. void irq_disable(struct irq_desc *desc)
  222. {
  223. irq_state_set_disabled(desc);
  224. if (desc->irq_data.chip->irq_disable) {
  225. desc->irq_data.chip->irq_disable(&desc->irq_data);
  226. irq_state_set_masked(desc);
  227. } else if (irq_settings_disable_unlazy(desc)) {
  228. mask_irq(desc);
  229. }
  230. }
  231. void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
  232. {
  233. if (desc->irq_data.chip->irq_enable)
  234. desc->irq_data.chip->irq_enable(&desc->irq_data);
  235. else
  236. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  237. cpumask_set_cpu(cpu, desc->percpu_enabled);
  238. }
  239. void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
  240. {
  241. if (desc->irq_data.chip->irq_disable)
  242. desc->irq_data.chip->irq_disable(&desc->irq_data);
  243. else
  244. desc->irq_data.chip->irq_mask(&desc->irq_data);
  245. cpumask_clear_cpu(cpu, desc->percpu_enabled);
  246. }
  247. static inline void mask_ack_irq(struct irq_desc *desc)
  248. {
  249. if (desc->irq_data.chip->irq_mask_ack)
  250. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  251. else {
  252. desc->irq_data.chip->irq_mask(&desc->irq_data);
  253. if (desc->irq_data.chip->irq_ack)
  254. desc->irq_data.chip->irq_ack(&desc->irq_data);
  255. }
  256. irq_state_set_masked(desc);
  257. }
  258. void mask_irq(struct irq_desc *desc)
  259. {
  260. if (desc->irq_data.chip->irq_mask) {
  261. desc->irq_data.chip->irq_mask(&desc->irq_data);
  262. irq_state_set_masked(desc);
  263. }
  264. }
  265. void unmask_irq(struct irq_desc *desc)
  266. {
  267. if (desc->irq_data.chip->irq_unmask) {
  268. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  269. irq_state_clr_masked(desc);
  270. }
  271. }
  272. void unmask_threaded_irq(struct irq_desc *desc)
  273. {
  274. struct irq_chip *chip = desc->irq_data.chip;
  275. if (chip->flags & IRQCHIP_EOI_THREADED)
  276. chip->irq_eoi(&desc->irq_data);
  277. if (chip->irq_unmask) {
  278. chip->irq_unmask(&desc->irq_data);
  279. irq_state_clr_masked(desc);
  280. }
  281. }
  282. /*
  283. * handle_nested_irq - Handle a nested irq from a irq thread
  284. * @irq: the interrupt number
  285. *
  286. * Handle interrupts which are nested into a threaded interrupt
  287. * handler. The handler function is called inside the calling
  288. * threads context.
  289. */
  290. void handle_nested_irq(unsigned int irq)
  291. {
  292. struct irq_desc *desc = irq_to_desc(irq);
  293. struct irqaction *action;
  294. irqreturn_t action_ret;
  295. might_sleep();
  296. raw_spin_lock_irq(&desc->lock);
  297. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  298. action = desc->action;
  299. if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
  300. desc->istate |= IRQS_PENDING;
  301. goto out_unlock;
  302. }
  303. kstat_incr_irqs_this_cpu(desc);
  304. irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  305. raw_spin_unlock_irq(&desc->lock);
  306. action_ret = action->thread_fn(action->irq, action->dev_id);
  307. if (!noirqdebug)
  308. note_interrupt(desc, action_ret);
  309. raw_spin_lock_irq(&desc->lock);
  310. irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
  311. out_unlock:
  312. raw_spin_unlock_irq(&desc->lock);
  313. }
  314. EXPORT_SYMBOL_GPL(handle_nested_irq);
  315. static bool irq_check_poll(struct irq_desc *desc)
  316. {
  317. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  318. return false;
  319. return irq_wait_for_poll(desc);
  320. }
  321. static bool irq_may_run(struct irq_desc *desc)
  322. {
  323. unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
  324. /*
  325. * If the interrupt is not in progress and is not an armed
  326. * wakeup interrupt, proceed.
  327. */
  328. if (!irqd_has_set(&desc->irq_data, mask))
  329. return true;
  330. /*
  331. * If the interrupt is an armed wakeup source, mark it pending
  332. * and suspended, disable it and notify the pm core about the
  333. * event.
  334. */
  335. if (irq_pm_check_wakeup(desc))
  336. return false;
  337. /*
  338. * Handle a potential concurrent poll on a different core.
  339. */
  340. return irq_check_poll(desc);
  341. }
  342. /**
  343. * handle_simple_irq - Simple and software-decoded IRQs.
  344. * @desc: the interrupt description structure for this irq
  345. *
  346. * Simple interrupts are either sent from a demultiplexing interrupt
  347. * handler or come from hardware, where no interrupt hardware control
  348. * is necessary.
  349. *
  350. * Note: The caller is expected to handle the ack, clear, mask and
  351. * unmask issues if necessary.
  352. */
  353. void handle_simple_irq(struct irq_desc *desc)
  354. {
  355. raw_spin_lock(&desc->lock);
  356. if (!irq_may_run(desc))
  357. goto out_unlock;
  358. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  359. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  360. desc->istate |= IRQS_PENDING;
  361. goto out_unlock;
  362. }
  363. kstat_incr_irqs_this_cpu(desc);
  364. handle_irq_event(desc);
  365. out_unlock:
  366. raw_spin_unlock(&desc->lock);
  367. }
  368. EXPORT_SYMBOL_GPL(handle_simple_irq);
  369. /*
  370. * Called unconditionally from handle_level_irq() and only for oneshot
  371. * interrupts from handle_fasteoi_irq()
  372. */
  373. static void cond_unmask_irq(struct irq_desc *desc)
  374. {
  375. /*
  376. * We need to unmask in the following cases:
  377. * - Standard level irq (IRQF_ONESHOT is not set)
  378. * - Oneshot irq which did not wake the thread (caused by a
  379. * spurious interrupt or a primary handler handling it
  380. * completely).
  381. */
  382. if (!irqd_irq_disabled(&desc->irq_data) &&
  383. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
  384. unmask_irq(desc);
  385. }
  386. /**
  387. * handle_level_irq - Level type irq handler
  388. * @desc: the interrupt description structure for this irq
  389. *
  390. * Level type interrupts are active as long as the hardware line has
  391. * the active level. This may require to mask the interrupt and unmask
  392. * it after the associated handler has acknowledged the device, so the
  393. * interrupt line is back to inactive.
  394. */
  395. void handle_level_irq(struct irq_desc *desc)
  396. {
  397. raw_spin_lock(&desc->lock);
  398. mask_ack_irq(desc);
  399. if (!irq_may_run(desc))
  400. goto out_unlock;
  401. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  402. /*
  403. * If its disabled or no action available
  404. * keep it masked and get out of here
  405. */
  406. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  407. desc->istate |= IRQS_PENDING;
  408. goto out_unlock;
  409. }
  410. kstat_incr_irqs_this_cpu(desc);
  411. handle_irq_event(desc);
  412. cond_unmask_irq(desc);
  413. out_unlock:
  414. raw_spin_unlock(&desc->lock);
  415. }
  416. EXPORT_SYMBOL_GPL(handle_level_irq);
  417. #ifdef CONFIG_IRQ_PREFLOW_FASTEOI
  418. static inline void preflow_handler(struct irq_desc *desc)
  419. {
  420. if (desc->preflow_handler)
  421. desc->preflow_handler(&desc->irq_data);
  422. }
  423. #else
  424. static inline void preflow_handler(struct irq_desc *desc) { }
  425. #endif
  426. static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
  427. {
  428. if (!(desc->istate & IRQS_ONESHOT)) {
  429. chip->irq_eoi(&desc->irq_data);
  430. return;
  431. }
  432. /*
  433. * We need to unmask in the following cases:
  434. * - Oneshot irq which did not wake the thread (caused by a
  435. * spurious interrupt or a primary handler handling it
  436. * completely).
  437. */
  438. if (!irqd_irq_disabled(&desc->irq_data) &&
  439. irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
  440. chip->irq_eoi(&desc->irq_data);
  441. unmask_irq(desc);
  442. } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
  443. chip->irq_eoi(&desc->irq_data);
  444. }
  445. }
  446. /**
  447. * handle_fasteoi_irq - irq handler for transparent controllers
  448. * @desc: the interrupt description structure for this irq
  449. *
  450. * Only a single callback will be issued to the chip: an ->eoi()
  451. * call when the interrupt has been serviced. This enables support
  452. * for modern forms of interrupt handlers, which handle the flow
  453. * details in hardware, transparently.
  454. */
  455. void handle_fasteoi_irq(struct irq_desc *desc)
  456. {
  457. struct irq_chip *chip = desc->irq_data.chip;
  458. raw_spin_lock(&desc->lock);
  459. if (!irq_may_run(desc))
  460. goto out;
  461. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  462. /*
  463. * If its disabled or no action available
  464. * then mask it and get out of here:
  465. */
  466. if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
  467. desc->istate |= IRQS_PENDING;
  468. mask_irq(desc);
  469. goto out;
  470. }
  471. kstat_incr_irqs_this_cpu(desc);
  472. if (desc->istate & IRQS_ONESHOT)
  473. mask_irq(desc);
  474. preflow_handler(desc);
  475. handle_irq_event(desc);
  476. cond_unmask_eoi_irq(desc, chip);
  477. raw_spin_unlock(&desc->lock);
  478. return;
  479. out:
  480. if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
  481. chip->irq_eoi(&desc->irq_data);
  482. raw_spin_unlock(&desc->lock);
  483. }
  484. EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
  485. /**
  486. * handle_edge_irq - edge type IRQ handler
  487. * @desc: the interrupt description structure for this irq
  488. *
  489. * Interrupt occures on the falling and/or rising edge of a hardware
  490. * signal. The occurrence is latched into the irq controller hardware
  491. * and must be acked in order to be reenabled. After the ack another
  492. * interrupt can happen on the same source even before the first one
  493. * is handled by the associated event handler. If this happens it
  494. * might be necessary to disable (mask) the interrupt depending on the
  495. * controller hardware. This requires to reenable the interrupt inside
  496. * of the loop which handles the interrupts which have arrived while
  497. * the handler was running. If all pending interrupts are handled, the
  498. * loop is left.
  499. */
  500. void handle_edge_irq(struct irq_desc *desc)
  501. {
  502. raw_spin_lock(&desc->lock);
  503. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  504. if (!irq_may_run(desc)) {
  505. desc->istate |= IRQS_PENDING;
  506. mask_ack_irq(desc);
  507. goto out_unlock;
  508. }
  509. /*
  510. * If its disabled or no action available then mask it and get
  511. * out of here.
  512. */
  513. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  514. desc->istate |= IRQS_PENDING;
  515. mask_ack_irq(desc);
  516. goto out_unlock;
  517. }
  518. kstat_incr_irqs_this_cpu(desc);
  519. /* Start handling the irq */
  520. desc->irq_data.chip->irq_ack(&desc->irq_data);
  521. do {
  522. if (unlikely(!desc->action)) {
  523. mask_irq(desc);
  524. goto out_unlock;
  525. }
  526. /*
  527. * When another irq arrived while we were handling
  528. * one, we could have masked the irq.
  529. * Renable it, if it was not disabled in meantime.
  530. */
  531. if (unlikely(desc->istate & IRQS_PENDING)) {
  532. if (!irqd_irq_disabled(&desc->irq_data) &&
  533. irqd_irq_masked(&desc->irq_data))
  534. unmask_irq(desc);
  535. }
  536. handle_irq_event(desc);
  537. } while ((desc->istate & IRQS_PENDING) &&
  538. !irqd_irq_disabled(&desc->irq_data));
  539. out_unlock:
  540. raw_spin_unlock(&desc->lock);
  541. }
  542. EXPORT_SYMBOL(handle_edge_irq);
  543. #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
  544. /**
  545. * handle_edge_eoi_irq - edge eoi type IRQ handler
  546. * @desc: the interrupt description structure for this irq
  547. *
  548. * Similar as the above handle_edge_irq, but using eoi and w/o the
  549. * mask/unmask logic.
  550. */
  551. void handle_edge_eoi_irq(struct irq_desc *desc)
  552. {
  553. struct irq_chip *chip = irq_desc_get_chip(desc);
  554. raw_spin_lock(&desc->lock);
  555. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  556. if (!irq_may_run(desc)) {
  557. desc->istate |= IRQS_PENDING;
  558. goto out_eoi;
  559. }
  560. /*
  561. * If its disabled or no action available then mask it and get
  562. * out of here.
  563. */
  564. if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
  565. desc->istate |= IRQS_PENDING;
  566. goto out_eoi;
  567. }
  568. kstat_incr_irqs_this_cpu(desc);
  569. do {
  570. if (unlikely(!desc->action))
  571. goto out_eoi;
  572. handle_irq_event(desc);
  573. } while ((desc->istate & IRQS_PENDING) &&
  574. !irqd_irq_disabled(&desc->irq_data));
  575. out_eoi:
  576. chip->irq_eoi(&desc->irq_data);
  577. raw_spin_unlock(&desc->lock);
  578. }
  579. #endif
  580. /**
  581. * handle_percpu_irq - Per CPU local irq handler
  582. * @desc: the interrupt description structure for this irq
  583. *
  584. * Per CPU interrupts on SMP machines without locking requirements
  585. */
  586. void handle_percpu_irq(struct irq_desc *desc)
  587. {
  588. struct irq_chip *chip = irq_desc_get_chip(desc);
  589. kstat_incr_irqs_this_cpu(desc);
  590. if (chip->irq_ack)
  591. chip->irq_ack(&desc->irq_data);
  592. handle_irq_event_percpu(desc);
  593. if (chip->irq_eoi)
  594. chip->irq_eoi(&desc->irq_data);
  595. }
  596. /**
  597. * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
  598. * @desc: the interrupt description structure for this irq
  599. *
  600. * Per CPU interrupts on SMP machines without locking requirements. Same as
  601. * handle_percpu_irq() above but with the following extras:
  602. *
  603. * action->percpu_dev_id is a pointer to percpu variables which
  604. * contain the real device id for the cpu on which this handler is
  605. * called
  606. */
  607. void handle_percpu_devid_irq(struct irq_desc *desc)
  608. {
  609. struct irq_chip *chip = irq_desc_get_chip(desc);
  610. struct irqaction *action = desc->action;
  611. void *dev_id = raw_cpu_ptr(action->percpu_dev_id);
  612. unsigned int irq = irq_desc_get_irq(desc);
  613. irqreturn_t res;
  614. kstat_incr_irqs_this_cpu(desc);
  615. if (chip->irq_ack)
  616. chip->irq_ack(&desc->irq_data);
  617. trace_irq_handler_entry(irq, action);
  618. res = action->handler(irq, dev_id);
  619. trace_irq_handler_exit(irq, action, res);
  620. if (chip->irq_eoi)
  621. chip->irq_eoi(&desc->irq_data);
  622. }
  623. void
  624. __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
  625. int is_chained, const char *name)
  626. {
  627. if (!handle) {
  628. handle = handle_bad_irq;
  629. } else {
  630. struct irq_data *irq_data = &desc->irq_data;
  631. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  632. /*
  633. * With hierarchical domains we might run into a
  634. * situation where the outermost chip is not yet set
  635. * up, but the inner chips are there. Instead of
  636. * bailing we install the handler, but obviously we
  637. * cannot enable/startup the interrupt at this point.
  638. */
  639. while (irq_data) {
  640. if (irq_data->chip != &no_irq_chip)
  641. break;
  642. /*
  643. * Bail out if the outer chip is not set up
  644. * and the interrrupt supposed to be started
  645. * right away.
  646. */
  647. if (WARN_ON(is_chained))
  648. return;
  649. /* Try the parent */
  650. irq_data = irq_data->parent_data;
  651. }
  652. #endif
  653. if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
  654. return;
  655. }
  656. /* Uninstall? */
  657. if (handle == handle_bad_irq) {
  658. if (desc->irq_data.chip != &no_irq_chip)
  659. mask_ack_irq(desc);
  660. irq_state_set_disabled(desc);
  661. if (is_chained)
  662. desc->action = NULL;
  663. desc->depth = 1;
  664. }
  665. desc->handle_irq = handle;
  666. desc->name = name;
  667. if (handle != handle_bad_irq && is_chained) {
  668. irq_settings_set_noprobe(desc);
  669. irq_settings_set_norequest(desc);
  670. irq_settings_set_nothread(desc);
  671. desc->action = &chained_action;
  672. irq_startup(desc, true);
  673. }
  674. }
  675. void
  676. __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  677. const char *name)
  678. {
  679. unsigned long flags;
  680. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  681. if (!desc)
  682. return;
  683. __irq_do_set_handler(desc, handle, is_chained, name);
  684. irq_put_desc_busunlock(desc, flags);
  685. }
  686. EXPORT_SYMBOL_GPL(__irq_set_handler);
  687. void
  688. irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
  689. void *data)
  690. {
  691. unsigned long flags;
  692. struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
  693. if (!desc)
  694. return;
  695. desc->irq_common_data.handler_data = data;
  696. __irq_do_set_handler(desc, handle, 1, NULL);
  697. irq_put_desc_busunlock(desc, flags);
  698. }
  699. EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
  700. void
  701. irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  702. irq_flow_handler_t handle, const char *name)
  703. {
  704. irq_set_chip(irq, chip);
  705. __irq_set_handler(irq, handle, 0, name);
  706. }
  707. EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
  708. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  709. {
  710. unsigned long flags;
  711. struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
  712. if (!desc)
  713. return;
  714. irq_settings_clr_and_set(desc, clr, set);
  715. irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
  716. IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
  717. if (irq_settings_has_no_balance_set(desc))
  718. irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
  719. if (irq_settings_is_per_cpu(desc))
  720. irqd_set(&desc->irq_data, IRQD_PER_CPU);
  721. if (irq_settings_can_move_pcntxt(desc))
  722. irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
  723. if (irq_settings_is_level(desc))
  724. irqd_set(&desc->irq_data, IRQD_LEVEL);
  725. irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
  726. irq_put_desc_unlock(desc, flags);
  727. }
  728. EXPORT_SYMBOL_GPL(irq_modify_status);
  729. /**
  730. * irq_cpu_online - Invoke all irq_cpu_online functions.
  731. *
  732. * Iterate through all irqs and invoke the chip.irq_cpu_online()
  733. * for each.
  734. */
  735. void irq_cpu_online(void)
  736. {
  737. struct irq_desc *desc;
  738. struct irq_chip *chip;
  739. unsigned long flags;
  740. unsigned int irq;
  741. for_each_active_irq(irq) {
  742. desc = irq_to_desc(irq);
  743. if (!desc)
  744. continue;
  745. raw_spin_lock_irqsave(&desc->lock, flags);
  746. chip = irq_data_get_irq_chip(&desc->irq_data);
  747. if (chip && chip->irq_cpu_online &&
  748. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  749. !irqd_irq_disabled(&desc->irq_data)))
  750. chip->irq_cpu_online(&desc->irq_data);
  751. raw_spin_unlock_irqrestore(&desc->lock, flags);
  752. }
  753. }
  754. /**
  755. * irq_cpu_offline - Invoke all irq_cpu_offline functions.
  756. *
  757. * Iterate through all irqs and invoke the chip.irq_cpu_offline()
  758. * for each.
  759. */
  760. void irq_cpu_offline(void)
  761. {
  762. struct irq_desc *desc;
  763. struct irq_chip *chip;
  764. unsigned long flags;
  765. unsigned int irq;
  766. for_each_active_irq(irq) {
  767. desc = irq_to_desc(irq);
  768. if (!desc)
  769. continue;
  770. raw_spin_lock_irqsave(&desc->lock, flags);
  771. chip = irq_data_get_irq_chip(&desc->irq_data);
  772. if (chip && chip->irq_cpu_offline &&
  773. (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
  774. !irqd_irq_disabled(&desc->irq_data)))
  775. chip->irq_cpu_offline(&desc->irq_data);
  776. raw_spin_unlock_irqrestore(&desc->lock, flags);
  777. }
  778. }
  779. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  780. /**
  781. * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
  782. * NULL)
  783. * @data: Pointer to interrupt specific data
  784. */
  785. void irq_chip_enable_parent(struct irq_data *data)
  786. {
  787. data = data->parent_data;
  788. if (data->chip->irq_enable)
  789. data->chip->irq_enable(data);
  790. else
  791. data->chip->irq_unmask(data);
  792. }
  793. /**
  794. * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
  795. * NULL)
  796. * @data: Pointer to interrupt specific data
  797. */
  798. void irq_chip_disable_parent(struct irq_data *data)
  799. {
  800. data = data->parent_data;
  801. if (data->chip->irq_disable)
  802. data->chip->irq_disable(data);
  803. else
  804. data->chip->irq_mask(data);
  805. }
  806. /**
  807. * irq_chip_ack_parent - Acknowledge the parent interrupt
  808. * @data: Pointer to interrupt specific data
  809. */
  810. void irq_chip_ack_parent(struct irq_data *data)
  811. {
  812. data = data->parent_data;
  813. data->chip->irq_ack(data);
  814. }
  815. /**
  816. * irq_chip_mask_parent - Mask the parent interrupt
  817. * @data: Pointer to interrupt specific data
  818. */
  819. void irq_chip_mask_parent(struct irq_data *data)
  820. {
  821. data = data->parent_data;
  822. data->chip->irq_mask(data);
  823. }
  824. /**
  825. * irq_chip_unmask_parent - Unmask the parent interrupt
  826. * @data: Pointer to interrupt specific data
  827. */
  828. void irq_chip_unmask_parent(struct irq_data *data)
  829. {
  830. data = data->parent_data;
  831. data->chip->irq_unmask(data);
  832. }
  833. /**
  834. * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
  835. * @data: Pointer to interrupt specific data
  836. */
  837. void irq_chip_eoi_parent(struct irq_data *data)
  838. {
  839. data = data->parent_data;
  840. data->chip->irq_eoi(data);
  841. }
  842. /**
  843. * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
  844. * @data: Pointer to interrupt specific data
  845. * @dest: The affinity mask to set
  846. * @force: Flag to enforce setting (disable online checks)
  847. *
  848. * Conditinal, as the underlying parent chip might not implement it.
  849. */
  850. int irq_chip_set_affinity_parent(struct irq_data *data,
  851. const struct cpumask *dest, bool force)
  852. {
  853. data = data->parent_data;
  854. if (data->chip->irq_set_affinity)
  855. return data->chip->irq_set_affinity(data, dest, force);
  856. return -ENOSYS;
  857. }
  858. /**
  859. * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
  860. * @data: Pointer to interrupt specific data
  861. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  862. *
  863. * Conditional, as the underlying parent chip might not implement it.
  864. */
  865. int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
  866. {
  867. data = data->parent_data;
  868. if (data->chip->irq_set_type)
  869. return data->chip->irq_set_type(data, type);
  870. return -ENOSYS;
  871. }
  872. /**
  873. * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
  874. * @data: Pointer to interrupt specific data
  875. *
  876. * Iterate through the domain hierarchy of the interrupt and check
  877. * whether a hw retrigger function exists. If yes, invoke it.
  878. */
  879. int irq_chip_retrigger_hierarchy(struct irq_data *data)
  880. {
  881. for (data = data->parent_data; data; data = data->parent_data)
  882. if (data->chip && data->chip->irq_retrigger)
  883. return data->chip->irq_retrigger(data);
  884. return 0;
  885. }
  886. /**
  887. * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
  888. * @data: Pointer to interrupt specific data
  889. * @vcpu_info: The vcpu affinity information
  890. */
  891. int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
  892. {
  893. data = data->parent_data;
  894. if (data->chip->irq_set_vcpu_affinity)
  895. return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
  896. return -ENOSYS;
  897. }
  898. /**
  899. * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
  900. * @data: Pointer to interrupt specific data
  901. * @on: Whether to set or reset the wake-up capability of this irq
  902. *
  903. * Conditional, as the underlying parent chip might not implement it.
  904. */
  905. int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
  906. {
  907. data = data->parent_data;
  908. if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
  909. return 0;
  910. if (data->chip->irq_set_wake)
  911. return data->chip->irq_set_wake(data, on);
  912. return -ENOSYS;
  913. }
  914. #endif
  915. /**
  916. * irq_chip_compose_msi_msg - Componse msi message for a irq chip
  917. * @data: Pointer to interrupt specific data
  918. * @msg: Pointer to the MSI message
  919. *
  920. * For hierarchical domains we find the first chip in the hierarchy
  921. * which implements the irq_compose_msi_msg callback. For non
  922. * hierarchical we use the top level chip.
  923. */
  924. int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
  925. {
  926. struct irq_data *pos = NULL;
  927. #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
  928. for (; data; data = data->parent_data)
  929. #endif
  930. if (data->chip && data->chip->irq_compose_msi_msg)
  931. pos = data;
  932. if (!pos)
  933. return -ENOSYS;
  934. pos->chip->irq_compose_msi_msg(pos, msg);
  935. return 0;
  936. }