hdac_ext_controller.c 7.9 KB

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  1. /*
  2. * hdac-ext-controller.c - HD-audio extended controller functions.
  3. *
  4. * Copyright (C) 2014-2015 Intel Corp
  5. * Author: Jeeja KP <jeeja.kp@intel.com>
  6. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  18. */
  19. #include <linux/delay.h>
  20. #include <linux/slab.h>
  21. #include <sound/hda_register.h>
  22. #include <sound/hdaudio_ext.h>
  23. /*
  24. * maximum HDAC capablities we should parse to avoid endless looping:
  25. * currently we have 4 extended caps, so this is future proof for now.
  26. * extend when this limit is seen meeting in real HW
  27. */
  28. #define HDAC_MAX_CAPS 10
  29. /**
  30. * snd_hdac_ext_bus_parse_capabilities - parse capablity structure
  31. * @ebus: the pointer to extended bus object
  32. *
  33. * Returns 0 if successful, or a negative error code.
  34. */
  35. int snd_hdac_ext_bus_parse_capabilities(struct hdac_ext_bus *ebus)
  36. {
  37. unsigned int cur_cap;
  38. unsigned int offset;
  39. struct hdac_bus *bus = &ebus->bus;
  40. unsigned int counter = 0;
  41. offset = snd_hdac_chip_readl(bus, LLCH);
  42. /* Lets walk the linked capabilities list */
  43. do {
  44. cur_cap = _snd_hdac_chip_read(l, bus, offset);
  45. dev_dbg(bus->dev, "Capability version: 0x%x\n",
  46. ((cur_cap & AZX_CAP_HDR_VER_MASK) >> AZX_CAP_HDR_VER_OFF));
  47. dev_dbg(bus->dev, "HDA capability ID: 0x%x\n",
  48. (cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF);
  49. switch ((cur_cap & AZX_CAP_HDR_ID_MASK) >> AZX_CAP_HDR_ID_OFF) {
  50. case AZX_ML_CAP_ID:
  51. dev_dbg(bus->dev, "Found ML capability\n");
  52. ebus->mlcap = bus->remap_addr + offset;
  53. break;
  54. case AZX_GTS_CAP_ID:
  55. dev_dbg(bus->dev, "Found GTS capability offset=%x\n", offset);
  56. ebus->gtscap = bus->remap_addr + offset;
  57. break;
  58. case AZX_PP_CAP_ID:
  59. /* PP capability found, the Audio DSP is present */
  60. dev_dbg(bus->dev, "Found PP capability offset=%x\n", offset);
  61. ebus->ppcap = bus->remap_addr + offset;
  62. break;
  63. case AZX_SPB_CAP_ID:
  64. /* SPIB capability found, handler function */
  65. dev_dbg(bus->dev, "Found SPB capability\n");
  66. ebus->spbcap = bus->remap_addr + offset;
  67. break;
  68. default:
  69. dev_dbg(bus->dev, "Unknown capability %d\n", cur_cap);
  70. break;
  71. }
  72. counter++;
  73. if (counter > HDAC_MAX_CAPS) {
  74. dev_err(bus->dev, "We exceeded HDAC Ext capablities!!!\n");
  75. break;
  76. }
  77. /* read the offset of next capabiity */
  78. offset = cur_cap & AZX_CAP_HDR_NXT_PTR_MASK;
  79. } while (offset);
  80. return 0;
  81. }
  82. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_parse_capabilities);
  83. /*
  84. * processing pipe helpers - these helpers are useful for dealing with HDA
  85. * new capability of processing pipelines
  86. */
  87. /**
  88. * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
  89. * @ebus: HD-audio extended core bus
  90. * @enable: flag to turn on/off the capability
  91. */
  92. void snd_hdac_ext_bus_ppcap_enable(struct hdac_ext_bus *ebus, bool enable)
  93. {
  94. struct hdac_bus *bus = &ebus->bus;
  95. if (!ebus->ppcap) {
  96. dev_err(bus->dev, "Address of PP capability is NULL");
  97. return;
  98. }
  99. if (enable)
  100. snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_GPROCEN);
  101. else
  102. snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_GPROCEN, 0);
  103. }
  104. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_enable);
  105. /**
  106. * snd_hdac_ext_bus_ppcap_int_enable - ppcap interrupt enable/disable
  107. * @ebus: HD-audio extended core bus
  108. * @enable: flag to enable/disable interrupt
  109. */
  110. void snd_hdac_ext_bus_ppcap_int_enable(struct hdac_ext_bus *ebus, bool enable)
  111. {
  112. struct hdac_bus *bus = &ebus->bus;
  113. if (!ebus->ppcap) {
  114. dev_err(bus->dev, "Address of PP capability is NULL\n");
  115. return;
  116. }
  117. if (enable)
  118. snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, 0, AZX_PPCTL_PIE);
  119. else
  120. snd_hdac_updatel(ebus->ppcap, AZX_REG_PP_PPCTL, AZX_PPCTL_PIE, 0);
  121. }
  122. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_ppcap_int_enable);
  123. /*
  124. * Multilink helpers - these helpers are useful for dealing with HDA
  125. * new multilink capability
  126. */
  127. /**
  128. * snd_hdac_ext_bus_get_ml_capabilities - get multilink capability
  129. * @ebus: HD-audio extended core bus
  130. *
  131. * This will parse all links and read the mlink capabilities and add them
  132. * in hlink_list of extended hdac bus
  133. * Note: this will be freed on bus exit by driver
  134. */
  135. int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus)
  136. {
  137. int idx;
  138. u32 link_count;
  139. struct hdac_ext_link *hlink;
  140. struct hdac_bus *bus = &ebus->bus;
  141. link_count = readl(ebus->mlcap + AZX_REG_ML_MLCD) + 1;
  142. dev_dbg(bus->dev, "In %s Link count: %d\n", __func__, link_count);
  143. for (idx = 0; idx < link_count; idx++) {
  144. hlink = kzalloc(sizeof(*hlink), GFP_KERNEL);
  145. if (!hlink)
  146. return -ENOMEM;
  147. hlink->index = idx;
  148. hlink->bus = bus;
  149. hlink->ml_addr = ebus->mlcap + AZX_ML_BASE +
  150. (AZX_ML_INTERVAL * idx);
  151. hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
  152. hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
  153. list_add_tail(&hlink->list, &ebus->hlink_list);
  154. }
  155. return 0;
  156. }
  157. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_ml_capabilities);
  158. /**
  159. * snd_hdac_link_free_all- free hdac extended link objects
  160. *
  161. * @ebus: HD-audio ext core bus
  162. */
  163. void snd_hdac_link_free_all(struct hdac_ext_bus *ebus)
  164. {
  165. struct hdac_ext_link *l;
  166. while (!list_empty(&ebus->hlink_list)) {
  167. l = list_first_entry(&ebus->hlink_list, struct hdac_ext_link, list);
  168. list_del(&l->list);
  169. kfree(l);
  170. }
  171. }
  172. EXPORT_SYMBOL_GPL(snd_hdac_link_free_all);
  173. /**
  174. * snd_hdac_ext_bus_get_link_index - get link based on codec name
  175. * @ebus: HD-audio extended core bus
  176. * @codec_name: codec name
  177. */
  178. struct hdac_ext_link *snd_hdac_ext_bus_get_link(struct hdac_ext_bus *ebus,
  179. const char *codec_name)
  180. {
  181. int i;
  182. struct hdac_ext_link *hlink = NULL;
  183. int bus_idx, addr;
  184. if (sscanf(codec_name, "ehdaudio%dD%d", &bus_idx, &addr) != 2)
  185. return NULL;
  186. if (ebus->idx != bus_idx)
  187. return NULL;
  188. list_for_each_entry(hlink, &ebus->hlink_list, list) {
  189. for (i = 0; i < HDA_MAX_CODECS; i++) {
  190. if (hlink->lsdiid & (0x1 << addr))
  191. return hlink;
  192. }
  193. }
  194. return NULL;
  195. }
  196. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_get_link);
  197. static int check_hdac_link_power_active(struct hdac_ext_link *link, bool enable)
  198. {
  199. int timeout;
  200. u32 val;
  201. int mask = (1 << AZX_MLCTL_CPA);
  202. udelay(3);
  203. timeout = 50;
  204. do {
  205. val = readl(link->ml_addr + AZX_REG_ML_LCTL);
  206. if (enable) {
  207. if (((val & mask) >> AZX_MLCTL_CPA))
  208. return 0;
  209. } else {
  210. if (!((val & mask) >> AZX_MLCTL_CPA))
  211. return 0;
  212. }
  213. udelay(3);
  214. } while (--timeout);
  215. return -EIO;
  216. }
  217. /**
  218. * snd_hdac_ext_bus_link_power_up -power up hda link
  219. * @link: HD-audio extended link
  220. */
  221. int snd_hdac_ext_bus_link_power_up(struct hdac_ext_link *link)
  222. {
  223. snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, 0, AZX_MLCTL_SPA);
  224. return check_hdac_link_power_active(link, true);
  225. }
  226. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_up);
  227. /**
  228. * snd_hdac_ext_bus_link_power_down -power down hda link
  229. * @link: HD-audio extended link
  230. */
  231. int snd_hdac_ext_bus_link_power_down(struct hdac_ext_link *link)
  232. {
  233. snd_hdac_updatel(link->ml_addr, AZX_REG_ML_LCTL, AZX_MLCTL_SPA, 0);
  234. return check_hdac_link_power_active(link, false);
  235. }
  236. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down);
  237. /**
  238. * snd_hdac_ext_bus_link_power_down_all -power down all hda link
  239. * @ebus: HD-audio extended bus
  240. */
  241. int snd_hdac_ext_bus_link_power_down_all(struct hdac_ext_bus *ebus)
  242. {
  243. struct hdac_ext_link *hlink = NULL;
  244. int ret;
  245. list_for_each_entry(hlink, &ebus->hlink_list, list) {
  246. snd_hdac_updatel(hlink->ml_addr, AZX_REG_ML_LCTL, AZX_MLCTL_SPA, 0);
  247. ret = check_hdac_link_power_active(hlink, false);
  248. if (ret < 0)
  249. return ret;
  250. }
  251. return 0;
  252. }
  253. EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down_all);