io.c 16 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Creative Labs, Inc.
  4. * Routines for control of EMU10K1 chips
  5. *
  6. * BUGS:
  7. * --
  8. *
  9. * TODO:
  10. * --
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/time.h>
  28. #include <sound/core.h>
  29. #include <sound/emu10k1.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include "p17v.h"
  33. unsigned int snd_emu10k1_ptr_read(struct snd_emu10k1 * emu, unsigned int reg, unsigned int chn)
  34. {
  35. unsigned long flags;
  36. unsigned int regptr, val;
  37. unsigned int mask;
  38. mask = emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
  39. regptr = ((reg << 16) & mask) | (chn & PTR_CHANNELNUM_MASK);
  40. if (reg & 0xff000000) {
  41. unsigned char size, offset;
  42. size = (reg >> 24) & 0x3f;
  43. offset = (reg >> 16) & 0x1f;
  44. mask = ((1 << size) - 1) << offset;
  45. spin_lock_irqsave(&emu->emu_lock, flags);
  46. outl(regptr, emu->port + PTR);
  47. val = inl(emu->port + DATA);
  48. spin_unlock_irqrestore(&emu->emu_lock, flags);
  49. return (val & mask) >> offset;
  50. } else {
  51. spin_lock_irqsave(&emu->emu_lock, flags);
  52. outl(regptr, emu->port + PTR);
  53. val = inl(emu->port + DATA);
  54. spin_unlock_irqrestore(&emu->emu_lock, flags);
  55. return val;
  56. }
  57. }
  58. EXPORT_SYMBOL(snd_emu10k1_ptr_read);
  59. void snd_emu10k1_ptr_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data)
  60. {
  61. unsigned int regptr;
  62. unsigned long flags;
  63. unsigned int mask;
  64. if (snd_BUG_ON(!emu))
  65. return;
  66. mask = emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
  67. regptr = ((reg << 16) & mask) | (chn & PTR_CHANNELNUM_MASK);
  68. if (reg & 0xff000000) {
  69. unsigned char size, offset;
  70. size = (reg >> 24) & 0x3f;
  71. offset = (reg >> 16) & 0x1f;
  72. mask = ((1 << size) - 1) << offset;
  73. data = (data << offset) & mask;
  74. spin_lock_irqsave(&emu->emu_lock, flags);
  75. outl(regptr, emu->port + PTR);
  76. data |= inl(emu->port + DATA) & ~mask;
  77. outl(data, emu->port + DATA);
  78. spin_unlock_irqrestore(&emu->emu_lock, flags);
  79. } else {
  80. spin_lock_irqsave(&emu->emu_lock, flags);
  81. outl(regptr, emu->port + PTR);
  82. outl(data, emu->port + DATA);
  83. spin_unlock_irqrestore(&emu->emu_lock, flags);
  84. }
  85. }
  86. EXPORT_SYMBOL(snd_emu10k1_ptr_write);
  87. unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu,
  88. unsigned int reg,
  89. unsigned int chn)
  90. {
  91. unsigned long flags;
  92. unsigned int regptr, val;
  93. regptr = (reg << 16) | chn;
  94. spin_lock_irqsave(&emu->emu_lock, flags);
  95. outl(regptr, emu->port + 0x20 + PTR);
  96. val = inl(emu->port + 0x20 + DATA);
  97. spin_unlock_irqrestore(&emu->emu_lock, flags);
  98. return val;
  99. }
  100. void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu,
  101. unsigned int reg,
  102. unsigned int chn,
  103. unsigned int data)
  104. {
  105. unsigned int regptr;
  106. unsigned long flags;
  107. regptr = (reg << 16) | chn;
  108. spin_lock_irqsave(&emu->emu_lock, flags);
  109. outl(regptr, emu->port + 0x20 + PTR);
  110. outl(data, emu->port + 0x20 + DATA);
  111. spin_unlock_irqrestore(&emu->emu_lock, flags);
  112. }
  113. int snd_emu10k1_spi_write(struct snd_emu10k1 * emu,
  114. unsigned int data)
  115. {
  116. unsigned int reset, set;
  117. unsigned int reg, tmp;
  118. int n, result;
  119. int err = 0;
  120. /* This function is not re-entrant, so protect against it. */
  121. spin_lock(&emu->spi_lock);
  122. if (emu->card_capabilities->ca0108_chip)
  123. reg = 0x3c; /* PTR20, reg 0x3c */
  124. else {
  125. /* For other chip types the SPI register
  126. * is currently unknown. */
  127. err = 1;
  128. goto spi_write_exit;
  129. }
  130. if (data > 0xffff) {
  131. /* Only 16bit values allowed */
  132. err = 1;
  133. goto spi_write_exit;
  134. }
  135. tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
  136. reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
  137. set = reset | 0x10000; /* Set xxx1xxxx */
  138. snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
  139. tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* write post */
  140. snd_emu10k1_ptr20_write(emu, reg, 0, set | data);
  141. result = 1;
  142. /* Wait for status bit to return to 0 */
  143. for (n = 0; n < 100; n++) {
  144. udelay(10);
  145. tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
  146. if (!(tmp & 0x10000)) {
  147. result = 0;
  148. break;
  149. }
  150. }
  151. if (result) {
  152. /* Timed out */
  153. err = 1;
  154. goto spi_write_exit;
  155. }
  156. snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
  157. tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* Write post */
  158. err = 0;
  159. spi_write_exit:
  160. spin_unlock(&emu->spi_lock);
  161. return err;
  162. }
  163. /* The ADC does not support i2c read, so only write is implemented */
  164. int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu,
  165. u32 reg,
  166. u32 value)
  167. {
  168. u32 tmp;
  169. int timeout = 0;
  170. int status;
  171. int retry;
  172. int err = 0;
  173. if ((reg > 0x7f) || (value > 0x1ff)) {
  174. dev_err(emu->card->dev, "i2c_write: invalid values.\n");
  175. return -EINVAL;
  176. }
  177. /* This function is not re-entrant, so protect against it. */
  178. spin_lock(&emu->i2c_lock);
  179. tmp = reg << 25 | value << 16;
  180. /* This controls the I2C connected to the WM8775 ADC Codec */
  181. snd_emu10k1_ptr20_write(emu, P17V_I2C_1, 0, tmp);
  182. tmp = snd_emu10k1_ptr20_read(emu, P17V_I2C_1, 0); /* write post */
  183. for (retry = 0; retry < 10; retry++) {
  184. /* Send the data to i2c */
  185. tmp = 0;
  186. tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
  187. snd_emu10k1_ptr20_write(emu, P17V_I2C_ADDR, 0, tmp);
  188. /* Wait till the transaction ends */
  189. while (1) {
  190. mdelay(1);
  191. status = snd_emu10k1_ptr20_read(emu, P17V_I2C_ADDR, 0);
  192. timeout++;
  193. if ((status & I2C_A_ADC_START) == 0)
  194. break;
  195. if (timeout > 1000) {
  196. dev_warn(emu->card->dev,
  197. "emu10k1:I2C:timeout status=0x%x\n",
  198. status);
  199. break;
  200. }
  201. }
  202. //Read back and see if the transaction is successful
  203. if ((status & I2C_A_ADC_ABORT) == 0)
  204. break;
  205. }
  206. if (retry == 10) {
  207. dev_err(emu->card->dev, "Writing to ADC failed!\n");
  208. dev_err(emu->card->dev, "status=0x%x, reg=%d, value=%d\n",
  209. status, reg, value);
  210. /* dump_stack(); */
  211. err = -EINVAL;
  212. }
  213. spin_unlock(&emu->i2c_lock);
  214. return err;
  215. }
  216. int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value)
  217. {
  218. unsigned long flags;
  219. if (reg > 0x3f)
  220. return 1;
  221. reg += 0x40; /* 0x40 upwards are registers. */
  222. if (value > 0x3f) /* 0 to 0x3f are values */
  223. return 1;
  224. spin_lock_irqsave(&emu->emu_lock, flags);
  225. outl(reg, emu->port + A_IOCFG);
  226. udelay(10);
  227. outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
  228. udelay(10);
  229. outl(value, emu->port + A_IOCFG);
  230. udelay(10);
  231. outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
  232. spin_unlock_irqrestore(&emu->emu_lock, flags);
  233. return 0;
  234. }
  235. int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, u32 reg, u32 *value)
  236. {
  237. unsigned long flags;
  238. if (reg > 0x3f)
  239. return 1;
  240. reg += 0x40; /* 0x40 upwards are registers. */
  241. spin_lock_irqsave(&emu->emu_lock, flags);
  242. outl(reg, emu->port + A_IOCFG);
  243. udelay(10);
  244. outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
  245. udelay(10);
  246. *value = ((inl(emu->port + A_IOCFG) >> 8) & 0x7f);
  247. spin_unlock_irqrestore(&emu->emu_lock, flags);
  248. return 0;
  249. }
  250. /* Each Destination has one and only one Source,
  251. * but one Source can feed any number of Destinations simultaneously.
  252. */
  253. int snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 * emu, u32 dst, u32 src)
  254. {
  255. snd_emu1010_fpga_write(emu, 0x00, ((dst >> 8) & 0x3f) );
  256. snd_emu1010_fpga_write(emu, 0x01, (dst & 0x3f) );
  257. snd_emu1010_fpga_write(emu, 0x02, ((src >> 8) & 0x3f) );
  258. snd_emu1010_fpga_write(emu, 0x03, (src & 0x3f) );
  259. return 0;
  260. }
  261. void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb)
  262. {
  263. unsigned long flags;
  264. unsigned int enable;
  265. spin_lock_irqsave(&emu->emu_lock, flags);
  266. enable = inl(emu->port + INTE) | intrenb;
  267. outl(enable, emu->port + INTE);
  268. spin_unlock_irqrestore(&emu->emu_lock, flags);
  269. }
  270. void snd_emu10k1_intr_disable(struct snd_emu10k1 *emu, unsigned int intrenb)
  271. {
  272. unsigned long flags;
  273. unsigned int enable;
  274. spin_lock_irqsave(&emu->emu_lock, flags);
  275. enable = inl(emu->port + INTE) & ~intrenb;
  276. outl(enable, emu->port + INTE);
  277. spin_unlock_irqrestore(&emu->emu_lock, flags);
  278. }
  279. void snd_emu10k1_voice_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
  280. {
  281. unsigned long flags;
  282. unsigned int val;
  283. spin_lock_irqsave(&emu->emu_lock, flags);
  284. /* voice interrupt */
  285. if (voicenum >= 32) {
  286. outl(CLIEH << 16, emu->port + PTR);
  287. val = inl(emu->port + DATA);
  288. val |= 1 << (voicenum - 32);
  289. } else {
  290. outl(CLIEL << 16, emu->port + PTR);
  291. val = inl(emu->port + DATA);
  292. val |= 1 << voicenum;
  293. }
  294. outl(val, emu->port + DATA);
  295. spin_unlock_irqrestore(&emu->emu_lock, flags);
  296. }
  297. void snd_emu10k1_voice_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
  298. {
  299. unsigned long flags;
  300. unsigned int val;
  301. spin_lock_irqsave(&emu->emu_lock, flags);
  302. /* voice interrupt */
  303. if (voicenum >= 32) {
  304. outl(CLIEH << 16, emu->port + PTR);
  305. val = inl(emu->port + DATA);
  306. val &= ~(1 << (voicenum - 32));
  307. } else {
  308. outl(CLIEL << 16, emu->port + PTR);
  309. val = inl(emu->port + DATA);
  310. val &= ~(1 << voicenum);
  311. }
  312. outl(val, emu->port + DATA);
  313. spin_unlock_irqrestore(&emu->emu_lock, flags);
  314. }
  315. void snd_emu10k1_voice_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
  316. {
  317. unsigned long flags;
  318. spin_lock_irqsave(&emu->emu_lock, flags);
  319. /* voice interrupt */
  320. if (voicenum >= 32) {
  321. outl(CLIPH << 16, emu->port + PTR);
  322. voicenum = 1 << (voicenum - 32);
  323. } else {
  324. outl(CLIPL << 16, emu->port + PTR);
  325. voicenum = 1 << voicenum;
  326. }
  327. outl(voicenum, emu->port + DATA);
  328. spin_unlock_irqrestore(&emu->emu_lock, flags);
  329. }
  330. void snd_emu10k1_voice_half_loop_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
  331. {
  332. unsigned long flags;
  333. unsigned int val;
  334. spin_lock_irqsave(&emu->emu_lock, flags);
  335. /* voice interrupt */
  336. if (voicenum >= 32) {
  337. outl(HLIEH << 16, emu->port + PTR);
  338. val = inl(emu->port + DATA);
  339. val |= 1 << (voicenum - 32);
  340. } else {
  341. outl(HLIEL << 16, emu->port + PTR);
  342. val = inl(emu->port + DATA);
  343. val |= 1 << voicenum;
  344. }
  345. outl(val, emu->port + DATA);
  346. spin_unlock_irqrestore(&emu->emu_lock, flags);
  347. }
  348. void snd_emu10k1_voice_half_loop_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
  349. {
  350. unsigned long flags;
  351. unsigned int val;
  352. spin_lock_irqsave(&emu->emu_lock, flags);
  353. /* voice interrupt */
  354. if (voicenum >= 32) {
  355. outl(HLIEH << 16, emu->port + PTR);
  356. val = inl(emu->port + DATA);
  357. val &= ~(1 << (voicenum - 32));
  358. } else {
  359. outl(HLIEL << 16, emu->port + PTR);
  360. val = inl(emu->port + DATA);
  361. val &= ~(1 << voicenum);
  362. }
  363. outl(val, emu->port + DATA);
  364. spin_unlock_irqrestore(&emu->emu_lock, flags);
  365. }
  366. void snd_emu10k1_voice_half_loop_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
  367. {
  368. unsigned long flags;
  369. spin_lock_irqsave(&emu->emu_lock, flags);
  370. /* voice interrupt */
  371. if (voicenum >= 32) {
  372. outl(HLIPH << 16, emu->port + PTR);
  373. voicenum = 1 << (voicenum - 32);
  374. } else {
  375. outl(HLIPL << 16, emu->port + PTR);
  376. voicenum = 1 << voicenum;
  377. }
  378. outl(voicenum, emu->port + DATA);
  379. spin_unlock_irqrestore(&emu->emu_lock, flags);
  380. }
  381. void snd_emu10k1_voice_set_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
  382. {
  383. unsigned long flags;
  384. unsigned int sol;
  385. spin_lock_irqsave(&emu->emu_lock, flags);
  386. /* voice interrupt */
  387. if (voicenum >= 32) {
  388. outl(SOLEH << 16, emu->port + PTR);
  389. sol = inl(emu->port + DATA);
  390. sol |= 1 << (voicenum - 32);
  391. } else {
  392. outl(SOLEL << 16, emu->port + PTR);
  393. sol = inl(emu->port + DATA);
  394. sol |= 1 << voicenum;
  395. }
  396. outl(sol, emu->port + DATA);
  397. spin_unlock_irqrestore(&emu->emu_lock, flags);
  398. }
  399. void snd_emu10k1_voice_clear_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
  400. {
  401. unsigned long flags;
  402. unsigned int sol;
  403. spin_lock_irqsave(&emu->emu_lock, flags);
  404. /* voice interrupt */
  405. if (voicenum >= 32) {
  406. outl(SOLEH << 16, emu->port + PTR);
  407. sol = inl(emu->port + DATA);
  408. sol &= ~(1 << (voicenum - 32));
  409. } else {
  410. outl(SOLEL << 16, emu->port + PTR);
  411. sol = inl(emu->port + DATA);
  412. sol &= ~(1 << voicenum);
  413. }
  414. outl(sol, emu->port + DATA);
  415. spin_unlock_irqrestore(&emu->emu_lock, flags);
  416. }
  417. void snd_emu10k1_wait(struct snd_emu10k1 *emu, unsigned int wait)
  418. {
  419. volatile unsigned count;
  420. unsigned int newtime = 0, curtime;
  421. curtime = inl(emu->port + WC) >> 6;
  422. while (wait-- > 0) {
  423. count = 0;
  424. while (count++ < 16384) {
  425. newtime = inl(emu->port + WC) >> 6;
  426. if (newtime != curtime)
  427. break;
  428. }
  429. if (count > 16384)
  430. break;
  431. curtime = newtime;
  432. }
  433. }
  434. unsigned short snd_emu10k1_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  435. {
  436. struct snd_emu10k1 *emu = ac97->private_data;
  437. unsigned long flags;
  438. unsigned short val;
  439. spin_lock_irqsave(&emu->emu_lock, flags);
  440. outb(reg, emu->port + AC97ADDRESS);
  441. val = inw(emu->port + AC97DATA);
  442. spin_unlock_irqrestore(&emu->emu_lock, flags);
  443. return val;
  444. }
  445. void snd_emu10k1_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short data)
  446. {
  447. struct snd_emu10k1 *emu = ac97->private_data;
  448. unsigned long flags;
  449. spin_lock_irqsave(&emu->emu_lock, flags);
  450. outb(reg, emu->port + AC97ADDRESS);
  451. outw(data, emu->port + AC97DATA);
  452. spin_unlock_irqrestore(&emu->emu_lock, flags);
  453. }
  454. /*
  455. * convert rate to pitch
  456. */
  457. unsigned int snd_emu10k1_rate_to_pitch(unsigned int rate)
  458. {
  459. static u32 logMagTable[128] = {
  460. 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
  461. 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
  462. 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
  463. 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
  464. 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
  465. 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
  466. 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
  467. 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
  468. 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
  469. 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
  470. 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
  471. 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
  472. 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
  473. 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
  474. 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
  475. 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
  476. };
  477. static char logSlopeTable[128] = {
  478. 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
  479. 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
  480. 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
  481. 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
  482. 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
  483. 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
  484. 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
  485. 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
  486. 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
  487. 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
  488. 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
  489. 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
  490. 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
  491. 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
  492. 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
  493. 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
  494. };
  495. int i;
  496. if (rate == 0)
  497. return 0; /* Bail out if no leading "1" */
  498. rate *= 11185; /* Scale 48000 to 0x20002380 */
  499. for (i = 31; i > 0; i--) {
  500. if (rate & 0x80000000) { /* Detect leading "1" */
  501. return (((unsigned int) (i - 15) << 20) +
  502. logMagTable[0x7f & (rate >> 24)] +
  503. (0x7f & (rate >> 17)) *
  504. logSlopeTable[0x7f & (rate >> 24)]);
  505. }
  506. rate <<= 1;
  507. }
  508. return 0; /* Should never reach this point */
  509. }