patch_sigmatel.c 136 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/slab.h>
  29. #include <linux/pci.h>
  30. #include <linux/dmi.h>
  31. #include <linux/module.h>
  32. #include <sound/core.h>
  33. #include <sound/jack.h>
  34. #include "hda_codec.h"
  35. #include "hda_local.h"
  36. #include "hda_auto_parser.h"
  37. #include "hda_beep.h"
  38. #include "hda_jack.h"
  39. #include "hda_generic.h"
  40. enum {
  41. STAC_REF,
  42. STAC_9200_OQO,
  43. STAC_9200_DELL_D21,
  44. STAC_9200_DELL_D22,
  45. STAC_9200_DELL_D23,
  46. STAC_9200_DELL_M21,
  47. STAC_9200_DELL_M22,
  48. STAC_9200_DELL_M23,
  49. STAC_9200_DELL_M24,
  50. STAC_9200_DELL_M25,
  51. STAC_9200_DELL_M26,
  52. STAC_9200_DELL_M27,
  53. STAC_9200_M4,
  54. STAC_9200_M4_2,
  55. STAC_9200_PANASONIC,
  56. STAC_9200_EAPD_INIT,
  57. STAC_9200_MODELS
  58. };
  59. enum {
  60. STAC_9205_REF,
  61. STAC_9205_DELL_M42,
  62. STAC_9205_DELL_M43,
  63. STAC_9205_DELL_M44,
  64. STAC_9205_EAPD,
  65. STAC_9205_MODELS
  66. };
  67. enum {
  68. STAC_92HD73XX_NO_JD, /* no jack-detection */
  69. STAC_92HD73XX_REF,
  70. STAC_92HD73XX_INTEL,
  71. STAC_DELL_M6_AMIC,
  72. STAC_DELL_M6_DMIC,
  73. STAC_DELL_M6_BOTH,
  74. STAC_DELL_EQ,
  75. STAC_ALIENWARE_M17X,
  76. STAC_92HD89XX_HP_FRONT_JACK,
  77. STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
  78. STAC_92HD73XX_ASUS_MOBO,
  79. STAC_92HD73XX_MODELS
  80. };
  81. enum {
  82. STAC_92HD83XXX_REF,
  83. STAC_92HD83XXX_PWR_REF,
  84. STAC_DELL_S14,
  85. STAC_DELL_VOSTRO_3500,
  86. STAC_92HD83XXX_HP_cNB11_INTQUAD,
  87. STAC_HP_DV7_4000,
  88. STAC_HP_ZEPHYR,
  89. STAC_92HD83XXX_HP_LED,
  90. STAC_92HD83XXX_HP_INV_LED,
  91. STAC_92HD83XXX_HP_MIC_LED,
  92. STAC_HP_LED_GPIO10,
  93. STAC_92HD83XXX_HEADSET_JACK,
  94. STAC_92HD83XXX_HP,
  95. STAC_HP_ENVY_BASS,
  96. STAC_HP_BNB13_EQ,
  97. STAC_HP_ENVY_TS_BASS,
  98. STAC_HP_ENVY_TS_DAC_BIND,
  99. STAC_92HD83XXX_GPIO10_EAPD,
  100. STAC_92HD83XXX_MODELS
  101. };
  102. enum {
  103. STAC_92HD71BXX_REF,
  104. STAC_DELL_M4_1,
  105. STAC_DELL_M4_2,
  106. STAC_DELL_M4_3,
  107. STAC_HP_M4,
  108. STAC_HP_DV4,
  109. STAC_HP_DV5,
  110. STAC_HP_HDX,
  111. STAC_92HD71BXX_HP,
  112. STAC_92HD71BXX_NO_DMIC,
  113. STAC_92HD71BXX_NO_SMUX,
  114. STAC_92HD71BXX_MODELS
  115. };
  116. enum {
  117. STAC_92HD95_HP_LED,
  118. STAC_92HD95_HP_BASS,
  119. STAC_92HD95_MODELS
  120. };
  121. enum {
  122. STAC_925x_REF,
  123. STAC_M1,
  124. STAC_M1_2,
  125. STAC_M2,
  126. STAC_M2_2,
  127. STAC_M3,
  128. STAC_M5,
  129. STAC_M6,
  130. STAC_925x_MODELS
  131. };
  132. enum {
  133. STAC_D945_REF,
  134. STAC_D945GTP3,
  135. STAC_D945GTP5,
  136. STAC_INTEL_MAC_V1,
  137. STAC_INTEL_MAC_V2,
  138. STAC_INTEL_MAC_V3,
  139. STAC_INTEL_MAC_V4,
  140. STAC_INTEL_MAC_V5,
  141. STAC_INTEL_MAC_AUTO,
  142. STAC_ECS_202,
  143. STAC_922X_DELL_D81,
  144. STAC_922X_DELL_D82,
  145. STAC_922X_DELL_M81,
  146. STAC_922X_DELL_M82,
  147. STAC_922X_INTEL_MAC_GPIO,
  148. STAC_922X_MODELS
  149. };
  150. enum {
  151. STAC_D965_REF_NO_JD, /* no jack-detection */
  152. STAC_D965_REF,
  153. STAC_D965_3ST,
  154. STAC_D965_5ST,
  155. STAC_D965_5ST_NO_FP,
  156. STAC_D965_VERBS,
  157. STAC_DELL_3ST,
  158. STAC_DELL_BIOS,
  159. STAC_DELL_BIOS_AMIC,
  160. STAC_DELL_BIOS_SPDIF,
  161. STAC_927X_DELL_DMIC,
  162. STAC_927X_VOLKNOB,
  163. STAC_927X_MODELS
  164. };
  165. enum {
  166. STAC_9872_VAIO,
  167. STAC_9872_MODELS
  168. };
  169. struct sigmatel_spec {
  170. struct hda_gen_spec gen;
  171. unsigned int eapd_switch: 1;
  172. unsigned int linear_tone_beep:1;
  173. unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
  174. unsigned int volknob_init:1; /* special volume-knob initialization */
  175. unsigned int powerdown_adcs:1;
  176. unsigned int have_spdif_mux:1;
  177. /* gpio lines */
  178. unsigned int eapd_mask;
  179. unsigned int gpio_mask;
  180. unsigned int gpio_dir;
  181. unsigned int gpio_data;
  182. unsigned int gpio_mute;
  183. unsigned int gpio_led;
  184. unsigned int gpio_led_polarity;
  185. unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
  186. unsigned int vref_led;
  187. int default_polarity;
  188. unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
  189. unsigned int mic_enabled; /* current mic mute state (bitmask) */
  190. /* stream */
  191. unsigned int stream_delay;
  192. /* analog loopback */
  193. const struct snd_kcontrol_new *aloopback_ctl;
  194. unsigned int aloopback;
  195. unsigned char aloopback_mask;
  196. unsigned char aloopback_shift;
  197. /* power management */
  198. unsigned int power_map_bits;
  199. unsigned int num_pwrs;
  200. const hda_nid_t *pwr_nids;
  201. unsigned int active_adcs;
  202. /* beep widgets */
  203. hda_nid_t anabeep_nid;
  204. /* SPDIF-out mux */
  205. const char * const *spdif_labels;
  206. struct hda_input_mux spdif_mux;
  207. unsigned int cur_smux[2];
  208. };
  209. #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
  210. #define AC_VERB_IDT_GET_POWER_MAP 0xfec
  211. static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
  212. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  213. 0x0f, 0x10, 0x11
  214. };
  215. static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
  216. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  217. 0x0f, 0x10
  218. };
  219. static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
  220. 0x0a, 0x0d, 0x0f
  221. };
  222. /*
  223. * PCM hooks
  224. */
  225. static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
  226. struct hda_codec *codec,
  227. struct snd_pcm_substream *substream,
  228. int action)
  229. {
  230. struct sigmatel_spec *spec = codec->spec;
  231. if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
  232. msleep(spec->stream_delay);
  233. }
  234. static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
  235. struct hda_codec *codec,
  236. struct snd_pcm_substream *substream,
  237. int action)
  238. {
  239. struct sigmatel_spec *spec = codec->spec;
  240. int i, idx = 0;
  241. if (!spec->powerdown_adcs)
  242. return;
  243. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  244. if (spec->gen.all_adcs[i] == hinfo->nid) {
  245. idx = i;
  246. break;
  247. }
  248. }
  249. switch (action) {
  250. case HDA_GEN_PCM_ACT_OPEN:
  251. msleep(40);
  252. snd_hda_codec_write(codec, hinfo->nid, 0,
  253. AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  254. spec->active_adcs |= (1 << idx);
  255. break;
  256. case HDA_GEN_PCM_ACT_CLOSE:
  257. snd_hda_codec_write(codec, hinfo->nid, 0,
  258. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  259. spec->active_adcs &= ~(1 << idx);
  260. break;
  261. }
  262. }
  263. /*
  264. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  265. * funky external mute control using GPIO pins.
  266. */
  267. static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
  268. unsigned int dir_mask, unsigned int data)
  269. {
  270. unsigned int gpiostate, gpiomask, gpiodir;
  271. hda_nid_t fg = codec->core.afg;
  272. codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
  273. gpiostate = snd_hda_codec_read(codec, fg, 0,
  274. AC_VERB_GET_GPIO_DATA, 0);
  275. gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
  276. gpiomask = snd_hda_codec_read(codec, fg, 0,
  277. AC_VERB_GET_GPIO_MASK, 0);
  278. gpiomask |= mask;
  279. gpiodir = snd_hda_codec_read(codec, fg, 0,
  280. AC_VERB_GET_GPIO_DIRECTION, 0);
  281. gpiodir |= dir_mask;
  282. /* Configure GPIOx as CMOS */
  283. snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
  284. snd_hda_codec_write(codec, fg, 0,
  285. AC_VERB_SET_GPIO_MASK, gpiomask);
  286. snd_hda_codec_read(codec, fg, 0,
  287. AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
  288. msleep(1);
  289. snd_hda_codec_read(codec, fg, 0,
  290. AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
  291. }
  292. /* hook for controlling mic-mute LED GPIO */
  293. static void stac_capture_led_hook(struct hda_codec *codec,
  294. struct snd_kcontrol *kcontrol,
  295. struct snd_ctl_elem_value *ucontrol)
  296. {
  297. struct sigmatel_spec *spec = codec->spec;
  298. unsigned int mask;
  299. bool cur_mute, prev_mute;
  300. if (!kcontrol || !ucontrol)
  301. return;
  302. mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  303. prev_mute = !spec->mic_enabled;
  304. if (ucontrol->value.integer.value[0] ||
  305. ucontrol->value.integer.value[1])
  306. spec->mic_enabled |= mask;
  307. else
  308. spec->mic_enabled &= ~mask;
  309. cur_mute = !spec->mic_enabled;
  310. if (cur_mute != prev_mute) {
  311. if (cur_mute)
  312. spec->gpio_data |= spec->mic_mute_led_gpio;
  313. else
  314. spec->gpio_data &= ~spec->mic_mute_led_gpio;
  315. stac_gpio_set(codec, spec->gpio_mask,
  316. spec->gpio_dir, spec->gpio_data);
  317. }
  318. }
  319. static int stac_vrefout_set(struct hda_codec *codec,
  320. hda_nid_t nid, unsigned int new_vref)
  321. {
  322. int error, pinctl;
  323. codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
  324. pinctl = snd_hda_codec_read(codec, nid, 0,
  325. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  326. if (pinctl < 0)
  327. return pinctl;
  328. pinctl &= 0xff;
  329. pinctl &= ~AC_PINCTL_VREFEN;
  330. pinctl |= (new_vref & AC_PINCTL_VREFEN);
  331. error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
  332. if (error < 0)
  333. return error;
  334. return 1;
  335. }
  336. /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
  337. /* this hook is set in stac_setup_gpio() */
  338. static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
  339. hda_nid_t nid,
  340. unsigned int power_state)
  341. {
  342. if (nid == codec->core.afg && power_state == AC_PWRST_D3)
  343. return AC_PWRST_D1;
  344. return snd_hda_gen_path_power_filter(codec, nid, power_state);
  345. }
  346. /* update mute-LED accoring to the master switch */
  347. static void stac_update_led_status(struct hda_codec *codec, int enabled)
  348. {
  349. struct sigmatel_spec *spec = codec->spec;
  350. int muted = !enabled;
  351. if (!spec->gpio_led)
  352. return;
  353. /* LED state is inverted on these systems */
  354. if (spec->gpio_led_polarity)
  355. muted = !muted;
  356. if (!spec->vref_mute_led_nid) {
  357. if (muted)
  358. spec->gpio_data |= spec->gpio_led;
  359. else
  360. spec->gpio_data &= ~spec->gpio_led;
  361. stac_gpio_set(codec, spec->gpio_mask,
  362. spec->gpio_dir, spec->gpio_data);
  363. } else {
  364. spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
  365. stac_vrefout_set(codec, spec->vref_mute_led_nid,
  366. spec->vref_led);
  367. }
  368. }
  369. /* vmaster hook to update mute LED */
  370. static void stac_vmaster_hook(void *private_data, int val)
  371. {
  372. stac_update_led_status(private_data, val);
  373. }
  374. /* automute hook to handle GPIO mute and EAPD updates */
  375. static void stac_update_outputs(struct hda_codec *codec)
  376. {
  377. struct sigmatel_spec *spec = codec->spec;
  378. if (spec->gpio_mute)
  379. spec->gen.master_mute =
  380. !(snd_hda_codec_read(codec, codec->core.afg, 0,
  381. AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
  382. snd_hda_gen_update_outputs(codec);
  383. if (spec->eapd_mask && spec->eapd_switch) {
  384. unsigned int val = spec->gpio_data;
  385. if (spec->gen.speaker_muted)
  386. val &= ~spec->eapd_mask;
  387. else
  388. val |= spec->eapd_mask;
  389. if (spec->gpio_data != val) {
  390. spec->gpio_data = val;
  391. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
  392. val);
  393. }
  394. }
  395. }
  396. static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
  397. bool enable, bool do_write)
  398. {
  399. struct sigmatel_spec *spec = codec->spec;
  400. unsigned int idx, val;
  401. for (idx = 0; idx < spec->num_pwrs; idx++) {
  402. if (spec->pwr_nids[idx] == nid)
  403. break;
  404. }
  405. if (idx >= spec->num_pwrs)
  406. return;
  407. idx = 1 << idx;
  408. val = spec->power_map_bits;
  409. if (enable)
  410. val &= ~idx;
  411. else
  412. val |= idx;
  413. /* power down unused output ports */
  414. if (val != spec->power_map_bits) {
  415. spec->power_map_bits = val;
  416. if (do_write)
  417. snd_hda_codec_write(codec, codec->core.afg, 0,
  418. AC_VERB_IDT_SET_POWER_MAP, val);
  419. }
  420. }
  421. /* update power bit per jack plug/unplug */
  422. static void jack_update_power(struct hda_codec *codec,
  423. struct hda_jack_callback *jack)
  424. {
  425. struct sigmatel_spec *spec = codec->spec;
  426. int i;
  427. if (!spec->num_pwrs)
  428. return;
  429. if (jack && jack->nid) {
  430. stac_toggle_power_map(codec, jack->nid,
  431. snd_hda_jack_detect(codec, jack->nid),
  432. true);
  433. return;
  434. }
  435. /* update all jacks */
  436. for (i = 0; i < spec->num_pwrs; i++) {
  437. hda_nid_t nid = spec->pwr_nids[i];
  438. if (!snd_hda_jack_tbl_get(codec, nid))
  439. continue;
  440. stac_toggle_power_map(codec, nid,
  441. snd_hda_jack_detect(codec, nid),
  442. false);
  443. }
  444. snd_hda_codec_write(codec, codec->core.afg, 0,
  445. AC_VERB_IDT_SET_POWER_MAP,
  446. spec->power_map_bits);
  447. }
  448. static void stac_vref_event(struct hda_codec *codec,
  449. struct hda_jack_callback *event)
  450. {
  451. unsigned int data;
  452. data = snd_hda_codec_read(codec, codec->core.afg, 0,
  453. AC_VERB_GET_GPIO_DATA, 0);
  454. /* toggle VREF state based on GPIOx status */
  455. snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
  456. !!(data & (1 << event->private_data)));
  457. }
  458. /* initialize the power map and enable the power event to jacks that
  459. * haven't been assigned to automute
  460. */
  461. static void stac_init_power_map(struct hda_codec *codec)
  462. {
  463. struct sigmatel_spec *spec = codec->spec;
  464. int i;
  465. for (i = 0; i < spec->num_pwrs; i++) {
  466. hda_nid_t nid = spec->pwr_nids[i];
  467. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
  468. def_conf = get_defcfg_connect(def_conf);
  469. if (def_conf == AC_JACK_PORT_COMPLEX &&
  470. spec->vref_mute_led_nid != nid &&
  471. is_jack_detectable(codec, nid)) {
  472. snd_hda_jack_detect_enable_callback(codec, nid,
  473. jack_update_power);
  474. } else {
  475. if (def_conf == AC_JACK_PORT_NONE)
  476. stac_toggle_power_map(codec, nid, false, false);
  477. else
  478. stac_toggle_power_map(codec, nid, true, false);
  479. }
  480. }
  481. }
  482. /*
  483. */
  484. static inline bool get_int_hint(struct hda_codec *codec, const char *key,
  485. int *valp)
  486. {
  487. return !snd_hda_get_int_hint(codec, key, valp);
  488. }
  489. /* override some hints from the hwdep entry */
  490. static void stac_store_hints(struct hda_codec *codec)
  491. {
  492. struct sigmatel_spec *spec = codec->spec;
  493. int val;
  494. if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
  495. spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
  496. spec->gpio_mask;
  497. }
  498. if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
  499. spec->gpio_dir &= spec->gpio_mask;
  500. if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
  501. spec->gpio_data &= spec->gpio_mask;
  502. if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
  503. spec->eapd_mask &= spec->gpio_mask;
  504. if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
  505. spec->gpio_mute &= spec->gpio_mask;
  506. val = snd_hda_get_bool_hint(codec, "eapd_switch");
  507. if (val >= 0)
  508. spec->eapd_switch = val;
  509. }
  510. /*
  511. * loopback controls
  512. */
  513. #define stac_aloopback_info snd_ctl_boolean_mono_info
  514. static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
  515. struct snd_ctl_elem_value *ucontrol)
  516. {
  517. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  518. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  519. struct sigmatel_spec *spec = codec->spec;
  520. ucontrol->value.integer.value[0] = !!(spec->aloopback &
  521. (spec->aloopback_mask << idx));
  522. return 0;
  523. }
  524. static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
  525. struct snd_ctl_elem_value *ucontrol)
  526. {
  527. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  528. struct sigmatel_spec *spec = codec->spec;
  529. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  530. unsigned int dac_mode;
  531. unsigned int val, idx_val;
  532. idx_val = spec->aloopback_mask << idx;
  533. if (ucontrol->value.integer.value[0])
  534. val = spec->aloopback | idx_val;
  535. else
  536. val = spec->aloopback & ~idx_val;
  537. if (spec->aloopback == val)
  538. return 0;
  539. spec->aloopback = val;
  540. /* Only return the bits defined by the shift value of the
  541. * first two bytes of the mask
  542. */
  543. dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
  544. kcontrol->private_value & 0xFFFF, 0x0);
  545. dac_mode >>= spec->aloopback_shift;
  546. if (spec->aloopback & idx_val) {
  547. snd_hda_power_up(codec);
  548. dac_mode |= idx_val;
  549. } else {
  550. snd_hda_power_down(codec);
  551. dac_mode &= ~idx_val;
  552. }
  553. snd_hda_codec_write_cache(codec, codec->core.afg, 0,
  554. kcontrol->private_value >> 16, dac_mode);
  555. return 1;
  556. }
  557. #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
  558. { \
  559. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  560. .name = "Analog Loopback", \
  561. .count = cnt, \
  562. .info = stac_aloopback_info, \
  563. .get = stac_aloopback_get, \
  564. .put = stac_aloopback_put, \
  565. .private_value = verb_read | (verb_write << 16), \
  566. }
  567. /*
  568. * Mute LED handling on HP laptops
  569. */
  570. /* check whether it's a HP laptop with a docking port */
  571. static bool hp_bnb2011_with_dock(struct hda_codec *codec)
  572. {
  573. if (codec->core.vendor_id != 0x111d7605 &&
  574. codec->core.vendor_id != 0x111d76d1)
  575. return false;
  576. switch (codec->core.subsystem_id) {
  577. case 0x103c1618:
  578. case 0x103c1619:
  579. case 0x103c161a:
  580. case 0x103c161b:
  581. case 0x103c161c:
  582. case 0x103c161d:
  583. case 0x103c161e:
  584. case 0x103c161f:
  585. case 0x103c162a:
  586. case 0x103c162b:
  587. case 0x103c1630:
  588. case 0x103c1631:
  589. case 0x103c1633:
  590. case 0x103c1634:
  591. case 0x103c1635:
  592. case 0x103c3587:
  593. case 0x103c3588:
  594. case 0x103c3589:
  595. case 0x103c358a:
  596. case 0x103c3667:
  597. case 0x103c3668:
  598. case 0x103c3669:
  599. return true;
  600. }
  601. return false;
  602. }
  603. static bool hp_blike_system(u32 subsystem_id)
  604. {
  605. switch (subsystem_id) {
  606. case 0x103c1473: /* HP ProBook 6550b */
  607. case 0x103c1520:
  608. case 0x103c1521:
  609. case 0x103c1523:
  610. case 0x103c1524:
  611. case 0x103c1525:
  612. case 0x103c1722:
  613. case 0x103c1723:
  614. case 0x103c1724:
  615. case 0x103c1725:
  616. case 0x103c1726:
  617. case 0x103c1727:
  618. case 0x103c1728:
  619. case 0x103c1729:
  620. case 0x103c172a:
  621. case 0x103c172b:
  622. case 0x103c307e:
  623. case 0x103c307f:
  624. case 0x103c3080:
  625. case 0x103c3081:
  626. case 0x103c7007:
  627. case 0x103c7008:
  628. return true;
  629. }
  630. return false;
  631. }
  632. static void set_hp_led_gpio(struct hda_codec *codec)
  633. {
  634. struct sigmatel_spec *spec = codec->spec;
  635. unsigned int gpio;
  636. if (spec->gpio_led)
  637. return;
  638. gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
  639. gpio &= AC_GPIO_IO_COUNT;
  640. if (gpio > 3)
  641. spec->gpio_led = 0x08; /* GPIO 3 */
  642. else
  643. spec->gpio_led = 0x01; /* GPIO 0 */
  644. }
  645. /*
  646. * This method searches for the mute LED GPIO configuration
  647. * provided as OEM string in SMBIOS. The format of that string
  648. * is HP_Mute_LED_P_G or HP_Mute_LED_P
  649. * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
  650. * that corresponds to the NOT muted state of the master volume
  651. * and G is the index of the GPIO to use as the mute LED control (0..9)
  652. * If _G portion is missing it is assigned based on the codec ID
  653. *
  654. * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
  655. * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
  656. *
  657. *
  658. * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
  659. * SMBIOS - at least the ones I have seen do not have them - which include
  660. * my own system (HP Pavilion dv6-1110ax) and my cousin's
  661. * HP Pavilion dv9500t CTO.
  662. * Need more information on whether it is true across the entire series.
  663. * -- kunal
  664. */
  665. static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
  666. {
  667. struct sigmatel_spec *spec = codec->spec;
  668. const struct dmi_device *dev = NULL;
  669. if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
  670. get_int_hint(codec, "gpio_led_polarity",
  671. &spec->gpio_led_polarity);
  672. return 1;
  673. }
  674. while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
  675. if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
  676. &spec->gpio_led_polarity,
  677. &spec->gpio_led) == 2) {
  678. unsigned int max_gpio;
  679. max_gpio = snd_hda_param_read(codec, codec->core.afg,
  680. AC_PAR_GPIO_CAP);
  681. max_gpio &= AC_GPIO_IO_COUNT;
  682. if (spec->gpio_led < max_gpio)
  683. spec->gpio_led = 1 << spec->gpio_led;
  684. else
  685. spec->vref_mute_led_nid = spec->gpio_led;
  686. return 1;
  687. }
  688. if (sscanf(dev->name, "HP_Mute_LED_%u",
  689. &spec->gpio_led_polarity) == 1) {
  690. set_hp_led_gpio(codec);
  691. return 1;
  692. }
  693. /* BIOS bug: unfilled OEM string */
  694. if (strstr(dev->name, "HP_Mute_LED_P_G")) {
  695. set_hp_led_gpio(codec);
  696. if (default_polarity >= 0)
  697. spec->gpio_led_polarity = default_polarity;
  698. else
  699. spec->gpio_led_polarity = 1;
  700. return 1;
  701. }
  702. }
  703. /*
  704. * Fallback case - if we don't find the DMI strings,
  705. * we statically set the GPIO - if not a B-series system
  706. * and default polarity is provided
  707. */
  708. if (!hp_blike_system(codec->core.subsystem_id) &&
  709. (default_polarity == 0 || default_polarity == 1)) {
  710. set_hp_led_gpio(codec);
  711. spec->gpio_led_polarity = default_polarity;
  712. return 1;
  713. }
  714. return 0;
  715. }
  716. /* check whether a built-in speaker is included in parsed pins */
  717. static bool has_builtin_speaker(struct hda_codec *codec)
  718. {
  719. struct sigmatel_spec *spec = codec->spec;
  720. hda_nid_t *nid_pin;
  721. int nids, i;
  722. if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
  723. nid_pin = spec->gen.autocfg.line_out_pins;
  724. nids = spec->gen.autocfg.line_outs;
  725. } else {
  726. nid_pin = spec->gen.autocfg.speaker_pins;
  727. nids = spec->gen.autocfg.speaker_outs;
  728. }
  729. for (i = 0; i < nids; i++) {
  730. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
  731. if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
  732. return true;
  733. }
  734. return false;
  735. }
  736. /*
  737. * PC beep controls
  738. */
  739. /* create PC beep volume controls */
  740. static int stac_auto_create_beep_ctls(struct hda_codec *codec,
  741. hda_nid_t nid)
  742. {
  743. struct sigmatel_spec *spec = codec->spec;
  744. u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  745. struct snd_kcontrol_new *knew;
  746. static struct snd_kcontrol_new abeep_mute_ctl =
  747. HDA_CODEC_MUTE(NULL, 0, 0, 0);
  748. static struct snd_kcontrol_new dbeep_mute_ctl =
  749. HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
  750. static struct snd_kcontrol_new beep_vol_ctl =
  751. HDA_CODEC_VOLUME(NULL, 0, 0, 0);
  752. /* check for mute support for the the amp */
  753. if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
  754. const struct snd_kcontrol_new *temp;
  755. if (spec->anabeep_nid == nid)
  756. temp = &abeep_mute_ctl;
  757. else
  758. temp = &dbeep_mute_ctl;
  759. knew = snd_hda_gen_add_kctl(&spec->gen,
  760. "Beep Playback Switch", temp);
  761. if (!knew)
  762. return -ENOMEM;
  763. knew->private_value =
  764. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  765. }
  766. /* check to see if there is volume support for the amp */
  767. if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
  768. knew = snd_hda_gen_add_kctl(&spec->gen,
  769. "Beep Playback Volume",
  770. &beep_vol_ctl);
  771. if (!knew)
  772. return -ENOMEM;
  773. knew->private_value =
  774. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  775. }
  776. return 0;
  777. }
  778. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  779. #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
  780. static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
  781. struct snd_ctl_elem_value *ucontrol)
  782. {
  783. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  784. ucontrol->value.integer.value[0] = codec->beep->enabled;
  785. return 0;
  786. }
  787. static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
  788. struct snd_ctl_elem_value *ucontrol)
  789. {
  790. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  791. return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
  792. }
  793. static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
  794. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  795. .name = "Beep Playback Switch",
  796. .info = stac_dig_beep_switch_info,
  797. .get = stac_dig_beep_switch_get,
  798. .put = stac_dig_beep_switch_put,
  799. };
  800. static int stac_beep_switch_ctl(struct hda_codec *codec)
  801. {
  802. struct sigmatel_spec *spec = codec->spec;
  803. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
  804. return -ENOMEM;
  805. return 0;
  806. }
  807. #endif
  808. /*
  809. * SPDIF-out mux controls
  810. */
  811. static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
  812. struct snd_ctl_elem_info *uinfo)
  813. {
  814. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  815. struct sigmatel_spec *spec = codec->spec;
  816. return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
  817. }
  818. static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
  819. struct snd_ctl_elem_value *ucontrol)
  820. {
  821. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  822. struct sigmatel_spec *spec = codec->spec;
  823. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  824. ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
  825. return 0;
  826. }
  827. static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
  828. struct snd_ctl_elem_value *ucontrol)
  829. {
  830. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  831. struct sigmatel_spec *spec = codec->spec;
  832. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  833. return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
  834. spec->gen.autocfg.dig_out_pins[smux_idx],
  835. &spec->cur_smux[smux_idx]);
  836. }
  837. static struct snd_kcontrol_new stac_smux_mixer = {
  838. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  839. .name = "IEC958 Playback Source",
  840. /* count set later */
  841. .info = stac_smux_enum_info,
  842. .get = stac_smux_enum_get,
  843. .put = stac_smux_enum_put,
  844. };
  845. static const char * const stac_spdif_labels[] = {
  846. "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
  847. };
  848. static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
  849. {
  850. struct sigmatel_spec *spec = codec->spec;
  851. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  852. const char * const *labels = spec->spdif_labels;
  853. struct snd_kcontrol_new *kctl;
  854. int i, num_cons;
  855. if (cfg->dig_outs < 1)
  856. return 0;
  857. num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
  858. if (num_cons <= 1)
  859. return 0;
  860. if (!labels)
  861. labels = stac_spdif_labels;
  862. for (i = 0; i < num_cons; i++) {
  863. if (snd_BUG_ON(!labels[i]))
  864. return -EINVAL;
  865. snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
  866. }
  867. kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
  868. if (!kctl)
  869. return -ENOMEM;
  870. kctl->count = cfg->dig_outs;
  871. return 0;
  872. }
  873. /*
  874. */
  875. static const struct hda_verb stac9200_core_init[] = {
  876. /* set dac0mux for dac converter */
  877. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  878. {}
  879. };
  880. static const struct hda_verb stac9200_eapd_init[] = {
  881. /* set dac0mux for dac converter */
  882. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  883. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  884. {}
  885. };
  886. static const struct hda_verb dell_eq_core_init[] = {
  887. /* set master volume to max value without distortion
  888. * and direct control */
  889. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
  890. {}
  891. };
  892. static const struct hda_verb stac92hd73xx_core_init[] = {
  893. /* set master volume and direct control */
  894. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  895. {}
  896. };
  897. static const struct hda_verb stac92hd83xxx_core_init[] = {
  898. /* power state controls amps */
  899. { 0x01, AC_VERB_SET_EAPD, 1 << 2},
  900. {}
  901. };
  902. static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
  903. { 0x22, 0x785, 0x43 },
  904. { 0x22, 0x782, 0xe0 },
  905. { 0x22, 0x795, 0x00 },
  906. {}
  907. };
  908. static const struct hda_verb stac92hd71bxx_core_init[] = {
  909. /* set master volume and direct control */
  910. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  911. {}
  912. };
  913. static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
  914. /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
  915. 0x0f, 0x0a, 0x0d, 0
  916. };
  917. static const struct hda_verb stac925x_core_init[] = {
  918. /* set dac0mux for dac converter */
  919. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  920. /* mute the master volume */
  921. { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
  922. {}
  923. };
  924. static const struct hda_verb stac922x_core_init[] = {
  925. /* set master volume and direct control */
  926. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  927. {}
  928. };
  929. static const struct hda_verb d965_core_init[] = {
  930. /* unmute node 0x1b */
  931. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  932. /* select node 0x03 as DAC */
  933. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  934. {}
  935. };
  936. static const struct hda_verb dell_3st_core_init[] = {
  937. /* don't set delta bit */
  938. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  939. /* unmute node 0x1b */
  940. {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  941. /* select node 0x03 as DAC */
  942. {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  943. {}
  944. };
  945. static const struct hda_verb stac927x_core_init[] = {
  946. /* set master volume and direct control */
  947. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  948. /* enable analog pc beep path */
  949. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  950. {}
  951. };
  952. static const struct hda_verb stac927x_volknob_core_init[] = {
  953. /* don't set delta bit */
  954. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  955. /* enable analog pc beep path */
  956. {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  957. {}
  958. };
  959. static const struct hda_verb stac9205_core_init[] = {
  960. /* set master volume and direct control */
  961. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  962. /* enable analog pc beep path */
  963. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  964. {}
  965. };
  966. static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
  967. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
  968. static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
  969. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
  970. static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
  971. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
  972. static const struct snd_kcontrol_new stac92hd71bxx_loopback =
  973. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
  974. static const struct snd_kcontrol_new stac9205_loopback =
  975. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
  976. static const struct snd_kcontrol_new stac927x_loopback =
  977. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
  978. static const struct hda_pintbl ref9200_pin_configs[] = {
  979. { 0x08, 0x01c47010 },
  980. { 0x09, 0x01447010 },
  981. { 0x0d, 0x0221401f },
  982. { 0x0e, 0x01114010 },
  983. { 0x0f, 0x02a19020 },
  984. { 0x10, 0x01a19021 },
  985. { 0x11, 0x90100140 },
  986. { 0x12, 0x01813122 },
  987. {}
  988. };
  989. static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
  990. { 0x08, 0x400000fe },
  991. { 0x09, 0x404500f4 },
  992. { 0x0d, 0x400100f0 },
  993. { 0x0e, 0x90110010 },
  994. { 0x0f, 0x400100f1 },
  995. { 0x10, 0x02a1902e },
  996. { 0x11, 0x500000f2 },
  997. { 0x12, 0x500000f3 },
  998. {}
  999. };
  1000. static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
  1001. { 0x08, 0x400000fe },
  1002. { 0x09, 0x404500f4 },
  1003. { 0x0d, 0x400100f0 },
  1004. { 0x0e, 0x90110010 },
  1005. { 0x0f, 0x400100f1 },
  1006. { 0x10, 0x02a1902e },
  1007. { 0x11, 0x500000f2 },
  1008. { 0x12, 0x500000f3 },
  1009. {}
  1010. };
  1011. /*
  1012. STAC 9200 pin configs for
  1013. 102801A8
  1014. 102801DE
  1015. 102801E8
  1016. */
  1017. static const struct hda_pintbl dell9200_d21_pin_configs[] = {
  1018. { 0x08, 0x400001f0 },
  1019. { 0x09, 0x400001f1 },
  1020. { 0x0d, 0x02214030 },
  1021. { 0x0e, 0x01014010 },
  1022. { 0x0f, 0x02a19020 },
  1023. { 0x10, 0x01a19021 },
  1024. { 0x11, 0x90100140 },
  1025. { 0x12, 0x01813122 },
  1026. {}
  1027. };
  1028. /*
  1029. STAC 9200 pin configs for
  1030. 102801C0
  1031. 102801C1
  1032. */
  1033. static const struct hda_pintbl dell9200_d22_pin_configs[] = {
  1034. { 0x08, 0x400001f0 },
  1035. { 0x09, 0x400001f1 },
  1036. { 0x0d, 0x0221401f },
  1037. { 0x0e, 0x01014010 },
  1038. { 0x0f, 0x01813020 },
  1039. { 0x10, 0x02a19021 },
  1040. { 0x11, 0x90100140 },
  1041. { 0x12, 0x400001f2 },
  1042. {}
  1043. };
  1044. /*
  1045. STAC 9200 pin configs for
  1046. 102801C4 (Dell Dimension E310)
  1047. 102801C5
  1048. 102801C7
  1049. 102801D9
  1050. 102801DA
  1051. 102801E3
  1052. */
  1053. static const struct hda_pintbl dell9200_d23_pin_configs[] = {
  1054. { 0x08, 0x400001f0 },
  1055. { 0x09, 0x400001f1 },
  1056. { 0x0d, 0x0221401f },
  1057. { 0x0e, 0x01014010 },
  1058. { 0x0f, 0x01813020 },
  1059. { 0x10, 0x01a19021 },
  1060. { 0x11, 0x90100140 },
  1061. { 0x12, 0x400001f2 },
  1062. {}
  1063. };
  1064. /*
  1065. STAC 9200-32 pin configs for
  1066. 102801B5 (Dell Inspiron 630m)
  1067. 102801D8 (Dell Inspiron 640m)
  1068. */
  1069. static const struct hda_pintbl dell9200_m21_pin_configs[] = {
  1070. { 0x08, 0x40c003fa },
  1071. { 0x09, 0x03441340 },
  1072. { 0x0d, 0x0321121f },
  1073. { 0x0e, 0x90170310 },
  1074. { 0x0f, 0x408003fb },
  1075. { 0x10, 0x03a11020 },
  1076. { 0x11, 0x401003fc },
  1077. { 0x12, 0x403003fd },
  1078. {}
  1079. };
  1080. /*
  1081. STAC 9200-32 pin configs for
  1082. 102801C2 (Dell Latitude D620)
  1083. 102801C8
  1084. 102801CC (Dell Latitude D820)
  1085. 102801D4
  1086. 102801D6
  1087. */
  1088. static const struct hda_pintbl dell9200_m22_pin_configs[] = {
  1089. { 0x08, 0x40c003fa },
  1090. { 0x09, 0x0144131f },
  1091. { 0x0d, 0x0321121f },
  1092. { 0x0e, 0x90170310 },
  1093. { 0x0f, 0x90a70321 },
  1094. { 0x10, 0x03a11020 },
  1095. { 0x11, 0x401003fb },
  1096. { 0x12, 0x40f000fc },
  1097. {}
  1098. };
  1099. /*
  1100. STAC 9200-32 pin configs for
  1101. 102801CE (Dell XPS M1710)
  1102. 102801CF (Dell Precision M90)
  1103. */
  1104. static const struct hda_pintbl dell9200_m23_pin_configs[] = {
  1105. { 0x08, 0x40c003fa },
  1106. { 0x09, 0x01441340 },
  1107. { 0x0d, 0x0421421f },
  1108. { 0x0e, 0x90170310 },
  1109. { 0x0f, 0x408003fb },
  1110. { 0x10, 0x04a1102e },
  1111. { 0x11, 0x90170311 },
  1112. { 0x12, 0x403003fc },
  1113. {}
  1114. };
  1115. /*
  1116. STAC 9200-32 pin configs for
  1117. 102801C9
  1118. 102801CA
  1119. 102801CB (Dell Latitude 120L)
  1120. 102801D3
  1121. */
  1122. static const struct hda_pintbl dell9200_m24_pin_configs[] = {
  1123. { 0x08, 0x40c003fa },
  1124. { 0x09, 0x404003fb },
  1125. { 0x0d, 0x0321121f },
  1126. { 0x0e, 0x90170310 },
  1127. { 0x0f, 0x408003fc },
  1128. { 0x10, 0x03a11020 },
  1129. { 0x11, 0x401003fd },
  1130. { 0x12, 0x403003fe },
  1131. {}
  1132. };
  1133. /*
  1134. STAC 9200-32 pin configs for
  1135. 102801BD (Dell Inspiron E1505n)
  1136. 102801EE
  1137. 102801EF
  1138. */
  1139. static const struct hda_pintbl dell9200_m25_pin_configs[] = {
  1140. { 0x08, 0x40c003fa },
  1141. { 0x09, 0x01441340 },
  1142. { 0x0d, 0x0421121f },
  1143. { 0x0e, 0x90170310 },
  1144. { 0x0f, 0x408003fb },
  1145. { 0x10, 0x04a11020 },
  1146. { 0x11, 0x401003fc },
  1147. { 0x12, 0x403003fd },
  1148. {}
  1149. };
  1150. /*
  1151. STAC 9200-32 pin configs for
  1152. 102801F5 (Dell Inspiron 1501)
  1153. 102801F6
  1154. */
  1155. static const struct hda_pintbl dell9200_m26_pin_configs[] = {
  1156. { 0x08, 0x40c003fa },
  1157. { 0x09, 0x404003fb },
  1158. { 0x0d, 0x0421121f },
  1159. { 0x0e, 0x90170310 },
  1160. { 0x0f, 0x408003fc },
  1161. { 0x10, 0x04a11020 },
  1162. { 0x11, 0x401003fd },
  1163. { 0x12, 0x403003fe },
  1164. {}
  1165. };
  1166. /*
  1167. STAC 9200-32
  1168. 102801CD (Dell Inspiron E1705/9400)
  1169. */
  1170. static const struct hda_pintbl dell9200_m27_pin_configs[] = {
  1171. { 0x08, 0x40c003fa },
  1172. { 0x09, 0x01441340 },
  1173. { 0x0d, 0x0421121f },
  1174. { 0x0e, 0x90170310 },
  1175. { 0x0f, 0x90170310 },
  1176. { 0x10, 0x04a11020 },
  1177. { 0x11, 0x90170310 },
  1178. { 0x12, 0x40f003fc },
  1179. {}
  1180. };
  1181. static const struct hda_pintbl oqo9200_pin_configs[] = {
  1182. { 0x08, 0x40c000f0 },
  1183. { 0x09, 0x404000f1 },
  1184. { 0x0d, 0x0221121f },
  1185. { 0x0e, 0x02211210 },
  1186. { 0x0f, 0x90170111 },
  1187. { 0x10, 0x90a70120 },
  1188. { 0x11, 0x400000f2 },
  1189. { 0x12, 0x400000f3 },
  1190. {}
  1191. };
  1192. static void stac9200_fixup_panasonic(struct hda_codec *codec,
  1193. const struct hda_fixup *fix, int action)
  1194. {
  1195. struct sigmatel_spec *spec = codec->spec;
  1196. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1197. spec->gpio_mask = spec->gpio_dir = 0x09;
  1198. spec->gpio_data = 0x00;
  1199. /* CF-74 has no headphone detection, and the driver should *NOT*
  1200. * do detection and HP/speaker toggle because the hardware does it.
  1201. */
  1202. spec->gen.suppress_auto_mute = 1;
  1203. }
  1204. }
  1205. static const struct hda_fixup stac9200_fixups[] = {
  1206. [STAC_REF] = {
  1207. .type = HDA_FIXUP_PINS,
  1208. .v.pins = ref9200_pin_configs,
  1209. },
  1210. [STAC_9200_OQO] = {
  1211. .type = HDA_FIXUP_PINS,
  1212. .v.pins = oqo9200_pin_configs,
  1213. .chained = true,
  1214. .chain_id = STAC_9200_EAPD_INIT,
  1215. },
  1216. [STAC_9200_DELL_D21] = {
  1217. .type = HDA_FIXUP_PINS,
  1218. .v.pins = dell9200_d21_pin_configs,
  1219. },
  1220. [STAC_9200_DELL_D22] = {
  1221. .type = HDA_FIXUP_PINS,
  1222. .v.pins = dell9200_d22_pin_configs,
  1223. },
  1224. [STAC_9200_DELL_D23] = {
  1225. .type = HDA_FIXUP_PINS,
  1226. .v.pins = dell9200_d23_pin_configs,
  1227. },
  1228. [STAC_9200_DELL_M21] = {
  1229. .type = HDA_FIXUP_PINS,
  1230. .v.pins = dell9200_m21_pin_configs,
  1231. },
  1232. [STAC_9200_DELL_M22] = {
  1233. .type = HDA_FIXUP_PINS,
  1234. .v.pins = dell9200_m22_pin_configs,
  1235. },
  1236. [STAC_9200_DELL_M23] = {
  1237. .type = HDA_FIXUP_PINS,
  1238. .v.pins = dell9200_m23_pin_configs,
  1239. },
  1240. [STAC_9200_DELL_M24] = {
  1241. .type = HDA_FIXUP_PINS,
  1242. .v.pins = dell9200_m24_pin_configs,
  1243. },
  1244. [STAC_9200_DELL_M25] = {
  1245. .type = HDA_FIXUP_PINS,
  1246. .v.pins = dell9200_m25_pin_configs,
  1247. },
  1248. [STAC_9200_DELL_M26] = {
  1249. .type = HDA_FIXUP_PINS,
  1250. .v.pins = dell9200_m26_pin_configs,
  1251. },
  1252. [STAC_9200_DELL_M27] = {
  1253. .type = HDA_FIXUP_PINS,
  1254. .v.pins = dell9200_m27_pin_configs,
  1255. },
  1256. [STAC_9200_M4] = {
  1257. .type = HDA_FIXUP_PINS,
  1258. .v.pins = gateway9200_m4_pin_configs,
  1259. .chained = true,
  1260. .chain_id = STAC_9200_EAPD_INIT,
  1261. },
  1262. [STAC_9200_M4_2] = {
  1263. .type = HDA_FIXUP_PINS,
  1264. .v.pins = gateway9200_m4_2_pin_configs,
  1265. .chained = true,
  1266. .chain_id = STAC_9200_EAPD_INIT,
  1267. },
  1268. [STAC_9200_PANASONIC] = {
  1269. .type = HDA_FIXUP_FUNC,
  1270. .v.func = stac9200_fixup_panasonic,
  1271. },
  1272. [STAC_9200_EAPD_INIT] = {
  1273. .type = HDA_FIXUP_VERBS,
  1274. .v.verbs = (const struct hda_verb[]) {
  1275. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  1276. {}
  1277. },
  1278. },
  1279. };
  1280. static const struct hda_model_fixup stac9200_models[] = {
  1281. { .id = STAC_REF, .name = "ref" },
  1282. { .id = STAC_9200_OQO, .name = "oqo" },
  1283. { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
  1284. { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
  1285. { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
  1286. { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
  1287. { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
  1288. { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
  1289. { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
  1290. { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
  1291. { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
  1292. { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
  1293. { .id = STAC_9200_M4, .name = "gateway-m4" },
  1294. { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
  1295. { .id = STAC_9200_PANASONIC, .name = "panasonic" },
  1296. {}
  1297. };
  1298. static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
  1299. /* SigmaTel reference board */
  1300. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1301. "DFI LanParty", STAC_REF),
  1302. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1303. "DFI LanParty", STAC_REF),
  1304. /* Dell laptops have BIOS problem */
  1305. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  1306. "unknown Dell", STAC_9200_DELL_D21),
  1307. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  1308. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  1309. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  1310. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  1311. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  1312. "unknown Dell", STAC_9200_DELL_D22),
  1313. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  1314. "unknown Dell", STAC_9200_DELL_D22),
  1315. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  1316. "Dell Latitude D620", STAC_9200_DELL_M22),
  1317. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  1318. "unknown Dell", STAC_9200_DELL_D23),
  1319. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  1320. "unknown Dell", STAC_9200_DELL_D23),
  1321. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  1322. "unknown Dell", STAC_9200_DELL_M22),
  1323. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  1324. "unknown Dell", STAC_9200_DELL_M24),
  1325. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  1326. "unknown Dell", STAC_9200_DELL_M24),
  1327. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  1328. "Dell Latitude 120L", STAC_9200_DELL_M24),
  1329. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  1330. "Dell Latitude D820", STAC_9200_DELL_M22),
  1331. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  1332. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  1333. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  1334. "Dell XPS M1710", STAC_9200_DELL_M23),
  1335. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  1336. "Dell Precision M90", STAC_9200_DELL_M23),
  1337. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  1338. "unknown Dell", STAC_9200_DELL_M22),
  1339. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  1340. "unknown Dell", STAC_9200_DELL_M22),
  1341. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  1342. "unknown Dell", STAC_9200_DELL_M22),
  1343. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  1344. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  1345. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  1346. "unknown Dell", STAC_9200_DELL_D23),
  1347. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  1348. "unknown Dell", STAC_9200_DELL_D23),
  1349. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  1350. "unknown Dell", STAC_9200_DELL_D21),
  1351. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  1352. "unknown Dell", STAC_9200_DELL_D23),
  1353. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  1354. "unknown Dell", STAC_9200_DELL_D21),
  1355. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  1356. "unknown Dell", STAC_9200_DELL_M25),
  1357. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  1358. "unknown Dell", STAC_9200_DELL_M25),
  1359. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  1360. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  1361. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  1362. "unknown Dell", STAC_9200_DELL_M26),
  1363. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201,
  1364. "Dell Latitude D430", STAC_9200_DELL_M22),
  1365. /* Panasonic */
  1366. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
  1367. /* Gateway machines needs EAPD to be set on resume */
  1368. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
  1369. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
  1370. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
  1371. /* OQO Mobile */
  1372. SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
  1373. {} /* terminator */
  1374. };
  1375. static const struct hda_pintbl ref925x_pin_configs[] = {
  1376. { 0x07, 0x40c003f0 },
  1377. { 0x08, 0x424503f2 },
  1378. { 0x0a, 0x01813022 },
  1379. { 0x0b, 0x02a19021 },
  1380. { 0x0c, 0x90a70320 },
  1381. { 0x0d, 0x02214210 },
  1382. { 0x10, 0x01019020 },
  1383. { 0x11, 0x9033032e },
  1384. {}
  1385. };
  1386. static const struct hda_pintbl stac925xM1_pin_configs[] = {
  1387. { 0x07, 0x40c003f4 },
  1388. { 0x08, 0x424503f2 },
  1389. { 0x0a, 0x400000f3 },
  1390. { 0x0b, 0x02a19020 },
  1391. { 0x0c, 0x40a000f0 },
  1392. { 0x0d, 0x90100210 },
  1393. { 0x10, 0x400003f1 },
  1394. { 0x11, 0x9033032e },
  1395. {}
  1396. };
  1397. static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
  1398. { 0x07, 0x40c003f4 },
  1399. { 0x08, 0x424503f2 },
  1400. { 0x0a, 0x400000f3 },
  1401. { 0x0b, 0x02a19020 },
  1402. { 0x0c, 0x40a000f0 },
  1403. { 0x0d, 0x90100210 },
  1404. { 0x10, 0x400003f1 },
  1405. { 0x11, 0x9033032e },
  1406. {}
  1407. };
  1408. static const struct hda_pintbl stac925xM2_pin_configs[] = {
  1409. { 0x07, 0x40c003f4 },
  1410. { 0x08, 0x424503f2 },
  1411. { 0x0a, 0x400000f3 },
  1412. { 0x0b, 0x02a19020 },
  1413. { 0x0c, 0x40a000f0 },
  1414. { 0x0d, 0x90100210 },
  1415. { 0x10, 0x400003f1 },
  1416. { 0x11, 0x9033032e },
  1417. {}
  1418. };
  1419. static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
  1420. { 0x07, 0x40c003f4 },
  1421. { 0x08, 0x424503f2 },
  1422. { 0x0a, 0x400000f3 },
  1423. { 0x0b, 0x02a19020 },
  1424. { 0x0c, 0x40a000f0 },
  1425. { 0x0d, 0x90100210 },
  1426. { 0x10, 0x400003f1 },
  1427. { 0x11, 0x9033032e },
  1428. {}
  1429. };
  1430. static const struct hda_pintbl stac925xM3_pin_configs[] = {
  1431. { 0x07, 0x40c003f4 },
  1432. { 0x08, 0x424503f2 },
  1433. { 0x0a, 0x400000f3 },
  1434. { 0x0b, 0x02a19020 },
  1435. { 0x0c, 0x40a000f0 },
  1436. { 0x0d, 0x90100210 },
  1437. { 0x10, 0x400003f1 },
  1438. { 0x11, 0x503303f3 },
  1439. {}
  1440. };
  1441. static const struct hda_pintbl stac925xM5_pin_configs[] = {
  1442. { 0x07, 0x40c003f4 },
  1443. { 0x08, 0x424503f2 },
  1444. { 0x0a, 0x400000f3 },
  1445. { 0x0b, 0x02a19020 },
  1446. { 0x0c, 0x40a000f0 },
  1447. { 0x0d, 0x90100210 },
  1448. { 0x10, 0x400003f1 },
  1449. { 0x11, 0x9033032e },
  1450. {}
  1451. };
  1452. static const struct hda_pintbl stac925xM6_pin_configs[] = {
  1453. { 0x07, 0x40c003f4 },
  1454. { 0x08, 0x424503f2 },
  1455. { 0x0a, 0x400000f3 },
  1456. { 0x0b, 0x02a19020 },
  1457. { 0x0c, 0x40a000f0 },
  1458. { 0x0d, 0x90100210 },
  1459. { 0x10, 0x400003f1 },
  1460. { 0x11, 0x90330320 },
  1461. {}
  1462. };
  1463. static const struct hda_fixup stac925x_fixups[] = {
  1464. [STAC_REF] = {
  1465. .type = HDA_FIXUP_PINS,
  1466. .v.pins = ref925x_pin_configs,
  1467. },
  1468. [STAC_M1] = {
  1469. .type = HDA_FIXUP_PINS,
  1470. .v.pins = stac925xM1_pin_configs,
  1471. },
  1472. [STAC_M1_2] = {
  1473. .type = HDA_FIXUP_PINS,
  1474. .v.pins = stac925xM1_2_pin_configs,
  1475. },
  1476. [STAC_M2] = {
  1477. .type = HDA_FIXUP_PINS,
  1478. .v.pins = stac925xM2_pin_configs,
  1479. },
  1480. [STAC_M2_2] = {
  1481. .type = HDA_FIXUP_PINS,
  1482. .v.pins = stac925xM2_2_pin_configs,
  1483. },
  1484. [STAC_M3] = {
  1485. .type = HDA_FIXUP_PINS,
  1486. .v.pins = stac925xM3_pin_configs,
  1487. },
  1488. [STAC_M5] = {
  1489. .type = HDA_FIXUP_PINS,
  1490. .v.pins = stac925xM5_pin_configs,
  1491. },
  1492. [STAC_M6] = {
  1493. .type = HDA_FIXUP_PINS,
  1494. .v.pins = stac925xM6_pin_configs,
  1495. },
  1496. };
  1497. static const struct hda_model_fixup stac925x_models[] = {
  1498. { .id = STAC_REF, .name = "ref" },
  1499. { .id = STAC_M1, .name = "m1" },
  1500. { .id = STAC_M1_2, .name = "m1-2" },
  1501. { .id = STAC_M2, .name = "m2" },
  1502. { .id = STAC_M2_2, .name = "m2-2" },
  1503. { .id = STAC_M3, .name = "m3" },
  1504. { .id = STAC_M5, .name = "m5" },
  1505. { .id = STAC_M6, .name = "m6" },
  1506. {}
  1507. };
  1508. static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
  1509. /* SigmaTel reference board */
  1510. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  1511. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
  1512. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  1513. /* Default table for unknown ID */
  1514. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
  1515. /* gateway machines are checked via codec ssid */
  1516. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
  1517. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
  1518. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
  1519. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
  1520. SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
  1521. /* Not sure about the brand name for those */
  1522. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
  1523. SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
  1524. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
  1525. SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
  1526. {} /* terminator */
  1527. };
  1528. static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
  1529. { 0x0a, 0x02214030 },
  1530. { 0x0b, 0x02a19040 },
  1531. { 0x0c, 0x01a19020 },
  1532. { 0x0d, 0x02214030 },
  1533. { 0x0e, 0x0181302e },
  1534. { 0x0f, 0x01014010 },
  1535. { 0x10, 0x01014020 },
  1536. { 0x11, 0x01014030 },
  1537. { 0x12, 0x02319040 },
  1538. { 0x13, 0x90a000f0 },
  1539. { 0x14, 0x90a000f0 },
  1540. { 0x22, 0x01452050 },
  1541. { 0x23, 0x01452050 },
  1542. {}
  1543. };
  1544. static const struct hda_pintbl dell_m6_pin_configs[] = {
  1545. { 0x0a, 0x0321101f },
  1546. { 0x0b, 0x4f00000f },
  1547. { 0x0c, 0x4f0000f0 },
  1548. { 0x0d, 0x90170110 },
  1549. { 0x0e, 0x03a11020 },
  1550. { 0x0f, 0x0321101f },
  1551. { 0x10, 0x4f0000f0 },
  1552. { 0x11, 0x4f0000f0 },
  1553. { 0x12, 0x4f0000f0 },
  1554. { 0x13, 0x90a60160 },
  1555. { 0x14, 0x4f0000f0 },
  1556. { 0x22, 0x4f0000f0 },
  1557. { 0x23, 0x4f0000f0 },
  1558. {}
  1559. };
  1560. static const struct hda_pintbl alienware_m17x_pin_configs[] = {
  1561. { 0x0a, 0x0321101f },
  1562. { 0x0b, 0x0321101f },
  1563. { 0x0c, 0x03a11020 },
  1564. { 0x0d, 0x03014020 },
  1565. { 0x0e, 0x90170110 },
  1566. { 0x0f, 0x4f0000f0 },
  1567. { 0x10, 0x4f0000f0 },
  1568. { 0x11, 0x4f0000f0 },
  1569. { 0x12, 0x4f0000f0 },
  1570. { 0x13, 0x90a60160 },
  1571. { 0x14, 0x4f0000f0 },
  1572. { 0x22, 0x4f0000f0 },
  1573. { 0x23, 0x904601b0 },
  1574. {}
  1575. };
  1576. static const struct hda_pintbl intel_dg45id_pin_configs[] = {
  1577. { 0x0a, 0x02214230 },
  1578. { 0x0b, 0x02A19240 },
  1579. { 0x0c, 0x01013214 },
  1580. { 0x0d, 0x01014210 },
  1581. { 0x0e, 0x01A19250 },
  1582. { 0x0f, 0x01011212 },
  1583. { 0x10, 0x01016211 },
  1584. {}
  1585. };
  1586. static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
  1587. { 0x0a, 0x02214030 },
  1588. { 0x0b, 0x02A19010 },
  1589. {}
  1590. };
  1591. static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
  1592. { 0x0e, 0x400000f0 },
  1593. {}
  1594. };
  1595. static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
  1596. const struct hda_fixup *fix, int action)
  1597. {
  1598. struct sigmatel_spec *spec = codec->spec;
  1599. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1600. return;
  1601. snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
  1602. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  1603. }
  1604. static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
  1605. {
  1606. struct sigmatel_spec *spec = codec->spec;
  1607. snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
  1608. spec->eapd_switch = 0;
  1609. }
  1610. static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
  1611. const struct hda_fixup *fix, int action)
  1612. {
  1613. struct sigmatel_spec *spec = codec->spec;
  1614. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1615. return;
  1616. stac92hd73xx_fixup_dell(codec);
  1617. snd_hda_add_verbs(codec, dell_eq_core_init);
  1618. spec->volknob_init = 1;
  1619. }
  1620. /* Analog Mics */
  1621. static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
  1622. const struct hda_fixup *fix, int action)
  1623. {
  1624. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1625. return;
  1626. stac92hd73xx_fixup_dell(codec);
  1627. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1628. }
  1629. /* Digital Mics */
  1630. static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
  1631. const struct hda_fixup *fix, int action)
  1632. {
  1633. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1634. return;
  1635. stac92hd73xx_fixup_dell(codec);
  1636. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1637. }
  1638. /* Both */
  1639. static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
  1640. const struct hda_fixup *fix, int action)
  1641. {
  1642. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1643. return;
  1644. stac92hd73xx_fixup_dell(codec);
  1645. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1646. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1647. }
  1648. static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
  1649. const struct hda_fixup *fix, int action)
  1650. {
  1651. struct sigmatel_spec *spec = codec->spec;
  1652. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1653. return;
  1654. snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
  1655. spec->eapd_switch = 0;
  1656. }
  1657. static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
  1658. const struct hda_fixup *fix, int action)
  1659. {
  1660. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1661. codec->no_jack_detect = 1;
  1662. }
  1663. static const struct hda_fixup stac92hd73xx_fixups[] = {
  1664. [STAC_92HD73XX_REF] = {
  1665. .type = HDA_FIXUP_FUNC,
  1666. .v.func = stac92hd73xx_fixup_ref,
  1667. },
  1668. [STAC_DELL_M6_AMIC] = {
  1669. .type = HDA_FIXUP_FUNC,
  1670. .v.func = stac92hd73xx_fixup_dell_m6_amic,
  1671. },
  1672. [STAC_DELL_M6_DMIC] = {
  1673. .type = HDA_FIXUP_FUNC,
  1674. .v.func = stac92hd73xx_fixup_dell_m6_dmic,
  1675. },
  1676. [STAC_DELL_M6_BOTH] = {
  1677. .type = HDA_FIXUP_FUNC,
  1678. .v.func = stac92hd73xx_fixup_dell_m6_both,
  1679. },
  1680. [STAC_DELL_EQ] = {
  1681. .type = HDA_FIXUP_FUNC,
  1682. .v.func = stac92hd73xx_fixup_dell_eq,
  1683. },
  1684. [STAC_ALIENWARE_M17X] = {
  1685. .type = HDA_FIXUP_FUNC,
  1686. .v.func = stac92hd73xx_fixup_alienware_m17x,
  1687. },
  1688. [STAC_92HD73XX_INTEL] = {
  1689. .type = HDA_FIXUP_PINS,
  1690. .v.pins = intel_dg45id_pin_configs,
  1691. },
  1692. [STAC_92HD73XX_NO_JD] = {
  1693. .type = HDA_FIXUP_FUNC,
  1694. .v.func = stac92hd73xx_fixup_no_jd,
  1695. },
  1696. [STAC_92HD89XX_HP_FRONT_JACK] = {
  1697. .type = HDA_FIXUP_PINS,
  1698. .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
  1699. },
  1700. [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
  1701. .type = HDA_FIXUP_PINS,
  1702. .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
  1703. },
  1704. [STAC_92HD73XX_ASUS_MOBO] = {
  1705. .type = HDA_FIXUP_PINS,
  1706. .v.pins = (const struct hda_pintbl[]) {
  1707. /* enable 5.1 and SPDIF out */
  1708. { 0x0c, 0x01014411 },
  1709. { 0x0d, 0x01014410 },
  1710. { 0x0e, 0x01014412 },
  1711. { 0x22, 0x014b1180 },
  1712. { }
  1713. }
  1714. },
  1715. };
  1716. static const struct hda_model_fixup stac92hd73xx_models[] = {
  1717. { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
  1718. { .id = STAC_92HD73XX_REF, .name = "ref" },
  1719. { .id = STAC_92HD73XX_INTEL, .name = "intel" },
  1720. { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
  1721. { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
  1722. { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
  1723. { .id = STAC_DELL_EQ, .name = "dell-eq" },
  1724. { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
  1725. { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
  1726. {}
  1727. };
  1728. static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
  1729. /* SigmaTel reference board */
  1730. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1731. "DFI LanParty", STAC_92HD73XX_REF),
  1732. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1733. "DFI LanParty", STAC_92HD73XX_REF),
  1734. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
  1735. "Intel DG45ID", STAC_92HD73XX_INTEL),
  1736. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
  1737. "Intel DG45FC", STAC_92HD73XX_INTEL),
  1738. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
  1739. "Dell Studio 1535", STAC_DELL_M6_DMIC),
  1740. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
  1741. "unknown Dell", STAC_DELL_M6_DMIC),
  1742. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
  1743. "unknown Dell", STAC_DELL_M6_BOTH),
  1744. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
  1745. "unknown Dell", STAC_DELL_M6_BOTH),
  1746. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
  1747. "unknown Dell", STAC_DELL_M6_AMIC),
  1748. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
  1749. "unknown Dell", STAC_DELL_M6_AMIC),
  1750. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
  1751. "unknown Dell", STAC_DELL_M6_DMIC),
  1752. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
  1753. "unknown Dell", STAC_DELL_M6_DMIC),
  1754. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
  1755. "Dell Studio 1537", STAC_DELL_M6_DMIC),
  1756. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
  1757. "Dell Studio 17", STAC_DELL_M6_DMIC),
  1758. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
  1759. "Dell Studio 1555", STAC_DELL_M6_DMIC),
  1760. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
  1761. "Dell Studio 1557", STAC_DELL_M6_DMIC),
  1762. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
  1763. "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
  1764. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
  1765. "Dell Studio 1558", STAC_DELL_M6_DMIC),
  1766. /* codec SSID matching */
  1767. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
  1768. "Alienware M17x", STAC_ALIENWARE_M17X),
  1769. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
  1770. "Alienware M17x", STAC_ALIENWARE_M17X),
  1771. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
  1772. "Alienware M17x R3", STAC_DELL_EQ),
  1773. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
  1774. "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
  1775. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
  1776. "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
  1777. SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
  1778. STAC_92HD73XX_ASUS_MOBO),
  1779. {} /* terminator */
  1780. };
  1781. static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
  1782. { 0x0a, 0x02214030 },
  1783. { 0x0b, 0x02211010 },
  1784. { 0x0c, 0x02a19020 },
  1785. { 0x0d, 0x02170130 },
  1786. { 0x0e, 0x01014050 },
  1787. { 0x0f, 0x01819040 },
  1788. { 0x10, 0x01014020 },
  1789. { 0x11, 0x90a3014e },
  1790. { 0x1f, 0x01451160 },
  1791. { 0x20, 0x98560170 },
  1792. {}
  1793. };
  1794. static const struct hda_pintbl dell_s14_pin_configs[] = {
  1795. { 0x0a, 0x0221403f },
  1796. { 0x0b, 0x0221101f },
  1797. { 0x0c, 0x02a19020 },
  1798. { 0x0d, 0x90170110 },
  1799. { 0x0e, 0x40f000f0 },
  1800. { 0x0f, 0x40f000f0 },
  1801. { 0x10, 0x40f000f0 },
  1802. { 0x11, 0x90a60160 },
  1803. { 0x1f, 0x40f000f0 },
  1804. { 0x20, 0x40f000f0 },
  1805. {}
  1806. };
  1807. static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
  1808. { 0x0a, 0x02a11020 },
  1809. { 0x0b, 0x0221101f },
  1810. { 0x0c, 0x400000f0 },
  1811. { 0x0d, 0x90170110 },
  1812. { 0x0e, 0x400000f1 },
  1813. { 0x0f, 0x400000f2 },
  1814. { 0x10, 0x400000f3 },
  1815. { 0x11, 0x90a60160 },
  1816. { 0x1f, 0x400000f4 },
  1817. { 0x20, 0x400000f5 },
  1818. {}
  1819. };
  1820. static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
  1821. { 0x0a, 0x03a12050 },
  1822. { 0x0b, 0x0321201f },
  1823. { 0x0c, 0x40f000f0 },
  1824. { 0x0d, 0x90170110 },
  1825. { 0x0e, 0x40f000f0 },
  1826. { 0x0f, 0x40f000f0 },
  1827. { 0x10, 0x90170110 },
  1828. { 0x11, 0xd5a30140 },
  1829. { 0x1f, 0x40f000f0 },
  1830. { 0x20, 0x40f000f0 },
  1831. {}
  1832. };
  1833. static const struct hda_pintbl hp_zephyr_pin_configs[] = {
  1834. { 0x0a, 0x01813050 },
  1835. { 0x0b, 0x0421201f },
  1836. { 0x0c, 0x04a1205e },
  1837. { 0x0d, 0x96130310 },
  1838. { 0x0e, 0x96130310 },
  1839. { 0x0f, 0x0101401f },
  1840. { 0x10, 0x1111611f },
  1841. { 0x11, 0xd5a30130 },
  1842. {}
  1843. };
  1844. static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
  1845. { 0x0a, 0x40f000f0 },
  1846. { 0x0b, 0x0221101f },
  1847. { 0x0c, 0x02a11020 },
  1848. { 0x0d, 0x92170110 },
  1849. { 0x0e, 0x40f000f0 },
  1850. { 0x0f, 0x92170110 },
  1851. { 0x10, 0x40f000f0 },
  1852. { 0x11, 0xd5a30130 },
  1853. { 0x1f, 0x40f000f0 },
  1854. { 0x20, 0x40f000f0 },
  1855. {}
  1856. };
  1857. static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
  1858. const struct hda_fixup *fix, int action)
  1859. {
  1860. struct sigmatel_spec *spec = codec->spec;
  1861. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1862. return;
  1863. if (hp_bnb2011_with_dock(codec)) {
  1864. snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
  1865. snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
  1866. }
  1867. if (find_mute_led_cfg(codec, spec->default_polarity))
  1868. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  1869. spec->gpio_led,
  1870. spec->gpio_led_polarity);
  1871. /* allow auto-switching of dock line-in */
  1872. spec->gen.line_in_auto_switch = true;
  1873. }
  1874. static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
  1875. const struct hda_fixup *fix, int action)
  1876. {
  1877. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1878. return;
  1879. snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
  1880. snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
  1881. }
  1882. static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
  1883. const struct hda_fixup *fix, int action)
  1884. {
  1885. struct sigmatel_spec *spec = codec->spec;
  1886. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1887. spec->default_polarity = 0;
  1888. }
  1889. static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
  1890. const struct hda_fixup *fix, int action)
  1891. {
  1892. struct sigmatel_spec *spec = codec->spec;
  1893. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1894. spec->default_polarity = 1;
  1895. }
  1896. static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
  1897. const struct hda_fixup *fix, int action)
  1898. {
  1899. struct sigmatel_spec *spec = codec->spec;
  1900. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1901. spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
  1902. #ifdef CONFIG_PM
  1903. /* resetting controller clears GPIO, so we need to keep on */
  1904. codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
  1905. #endif
  1906. }
  1907. }
  1908. static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
  1909. const struct hda_fixup *fix, int action)
  1910. {
  1911. struct sigmatel_spec *spec = codec->spec;
  1912. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1913. spec->gpio_led = 0x10; /* GPIO4 */
  1914. spec->default_polarity = 0;
  1915. }
  1916. }
  1917. static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
  1918. const struct hda_fixup *fix, int action)
  1919. {
  1920. struct sigmatel_spec *spec = codec->spec;
  1921. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1922. spec->headset_jack = 1;
  1923. }
  1924. static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
  1925. const struct hda_fixup *fix,
  1926. int action)
  1927. {
  1928. struct sigmatel_spec *spec = codec->spec;
  1929. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1930. return;
  1931. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
  1932. spec->gpio_data = 0x10;
  1933. spec->eapd_switch = 0;
  1934. }
  1935. static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
  1936. const struct hda_fixup *fix,
  1937. int action)
  1938. {
  1939. struct sigmatel_spec *spec = codec->spec;
  1940. static hda_nid_t preferred_pairs[] = {
  1941. 0xd, 0x13,
  1942. 0
  1943. };
  1944. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1945. return;
  1946. spec->gen.preferred_dacs = preferred_pairs;
  1947. }
  1948. static const struct hda_verb hp_bnb13_eq_verbs[] = {
  1949. /* 44.1KHz base */
  1950. { 0x22, 0x7A6, 0x3E },
  1951. { 0x22, 0x7A7, 0x68 },
  1952. { 0x22, 0x7A8, 0x17 },
  1953. { 0x22, 0x7A9, 0x3E },
  1954. { 0x22, 0x7AA, 0x68 },
  1955. { 0x22, 0x7AB, 0x17 },
  1956. { 0x22, 0x7AC, 0x00 },
  1957. { 0x22, 0x7AD, 0x80 },
  1958. { 0x22, 0x7A6, 0x83 },
  1959. { 0x22, 0x7A7, 0x2F },
  1960. { 0x22, 0x7A8, 0xD1 },
  1961. { 0x22, 0x7A9, 0x83 },
  1962. { 0x22, 0x7AA, 0x2F },
  1963. { 0x22, 0x7AB, 0xD1 },
  1964. { 0x22, 0x7AC, 0x01 },
  1965. { 0x22, 0x7AD, 0x80 },
  1966. { 0x22, 0x7A6, 0x3E },
  1967. { 0x22, 0x7A7, 0x68 },
  1968. { 0x22, 0x7A8, 0x17 },
  1969. { 0x22, 0x7A9, 0x3E },
  1970. { 0x22, 0x7AA, 0x68 },
  1971. { 0x22, 0x7AB, 0x17 },
  1972. { 0x22, 0x7AC, 0x02 },
  1973. { 0x22, 0x7AD, 0x80 },
  1974. { 0x22, 0x7A6, 0x7C },
  1975. { 0x22, 0x7A7, 0xC6 },
  1976. { 0x22, 0x7A8, 0x0C },
  1977. { 0x22, 0x7A9, 0x7C },
  1978. { 0x22, 0x7AA, 0xC6 },
  1979. { 0x22, 0x7AB, 0x0C },
  1980. { 0x22, 0x7AC, 0x03 },
  1981. { 0x22, 0x7AD, 0x80 },
  1982. { 0x22, 0x7A6, 0xC3 },
  1983. { 0x22, 0x7A7, 0x25 },
  1984. { 0x22, 0x7A8, 0xAF },
  1985. { 0x22, 0x7A9, 0xC3 },
  1986. { 0x22, 0x7AA, 0x25 },
  1987. { 0x22, 0x7AB, 0xAF },
  1988. { 0x22, 0x7AC, 0x04 },
  1989. { 0x22, 0x7AD, 0x80 },
  1990. { 0x22, 0x7A6, 0x3E },
  1991. { 0x22, 0x7A7, 0x85 },
  1992. { 0x22, 0x7A8, 0x73 },
  1993. { 0x22, 0x7A9, 0x3E },
  1994. { 0x22, 0x7AA, 0x85 },
  1995. { 0x22, 0x7AB, 0x73 },
  1996. { 0x22, 0x7AC, 0x05 },
  1997. { 0x22, 0x7AD, 0x80 },
  1998. { 0x22, 0x7A6, 0x85 },
  1999. { 0x22, 0x7A7, 0x39 },
  2000. { 0x22, 0x7A8, 0xC7 },
  2001. { 0x22, 0x7A9, 0x85 },
  2002. { 0x22, 0x7AA, 0x39 },
  2003. { 0x22, 0x7AB, 0xC7 },
  2004. { 0x22, 0x7AC, 0x06 },
  2005. { 0x22, 0x7AD, 0x80 },
  2006. { 0x22, 0x7A6, 0x3C },
  2007. { 0x22, 0x7A7, 0x90 },
  2008. { 0x22, 0x7A8, 0xB0 },
  2009. { 0x22, 0x7A9, 0x3C },
  2010. { 0x22, 0x7AA, 0x90 },
  2011. { 0x22, 0x7AB, 0xB0 },
  2012. { 0x22, 0x7AC, 0x07 },
  2013. { 0x22, 0x7AD, 0x80 },
  2014. { 0x22, 0x7A6, 0x7A },
  2015. { 0x22, 0x7A7, 0xC6 },
  2016. { 0x22, 0x7A8, 0x39 },
  2017. { 0x22, 0x7A9, 0x7A },
  2018. { 0x22, 0x7AA, 0xC6 },
  2019. { 0x22, 0x7AB, 0x39 },
  2020. { 0x22, 0x7AC, 0x08 },
  2021. { 0x22, 0x7AD, 0x80 },
  2022. { 0x22, 0x7A6, 0xC4 },
  2023. { 0x22, 0x7A7, 0xE9 },
  2024. { 0x22, 0x7A8, 0xDC },
  2025. { 0x22, 0x7A9, 0xC4 },
  2026. { 0x22, 0x7AA, 0xE9 },
  2027. { 0x22, 0x7AB, 0xDC },
  2028. { 0x22, 0x7AC, 0x09 },
  2029. { 0x22, 0x7AD, 0x80 },
  2030. { 0x22, 0x7A6, 0x3D },
  2031. { 0x22, 0x7A7, 0xE1 },
  2032. { 0x22, 0x7A8, 0x0D },
  2033. { 0x22, 0x7A9, 0x3D },
  2034. { 0x22, 0x7AA, 0xE1 },
  2035. { 0x22, 0x7AB, 0x0D },
  2036. { 0x22, 0x7AC, 0x0A },
  2037. { 0x22, 0x7AD, 0x80 },
  2038. { 0x22, 0x7A6, 0x89 },
  2039. { 0x22, 0x7A7, 0xB6 },
  2040. { 0x22, 0x7A8, 0xEB },
  2041. { 0x22, 0x7A9, 0x89 },
  2042. { 0x22, 0x7AA, 0xB6 },
  2043. { 0x22, 0x7AB, 0xEB },
  2044. { 0x22, 0x7AC, 0x0B },
  2045. { 0x22, 0x7AD, 0x80 },
  2046. { 0x22, 0x7A6, 0x39 },
  2047. { 0x22, 0x7A7, 0x9D },
  2048. { 0x22, 0x7A8, 0xFE },
  2049. { 0x22, 0x7A9, 0x39 },
  2050. { 0x22, 0x7AA, 0x9D },
  2051. { 0x22, 0x7AB, 0xFE },
  2052. { 0x22, 0x7AC, 0x0C },
  2053. { 0x22, 0x7AD, 0x80 },
  2054. { 0x22, 0x7A6, 0x76 },
  2055. { 0x22, 0x7A7, 0x49 },
  2056. { 0x22, 0x7A8, 0x15 },
  2057. { 0x22, 0x7A9, 0x76 },
  2058. { 0x22, 0x7AA, 0x49 },
  2059. { 0x22, 0x7AB, 0x15 },
  2060. { 0x22, 0x7AC, 0x0D },
  2061. { 0x22, 0x7AD, 0x80 },
  2062. { 0x22, 0x7A6, 0xC8 },
  2063. { 0x22, 0x7A7, 0x80 },
  2064. { 0x22, 0x7A8, 0xF5 },
  2065. { 0x22, 0x7A9, 0xC8 },
  2066. { 0x22, 0x7AA, 0x80 },
  2067. { 0x22, 0x7AB, 0xF5 },
  2068. { 0x22, 0x7AC, 0x0E },
  2069. { 0x22, 0x7AD, 0x80 },
  2070. { 0x22, 0x7A6, 0x40 },
  2071. { 0x22, 0x7A7, 0x00 },
  2072. { 0x22, 0x7A8, 0x00 },
  2073. { 0x22, 0x7A9, 0x40 },
  2074. { 0x22, 0x7AA, 0x00 },
  2075. { 0x22, 0x7AB, 0x00 },
  2076. { 0x22, 0x7AC, 0x0F },
  2077. { 0x22, 0x7AD, 0x80 },
  2078. { 0x22, 0x7A6, 0x90 },
  2079. { 0x22, 0x7A7, 0x68 },
  2080. { 0x22, 0x7A8, 0xF1 },
  2081. { 0x22, 0x7A9, 0x90 },
  2082. { 0x22, 0x7AA, 0x68 },
  2083. { 0x22, 0x7AB, 0xF1 },
  2084. { 0x22, 0x7AC, 0x10 },
  2085. { 0x22, 0x7AD, 0x80 },
  2086. { 0x22, 0x7A6, 0x34 },
  2087. { 0x22, 0x7A7, 0x47 },
  2088. { 0x22, 0x7A8, 0x6C },
  2089. { 0x22, 0x7A9, 0x34 },
  2090. { 0x22, 0x7AA, 0x47 },
  2091. { 0x22, 0x7AB, 0x6C },
  2092. { 0x22, 0x7AC, 0x11 },
  2093. { 0x22, 0x7AD, 0x80 },
  2094. { 0x22, 0x7A6, 0x6F },
  2095. { 0x22, 0x7A7, 0x97 },
  2096. { 0x22, 0x7A8, 0x0F },
  2097. { 0x22, 0x7A9, 0x6F },
  2098. { 0x22, 0x7AA, 0x97 },
  2099. { 0x22, 0x7AB, 0x0F },
  2100. { 0x22, 0x7AC, 0x12 },
  2101. { 0x22, 0x7AD, 0x80 },
  2102. { 0x22, 0x7A6, 0xCB },
  2103. { 0x22, 0x7A7, 0xB8 },
  2104. { 0x22, 0x7A8, 0x94 },
  2105. { 0x22, 0x7A9, 0xCB },
  2106. { 0x22, 0x7AA, 0xB8 },
  2107. { 0x22, 0x7AB, 0x94 },
  2108. { 0x22, 0x7AC, 0x13 },
  2109. { 0x22, 0x7AD, 0x80 },
  2110. { 0x22, 0x7A6, 0x40 },
  2111. { 0x22, 0x7A7, 0x00 },
  2112. { 0x22, 0x7A8, 0x00 },
  2113. { 0x22, 0x7A9, 0x40 },
  2114. { 0x22, 0x7AA, 0x00 },
  2115. { 0x22, 0x7AB, 0x00 },
  2116. { 0x22, 0x7AC, 0x14 },
  2117. { 0x22, 0x7AD, 0x80 },
  2118. { 0x22, 0x7A6, 0x95 },
  2119. { 0x22, 0x7A7, 0x76 },
  2120. { 0x22, 0x7A8, 0x5B },
  2121. { 0x22, 0x7A9, 0x95 },
  2122. { 0x22, 0x7AA, 0x76 },
  2123. { 0x22, 0x7AB, 0x5B },
  2124. { 0x22, 0x7AC, 0x15 },
  2125. { 0x22, 0x7AD, 0x80 },
  2126. { 0x22, 0x7A6, 0x31 },
  2127. { 0x22, 0x7A7, 0xAC },
  2128. { 0x22, 0x7A8, 0x31 },
  2129. { 0x22, 0x7A9, 0x31 },
  2130. { 0x22, 0x7AA, 0xAC },
  2131. { 0x22, 0x7AB, 0x31 },
  2132. { 0x22, 0x7AC, 0x16 },
  2133. { 0x22, 0x7AD, 0x80 },
  2134. { 0x22, 0x7A6, 0x6A },
  2135. { 0x22, 0x7A7, 0x89 },
  2136. { 0x22, 0x7A8, 0xA5 },
  2137. { 0x22, 0x7A9, 0x6A },
  2138. { 0x22, 0x7AA, 0x89 },
  2139. { 0x22, 0x7AB, 0xA5 },
  2140. { 0x22, 0x7AC, 0x17 },
  2141. { 0x22, 0x7AD, 0x80 },
  2142. { 0x22, 0x7A6, 0xCE },
  2143. { 0x22, 0x7A7, 0x53 },
  2144. { 0x22, 0x7A8, 0xCF },
  2145. { 0x22, 0x7A9, 0xCE },
  2146. { 0x22, 0x7AA, 0x53 },
  2147. { 0x22, 0x7AB, 0xCF },
  2148. { 0x22, 0x7AC, 0x18 },
  2149. { 0x22, 0x7AD, 0x80 },
  2150. { 0x22, 0x7A6, 0x40 },
  2151. { 0x22, 0x7A7, 0x00 },
  2152. { 0x22, 0x7A8, 0x00 },
  2153. { 0x22, 0x7A9, 0x40 },
  2154. { 0x22, 0x7AA, 0x00 },
  2155. { 0x22, 0x7AB, 0x00 },
  2156. { 0x22, 0x7AC, 0x19 },
  2157. { 0x22, 0x7AD, 0x80 },
  2158. /* 48KHz base */
  2159. { 0x22, 0x7A6, 0x3E },
  2160. { 0x22, 0x7A7, 0x88 },
  2161. { 0x22, 0x7A8, 0xDC },
  2162. { 0x22, 0x7A9, 0x3E },
  2163. { 0x22, 0x7AA, 0x88 },
  2164. { 0x22, 0x7AB, 0xDC },
  2165. { 0x22, 0x7AC, 0x1A },
  2166. { 0x22, 0x7AD, 0x80 },
  2167. { 0x22, 0x7A6, 0x82 },
  2168. { 0x22, 0x7A7, 0xEE },
  2169. { 0x22, 0x7A8, 0x46 },
  2170. { 0x22, 0x7A9, 0x82 },
  2171. { 0x22, 0x7AA, 0xEE },
  2172. { 0x22, 0x7AB, 0x46 },
  2173. { 0x22, 0x7AC, 0x1B },
  2174. { 0x22, 0x7AD, 0x80 },
  2175. { 0x22, 0x7A6, 0x3E },
  2176. { 0x22, 0x7A7, 0x88 },
  2177. { 0x22, 0x7A8, 0xDC },
  2178. { 0x22, 0x7A9, 0x3E },
  2179. { 0x22, 0x7AA, 0x88 },
  2180. { 0x22, 0x7AB, 0xDC },
  2181. { 0x22, 0x7AC, 0x1C },
  2182. { 0x22, 0x7AD, 0x80 },
  2183. { 0x22, 0x7A6, 0x7D },
  2184. { 0x22, 0x7A7, 0x09 },
  2185. { 0x22, 0x7A8, 0x28 },
  2186. { 0x22, 0x7A9, 0x7D },
  2187. { 0x22, 0x7AA, 0x09 },
  2188. { 0x22, 0x7AB, 0x28 },
  2189. { 0x22, 0x7AC, 0x1D },
  2190. { 0x22, 0x7AD, 0x80 },
  2191. { 0x22, 0x7A6, 0xC2 },
  2192. { 0x22, 0x7A7, 0xE5 },
  2193. { 0x22, 0x7A8, 0xB4 },
  2194. { 0x22, 0x7A9, 0xC2 },
  2195. { 0x22, 0x7AA, 0xE5 },
  2196. { 0x22, 0x7AB, 0xB4 },
  2197. { 0x22, 0x7AC, 0x1E },
  2198. { 0x22, 0x7AD, 0x80 },
  2199. { 0x22, 0x7A6, 0x3E },
  2200. { 0x22, 0x7A7, 0xA3 },
  2201. { 0x22, 0x7A8, 0x1F },
  2202. { 0x22, 0x7A9, 0x3E },
  2203. { 0x22, 0x7AA, 0xA3 },
  2204. { 0x22, 0x7AB, 0x1F },
  2205. { 0x22, 0x7AC, 0x1F },
  2206. { 0x22, 0x7AD, 0x80 },
  2207. { 0x22, 0x7A6, 0x84 },
  2208. { 0x22, 0x7A7, 0xCA },
  2209. { 0x22, 0x7A8, 0xF1 },
  2210. { 0x22, 0x7A9, 0x84 },
  2211. { 0x22, 0x7AA, 0xCA },
  2212. { 0x22, 0x7AB, 0xF1 },
  2213. { 0x22, 0x7AC, 0x20 },
  2214. { 0x22, 0x7AD, 0x80 },
  2215. { 0x22, 0x7A6, 0x3C },
  2216. { 0x22, 0x7A7, 0xD5 },
  2217. { 0x22, 0x7A8, 0x9C },
  2218. { 0x22, 0x7A9, 0x3C },
  2219. { 0x22, 0x7AA, 0xD5 },
  2220. { 0x22, 0x7AB, 0x9C },
  2221. { 0x22, 0x7AC, 0x21 },
  2222. { 0x22, 0x7AD, 0x80 },
  2223. { 0x22, 0x7A6, 0x7B },
  2224. { 0x22, 0x7A7, 0x35 },
  2225. { 0x22, 0x7A8, 0x0F },
  2226. { 0x22, 0x7A9, 0x7B },
  2227. { 0x22, 0x7AA, 0x35 },
  2228. { 0x22, 0x7AB, 0x0F },
  2229. { 0x22, 0x7AC, 0x22 },
  2230. { 0x22, 0x7AD, 0x80 },
  2231. { 0x22, 0x7A6, 0xC4 },
  2232. { 0x22, 0x7A7, 0x87 },
  2233. { 0x22, 0x7A8, 0x45 },
  2234. { 0x22, 0x7A9, 0xC4 },
  2235. { 0x22, 0x7AA, 0x87 },
  2236. { 0x22, 0x7AB, 0x45 },
  2237. { 0x22, 0x7AC, 0x23 },
  2238. { 0x22, 0x7AD, 0x80 },
  2239. { 0x22, 0x7A6, 0x3E },
  2240. { 0x22, 0x7A7, 0x0A },
  2241. { 0x22, 0x7A8, 0x78 },
  2242. { 0x22, 0x7A9, 0x3E },
  2243. { 0x22, 0x7AA, 0x0A },
  2244. { 0x22, 0x7AB, 0x78 },
  2245. { 0x22, 0x7AC, 0x24 },
  2246. { 0x22, 0x7AD, 0x80 },
  2247. { 0x22, 0x7A6, 0x88 },
  2248. { 0x22, 0x7A7, 0xE2 },
  2249. { 0x22, 0x7A8, 0x05 },
  2250. { 0x22, 0x7A9, 0x88 },
  2251. { 0x22, 0x7AA, 0xE2 },
  2252. { 0x22, 0x7AB, 0x05 },
  2253. { 0x22, 0x7AC, 0x25 },
  2254. { 0x22, 0x7AD, 0x80 },
  2255. { 0x22, 0x7A6, 0x3A },
  2256. { 0x22, 0x7A7, 0x1A },
  2257. { 0x22, 0x7A8, 0xA3 },
  2258. { 0x22, 0x7A9, 0x3A },
  2259. { 0x22, 0x7AA, 0x1A },
  2260. { 0x22, 0x7AB, 0xA3 },
  2261. { 0x22, 0x7AC, 0x26 },
  2262. { 0x22, 0x7AD, 0x80 },
  2263. { 0x22, 0x7A6, 0x77 },
  2264. { 0x22, 0x7A7, 0x1D },
  2265. { 0x22, 0x7A8, 0xFB },
  2266. { 0x22, 0x7A9, 0x77 },
  2267. { 0x22, 0x7AA, 0x1D },
  2268. { 0x22, 0x7AB, 0xFB },
  2269. { 0x22, 0x7AC, 0x27 },
  2270. { 0x22, 0x7AD, 0x80 },
  2271. { 0x22, 0x7A6, 0xC7 },
  2272. { 0x22, 0x7A7, 0xDA },
  2273. { 0x22, 0x7A8, 0xE5 },
  2274. { 0x22, 0x7A9, 0xC7 },
  2275. { 0x22, 0x7AA, 0xDA },
  2276. { 0x22, 0x7AB, 0xE5 },
  2277. { 0x22, 0x7AC, 0x28 },
  2278. { 0x22, 0x7AD, 0x80 },
  2279. { 0x22, 0x7A6, 0x40 },
  2280. { 0x22, 0x7A7, 0x00 },
  2281. { 0x22, 0x7A8, 0x00 },
  2282. { 0x22, 0x7A9, 0x40 },
  2283. { 0x22, 0x7AA, 0x00 },
  2284. { 0x22, 0x7AB, 0x00 },
  2285. { 0x22, 0x7AC, 0x29 },
  2286. { 0x22, 0x7AD, 0x80 },
  2287. { 0x22, 0x7A6, 0x8E },
  2288. { 0x22, 0x7A7, 0xD7 },
  2289. { 0x22, 0x7A8, 0x22 },
  2290. { 0x22, 0x7A9, 0x8E },
  2291. { 0x22, 0x7AA, 0xD7 },
  2292. { 0x22, 0x7AB, 0x22 },
  2293. { 0x22, 0x7AC, 0x2A },
  2294. { 0x22, 0x7AD, 0x80 },
  2295. { 0x22, 0x7A6, 0x35 },
  2296. { 0x22, 0x7A7, 0x26 },
  2297. { 0x22, 0x7A8, 0xC6 },
  2298. { 0x22, 0x7A9, 0x35 },
  2299. { 0x22, 0x7AA, 0x26 },
  2300. { 0x22, 0x7AB, 0xC6 },
  2301. { 0x22, 0x7AC, 0x2B },
  2302. { 0x22, 0x7AD, 0x80 },
  2303. { 0x22, 0x7A6, 0x71 },
  2304. { 0x22, 0x7A7, 0x28 },
  2305. { 0x22, 0x7A8, 0xDE },
  2306. { 0x22, 0x7A9, 0x71 },
  2307. { 0x22, 0x7AA, 0x28 },
  2308. { 0x22, 0x7AB, 0xDE },
  2309. { 0x22, 0x7AC, 0x2C },
  2310. { 0x22, 0x7AD, 0x80 },
  2311. { 0x22, 0x7A6, 0xCA },
  2312. { 0x22, 0x7A7, 0xD9 },
  2313. { 0x22, 0x7A8, 0x3A },
  2314. { 0x22, 0x7A9, 0xCA },
  2315. { 0x22, 0x7AA, 0xD9 },
  2316. { 0x22, 0x7AB, 0x3A },
  2317. { 0x22, 0x7AC, 0x2D },
  2318. { 0x22, 0x7AD, 0x80 },
  2319. { 0x22, 0x7A6, 0x40 },
  2320. { 0x22, 0x7A7, 0x00 },
  2321. { 0x22, 0x7A8, 0x00 },
  2322. { 0x22, 0x7A9, 0x40 },
  2323. { 0x22, 0x7AA, 0x00 },
  2324. { 0x22, 0x7AB, 0x00 },
  2325. { 0x22, 0x7AC, 0x2E },
  2326. { 0x22, 0x7AD, 0x80 },
  2327. { 0x22, 0x7A6, 0x93 },
  2328. { 0x22, 0x7A7, 0x5E },
  2329. { 0x22, 0x7A8, 0xD8 },
  2330. { 0x22, 0x7A9, 0x93 },
  2331. { 0x22, 0x7AA, 0x5E },
  2332. { 0x22, 0x7AB, 0xD8 },
  2333. { 0x22, 0x7AC, 0x2F },
  2334. { 0x22, 0x7AD, 0x80 },
  2335. { 0x22, 0x7A6, 0x32 },
  2336. { 0x22, 0x7A7, 0xB7 },
  2337. { 0x22, 0x7A8, 0xB1 },
  2338. { 0x22, 0x7A9, 0x32 },
  2339. { 0x22, 0x7AA, 0xB7 },
  2340. { 0x22, 0x7AB, 0xB1 },
  2341. { 0x22, 0x7AC, 0x30 },
  2342. { 0x22, 0x7AD, 0x80 },
  2343. { 0x22, 0x7A6, 0x6C },
  2344. { 0x22, 0x7A7, 0xA1 },
  2345. { 0x22, 0x7A8, 0x28 },
  2346. { 0x22, 0x7A9, 0x6C },
  2347. { 0x22, 0x7AA, 0xA1 },
  2348. { 0x22, 0x7AB, 0x28 },
  2349. { 0x22, 0x7AC, 0x31 },
  2350. { 0x22, 0x7AD, 0x80 },
  2351. { 0x22, 0x7A6, 0xCD },
  2352. { 0x22, 0x7A7, 0x48 },
  2353. { 0x22, 0x7A8, 0x4F },
  2354. { 0x22, 0x7A9, 0xCD },
  2355. { 0x22, 0x7AA, 0x48 },
  2356. { 0x22, 0x7AB, 0x4F },
  2357. { 0x22, 0x7AC, 0x32 },
  2358. { 0x22, 0x7AD, 0x80 },
  2359. { 0x22, 0x7A6, 0x40 },
  2360. { 0x22, 0x7A7, 0x00 },
  2361. { 0x22, 0x7A8, 0x00 },
  2362. { 0x22, 0x7A9, 0x40 },
  2363. { 0x22, 0x7AA, 0x00 },
  2364. { 0x22, 0x7AB, 0x00 },
  2365. { 0x22, 0x7AC, 0x33 },
  2366. { 0x22, 0x7AD, 0x80 },
  2367. /* common */
  2368. { 0x22, 0x782, 0xC1 },
  2369. { 0x22, 0x771, 0x2C },
  2370. { 0x22, 0x772, 0x2C },
  2371. { 0x22, 0x788, 0x04 },
  2372. { 0x01, 0x7B0, 0x08 },
  2373. {}
  2374. };
  2375. static const struct hda_fixup stac92hd83xxx_fixups[] = {
  2376. [STAC_92HD83XXX_REF] = {
  2377. .type = HDA_FIXUP_PINS,
  2378. .v.pins = ref92hd83xxx_pin_configs,
  2379. },
  2380. [STAC_92HD83XXX_PWR_REF] = {
  2381. .type = HDA_FIXUP_PINS,
  2382. .v.pins = ref92hd83xxx_pin_configs,
  2383. },
  2384. [STAC_DELL_S14] = {
  2385. .type = HDA_FIXUP_PINS,
  2386. .v.pins = dell_s14_pin_configs,
  2387. },
  2388. [STAC_DELL_VOSTRO_3500] = {
  2389. .type = HDA_FIXUP_PINS,
  2390. .v.pins = dell_vostro_3500_pin_configs,
  2391. },
  2392. [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
  2393. .type = HDA_FIXUP_PINS,
  2394. .v.pins = hp_cNB11_intquad_pin_configs,
  2395. .chained = true,
  2396. .chain_id = STAC_92HD83XXX_HP,
  2397. },
  2398. [STAC_92HD83XXX_HP] = {
  2399. .type = HDA_FIXUP_FUNC,
  2400. .v.func = stac92hd83xxx_fixup_hp,
  2401. },
  2402. [STAC_HP_DV7_4000] = {
  2403. .type = HDA_FIXUP_PINS,
  2404. .v.pins = hp_dv7_4000_pin_configs,
  2405. .chained = true,
  2406. .chain_id = STAC_92HD83XXX_HP,
  2407. },
  2408. [STAC_HP_ZEPHYR] = {
  2409. .type = HDA_FIXUP_FUNC,
  2410. .v.func = stac92hd83xxx_fixup_hp_zephyr,
  2411. .chained = true,
  2412. .chain_id = STAC_92HD83XXX_HP,
  2413. },
  2414. [STAC_92HD83XXX_HP_LED] = {
  2415. .type = HDA_FIXUP_FUNC,
  2416. .v.func = stac92hd83xxx_fixup_hp_led,
  2417. .chained = true,
  2418. .chain_id = STAC_92HD83XXX_HP,
  2419. },
  2420. [STAC_92HD83XXX_HP_INV_LED] = {
  2421. .type = HDA_FIXUP_FUNC,
  2422. .v.func = stac92hd83xxx_fixup_hp_inv_led,
  2423. .chained = true,
  2424. .chain_id = STAC_92HD83XXX_HP,
  2425. },
  2426. [STAC_92HD83XXX_HP_MIC_LED] = {
  2427. .type = HDA_FIXUP_FUNC,
  2428. .v.func = stac92hd83xxx_fixup_hp_mic_led,
  2429. .chained = true,
  2430. .chain_id = STAC_92HD83XXX_HP,
  2431. },
  2432. [STAC_HP_LED_GPIO10] = {
  2433. .type = HDA_FIXUP_FUNC,
  2434. .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
  2435. .chained = true,
  2436. .chain_id = STAC_92HD83XXX_HP,
  2437. },
  2438. [STAC_92HD83XXX_HEADSET_JACK] = {
  2439. .type = HDA_FIXUP_FUNC,
  2440. .v.func = stac92hd83xxx_fixup_headset_jack,
  2441. },
  2442. [STAC_HP_ENVY_BASS] = {
  2443. .type = HDA_FIXUP_PINS,
  2444. .v.pins = (const struct hda_pintbl[]) {
  2445. { 0x0f, 0x90170111 },
  2446. {}
  2447. },
  2448. },
  2449. [STAC_HP_BNB13_EQ] = {
  2450. .type = HDA_FIXUP_VERBS,
  2451. .v.verbs = hp_bnb13_eq_verbs,
  2452. .chained = true,
  2453. .chain_id = STAC_92HD83XXX_HP_MIC_LED,
  2454. },
  2455. [STAC_HP_ENVY_TS_BASS] = {
  2456. .type = HDA_FIXUP_PINS,
  2457. .v.pins = (const struct hda_pintbl[]) {
  2458. { 0x10, 0x92170111 },
  2459. {}
  2460. },
  2461. },
  2462. [STAC_HP_ENVY_TS_DAC_BIND] = {
  2463. .type = HDA_FIXUP_FUNC,
  2464. .v.func = hp_envy_ts_fixup_dac_bind,
  2465. .chained = true,
  2466. .chain_id = STAC_HP_ENVY_TS_BASS,
  2467. },
  2468. [STAC_92HD83XXX_GPIO10_EAPD] = {
  2469. .type = HDA_FIXUP_FUNC,
  2470. .v.func = stac92hd83xxx_fixup_gpio10_eapd,
  2471. },
  2472. };
  2473. static const struct hda_model_fixup stac92hd83xxx_models[] = {
  2474. { .id = STAC_92HD83XXX_REF, .name = "ref" },
  2475. { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
  2476. { .id = STAC_DELL_S14, .name = "dell-s14" },
  2477. { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
  2478. { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
  2479. { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
  2480. { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
  2481. { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
  2482. { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
  2483. { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
  2484. { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
  2485. { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
  2486. { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
  2487. { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
  2488. {}
  2489. };
  2490. static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
  2491. /* SigmaTel reference board */
  2492. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2493. "DFI LanParty", STAC_92HD83XXX_REF),
  2494. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2495. "DFI LanParty", STAC_92HD83XXX_REF),
  2496. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
  2497. "unknown Dell", STAC_DELL_S14),
  2498. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
  2499. "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
  2500. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
  2501. "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
  2502. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
  2503. "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
  2504. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
  2505. "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
  2506. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
  2507. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  2508. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
  2509. "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
  2510. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
  2511. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  2512. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
  2513. "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
  2514. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
  2515. "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
  2516. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
  2517. "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
  2518. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
  2519. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2520. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
  2521. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2522. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
  2523. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2524. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
  2525. "HP Pavilion dv7", STAC_HP_DV7_4000),
  2526. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
  2527. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2528. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
  2529. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2530. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
  2531. "HP Envy Spectre", STAC_HP_ENVY_BASS),
  2532. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
  2533. "HP Folio 13", STAC_HP_LED_GPIO10),
  2534. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
  2535. "HP Folio", STAC_HP_BNB13_EQ),
  2536. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
  2537. "HP bNB13", STAC_HP_BNB13_EQ),
  2538. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
  2539. "HP bNB13", STAC_HP_BNB13_EQ),
  2540. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
  2541. "HP bNB13", STAC_HP_BNB13_EQ),
  2542. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
  2543. "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
  2544. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
  2545. "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
  2546. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
  2547. "HP bNB13", STAC_HP_BNB13_EQ),
  2548. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
  2549. "HP bNB13", STAC_HP_BNB13_EQ),
  2550. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
  2551. "HP bNB13", STAC_HP_BNB13_EQ),
  2552. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
  2553. "HP bNB13", STAC_HP_BNB13_EQ),
  2554. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
  2555. "HP bNB13", STAC_HP_BNB13_EQ),
  2556. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
  2557. "HP bNB13", STAC_HP_BNB13_EQ),
  2558. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
  2559. "HP bNB13", STAC_HP_BNB13_EQ),
  2560. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
  2561. "HP bNB13", STAC_HP_BNB13_EQ),
  2562. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
  2563. "HP bNB13", STAC_HP_BNB13_EQ),
  2564. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
  2565. "HP bNB13", STAC_HP_BNB13_EQ),
  2566. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
  2567. "HP bNB13", STAC_HP_BNB13_EQ),
  2568. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
  2569. "HP bNB13", STAC_HP_BNB13_EQ),
  2570. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
  2571. "HP bNB13", STAC_HP_BNB13_EQ),
  2572. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
  2573. "HP bNB13", STAC_HP_BNB13_EQ),
  2574. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
  2575. "HP bNB13", STAC_HP_BNB13_EQ),
  2576. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
  2577. "HP bNB13", STAC_HP_BNB13_EQ),
  2578. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
  2579. "HP bNB13", STAC_HP_BNB13_EQ),
  2580. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
  2581. "HP bNB13", STAC_HP_BNB13_EQ),
  2582. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
  2583. "HP bNB13", STAC_HP_BNB13_EQ),
  2584. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
  2585. "HP bNB13", STAC_HP_BNB13_EQ),
  2586. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
  2587. "HP bNB13", STAC_HP_BNB13_EQ),
  2588. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
  2589. "HP bNB13", STAC_HP_BNB13_EQ),
  2590. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
  2591. "HP bNB13", STAC_HP_BNB13_EQ),
  2592. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
  2593. "HP bNB13", STAC_HP_BNB13_EQ),
  2594. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
  2595. "HP bNB13", STAC_HP_BNB13_EQ),
  2596. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
  2597. "HP bNB13", STAC_HP_BNB13_EQ),
  2598. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
  2599. "HP bNB13", STAC_HP_BNB13_EQ),
  2600. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
  2601. "HP bNB13", STAC_HP_BNB13_EQ),
  2602. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
  2603. "HP bNB13", STAC_HP_BNB13_EQ),
  2604. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
  2605. "HP bNB13", STAC_HP_BNB13_EQ),
  2606. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
  2607. "HP bNB13", STAC_HP_BNB13_EQ),
  2608. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
  2609. "HP bNB13", STAC_HP_BNB13_EQ),
  2610. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
  2611. "HP bNB13", STAC_HP_BNB13_EQ),
  2612. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
  2613. "HP bNB13", STAC_HP_BNB13_EQ),
  2614. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
  2615. "HP bNB13", STAC_HP_BNB13_EQ),
  2616. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
  2617. "HP bNB13", STAC_HP_BNB13_EQ),
  2618. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
  2619. "HP bNB13", STAC_HP_BNB13_EQ),
  2620. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
  2621. "HP bNB13", STAC_HP_BNB13_EQ),
  2622. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
  2623. "HP bNB13", STAC_HP_BNB13_EQ),
  2624. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
  2625. "HP bNB13", STAC_HP_BNB13_EQ),
  2626. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
  2627. "HP bNB13", STAC_HP_BNB13_EQ),
  2628. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
  2629. "HP bNB13", STAC_HP_BNB13_EQ),
  2630. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
  2631. "HP bNB13", STAC_HP_BNB13_EQ),
  2632. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
  2633. "HP bNB13", STAC_HP_BNB13_EQ),
  2634. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
  2635. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2636. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
  2637. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2638. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
  2639. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2640. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
  2641. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2642. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
  2643. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2644. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
  2645. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2646. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
  2647. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2648. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
  2649. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2650. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
  2651. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2652. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
  2653. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2654. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
  2655. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2656. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
  2657. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2658. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
  2659. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2660. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
  2661. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2662. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
  2663. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2664. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
  2665. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2666. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
  2667. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2668. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
  2669. "HP", STAC_HP_ZEPHYR),
  2670. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
  2671. "HP Mini", STAC_92HD83XXX_HP_LED),
  2672. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
  2673. "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
  2674. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
  2675. "HP Mini", STAC_92HD83XXX_HP_LED),
  2676. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
  2677. /* match both for 0xfa91 and 0xfa93 */
  2678. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
  2679. "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
  2680. {} /* terminator */
  2681. };
  2682. /* HP dv7 bass switch - GPIO5 */
  2683. #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
  2684. static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
  2685. struct snd_ctl_elem_value *ucontrol)
  2686. {
  2687. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2688. struct sigmatel_spec *spec = codec->spec;
  2689. ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
  2690. return 0;
  2691. }
  2692. static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
  2693. struct snd_ctl_elem_value *ucontrol)
  2694. {
  2695. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2696. struct sigmatel_spec *spec = codec->spec;
  2697. unsigned int gpio_data;
  2698. gpio_data = (spec->gpio_data & ~0x20) |
  2699. (ucontrol->value.integer.value[0] ? 0x20 : 0);
  2700. if (gpio_data == spec->gpio_data)
  2701. return 0;
  2702. spec->gpio_data = gpio_data;
  2703. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  2704. return 1;
  2705. }
  2706. static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
  2707. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2708. .info = stac_hp_bass_gpio_info,
  2709. .get = stac_hp_bass_gpio_get,
  2710. .put = stac_hp_bass_gpio_put,
  2711. };
  2712. static int stac_add_hp_bass_switch(struct hda_codec *codec)
  2713. {
  2714. struct sigmatel_spec *spec = codec->spec;
  2715. if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
  2716. &stac_hp_bass_sw_ctrl))
  2717. return -ENOMEM;
  2718. spec->gpio_mask |= 0x20;
  2719. spec->gpio_dir |= 0x20;
  2720. spec->gpio_data |= 0x20;
  2721. return 0;
  2722. }
  2723. static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
  2724. { 0x0a, 0x02214030 },
  2725. { 0x0b, 0x02a19040 },
  2726. { 0x0c, 0x01a19020 },
  2727. { 0x0d, 0x01014010 },
  2728. { 0x0e, 0x0181302e },
  2729. { 0x0f, 0x01014010 },
  2730. { 0x14, 0x01019020 },
  2731. { 0x18, 0x90a000f0 },
  2732. { 0x19, 0x90a000f0 },
  2733. { 0x1e, 0x01452050 },
  2734. { 0x1f, 0x01452050 },
  2735. {}
  2736. };
  2737. static const struct hda_pintbl dell_m4_1_pin_configs[] = {
  2738. { 0x0a, 0x0421101f },
  2739. { 0x0b, 0x04a11221 },
  2740. { 0x0c, 0x40f000f0 },
  2741. { 0x0d, 0x90170110 },
  2742. { 0x0e, 0x23a1902e },
  2743. { 0x0f, 0x23014250 },
  2744. { 0x14, 0x40f000f0 },
  2745. { 0x18, 0x90a000f0 },
  2746. { 0x19, 0x40f000f0 },
  2747. { 0x1e, 0x4f0000f0 },
  2748. { 0x1f, 0x4f0000f0 },
  2749. {}
  2750. };
  2751. static const struct hda_pintbl dell_m4_2_pin_configs[] = {
  2752. { 0x0a, 0x0421101f },
  2753. { 0x0b, 0x04a11221 },
  2754. { 0x0c, 0x90a70330 },
  2755. { 0x0d, 0x90170110 },
  2756. { 0x0e, 0x23a1902e },
  2757. { 0x0f, 0x23014250 },
  2758. { 0x14, 0x40f000f0 },
  2759. { 0x18, 0x40f000f0 },
  2760. { 0x19, 0x40f000f0 },
  2761. { 0x1e, 0x044413b0 },
  2762. { 0x1f, 0x044413b0 },
  2763. {}
  2764. };
  2765. static const struct hda_pintbl dell_m4_3_pin_configs[] = {
  2766. { 0x0a, 0x0421101f },
  2767. { 0x0b, 0x04a11221 },
  2768. { 0x0c, 0x90a70330 },
  2769. { 0x0d, 0x90170110 },
  2770. { 0x0e, 0x40f000f0 },
  2771. { 0x0f, 0x40f000f0 },
  2772. { 0x14, 0x40f000f0 },
  2773. { 0x18, 0x90a000f0 },
  2774. { 0x19, 0x40f000f0 },
  2775. { 0x1e, 0x044413b0 },
  2776. { 0x1f, 0x044413b0 },
  2777. {}
  2778. };
  2779. static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
  2780. const struct hda_fixup *fix, int action)
  2781. {
  2782. struct sigmatel_spec *spec = codec->spec;
  2783. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2784. return;
  2785. snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
  2786. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  2787. }
  2788. static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
  2789. const struct hda_fixup *fix, int action)
  2790. {
  2791. struct sigmatel_spec *spec = codec->spec;
  2792. struct hda_jack_callback *jack;
  2793. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2794. return;
  2795. /* Enable VREF power saving on GPIO1 detect */
  2796. snd_hda_codec_write_cache(codec, codec->core.afg, 0,
  2797. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
  2798. jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
  2799. stac_vref_event);
  2800. if (!IS_ERR(jack))
  2801. jack->private_data = 0x02;
  2802. spec->gpio_mask |= 0x02;
  2803. /* enable internal microphone */
  2804. snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
  2805. }
  2806. static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
  2807. const struct hda_fixup *fix, int action)
  2808. {
  2809. struct sigmatel_spec *spec = codec->spec;
  2810. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2811. return;
  2812. spec->gpio_led = 0x01;
  2813. }
  2814. static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
  2815. const struct hda_fixup *fix, int action)
  2816. {
  2817. unsigned int cap;
  2818. switch (action) {
  2819. case HDA_FIXUP_ACT_PRE_PROBE:
  2820. snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
  2821. break;
  2822. case HDA_FIXUP_ACT_PROBE:
  2823. /* enable bass on HP dv7 */
  2824. cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
  2825. cap &= AC_GPIO_IO_COUNT;
  2826. if (cap >= 6)
  2827. stac_add_hp_bass_switch(codec);
  2828. break;
  2829. }
  2830. }
  2831. static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
  2832. const struct hda_fixup *fix, int action)
  2833. {
  2834. struct sigmatel_spec *spec = codec->spec;
  2835. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2836. return;
  2837. spec->gpio_led = 0x08;
  2838. }
  2839. static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
  2840. {
  2841. unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
  2842. /* count line-out, too, as BIOS sets often so */
  2843. return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
  2844. (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
  2845. get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
  2846. }
  2847. static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
  2848. {
  2849. unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
  2850. /* It was changed in the BIOS to just satisfy MS DTM.
  2851. * Lets turn it back into slaved HP
  2852. */
  2853. pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
  2854. (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
  2855. pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
  2856. 0x1f;
  2857. snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
  2858. }
  2859. static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
  2860. const struct hda_fixup *fix, int action)
  2861. {
  2862. struct sigmatel_spec *spec = codec->spec;
  2863. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2864. return;
  2865. /* when both output A and F are assigned, these are supposedly
  2866. * dock and built-in headphones; fix both pin configs
  2867. */
  2868. if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
  2869. fixup_hp_headphone(codec, 0x0a);
  2870. fixup_hp_headphone(codec, 0x0f);
  2871. }
  2872. if (find_mute_led_cfg(codec, 1))
  2873. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  2874. spec->gpio_led,
  2875. spec->gpio_led_polarity);
  2876. }
  2877. static const struct hda_fixup stac92hd71bxx_fixups[] = {
  2878. [STAC_92HD71BXX_REF] = {
  2879. .type = HDA_FIXUP_FUNC,
  2880. .v.func = stac92hd71bxx_fixup_ref,
  2881. },
  2882. [STAC_DELL_M4_1] = {
  2883. .type = HDA_FIXUP_PINS,
  2884. .v.pins = dell_m4_1_pin_configs,
  2885. },
  2886. [STAC_DELL_M4_2] = {
  2887. .type = HDA_FIXUP_PINS,
  2888. .v.pins = dell_m4_2_pin_configs,
  2889. },
  2890. [STAC_DELL_M4_3] = {
  2891. .type = HDA_FIXUP_PINS,
  2892. .v.pins = dell_m4_3_pin_configs,
  2893. },
  2894. [STAC_HP_M4] = {
  2895. .type = HDA_FIXUP_FUNC,
  2896. .v.func = stac92hd71bxx_fixup_hp_m4,
  2897. .chained = true,
  2898. .chain_id = STAC_92HD71BXX_HP,
  2899. },
  2900. [STAC_HP_DV4] = {
  2901. .type = HDA_FIXUP_FUNC,
  2902. .v.func = stac92hd71bxx_fixup_hp_dv4,
  2903. .chained = true,
  2904. .chain_id = STAC_HP_DV5,
  2905. },
  2906. [STAC_HP_DV5] = {
  2907. .type = HDA_FIXUP_FUNC,
  2908. .v.func = stac92hd71bxx_fixup_hp_dv5,
  2909. .chained = true,
  2910. .chain_id = STAC_92HD71BXX_HP,
  2911. },
  2912. [STAC_HP_HDX] = {
  2913. .type = HDA_FIXUP_FUNC,
  2914. .v.func = stac92hd71bxx_fixup_hp_hdx,
  2915. .chained = true,
  2916. .chain_id = STAC_92HD71BXX_HP,
  2917. },
  2918. [STAC_92HD71BXX_HP] = {
  2919. .type = HDA_FIXUP_FUNC,
  2920. .v.func = stac92hd71bxx_fixup_hp,
  2921. },
  2922. };
  2923. static const struct hda_model_fixup stac92hd71bxx_models[] = {
  2924. { .id = STAC_92HD71BXX_REF, .name = "ref" },
  2925. { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
  2926. { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
  2927. { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
  2928. { .id = STAC_HP_M4, .name = "hp-m4" },
  2929. { .id = STAC_HP_DV4, .name = "hp-dv4" },
  2930. { .id = STAC_HP_DV5, .name = "hp-dv5" },
  2931. { .id = STAC_HP_HDX, .name = "hp-hdx" },
  2932. { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
  2933. {}
  2934. };
  2935. static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
  2936. /* SigmaTel reference board */
  2937. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2938. "DFI LanParty", STAC_92HD71BXX_REF),
  2939. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2940. "DFI LanParty", STAC_92HD71BXX_REF),
  2941. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
  2942. "HP", STAC_HP_DV5),
  2943. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
  2944. "HP", STAC_HP_DV5),
  2945. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
  2946. "HP dv4-7", STAC_HP_DV4),
  2947. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
  2948. "HP dv4-7", STAC_HP_DV5),
  2949. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
  2950. "HP HDX", STAC_HP_HDX), /* HDX18 */
  2951. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
  2952. "HP mini 1000", STAC_HP_M4),
  2953. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
  2954. "HP HDX", STAC_HP_HDX), /* HDX16 */
  2955. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
  2956. "HP dv6", STAC_HP_DV5),
  2957. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
  2958. "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
  2959. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
  2960. "HP DV6", STAC_HP_DV5),
  2961. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
  2962. "HP", STAC_HP_DV5),
  2963. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
  2964. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
  2965. "unknown Dell", STAC_DELL_M4_1),
  2966. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
  2967. "unknown Dell", STAC_DELL_M4_1),
  2968. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
  2969. "unknown Dell", STAC_DELL_M4_1),
  2970. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
  2971. "unknown Dell", STAC_DELL_M4_1),
  2972. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
  2973. "unknown Dell", STAC_DELL_M4_1),
  2974. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
  2975. "unknown Dell", STAC_DELL_M4_1),
  2976. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
  2977. "unknown Dell", STAC_DELL_M4_1),
  2978. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
  2979. "unknown Dell", STAC_DELL_M4_2),
  2980. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
  2981. "unknown Dell", STAC_DELL_M4_2),
  2982. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
  2983. "unknown Dell", STAC_DELL_M4_2),
  2984. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
  2985. "unknown Dell", STAC_DELL_M4_2),
  2986. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
  2987. "unknown Dell", STAC_DELL_M4_3),
  2988. {} /* terminator */
  2989. };
  2990. static const struct hda_pintbl ref922x_pin_configs[] = {
  2991. { 0x0a, 0x01014010 },
  2992. { 0x0b, 0x01016011 },
  2993. { 0x0c, 0x01012012 },
  2994. { 0x0d, 0x0221401f },
  2995. { 0x0e, 0x01813122 },
  2996. { 0x0f, 0x01011014 },
  2997. { 0x10, 0x01441030 },
  2998. { 0x11, 0x01c41030 },
  2999. { 0x15, 0x40000100 },
  3000. { 0x1b, 0x40000100 },
  3001. {}
  3002. };
  3003. /*
  3004. STAC 922X pin configs for
  3005. 102801A7
  3006. 102801AB
  3007. 102801A9
  3008. 102801D1
  3009. 102801D2
  3010. */
  3011. static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
  3012. { 0x0a, 0x02214030 },
  3013. { 0x0b, 0x01a19021 },
  3014. { 0x0c, 0x01111012 },
  3015. { 0x0d, 0x01114010 },
  3016. { 0x0e, 0x02a19020 },
  3017. { 0x0f, 0x01117011 },
  3018. { 0x10, 0x400001f0 },
  3019. { 0x11, 0x400001f1 },
  3020. { 0x15, 0x01813122 },
  3021. { 0x1b, 0x400001f2 },
  3022. {}
  3023. };
  3024. /*
  3025. STAC 922X pin configs for
  3026. 102801AC
  3027. 102801D0
  3028. */
  3029. static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
  3030. { 0x0a, 0x02214030 },
  3031. { 0x0b, 0x01a19021 },
  3032. { 0x0c, 0x01111012 },
  3033. { 0x0d, 0x01114010 },
  3034. { 0x0e, 0x02a19020 },
  3035. { 0x0f, 0x01117011 },
  3036. { 0x10, 0x01451140 },
  3037. { 0x11, 0x400001f0 },
  3038. { 0x15, 0x01813122 },
  3039. { 0x1b, 0x400001f1 },
  3040. {}
  3041. };
  3042. /*
  3043. STAC 922X pin configs for
  3044. 102801BF
  3045. */
  3046. static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
  3047. { 0x0a, 0x0321101f },
  3048. { 0x0b, 0x01112024 },
  3049. { 0x0c, 0x01111222 },
  3050. { 0x0d, 0x91174220 },
  3051. { 0x0e, 0x03a11050 },
  3052. { 0x0f, 0x01116221 },
  3053. { 0x10, 0x90a70330 },
  3054. { 0x11, 0x01452340 },
  3055. { 0x15, 0x40C003f1 },
  3056. { 0x1b, 0x405003f0 },
  3057. {}
  3058. };
  3059. /*
  3060. STAC 9221 A1 pin configs for
  3061. 102801D7 (Dell XPS M1210)
  3062. */
  3063. static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
  3064. { 0x0a, 0x02211211 },
  3065. { 0x0b, 0x408103ff },
  3066. { 0x0c, 0x02a1123e },
  3067. { 0x0d, 0x90100310 },
  3068. { 0x0e, 0x408003f1 },
  3069. { 0x0f, 0x0221121f },
  3070. { 0x10, 0x03451340 },
  3071. { 0x11, 0x40c003f2 },
  3072. { 0x15, 0x508003f3 },
  3073. { 0x1b, 0x405003f4 },
  3074. {}
  3075. };
  3076. static const struct hda_pintbl d945gtp3_pin_configs[] = {
  3077. { 0x0a, 0x0221401f },
  3078. { 0x0b, 0x01a19022 },
  3079. { 0x0c, 0x01813021 },
  3080. { 0x0d, 0x01014010 },
  3081. { 0x0e, 0x40000100 },
  3082. { 0x0f, 0x40000100 },
  3083. { 0x10, 0x40000100 },
  3084. { 0x11, 0x40000100 },
  3085. { 0x15, 0x02a19120 },
  3086. { 0x1b, 0x40000100 },
  3087. {}
  3088. };
  3089. static const struct hda_pintbl d945gtp5_pin_configs[] = {
  3090. { 0x0a, 0x0221401f },
  3091. { 0x0b, 0x01011012 },
  3092. { 0x0c, 0x01813024 },
  3093. { 0x0d, 0x01014010 },
  3094. { 0x0e, 0x01a19021 },
  3095. { 0x0f, 0x01016011 },
  3096. { 0x10, 0x01452130 },
  3097. { 0x11, 0x40000100 },
  3098. { 0x15, 0x02a19320 },
  3099. { 0x1b, 0x40000100 },
  3100. {}
  3101. };
  3102. static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
  3103. { 0x0a, 0x0121e21f },
  3104. { 0x0b, 0x400000ff },
  3105. { 0x0c, 0x9017e110 },
  3106. { 0x0d, 0x400000fd },
  3107. { 0x0e, 0x400000fe },
  3108. { 0x0f, 0x0181e020 },
  3109. { 0x10, 0x1145e030 },
  3110. { 0x11, 0x11c5e240 },
  3111. { 0x15, 0x400000fc },
  3112. { 0x1b, 0x400000fb },
  3113. {}
  3114. };
  3115. static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
  3116. { 0x0a, 0x0121e21f },
  3117. { 0x0b, 0x90a7012e },
  3118. { 0x0c, 0x9017e110 },
  3119. { 0x0d, 0x400000fd },
  3120. { 0x0e, 0x400000fe },
  3121. { 0x0f, 0x0181e020 },
  3122. { 0x10, 0x1145e230 },
  3123. { 0x11, 0x500000fa },
  3124. { 0x15, 0x400000fc },
  3125. { 0x1b, 0x400000fb },
  3126. {}
  3127. };
  3128. static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
  3129. { 0x0a, 0x0121e21f },
  3130. { 0x0b, 0x90a7012e },
  3131. { 0x0c, 0x9017e110 },
  3132. { 0x0d, 0x400000fd },
  3133. { 0x0e, 0x400000fe },
  3134. { 0x0f, 0x0181e020 },
  3135. { 0x10, 0x1145e230 },
  3136. { 0x11, 0x11c5e240 },
  3137. { 0x15, 0x400000fc },
  3138. { 0x1b, 0x400000fb },
  3139. {}
  3140. };
  3141. static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
  3142. { 0x0a, 0x0321e21f },
  3143. { 0x0b, 0x03a1e02e },
  3144. { 0x0c, 0x9017e110 },
  3145. { 0x0d, 0x9017e11f },
  3146. { 0x0e, 0x400000fe },
  3147. { 0x0f, 0x0381e020 },
  3148. { 0x10, 0x1345e230 },
  3149. { 0x11, 0x13c5e240 },
  3150. { 0x15, 0x400000fc },
  3151. { 0x1b, 0x400000fb },
  3152. {}
  3153. };
  3154. static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
  3155. { 0x0a, 0x0321e21f },
  3156. { 0x0b, 0x03a1e02e },
  3157. { 0x0c, 0x9017e110 },
  3158. { 0x0d, 0x9017e11f },
  3159. { 0x0e, 0x400000fe },
  3160. { 0x0f, 0x0381e020 },
  3161. { 0x10, 0x1345e230 },
  3162. { 0x11, 0x13c5e240 },
  3163. { 0x15, 0x400000fc },
  3164. { 0x1b, 0x400000fb },
  3165. {}
  3166. };
  3167. static const struct hda_pintbl ecs202_pin_configs[] = {
  3168. { 0x0a, 0x0221401f },
  3169. { 0x0b, 0x02a19020 },
  3170. { 0x0c, 0x01a19020 },
  3171. { 0x0d, 0x01114010 },
  3172. { 0x0e, 0x408000f0 },
  3173. { 0x0f, 0x01813022 },
  3174. { 0x10, 0x074510a0 },
  3175. { 0x11, 0x40c400f1 },
  3176. { 0x15, 0x9037012e },
  3177. { 0x1b, 0x40e000f2 },
  3178. {}
  3179. };
  3180. /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
  3181. static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
  3182. SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
  3183. SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
  3184. SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
  3185. SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
  3186. SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
  3187. SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
  3188. SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
  3189. SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
  3190. SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
  3191. SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
  3192. SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
  3193. SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
  3194. SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
  3195. {}
  3196. };
  3197. static const struct hda_fixup stac922x_fixups[];
  3198. /* remap the fixup from codec SSID and apply it */
  3199. static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
  3200. const struct hda_fixup *fix,
  3201. int action)
  3202. {
  3203. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3204. return;
  3205. codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
  3206. snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
  3207. stac922x_fixups);
  3208. if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
  3209. snd_hda_apply_fixup(codec, action);
  3210. }
  3211. static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
  3212. const struct hda_fixup *fix,
  3213. int action)
  3214. {
  3215. struct sigmatel_spec *spec = codec->spec;
  3216. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3217. spec->gpio_mask = spec->gpio_dir = 0x03;
  3218. spec->gpio_data = 0x03;
  3219. }
  3220. }
  3221. static const struct hda_fixup stac922x_fixups[] = {
  3222. [STAC_D945_REF] = {
  3223. .type = HDA_FIXUP_PINS,
  3224. .v.pins = ref922x_pin_configs,
  3225. },
  3226. [STAC_D945GTP3] = {
  3227. .type = HDA_FIXUP_PINS,
  3228. .v.pins = d945gtp3_pin_configs,
  3229. },
  3230. [STAC_D945GTP5] = {
  3231. .type = HDA_FIXUP_PINS,
  3232. .v.pins = d945gtp5_pin_configs,
  3233. },
  3234. [STAC_INTEL_MAC_AUTO] = {
  3235. .type = HDA_FIXUP_FUNC,
  3236. .v.func = stac922x_fixup_intel_mac_auto,
  3237. },
  3238. [STAC_INTEL_MAC_V1] = {
  3239. .type = HDA_FIXUP_PINS,
  3240. .v.pins = intel_mac_v1_pin_configs,
  3241. .chained = true,
  3242. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3243. },
  3244. [STAC_INTEL_MAC_V2] = {
  3245. .type = HDA_FIXUP_PINS,
  3246. .v.pins = intel_mac_v2_pin_configs,
  3247. .chained = true,
  3248. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3249. },
  3250. [STAC_INTEL_MAC_V3] = {
  3251. .type = HDA_FIXUP_PINS,
  3252. .v.pins = intel_mac_v3_pin_configs,
  3253. .chained = true,
  3254. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3255. },
  3256. [STAC_INTEL_MAC_V4] = {
  3257. .type = HDA_FIXUP_PINS,
  3258. .v.pins = intel_mac_v4_pin_configs,
  3259. .chained = true,
  3260. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3261. },
  3262. [STAC_INTEL_MAC_V5] = {
  3263. .type = HDA_FIXUP_PINS,
  3264. .v.pins = intel_mac_v5_pin_configs,
  3265. .chained = true,
  3266. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3267. },
  3268. [STAC_922X_INTEL_MAC_GPIO] = {
  3269. .type = HDA_FIXUP_FUNC,
  3270. .v.func = stac922x_fixup_intel_mac_gpio,
  3271. },
  3272. [STAC_ECS_202] = {
  3273. .type = HDA_FIXUP_PINS,
  3274. .v.pins = ecs202_pin_configs,
  3275. },
  3276. [STAC_922X_DELL_D81] = {
  3277. .type = HDA_FIXUP_PINS,
  3278. .v.pins = dell_922x_d81_pin_configs,
  3279. },
  3280. [STAC_922X_DELL_D82] = {
  3281. .type = HDA_FIXUP_PINS,
  3282. .v.pins = dell_922x_d82_pin_configs,
  3283. },
  3284. [STAC_922X_DELL_M81] = {
  3285. .type = HDA_FIXUP_PINS,
  3286. .v.pins = dell_922x_m81_pin_configs,
  3287. },
  3288. [STAC_922X_DELL_M82] = {
  3289. .type = HDA_FIXUP_PINS,
  3290. .v.pins = dell_922x_m82_pin_configs,
  3291. },
  3292. };
  3293. static const struct hda_model_fixup stac922x_models[] = {
  3294. { .id = STAC_D945_REF, .name = "ref" },
  3295. { .id = STAC_D945GTP5, .name = "5stack" },
  3296. { .id = STAC_D945GTP3, .name = "3stack" },
  3297. { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
  3298. { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
  3299. { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
  3300. { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
  3301. { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
  3302. { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
  3303. { .id = STAC_ECS_202, .name = "ecs202" },
  3304. { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
  3305. { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
  3306. { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
  3307. { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
  3308. /* for backward compatibility */
  3309. { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
  3310. { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
  3311. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
  3312. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
  3313. { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
  3314. { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
  3315. {}
  3316. };
  3317. static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
  3318. /* SigmaTel reference board */
  3319. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3320. "DFI LanParty", STAC_D945_REF),
  3321. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3322. "DFI LanParty", STAC_D945_REF),
  3323. /* Intel 945G based systems */
  3324. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  3325. "Intel D945G", STAC_D945GTP3),
  3326. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  3327. "Intel D945G", STAC_D945GTP3),
  3328. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  3329. "Intel D945G", STAC_D945GTP3),
  3330. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  3331. "Intel D945G", STAC_D945GTP3),
  3332. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  3333. "Intel D945G", STAC_D945GTP3),
  3334. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  3335. "Intel D945G", STAC_D945GTP3),
  3336. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  3337. "Intel D945G", STAC_D945GTP3),
  3338. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  3339. "Intel D945G", STAC_D945GTP3),
  3340. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  3341. "Intel D945G", STAC_D945GTP3),
  3342. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  3343. "Intel D945G", STAC_D945GTP3),
  3344. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  3345. "Intel D945G", STAC_D945GTP3),
  3346. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  3347. "Intel D945G", STAC_D945GTP3),
  3348. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  3349. "Intel D945G", STAC_D945GTP3),
  3350. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  3351. "Intel D945G", STAC_D945GTP3),
  3352. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  3353. "Intel D945G", STAC_D945GTP3),
  3354. /* Intel D945G 5-stack systems */
  3355. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  3356. "Intel D945G", STAC_D945GTP5),
  3357. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  3358. "Intel D945G", STAC_D945GTP5),
  3359. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  3360. "Intel D945G", STAC_D945GTP5),
  3361. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  3362. "Intel D945G", STAC_D945GTP5),
  3363. /* Intel 945P based systems */
  3364. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  3365. "Intel D945P", STAC_D945GTP3),
  3366. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  3367. "Intel D945P", STAC_D945GTP3),
  3368. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  3369. "Intel D945P", STAC_D945GTP3),
  3370. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  3371. "Intel D945P", STAC_D945GTP3),
  3372. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  3373. "Intel D945P", STAC_D945GTP3),
  3374. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  3375. "Intel D945P", STAC_D945GTP5),
  3376. /* other intel */
  3377. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
  3378. "Intel D945", STAC_D945_REF),
  3379. /* other systems */
  3380. /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
  3381. SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
  3382. /* Dell systems */
  3383. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  3384. "unknown Dell", STAC_922X_DELL_D81),
  3385. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  3386. "unknown Dell", STAC_922X_DELL_D81),
  3387. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  3388. "unknown Dell", STAC_922X_DELL_D81),
  3389. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  3390. "unknown Dell", STAC_922X_DELL_D82),
  3391. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  3392. "unknown Dell", STAC_922X_DELL_M81),
  3393. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  3394. "unknown Dell", STAC_922X_DELL_D82),
  3395. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  3396. "unknown Dell", STAC_922X_DELL_D81),
  3397. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  3398. "unknown Dell", STAC_922X_DELL_D81),
  3399. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  3400. "Dell XPS M1210", STAC_922X_DELL_M82),
  3401. /* ECS/PC Chips boards */
  3402. SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
  3403. "ECS/PC chips", STAC_ECS_202),
  3404. {} /* terminator */
  3405. };
  3406. static const struct hda_pintbl ref927x_pin_configs[] = {
  3407. { 0x0a, 0x02214020 },
  3408. { 0x0b, 0x02a19080 },
  3409. { 0x0c, 0x0181304e },
  3410. { 0x0d, 0x01014010 },
  3411. { 0x0e, 0x01a19040 },
  3412. { 0x0f, 0x01011012 },
  3413. { 0x10, 0x01016011 },
  3414. { 0x11, 0x0101201f },
  3415. { 0x12, 0x183301f0 },
  3416. { 0x13, 0x18a001f0 },
  3417. { 0x14, 0x18a001f0 },
  3418. { 0x21, 0x01442070 },
  3419. { 0x22, 0x01c42190 },
  3420. { 0x23, 0x40000100 },
  3421. {}
  3422. };
  3423. static const struct hda_pintbl d965_3st_pin_configs[] = {
  3424. { 0x0a, 0x0221401f },
  3425. { 0x0b, 0x02a19120 },
  3426. { 0x0c, 0x40000100 },
  3427. { 0x0d, 0x01014011 },
  3428. { 0x0e, 0x01a19021 },
  3429. { 0x0f, 0x01813024 },
  3430. { 0x10, 0x40000100 },
  3431. { 0x11, 0x40000100 },
  3432. { 0x12, 0x40000100 },
  3433. { 0x13, 0x40000100 },
  3434. { 0x14, 0x40000100 },
  3435. { 0x21, 0x40000100 },
  3436. { 0x22, 0x40000100 },
  3437. { 0x23, 0x40000100 },
  3438. {}
  3439. };
  3440. static const struct hda_pintbl d965_5st_pin_configs[] = {
  3441. { 0x0a, 0x02214020 },
  3442. { 0x0b, 0x02a19080 },
  3443. { 0x0c, 0x0181304e },
  3444. { 0x0d, 0x01014010 },
  3445. { 0x0e, 0x01a19040 },
  3446. { 0x0f, 0x01011012 },
  3447. { 0x10, 0x01016011 },
  3448. { 0x11, 0x40000100 },
  3449. { 0x12, 0x40000100 },
  3450. { 0x13, 0x40000100 },
  3451. { 0x14, 0x40000100 },
  3452. { 0x21, 0x01442070 },
  3453. { 0x22, 0x40000100 },
  3454. { 0x23, 0x40000100 },
  3455. {}
  3456. };
  3457. static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
  3458. { 0x0a, 0x40000100 },
  3459. { 0x0b, 0x40000100 },
  3460. { 0x0c, 0x0181304e },
  3461. { 0x0d, 0x01014010 },
  3462. { 0x0e, 0x01a19040 },
  3463. { 0x0f, 0x01011012 },
  3464. { 0x10, 0x01016011 },
  3465. { 0x11, 0x40000100 },
  3466. { 0x12, 0x40000100 },
  3467. { 0x13, 0x40000100 },
  3468. { 0x14, 0x40000100 },
  3469. { 0x21, 0x01442070 },
  3470. { 0x22, 0x40000100 },
  3471. { 0x23, 0x40000100 },
  3472. {}
  3473. };
  3474. static const struct hda_pintbl dell_3st_pin_configs[] = {
  3475. { 0x0a, 0x02211230 },
  3476. { 0x0b, 0x02a11220 },
  3477. { 0x0c, 0x01a19040 },
  3478. { 0x0d, 0x01114210 },
  3479. { 0x0e, 0x01111212 },
  3480. { 0x0f, 0x01116211 },
  3481. { 0x10, 0x01813050 },
  3482. { 0x11, 0x01112214 },
  3483. { 0x12, 0x403003fa },
  3484. { 0x13, 0x90a60040 },
  3485. { 0x14, 0x90a60040 },
  3486. { 0x21, 0x404003fb },
  3487. { 0x22, 0x40c003fc },
  3488. { 0x23, 0x40000100 },
  3489. {}
  3490. };
  3491. static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
  3492. const struct hda_fixup *fix, int action)
  3493. {
  3494. /* no jack detecion for ref-no-jd model */
  3495. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3496. codec->no_jack_detect = 1;
  3497. }
  3498. static void stac927x_fixup_ref(struct hda_codec *codec,
  3499. const struct hda_fixup *fix, int action)
  3500. {
  3501. struct sigmatel_spec *spec = codec->spec;
  3502. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3503. snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
  3504. spec->eapd_mask = spec->gpio_mask = 0;
  3505. spec->gpio_dir = spec->gpio_data = 0;
  3506. }
  3507. }
  3508. static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
  3509. const struct hda_fixup *fix, int action)
  3510. {
  3511. struct sigmatel_spec *spec = codec->spec;
  3512. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3513. return;
  3514. if (codec->core.subsystem_id != 0x1028022f) {
  3515. /* GPIO2 High = Enable EAPD */
  3516. spec->eapd_mask = spec->gpio_mask = 0x04;
  3517. spec->gpio_dir = spec->gpio_data = 0x04;
  3518. }
  3519. snd_hda_add_verbs(codec, dell_3st_core_init);
  3520. spec->volknob_init = 1;
  3521. }
  3522. static void stac927x_fixup_volknob(struct hda_codec *codec,
  3523. const struct hda_fixup *fix, int action)
  3524. {
  3525. struct sigmatel_spec *spec = codec->spec;
  3526. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3527. snd_hda_add_verbs(codec, stac927x_volknob_core_init);
  3528. spec->volknob_init = 1;
  3529. }
  3530. }
  3531. static const struct hda_fixup stac927x_fixups[] = {
  3532. [STAC_D965_REF_NO_JD] = {
  3533. .type = HDA_FIXUP_FUNC,
  3534. .v.func = stac927x_fixup_ref_no_jd,
  3535. .chained = true,
  3536. .chain_id = STAC_D965_REF,
  3537. },
  3538. [STAC_D965_REF] = {
  3539. .type = HDA_FIXUP_FUNC,
  3540. .v.func = stac927x_fixup_ref,
  3541. },
  3542. [STAC_D965_3ST] = {
  3543. .type = HDA_FIXUP_PINS,
  3544. .v.pins = d965_3st_pin_configs,
  3545. .chained = true,
  3546. .chain_id = STAC_D965_VERBS,
  3547. },
  3548. [STAC_D965_5ST] = {
  3549. .type = HDA_FIXUP_PINS,
  3550. .v.pins = d965_5st_pin_configs,
  3551. .chained = true,
  3552. .chain_id = STAC_D965_VERBS,
  3553. },
  3554. [STAC_D965_VERBS] = {
  3555. .type = HDA_FIXUP_VERBS,
  3556. .v.verbs = d965_core_init,
  3557. },
  3558. [STAC_D965_5ST_NO_FP] = {
  3559. .type = HDA_FIXUP_PINS,
  3560. .v.pins = d965_5st_no_fp_pin_configs,
  3561. },
  3562. [STAC_DELL_3ST] = {
  3563. .type = HDA_FIXUP_PINS,
  3564. .v.pins = dell_3st_pin_configs,
  3565. .chained = true,
  3566. .chain_id = STAC_927X_DELL_DMIC,
  3567. },
  3568. [STAC_DELL_BIOS] = {
  3569. .type = HDA_FIXUP_PINS,
  3570. .v.pins = (const struct hda_pintbl[]) {
  3571. /* correct the front output jack as a hp out */
  3572. { 0x0f, 0x0221101f },
  3573. /* correct the front input jack as a mic */
  3574. { 0x0e, 0x02a79130 },
  3575. {}
  3576. },
  3577. .chained = true,
  3578. .chain_id = STAC_927X_DELL_DMIC,
  3579. },
  3580. [STAC_DELL_BIOS_AMIC] = {
  3581. .type = HDA_FIXUP_PINS,
  3582. .v.pins = (const struct hda_pintbl[]) {
  3583. /* configure the analog microphone on some laptops */
  3584. { 0x0c, 0x90a79130 },
  3585. {}
  3586. },
  3587. .chained = true,
  3588. .chain_id = STAC_DELL_BIOS,
  3589. },
  3590. [STAC_DELL_BIOS_SPDIF] = {
  3591. .type = HDA_FIXUP_PINS,
  3592. .v.pins = (const struct hda_pintbl[]) {
  3593. /* correct the device field to SPDIF out */
  3594. { 0x21, 0x01442070 },
  3595. {}
  3596. },
  3597. .chained = true,
  3598. .chain_id = STAC_DELL_BIOS,
  3599. },
  3600. [STAC_927X_DELL_DMIC] = {
  3601. .type = HDA_FIXUP_FUNC,
  3602. .v.func = stac927x_fixup_dell_dmic,
  3603. },
  3604. [STAC_927X_VOLKNOB] = {
  3605. .type = HDA_FIXUP_FUNC,
  3606. .v.func = stac927x_fixup_volknob,
  3607. },
  3608. };
  3609. static const struct hda_model_fixup stac927x_models[] = {
  3610. { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
  3611. { .id = STAC_D965_REF, .name = "ref" },
  3612. { .id = STAC_D965_3ST, .name = "3stack" },
  3613. { .id = STAC_D965_5ST, .name = "5stack" },
  3614. { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
  3615. { .id = STAC_DELL_3ST, .name = "dell-3stack" },
  3616. { .id = STAC_DELL_BIOS, .name = "dell-bios" },
  3617. { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
  3618. { .id = STAC_927X_VOLKNOB, .name = "volknob" },
  3619. {}
  3620. };
  3621. static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
  3622. /* SigmaTel reference board */
  3623. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3624. "DFI LanParty", STAC_D965_REF),
  3625. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3626. "DFI LanParty", STAC_D965_REF),
  3627. /* Intel 946 based systems */
  3628. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  3629. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  3630. /* 965 based 3 stack systems */
  3631. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
  3632. "Intel D965", STAC_D965_3ST),
  3633. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
  3634. "Intel D965", STAC_D965_3ST),
  3635. /* Dell 3 stack systems */
  3636. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  3637. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  3638. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  3639. /* Dell 3 stack systems with verb table in BIOS */
  3640. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
  3641. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
  3642. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
  3643. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
  3644. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
  3645. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
  3646. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
  3647. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
  3648. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
  3649. /* 965 based 5 stack systems */
  3650. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
  3651. "Intel D965", STAC_D965_5ST),
  3652. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
  3653. "Intel D965", STAC_D965_5ST),
  3654. /* volume-knob fixes */
  3655. SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
  3656. {} /* terminator */
  3657. };
  3658. static const struct hda_pintbl ref9205_pin_configs[] = {
  3659. { 0x0a, 0x40000100 },
  3660. { 0x0b, 0x40000100 },
  3661. { 0x0c, 0x01016011 },
  3662. { 0x0d, 0x01014010 },
  3663. { 0x0e, 0x01813122 },
  3664. { 0x0f, 0x01a19021 },
  3665. { 0x14, 0x01019020 },
  3666. { 0x16, 0x40000100 },
  3667. { 0x17, 0x90a000f0 },
  3668. { 0x18, 0x90a000f0 },
  3669. { 0x21, 0x01441030 },
  3670. { 0x22, 0x01c41030 },
  3671. {}
  3672. };
  3673. /*
  3674. STAC 9205 pin configs for
  3675. 102801F1
  3676. 102801F2
  3677. 102801FC
  3678. 102801FD
  3679. 10280204
  3680. 1028021F
  3681. 10280228 (Dell Vostro 1500)
  3682. 10280229 (Dell Vostro 1700)
  3683. */
  3684. static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
  3685. { 0x0a, 0x0321101F },
  3686. { 0x0b, 0x03A11020 },
  3687. { 0x0c, 0x400003FA },
  3688. { 0x0d, 0x90170310 },
  3689. { 0x0e, 0x400003FB },
  3690. { 0x0f, 0x400003FC },
  3691. { 0x14, 0x400003FD },
  3692. { 0x16, 0x40F000F9 },
  3693. { 0x17, 0x90A60330 },
  3694. { 0x18, 0x400003FF },
  3695. { 0x21, 0x0144131F },
  3696. { 0x22, 0x40C003FE },
  3697. {}
  3698. };
  3699. /*
  3700. STAC 9205 pin configs for
  3701. 102801F9
  3702. 102801FA
  3703. 102801FE
  3704. 102801FF (Dell Precision M4300)
  3705. 10280206
  3706. 10280200
  3707. 10280201
  3708. */
  3709. static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
  3710. { 0x0a, 0x0321101f },
  3711. { 0x0b, 0x03a11020 },
  3712. { 0x0c, 0x90a70330 },
  3713. { 0x0d, 0x90170310 },
  3714. { 0x0e, 0x400000fe },
  3715. { 0x0f, 0x400000ff },
  3716. { 0x14, 0x400000fd },
  3717. { 0x16, 0x40f000f9 },
  3718. { 0x17, 0x400000fa },
  3719. { 0x18, 0x400000fc },
  3720. { 0x21, 0x0144131f },
  3721. { 0x22, 0x40c003f8 },
  3722. /* Enable SPDIF in/out */
  3723. { 0x1f, 0x01441030 },
  3724. { 0x20, 0x1c410030 },
  3725. {}
  3726. };
  3727. static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
  3728. { 0x0a, 0x0421101f },
  3729. { 0x0b, 0x04a11020 },
  3730. { 0x0c, 0x400003fa },
  3731. { 0x0d, 0x90170310 },
  3732. { 0x0e, 0x400003fb },
  3733. { 0x0f, 0x400003fc },
  3734. { 0x14, 0x400003fd },
  3735. { 0x16, 0x400003f9 },
  3736. { 0x17, 0x90a60330 },
  3737. { 0x18, 0x400003ff },
  3738. { 0x21, 0x01441340 },
  3739. { 0x22, 0x40c003fe },
  3740. {}
  3741. };
  3742. static void stac9205_fixup_ref(struct hda_codec *codec,
  3743. const struct hda_fixup *fix, int action)
  3744. {
  3745. struct sigmatel_spec *spec = codec->spec;
  3746. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3747. snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
  3748. /* SPDIF-In enabled */
  3749. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
  3750. }
  3751. }
  3752. static void stac9205_fixup_dell_m43(struct hda_codec *codec,
  3753. const struct hda_fixup *fix, int action)
  3754. {
  3755. struct sigmatel_spec *spec = codec->spec;
  3756. struct hda_jack_callback *jack;
  3757. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3758. snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
  3759. /* Enable unsol response for GPIO4/Dock HP connection */
  3760. snd_hda_codec_write_cache(codec, codec->core.afg, 0,
  3761. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
  3762. jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
  3763. stac_vref_event);
  3764. if (!IS_ERR(jack))
  3765. jack->private_data = 0x01;
  3766. spec->gpio_dir = 0x0b;
  3767. spec->eapd_mask = 0x01;
  3768. spec->gpio_mask = 0x1b;
  3769. spec->gpio_mute = 0x10;
  3770. /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
  3771. * GPIO3 Low = DRM
  3772. */
  3773. spec->gpio_data = 0x01;
  3774. }
  3775. }
  3776. static void stac9205_fixup_eapd(struct hda_codec *codec,
  3777. const struct hda_fixup *fix, int action)
  3778. {
  3779. struct sigmatel_spec *spec = codec->spec;
  3780. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3781. spec->eapd_switch = 0;
  3782. }
  3783. static const struct hda_fixup stac9205_fixups[] = {
  3784. [STAC_9205_REF] = {
  3785. .type = HDA_FIXUP_FUNC,
  3786. .v.func = stac9205_fixup_ref,
  3787. },
  3788. [STAC_9205_DELL_M42] = {
  3789. .type = HDA_FIXUP_PINS,
  3790. .v.pins = dell_9205_m42_pin_configs,
  3791. },
  3792. [STAC_9205_DELL_M43] = {
  3793. .type = HDA_FIXUP_FUNC,
  3794. .v.func = stac9205_fixup_dell_m43,
  3795. },
  3796. [STAC_9205_DELL_M44] = {
  3797. .type = HDA_FIXUP_PINS,
  3798. .v.pins = dell_9205_m44_pin_configs,
  3799. },
  3800. [STAC_9205_EAPD] = {
  3801. .type = HDA_FIXUP_FUNC,
  3802. .v.func = stac9205_fixup_eapd,
  3803. },
  3804. {}
  3805. };
  3806. static const struct hda_model_fixup stac9205_models[] = {
  3807. { .id = STAC_9205_REF, .name = "ref" },
  3808. { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
  3809. { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
  3810. { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
  3811. { .id = STAC_9205_EAPD, .name = "eapd" },
  3812. {}
  3813. };
  3814. static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
  3815. /* SigmaTel reference board */
  3816. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3817. "DFI LanParty", STAC_9205_REF),
  3818. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
  3819. "SigmaTel", STAC_9205_REF),
  3820. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3821. "DFI LanParty", STAC_9205_REF),
  3822. /* Dell */
  3823. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  3824. "unknown Dell", STAC_9205_DELL_M42),
  3825. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  3826. "unknown Dell", STAC_9205_DELL_M42),
  3827. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  3828. "Dell Precision", STAC_9205_DELL_M43),
  3829. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  3830. "Dell Precision", STAC_9205_DELL_M43),
  3831. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  3832. "Dell Precision", STAC_9205_DELL_M43),
  3833. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  3834. "unknown Dell", STAC_9205_DELL_M42),
  3835. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  3836. "unknown Dell", STAC_9205_DELL_M42),
  3837. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  3838. "Dell Precision", STAC_9205_DELL_M43),
  3839. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  3840. "Dell Precision M4300", STAC_9205_DELL_M43),
  3841. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  3842. "unknown Dell", STAC_9205_DELL_M42),
  3843. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  3844. "Dell Precision", STAC_9205_DELL_M43),
  3845. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  3846. "Dell Precision", STAC_9205_DELL_M43),
  3847. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  3848. "Dell Precision", STAC_9205_DELL_M43),
  3849. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  3850. "Dell Inspiron", STAC_9205_DELL_M44),
  3851. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
  3852. "Dell Vostro 1500", STAC_9205_DELL_M42),
  3853. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
  3854. "Dell Vostro 1700", STAC_9205_DELL_M42),
  3855. /* Gateway */
  3856. SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
  3857. SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
  3858. {} /* terminator */
  3859. };
  3860. static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
  3861. const struct hda_fixup *fix, int action)
  3862. {
  3863. struct sigmatel_spec *spec = codec->spec;
  3864. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3865. return;
  3866. if (find_mute_led_cfg(codec, spec->default_polarity))
  3867. codec_dbg(codec, "mute LED gpio %d polarity %d\n",
  3868. spec->gpio_led,
  3869. spec->gpio_led_polarity);
  3870. }
  3871. static const struct hda_fixup stac92hd95_fixups[] = {
  3872. [STAC_92HD95_HP_LED] = {
  3873. .type = HDA_FIXUP_FUNC,
  3874. .v.func = stac92hd95_fixup_hp_led,
  3875. },
  3876. [STAC_92HD95_HP_BASS] = {
  3877. .type = HDA_FIXUP_VERBS,
  3878. .v.verbs = (const struct hda_verb[]) {
  3879. {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
  3880. {}
  3881. },
  3882. .chained = true,
  3883. .chain_id = STAC_92HD95_HP_LED,
  3884. },
  3885. };
  3886. static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
  3887. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
  3888. {} /* terminator */
  3889. };
  3890. static const struct hda_model_fixup stac92hd95_models[] = {
  3891. { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
  3892. { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
  3893. {}
  3894. };
  3895. static int stac_parse_auto_config(struct hda_codec *codec)
  3896. {
  3897. struct sigmatel_spec *spec = codec->spec;
  3898. int err;
  3899. int flags = 0;
  3900. if (spec->headset_jack)
  3901. flags |= HDA_PINCFG_HEADSET_MIC;
  3902. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
  3903. if (err < 0)
  3904. return err;
  3905. /* add hooks */
  3906. spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
  3907. spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
  3908. spec->gen.automute_hook = stac_update_outputs;
  3909. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  3910. if (err < 0)
  3911. return err;
  3912. if (spec->vref_mute_led_nid) {
  3913. err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
  3914. if (err < 0)
  3915. return err;
  3916. }
  3917. /* setup analog beep controls */
  3918. if (spec->anabeep_nid > 0) {
  3919. err = stac_auto_create_beep_ctls(codec,
  3920. spec->anabeep_nid);
  3921. if (err < 0)
  3922. return err;
  3923. }
  3924. /* setup digital beep controls and input device */
  3925. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  3926. if (spec->gen.beep_nid) {
  3927. hda_nid_t nid = spec->gen.beep_nid;
  3928. unsigned int caps;
  3929. err = stac_auto_create_beep_ctls(codec, nid);
  3930. if (err < 0)
  3931. return err;
  3932. if (codec->beep) {
  3933. /* IDT/STAC codecs have linear beep tone parameter */
  3934. codec->beep->linear_tone = spec->linear_tone_beep;
  3935. /* if no beep switch is available, make its own one */
  3936. caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  3937. if (!(caps & AC_AMPCAP_MUTE)) {
  3938. err = stac_beep_switch_ctl(codec);
  3939. if (err < 0)
  3940. return err;
  3941. }
  3942. }
  3943. }
  3944. #endif
  3945. if (spec->gpio_led)
  3946. spec->gen.vmaster_mute.hook = stac_vmaster_hook;
  3947. if (spec->aloopback_ctl &&
  3948. snd_hda_get_bool_hint(codec, "loopback") == 1) {
  3949. unsigned int wr_verb =
  3950. spec->aloopback_ctl->private_value >> 16;
  3951. if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
  3952. return -ENOMEM;
  3953. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
  3954. return -ENOMEM;
  3955. }
  3956. if (spec->have_spdif_mux) {
  3957. err = stac_create_spdif_mux_ctls(codec);
  3958. if (err < 0)
  3959. return err;
  3960. }
  3961. stac_init_power_map(codec);
  3962. return 0;
  3963. }
  3964. static int stac_init(struct hda_codec *codec)
  3965. {
  3966. struct sigmatel_spec *spec = codec->spec;
  3967. int i;
  3968. /* override some hints */
  3969. stac_store_hints(codec);
  3970. /* set up GPIO */
  3971. /* turn on EAPD statically when spec->eapd_switch isn't set.
  3972. * otherwise, unsol event will turn it on/off dynamically
  3973. */
  3974. if (!spec->eapd_switch)
  3975. spec->gpio_data |= spec->eapd_mask;
  3976. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  3977. snd_hda_gen_init(codec);
  3978. /* sync the power-map */
  3979. if (spec->num_pwrs)
  3980. snd_hda_codec_write(codec, codec->core.afg, 0,
  3981. AC_VERB_IDT_SET_POWER_MAP,
  3982. spec->power_map_bits);
  3983. /* power down inactive ADCs */
  3984. if (spec->powerdown_adcs) {
  3985. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  3986. if (spec->active_adcs & (1 << i))
  3987. continue;
  3988. snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
  3989. AC_VERB_SET_POWER_STATE,
  3990. AC_PWRST_D3);
  3991. }
  3992. }
  3993. return 0;
  3994. }
  3995. static void stac_shutup(struct hda_codec *codec)
  3996. {
  3997. struct sigmatel_spec *spec = codec->spec;
  3998. snd_hda_shutup_pins(codec);
  3999. if (spec->eapd_mask)
  4000. stac_gpio_set(codec, spec->gpio_mask,
  4001. spec->gpio_dir, spec->gpio_data &
  4002. ~spec->eapd_mask);
  4003. }
  4004. #define stac_free snd_hda_gen_free
  4005. #ifdef CONFIG_SND_PROC_FS
  4006. static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
  4007. struct hda_codec *codec, hda_nid_t nid)
  4008. {
  4009. if (nid == codec->core.afg)
  4010. snd_iprintf(buffer, "Power-Map: 0x%02x\n",
  4011. snd_hda_codec_read(codec, nid, 0,
  4012. AC_VERB_IDT_GET_POWER_MAP, 0));
  4013. }
  4014. static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
  4015. struct hda_codec *codec,
  4016. unsigned int verb)
  4017. {
  4018. snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
  4019. snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
  4020. }
  4021. /* stac92hd71bxx, stac92hd73xx */
  4022. static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
  4023. struct hda_codec *codec, hda_nid_t nid)
  4024. {
  4025. stac92hd_proc_hook(buffer, codec, nid);
  4026. if (nid == codec->core.afg)
  4027. analog_loop_proc_hook(buffer, codec, 0xfa0);
  4028. }
  4029. static void stac9205_proc_hook(struct snd_info_buffer *buffer,
  4030. struct hda_codec *codec, hda_nid_t nid)
  4031. {
  4032. if (nid == codec->core.afg)
  4033. analog_loop_proc_hook(buffer, codec, 0xfe0);
  4034. }
  4035. static void stac927x_proc_hook(struct snd_info_buffer *buffer,
  4036. struct hda_codec *codec, hda_nid_t nid)
  4037. {
  4038. if (nid == codec->core.afg)
  4039. analog_loop_proc_hook(buffer, codec, 0xfeb);
  4040. }
  4041. #else
  4042. #define stac92hd_proc_hook NULL
  4043. #define stac92hd7x_proc_hook NULL
  4044. #define stac9205_proc_hook NULL
  4045. #define stac927x_proc_hook NULL
  4046. #endif
  4047. #ifdef CONFIG_PM
  4048. static int stac_suspend(struct hda_codec *codec)
  4049. {
  4050. stac_shutup(codec);
  4051. return 0;
  4052. }
  4053. #else
  4054. #define stac_suspend NULL
  4055. #endif /* CONFIG_PM */
  4056. static const struct hda_codec_ops stac_patch_ops = {
  4057. .build_controls = snd_hda_gen_build_controls,
  4058. .build_pcms = snd_hda_gen_build_pcms,
  4059. .init = stac_init,
  4060. .free = stac_free,
  4061. .unsol_event = snd_hda_jack_unsol_event,
  4062. #ifdef CONFIG_PM
  4063. .suspend = stac_suspend,
  4064. #endif
  4065. .reboot_notify = stac_shutup,
  4066. };
  4067. static int alloc_stac_spec(struct hda_codec *codec)
  4068. {
  4069. struct sigmatel_spec *spec;
  4070. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  4071. if (!spec)
  4072. return -ENOMEM;
  4073. snd_hda_gen_spec_init(&spec->gen);
  4074. codec->spec = spec;
  4075. codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
  4076. spec->gen.dac_min_mute = true;
  4077. codec->patch_ops = stac_patch_ops;
  4078. return 0;
  4079. }
  4080. static int patch_stac9200(struct hda_codec *codec)
  4081. {
  4082. struct sigmatel_spec *spec;
  4083. int err;
  4084. err = alloc_stac_spec(codec);
  4085. if (err < 0)
  4086. return err;
  4087. spec = codec->spec;
  4088. spec->linear_tone_beep = 1;
  4089. spec->gen.own_eapd_ctl = 1;
  4090. codec->power_filter = snd_hda_codec_eapd_power_filter;
  4091. snd_hda_add_verbs(codec, stac9200_eapd_init);
  4092. snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
  4093. stac9200_fixups);
  4094. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4095. err = stac_parse_auto_config(codec);
  4096. if (err < 0) {
  4097. stac_free(codec);
  4098. return err;
  4099. }
  4100. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4101. return 0;
  4102. }
  4103. static int patch_stac925x(struct hda_codec *codec)
  4104. {
  4105. struct sigmatel_spec *spec;
  4106. int err;
  4107. err = alloc_stac_spec(codec);
  4108. if (err < 0)
  4109. return err;
  4110. spec = codec->spec;
  4111. spec->linear_tone_beep = 1;
  4112. spec->gen.own_eapd_ctl = 1;
  4113. snd_hda_add_verbs(codec, stac925x_core_init);
  4114. snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
  4115. stac925x_fixups);
  4116. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4117. err = stac_parse_auto_config(codec);
  4118. if (err < 0) {
  4119. stac_free(codec);
  4120. return err;
  4121. }
  4122. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4123. return 0;
  4124. }
  4125. static int patch_stac92hd73xx(struct hda_codec *codec)
  4126. {
  4127. struct sigmatel_spec *spec;
  4128. int err;
  4129. int num_dacs;
  4130. err = alloc_stac_spec(codec);
  4131. if (err < 0)
  4132. return err;
  4133. spec = codec->spec;
  4134. /* enable power_save_node only for new 92HD89xx chips, as it causes
  4135. * click noises on old 92HD73xx chips.
  4136. */
  4137. if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
  4138. codec->power_save_node = 1;
  4139. spec->linear_tone_beep = 0;
  4140. spec->gen.mixer_nid = 0x1d;
  4141. spec->have_spdif_mux = 1;
  4142. num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
  4143. if (num_dacs < 3 || num_dacs > 5) {
  4144. codec_warn(codec,
  4145. "Could not determine number of channels defaulting to DAC count\n");
  4146. num_dacs = 5;
  4147. }
  4148. switch (num_dacs) {
  4149. case 0x3: /* 6 Channel */
  4150. spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
  4151. break;
  4152. case 0x4: /* 8 Channel */
  4153. spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
  4154. break;
  4155. case 0x5: /* 10 Channel */
  4156. spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
  4157. break;
  4158. }
  4159. spec->aloopback_mask = 0x01;
  4160. spec->aloopback_shift = 8;
  4161. spec->gen.beep_nid = 0x1c; /* digital beep */
  4162. /* GPIO0 High = Enable EAPD */
  4163. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  4164. spec->gpio_data = 0x01;
  4165. spec->eapd_switch = 1;
  4166. spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
  4167. spec->pwr_nids = stac92hd73xx_pwr_nids;
  4168. spec->gen.own_eapd_ctl = 1;
  4169. spec->gen.power_down_unused = 1;
  4170. snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
  4171. stac92hd73xx_fixups);
  4172. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4173. if (!spec->volknob_init)
  4174. snd_hda_add_verbs(codec, stac92hd73xx_core_init);
  4175. err = stac_parse_auto_config(codec);
  4176. if (err < 0) {
  4177. stac_free(codec);
  4178. return err;
  4179. }
  4180. /* Don't GPIO-mute speakers if there are no internal speakers, because
  4181. * the GPIO might be necessary for Headphone
  4182. */
  4183. if (spec->eapd_switch && !has_builtin_speaker(codec))
  4184. spec->eapd_switch = 0;
  4185. codec->proc_widget_hook = stac92hd7x_proc_hook;
  4186. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4187. return 0;
  4188. }
  4189. static void stac_setup_gpio(struct hda_codec *codec)
  4190. {
  4191. struct sigmatel_spec *spec = codec->spec;
  4192. spec->gpio_mask |= spec->eapd_mask;
  4193. if (spec->gpio_led) {
  4194. if (!spec->vref_mute_led_nid) {
  4195. spec->gpio_mask |= spec->gpio_led;
  4196. spec->gpio_dir |= spec->gpio_led;
  4197. spec->gpio_data |= spec->gpio_led;
  4198. } else {
  4199. codec->power_filter = stac_vref_led_power_filter;
  4200. }
  4201. }
  4202. if (spec->mic_mute_led_gpio) {
  4203. spec->gpio_mask |= spec->mic_mute_led_gpio;
  4204. spec->gpio_dir |= spec->mic_mute_led_gpio;
  4205. spec->mic_enabled = 0;
  4206. spec->gpio_data |= spec->mic_mute_led_gpio;
  4207. spec->gen.cap_sync_hook = stac_capture_led_hook;
  4208. }
  4209. }
  4210. static int patch_stac92hd83xxx(struct hda_codec *codec)
  4211. {
  4212. struct sigmatel_spec *spec;
  4213. int err;
  4214. err = alloc_stac_spec(codec);
  4215. if (err < 0)
  4216. return err;
  4217. /* longer delay needed for D3 */
  4218. codec->core.power_caps &= ~AC_PWRST_EPSS;
  4219. spec = codec->spec;
  4220. codec->power_save_node = 1;
  4221. spec->linear_tone_beep = 0;
  4222. spec->gen.own_eapd_ctl = 1;
  4223. spec->gen.power_down_unused = 1;
  4224. spec->gen.mixer_nid = 0x1b;
  4225. spec->gen.beep_nid = 0x21; /* digital beep */
  4226. spec->pwr_nids = stac92hd83xxx_pwr_nids;
  4227. spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
  4228. spec->default_polarity = -1; /* no default cfg */
  4229. snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
  4230. snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
  4231. stac92hd83xxx_fixups);
  4232. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4233. stac_setup_gpio(codec);
  4234. err = stac_parse_auto_config(codec);
  4235. if (err < 0) {
  4236. stac_free(codec);
  4237. return err;
  4238. }
  4239. codec->proc_widget_hook = stac92hd_proc_hook;
  4240. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4241. return 0;
  4242. }
  4243. static const hda_nid_t stac92hd95_pwr_nids[] = {
  4244. 0x0a, 0x0b, 0x0c, 0x0d
  4245. };
  4246. static int patch_stac92hd95(struct hda_codec *codec)
  4247. {
  4248. struct sigmatel_spec *spec;
  4249. int err;
  4250. err = alloc_stac_spec(codec);
  4251. if (err < 0)
  4252. return err;
  4253. /* longer delay needed for D3 */
  4254. codec->core.power_caps &= ~AC_PWRST_EPSS;
  4255. spec = codec->spec;
  4256. codec->power_save_node = 1;
  4257. spec->linear_tone_beep = 0;
  4258. spec->gen.own_eapd_ctl = 1;
  4259. spec->gen.power_down_unused = 1;
  4260. spec->gen.beep_nid = 0x19; /* digital beep */
  4261. spec->pwr_nids = stac92hd95_pwr_nids;
  4262. spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
  4263. spec->default_polarity = 0;
  4264. snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
  4265. stac92hd95_fixups);
  4266. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4267. stac_setup_gpio(codec);
  4268. err = stac_parse_auto_config(codec);
  4269. if (err < 0) {
  4270. stac_free(codec);
  4271. return err;
  4272. }
  4273. codec->proc_widget_hook = stac92hd_proc_hook;
  4274. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4275. return 0;
  4276. }
  4277. static int patch_stac92hd71bxx(struct hda_codec *codec)
  4278. {
  4279. struct sigmatel_spec *spec;
  4280. const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
  4281. int err;
  4282. err = alloc_stac_spec(codec);
  4283. if (err < 0)
  4284. return err;
  4285. spec = codec->spec;
  4286. /* disabled power_save_node since it causes noises on a Dell machine */
  4287. /* codec->power_save_node = 1; */
  4288. spec->linear_tone_beep = 0;
  4289. spec->gen.own_eapd_ctl = 1;
  4290. spec->gen.power_down_unused = 1;
  4291. spec->gen.mixer_nid = 0x17;
  4292. spec->have_spdif_mux = 1;
  4293. /* GPIO0 = EAPD */
  4294. spec->gpio_mask = 0x01;
  4295. spec->gpio_dir = 0x01;
  4296. spec->gpio_data = 0x01;
  4297. switch (codec->core.vendor_id) {
  4298. case 0x111d76b6: /* 4 Port without Analog Mixer */
  4299. case 0x111d76b7:
  4300. unmute_nids++;
  4301. break;
  4302. case 0x111d7608: /* 5 Port with Analog Mixer */
  4303. if ((codec->core.revision_id & 0xf) == 0 ||
  4304. (codec->core.revision_id & 0xf) == 1)
  4305. spec->stream_delay = 40; /* 40 milliseconds */
  4306. /* disable VSW */
  4307. unmute_nids++;
  4308. snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
  4309. snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
  4310. break;
  4311. case 0x111d7603: /* 6 Port with Analog Mixer */
  4312. if ((codec->core.revision_id & 0xf) == 1)
  4313. spec->stream_delay = 40; /* 40 milliseconds */
  4314. break;
  4315. }
  4316. if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
  4317. snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
  4318. if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
  4319. const hda_nid_t *p;
  4320. for (p = unmute_nids; *p; p++)
  4321. snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
  4322. 0xff, 0x00);
  4323. }
  4324. spec->aloopback_ctl = &stac92hd71bxx_loopback;
  4325. spec->aloopback_mask = 0x50;
  4326. spec->aloopback_shift = 0;
  4327. spec->powerdown_adcs = 1;
  4328. spec->gen.beep_nid = 0x26; /* digital beep */
  4329. spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
  4330. spec->pwr_nids = stac92hd71bxx_pwr_nids;
  4331. snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
  4332. stac92hd71bxx_fixups);
  4333. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4334. stac_setup_gpio(codec);
  4335. err = stac_parse_auto_config(codec);
  4336. if (err < 0) {
  4337. stac_free(codec);
  4338. return err;
  4339. }
  4340. codec->proc_widget_hook = stac92hd7x_proc_hook;
  4341. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4342. return 0;
  4343. }
  4344. static int patch_stac922x(struct hda_codec *codec)
  4345. {
  4346. struct sigmatel_spec *spec;
  4347. int err;
  4348. err = alloc_stac_spec(codec);
  4349. if (err < 0)
  4350. return err;
  4351. spec = codec->spec;
  4352. spec->linear_tone_beep = 1;
  4353. spec->gen.own_eapd_ctl = 1;
  4354. snd_hda_add_verbs(codec, stac922x_core_init);
  4355. /* Fix Mux capture level; max to 2 */
  4356. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  4357. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  4358. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  4359. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  4360. (0 << AC_AMPCAP_MUTE_SHIFT));
  4361. snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
  4362. stac922x_fixups);
  4363. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4364. err = stac_parse_auto_config(codec);
  4365. if (err < 0) {
  4366. stac_free(codec);
  4367. return err;
  4368. }
  4369. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4370. return 0;
  4371. }
  4372. static const char * const stac927x_spdif_labels[] = {
  4373. "Digital Playback", "ADAT", "Analog Mux 1",
  4374. "Analog Mux 2", "Analog Mux 3", NULL
  4375. };
  4376. static int patch_stac927x(struct hda_codec *codec)
  4377. {
  4378. struct sigmatel_spec *spec;
  4379. int err;
  4380. err = alloc_stac_spec(codec);
  4381. if (err < 0)
  4382. return err;
  4383. spec = codec->spec;
  4384. spec->linear_tone_beep = 1;
  4385. spec->gen.own_eapd_ctl = 1;
  4386. spec->have_spdif_mux = 1;
  4387. spec->spdif_labels = stac927x_spdif_labels;
  4388. spec->gen.beep_nid = 0x23; /* digital beep */
  4389. /* GPIO0 High = Enable EAPD */
  4390. spec->eapd_mask = spec->gpio_mask = 0x01;
  4391. spec->gpio_dir = spec->gpio_data = 0x01;
  4392. spec->aloopback_ctl = &stac927x_loopback;
  4393. spec->aloopback_mask = 0x40;
  4394. spec->aloopback_shift = 0;
  4395. spec->eapd_switch = 1;
  4396. snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
  4397. stac927x_fixups);
  4398. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4399. if (!spec->volknob_init)
  4400. snd_hda_add_verbs(codec, stac927x_core_init);
  4401. err = stac_parse_auto_config(codec);
  4402. if (err < 0) {
  4403. stac_free(codec);
  4404. return err;
  4405. }
  4406. codec->proc_widget_hook = stac927x_proc_hook;
  4407. /*
  4408. * !!FIXME!!
  4409. * The STAC927x seem to require fairly long delays for certain
  4410. * command sequences. With too short delays (even if the answer
  4411. * is set to RIRB properly), it results in the silence output
  4412. * on some hardwares like Dell.
  4413. *
  4414. * The below flag enables the longer delay (see get_response
  4415. * in hda_intel.c).
  4416. */
  4417. codec->bus->needs_damn_long_delay = 1;
  4418. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4419. return 0;
  4420. }
  4421. static int patch_stac9205(struct hda_codec *codec)
  4422. {
  4423. struct sigmatel_spec *spec;
  4424. int err;
  4425. err = alloc_stac_spec(codec);
  4426. if (err < 0)
  4427. return err;
  4428. spec = codec->spec;
  4429. spec->linear_tone_beep = 1;
  4430. spec->gen.own_eapd_ctl = 1;
  4431. spec->have_spdif_mux = 1;
  4432. spec->gen.beep_nid = 0x23; /* digital beep */
  4433. snd_hda_add_verbs(codec, stac9205_core_init);
  4434. spec->aloopback_ctl = &stac9205_loopback;
  4435. spec->aloopback_mask = 0x40;
  4436. spec->aloopback_shift = 0;
  4437. /* GPIO0 High = EAPD */
  4438. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  4439. spec->gpio_data = 0x01;
  4440. /* Turn on/off EAPD per HP plugging */
  4441. spec->eapd_switch = 1;
  4442. snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
  4443. stac9205_fixups);
  4444. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4445. err = stac_parse_auto_config(codec);
  4446. if (err < 0) {
  4447. stac_free(codec);
  4448. return err;
  4449. }
  4450. codec->proc_widget_hook = stac9205_proc_hook;
  4451. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4452. return 0;
  4453. }
  4454. /*
  4455. * STAC9872 hack
  4456. */
  4457. static const struct hda_verb stac9872_core_init[] = {
  4458. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  4459. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  4460. {}
  4461. };
  4462. static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
  4463. { 0x0a, 0x03211020 },
  4464. { 0x0b, 0x411111f0 },
  4465. { 0x0c, 0x411111f0 },
  4466. { 0x0d, 0x03a15030 },
  4467. { 0x0e, 0x411111f0 },
  4468. { 0x0f, 0x90170110 },
  4469. { 0x11, 0x411111f0 },
  4470. { 0x13, 0x411111f0 },
  4471. { 0x14, 0x90a7013e },
  4472. {}
  4473. };
  4474. static const struct hda_model_fixup stac9872_models[] = {
  4475. { .id = STAC_9872_VAIO, .name = "vaio" },
  4476. {}
  4477. };
  4478. static const struct hda_fixup stac9872_fixups[] = {
  4479. [STAC_9872_VAIO] = {
  4480. .type = HDA_FIXUP_PINS,
  4481. .v.pins = stac9872_vaio_pin_configs,
  4482. },
  4483. };
  4484. static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
  4485. SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
  4486. "Sony VAIO F/S", STAC_9872_VAIO),
  4487. {} /* terminator */
  4488. };
  4489. static int patch_stac9872(struct hda_codec *codec)
  4490. {
  4491. struct sigmatel_spec *spec;
  4492. int err;
  4493. err = alloc_stac_spec(codec);
  4494. if (err < 0)
  4495. return err;
  4496. spec = codec->spec;
  4497. spec->linear_tone_beep = 1;
  4498. spec->gen.own_eapd_ctl = 1;
  4499. snd_hda_add_verbs(codec, stac9872_core_init);
  4500. snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
  4501. stac9872_fixups);
  4502. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4503. err = stac_parse_auto_config(codec);
  4504. if (err < 0) {
  4505. stac_free(codec);
  4506. return -EINVAL;
  4507. }
  4508. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4509. return 0;
  4510. }
  4511. /*
  4512. * patch entries
  4513. */
  4514. static const struct hda_device_id snd_hda_id_sigmatel[] = {
  4515. HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
  4516. HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
  4517. HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
  4518. HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
  4519. HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
  4520. HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
  4521. HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
  4522. HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
  4523. HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
  4524. HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
  4525. HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
  4526. HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
  4527. HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
  4528. HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
  4529. HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
  4530. HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
  4531. HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
  4532. HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
  4533. HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
  4534. HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
  4535. HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
  4536. HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
  4537. HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
  4538. HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x),
  4539. HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
  4540. HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
  4541. HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
  4542. HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
  4543. HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
  4544. HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
  4545. HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
  4546. /* The following does not take into account .id=0x83847661 when subsys =
  4547. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  4548. * currently not fully supported.
  4549. */
  4550. HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
  4551. HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
  4552. HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
  4553. HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
  4554. HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
  4555. HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
  4556. HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
  4557. HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
  4558. HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
  4559. HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
  4560. HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
  4561. HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
  4562. HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
  4563. HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
  4564. HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
  4565. HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
  4566. HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
  4567. HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
  4568. HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
  4569. HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
  4570. HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
  4571. HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
  4572. HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
  4573. HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
  4574. HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
  4575. HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
  4576. HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
  4577. HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
  4578. HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
  4579. HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
  4580. HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
  4581. HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
  4582. HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
  4583. HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
  4584. HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
  4585. HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
  4586. HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
  4587. HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
  4588. HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
  4589. HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
  4590. HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
  4591. HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
  4592. HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
  4593. HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
  4594. HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
  4595. HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
  4596. HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
  4597. HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
  4598. HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
  4599. HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
  4600. HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
  4601. HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
  4602. HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
  4603. HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
  4604. HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
  4605. HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
  4606. HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
  4607. HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
  4608. HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
  4609. HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
  4610. HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
  4611. HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
  4612. HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
  4613. HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
  4614. HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
  4615. HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
  4616. HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
  4617. HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
  4618. {} /* terminator */
  4619. };
  4620. MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
  4621. MODULE_LICENSE("GPL");
  4622. MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
  4623. static struct hda_codec_driver sigmatel_driver = {
  4624. .id = snd_hda_id_sigmatel,
  4625. };
  4626. module_hda_codec_driver(sigmatel_driver);