aureon.c 61 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Terratec Aureon cards
  5. *
  6. * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. *
  23. * NOTES:
  24. *
  25. * - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
  26. * both wm and akm codecs are pretty similar, so we can integrate
  27. * both controls in the future, once if wm codecs are reused in
  28. * many boards.
  29. *
  30. * - DAC digital volumes are not implemented in the mixer.
  31. * if they show better response than DAC analog volumes, we can use them
  32. * instead.
  33. *
  34. * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
  35. * Copyright (c) 2003 Dimitromanolakis Apostolos <apostol@cs.utoronto.ca>
  36. *
  37. * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
  38. * added 64x/128x oversampling switch (should be 64x only for 96khz)
  39. * fixed some recording labels (still need to check the rest)
  40. * recording is working probably thanks to correct wm8770 initialization
  41. *
  42. * version 0.5: Initial release:
  43. * working: analog output, mixer, headphone amplifier switch
  44. * not working: prety much everything else, at least i could verify that
  45. * we have no digital output, no capture, pretty bad clicks and poops
  46. * on mixer switch and other coll stuff.
  47. */
  48. #include <linux/delay.h>
  49. #include <linux/interrupt.h>
  50. #include <linux/init.h>
  51. #include <linux/slab.h>
  52. #include <linux/mutex.h>
  53. #include <sound/core.h>
  54. #include "ice1712.h"
  55. #include "envy24ht.h"
  56. #include "aureon.h"
  57. #include <sound/tlv.h>
  58. /* AC97 register cache for Aureon */
  59. struct aureon_spec {
  60. unsigned short stac9744[64];
  61. unsigned int cs8415_mux;
  62. unsigned short master[2];
  63. unsigned short vol[8];
  64. unsigned char pca9554_out;
  65. };
  66. /* WM8770 registers */
  67. #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
  68. #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
  69. #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
  70. #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
  71. #define WM_PHASE_SWAP 0x12 /* DAC phase */
  72. #define WM_DAC_CTRL1 0x13 /* DAC control bits */
  73. #define WM_MUTE 0x14 /* mute controls */
  74. #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
  75. #define WM_INT_CTRL 0x16 /* interface control */
  76. #define WM_MASTER 0x17 /* master clock and mode */
  77. #define WM_POWERDOWN 0x18 /* power-down controls */
  78. #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
  79. #define WM_ADC_MUX 0x1b /* input MUX */
  80. #define WM_OUT_MUX1 0x1c /* output MUX */
  81. #define WM_OUT_MUX2 0x1e /* output MUX */
  82. #define WM_RESET 0x1f /* software reset */
  83. /* CS8415A registers */
  84. #define CS8415_CTRL1 0x01
  85. #define CS8415_CTRL2 0x02
  86. #define CS8415_QSUB 0x14
  87. #define CS8415_RATIO 0x1E
  88. #define CS8415_C_BUFFER 0x20
  89. #define CS8415_ID 0x7F
  90. /* PCA9554 registers */
  91. #define PCA9554_DEV 0x40 /* I2C device address */
  92. #define PCA9554_IN 0x00 /* input port */
  93. #define PCA9554_OUT 0x01 /* output port */
  94. #define PCA9554_INVERT 0x02 /* input invert */
  95. #define PCA9554_DIR 0x03 /* port directions */
  96. /*
  97. * Aureon Universe additional controls using PCA9554
  98. */
  99. /*
  100. * Send data to pca9554
  101. */
  102. static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
  103. unsigned char data)
  104. {
  105. unsigned int tmp;
  106. int i, j;
  107. unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
  108. unsigned char val = 0;
  109. tmp = snd_ice1712_gpio_read(ice);
  110. snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
  111. AUREON_WM_RW|AUREON_WM_CS|
  112. AUREON_CS8415_CS));
  113. tmp |= AUREON_WM_RW;
  114. tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
  115. tmp &= ~AUREON_SPI_MOSI;
  116. tmp &= ~AUREON_SPI_CLK;
  117. snd_ice1712_gpio_write(ice, tmp);
  118. udelay(50);
  119. /*
  120. * send i2c stop condition and start condition
  121. * to obtain sane state
  122. */
  123. tmp |= AUREON_SPI_CLK;
  124. snd_ice1712_gpio_write(ice, tmp);
  125. udelay(50);
  126. tmp |= AUREON_SPI_MOSI;
  127. snd_ice1712_gpio_write(ice, tmp);
  128. udelay(100);
  129. tmp &= ~AUREON_SPI_MOSI;
  130. snd_ice1712_gpio_write(ice, tmp);
  131. udelay(50);
  132. tmp &= ~AUREON_SPI_CLK;
  133. snd_ice1712_gpio_write(ice, tmp);
  134. udelay(100);
  135. /*
  136. * send device address, command and value,
  137. * skipping ack cycles in between
  138. */
  139. for (j = 0; j < 3; j++) {
  140. switch (j) {
  141. case 0:
  142. val = dev;
  143. break;
  144. case 1:
  145. val = reg;
  146. break;
  147. case 2:
  148. val = data;
  149. break;
  150. }
  151. for (i = 7; i >= 0; i--) {
  152. tmp &= ~AUREON_SPI_CLK;
  153. snd_ice1712_gpio_write(ice, tmp);
  154. udelay(40);
  155. if (val & (1 << i))
  156. tmp |= AUREON_SPI_MOSI;
  157. else
  158. tmp &= ~AUREON_SPI_MOSI;
  159. snd_ice1712_gpio_write(ice, tmp);
  160. udelay(40);
  161. tmp |= AUREON_SPI_CLK;
  162. snd_ice1712_gpio_write(ice, tmp);
  163. udelay(40);
  164. }
  165. tmp &= ~AUREON_SPI_CLK;
  166. snd_ice1712_gpio_write(ice, tmp);
  167. udelay(40);
  168. tmp |= AUREON_SPI_CLK;
  169. snd_ice1712_gpio_write(ice, tmp);
  170. udelay(40);
  171. tmp &= ~AUREON_SPI_CLK;
  172. snd_ice1712_gpio_write(ice, tmp);
  173. udelay(40);
  174. }
  175. tmp &= ~AUREON_SPI_CLK;
  176. snd_ice1712_gpio_write(ice, tmp);
  177. udelay(40);
  178. tmp &= ~AUREON_SPI_MOSI;
  179. snd_ice1712_gpio_write(ice, tmp);
  180. udelay(40);
  181. tmp |= AUREON_SPI_CLK;
  182. snd_ice1712_gpio_write(ice, tmp);
  183. udelay(50);
  184. tmp |= AUREON_SPI_MOSI;
  185. snd_ice1712_gpio_write(ice, tmp);
  186. udelay(100);
  187. }
  188. static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
  189. struct snd_ctl_elem_info *uinfo)
  190. {
  191. static const char * const texts[3] =
  192. {"Internal Aux", "Wavetable", "Rear Line-In"};
  193. return snd_ctl_enum_info(uinfo, 1, 3, texts);
  194. }
  195. static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
  196. struct snd_ctl_elem_value *ucontrol)
  197. {
  198. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  199. struct aureon_spec *spec = ice->spec;
  200. ucontrol->value.enumerated.item[0] = spec->pca9554_out;
  201. return 0;
  202. }
  203. static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
  204. struct snd_ctl_elem_value *ucontrol)
  205. {
  206. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  207. struct aureon_spec *spec = ice->spec;
  208. unsigned char oval, nval;
  209. int change;
  210. nval = ucontrol->value.enumerated.item[0];
  211. if (nval >= 3)
  212. return -EINVAL;
  213. snd_ice1712_save_gpio_status(ice);
  214. oval = spec->pca9554_out;
  215. change = (oval != nval);
  216. if (change) {
  217. aureon_pca9554_write(ice, PCA9554_OUT, nval);
  218. spec->pca9554_out = nval;
  219. }
  220. snd_ice1712_restore_gpio_status(ice);
  221. return change;
  222. }
  223. static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
  224. unsigned short val)
  225. {
  226. struct aureon_spec *spec = ice->spec;
  227. unsigned int tmp;
  228. /* Send address to XILINX chip */
  229. tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
  230. snd_ice1712_gpio_write(ice, tmp);
  231. udelay(10);
  232. tmp |= AUREON_AC97_ADDR;
  233. snd_ice1712_gpio_write(ice, tmp);
  234. udelay(10);
  235. tmp &= ~AUREON_AC97_ADDR;
  236. snd_ice1712_gpio_write(ice, tmp);
  237. udelay(10);
  238. /* Send low-order byte to XILINX chip */
  239. tmp &= ~AUREON_AC97_DATA_MASK;
  240. tmp |= val & AUREON_AC97_DATA_MASK;
  241. snd_ice1712_gpio_write(ice, tmp);
  242. udelay(10);
  243. tmp |= AUREON_AC97_DATA_LOW;
  244. snd_ice1712_gpio_write(ice, tmp);
  245. udelay(10);
  246. tmp &= ~AUREON_AC97_DATA_LOW;
  247. snd_ice1712_gpio_write(ice, tmp);
  248. udelay(10);
  249. /* Send high-order byte to XILINX chip */
  250. tmp &= ~AUREON_AC97_DATA_MASK;
  251. tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
  252. snd_ice1712_gpio_write(ice, tmp);
  253. udelay(10);
  254. tmp |= AUREON_AC97_DATA_HIGH;
  255. snd_ice1712_gpio_write(ice, tmp);
  256. udelay(10);
  257. tmp &= ~AUREON_AC97_DATA_HIGH;
  258. snd_ice1712_gpio_write(ice, tmp);
  259. udelay(10);
  260. /* Instruct XILINX chip to parse the data to the STAC9744 chip */
  261. tmp |= AUREON_AC97_COMMIT;
  262. snd_ice1712_gpio_write(ice, tmp);
  263. udelay(10);
  264. tmp &= ~AUREON_AC97_COMMIT;
  265. snd_ice1712_gpio_write(ice, tmp);
  266. udelay(10);
  267. /* Store the data in out private buffer */
  268. spec->stac9744[(reg & 0x7F) >> 1] = val;
  269. }
  270. static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
  271. {
  272. struct aureon_spec *spec = ice->spec;
  273. return spec->stac9744[(reg & 0x7F) >> 1];
  274. }
  275. /*
  276. * Initialize STAC9744 chip
  277. */
  278. static int aureon_ac97_init(struct snd_ice1712 *ice)
  279. {
  280. struct aureon_spec *spec = ice->spec;
  281. int i;
  282. static const unsigned short ac97_defaults[] = {
  283. 0x00, 0x9640,
  284. 0x02, 0x8000,
  285. 0x04, 0x8000,
  286. 0x06, 0x8000,
  287. 0x0C, 0x8008,
  288. 0x0E, 0x8008,
  289. 0x10, 0x8808,
  290. 0x12, 0x8808,
  291. 0x14, 0x8808,
  292. 0x16, 0x8808,
  293. 0x18, 0x8808,
  294. 0x1C, 0x8000,
  295. 0x26, 0x000F,
  296. 0x28, 0x0201,
  297. 0x2C, 0xBB80,
  298. 0x32, 0xBB80,
  299. 0x7C, 0x8384,
  300. 0x7E, 0x7644,
  301. (unsigned short)-1
  302. };
  303. unsigned int tmp;
  304. /* Cold reset */
  305. tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
  306. snd_ice1712_gpio_write(ice, tmp);
  307. udelay(3);
  308. tmp &= ~AUREON_AC97_RESET;
  309. snd_ice1712_gpio_write(ice, tmp);
  310. udelay(3);
  311. tmp |= AUREON_AC97_RESET;
  312. snd_ice1712_gpio_write(ice, tmp);
  313. udelay(3);
  314. memset(&spec->stac9744, 0, sizeof(spec->stac9744));
  315. for (i = 0; ac97_defaults[i] != (unsigned short)-1; i += 2)
  316. spec->stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
  317. /* Unmute AC'97 master volume permanently - muting is done by WM8770 */
  318. aureon_ac97_write(ice, AC97_MASTER, 0x0000);
  319. return 0;
  320. }
  321. #define AUREON_AC97_STEREO 0x80
  322. /*
  323. * AC'97 volume controls
  324. */
  325. static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  326. {
  327. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  328. uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
  329. uinfo->value.integer.min = 0;
  330. uinfo->value.integer.max = 31;
  331. return 0;
  332. }
  333. static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  334. {
  335. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  336. unsigned short vol;
  337. mutex_lock(&ice->gpio_mutex);
  338. vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  339. ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
  340. if (kcontrol->private_value & AUREON_AC97_STEREO)
  341. ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
  342. mutex_unlock(&ice->gpio_mutex);
  343. return 0;
  344. }
  345. static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  346. {
  347. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  348. unsigned short ovol, nvol;
  349. int change;
  350. snd_ice1712_save_gpio_status(ice);
  351. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  352. nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
  353. if (kcontrol->private_value & AUREON_AC97_STEREO)
  354. nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
  355. nvol |= ovol & ~0x1F1F;
  356. change = (ovol != nvol);
  357. if (change)
  358. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  359. snd_ice1712_restore_gpio_status(ice);
  360. return change;
  361. }
  362. /*
  363. * AC'97 mute controls
  364. */
  365. #define aureon_ac97_mute_info snd_ctl_boolean_mono_info
  366. static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  367. {
  368. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  369. mutex_lock(&ice->gpio_mutex);
  370. ucontrol->value.integer.value[0] = aureon_ac97_read(ice,
  371. kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
  372. mutex_unlock(&ice->gpio_mutex);
  373. return 0;
  374. }
  375. static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  376. {
  377. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  378. unsigned short ovol, nvol;
  379. int change;
  380. snd_ice1712_save_gpio_status(ice);
  381. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  382. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~0x8000);
  383. change = (ovol != nvol);
  384. if (change)
  385. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  386. snd_ice1712_restore_gpio_status(ice);
  387. return change;
  388. }
  389. /*
  390. * AC'97 mute controls
  391. */
  392. #define aureon_ac97_micboost_info snd_ctl_boolean_mono_info
  393. static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  394. {
  395. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  396. mutex_lock(&ice->gpio_mutex);
  397. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
  398. mutex_unlock(&ice->gpio_mutex);
  399. return 0;
  400. }
  401. static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  402. {
  403. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  404. unsigned short ovol, nvol;
  405. int change;
  406. snd_ice1712_save_gpio_status(ice);
  407. ovol = aureon_ac97_read(ice, AC97_MIC);
  408. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
  409. change = (ovol != nvol);
  410. if (change)
  411. aureon_ac97_write(ice, AC97_MIC, nvol);
  412. snd_ice1712_restore_gpio_status(ice);
  413. return change;
  414. }
  415. /*
  416. * write data in the SPI mode
  417. */
  418. static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
  419. {
  420. unsigned int tmp;
  421. int i;
  422. unsigned int mosi, clk;
  423. tmp = snd_ice1712_gpio_read(ice);
  424. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  425. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) {
  426. snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
  427. mosi = PRODIGY_SPI_MOSI;
  428. clk = PRODIGY_SPI_CLK;
  429. } else {
  430. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
  431. AUREON_WM_CS|AUREON_CS8415_CS));
  432. mosi = AUREON_SPI_MOSI;
  433. clk = AUREON_SPI_CLK;
  434. tmp |= AUREON_WM_RW;
  435. }
  436. tmp &= ~cs;
  437. snd_ice1712_gpio_write(ice, tmp);
  438. udelay(1);
  439. for (i = bits - 1; i >= 0; i--) {
  440. tmp &= ~clk;
  441. snd_ice1712_gpio_write(ice, tmp);
  442. udelay(1);
  443. if (data & (1 << i))
  444. tmp |= mosi;
  445. else
  446. tmp &= ~mosi;
  447. snd_ice1712_gpio_write(ice, tmp);
  448. udelay(1);
  449. tmp |= clk;
  450. snd_ice1712_gpio_write(ice, tmp);
  451. udelay(1);
  452. }
  453. tmp &= ~clk;
  454. tmp |= cs;
  455. snd_ice1712_gpio_write(ice, tmp);
  456. udelay(1);
  457. tmp |= clk;
  458. snd_ice1712_gpio_write(ice, tmp);
  459. udelay(1);
  460. }
  461. /*
  462. * Read data in SPI mode
  463. */
  464. static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs,
  465. unsigned int data, int bits, unsigned char *buffer, int size)
  466. {
  467. int i, j;
  468. unsigned int tmp;
  469. tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
  470. snd_ice1712_gpio_write(ice, tmp);
  471. tmp &= ~cs;
  472. snd_ice1712_gpio_write(ice, tmp);
  473. udelay(1);
  474. for (i = bits-1; i >= 0; i--) {
  475. if (data & (1 << i))
  476. tmp |= AUREON_SPI_MOSI;
  477. else
  478. tmp &= ~AUREON_SPI_MOSI;
  479. snd_ice1712_gpio_write(ice, tmp);
  480. udelay(1);
  481. tmp |= AUREON_SPI_CLK;
  482. snd_ice1712_gpio_write(ice, tmp);
  483. udelay(1);
  484. tmp &= ~AUREON_SPI_CLK;
  485. snd_ice1712_gpio_write(ice, tmp);
  486. udelay(1);
  487. }
  488. for (j = 0; j < size; j++) {
  489. unsigned char outdata = 0;
  490. for (i = 7; i >= 0; i--) {
  491. tmp = snd_ice1712_gpio_read(ice);
  492. outdata <<= 1;
  493. outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
  494. udelay(1);
  495. tmp |= AUREON_SPI_CLK;
  496. snd_ice1712_gpio_write(ice, tmp);
  497. udelay(1);
  498. tmp &= ~AUREON_SPI_CLK;
  499. snd_ice1712_gpio_write(ice, tmp);
  500. udelay(1);
  501. }
  502. buffer[j] = outdata;
  503. }
  504. tmp |= cs;
  505. snd_ice1712_gpio_write(ice, tmp);
  506. }
  507. static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg)
  508. {
  509. unsigned char val;
  510. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  511. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
  512. return val;
  513. }
  514. static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg,
  515. unsigned char *buffer, int size)
  516. {
  517. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  518. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
  519. }
  520. static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg,
  521. unsigned char val)
  522. {
  523. aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
  524. }
  525. /*
  526. * get the current register value of WM codec
  527. */
  528. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  529. {
  530. reg <<= 1;
  531. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  532. ice->akm[0].images[reg + 1];
  533. }
  534. /*
  535. * set the register value of WM codec
  536. */
  537. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  538. {
  539. aureon_spi_write(ice,
  540. ((ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  541. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) ?
  542. PRODIGY_WM_CS : AUREON_WM_CS),
  543. (reg << 9) | (val & 0x1ff), 16);
  544. }
  545. /*
  546. * set the register value of WM codec and remember it
  547. */
  548. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  549. {
  550. wm_put_nocache(ice, reg, val);
  551. reg <<= 1;
  552. ice->akm[0].images[reg] = val >> 8;
  553. ice->akm[0].images[reg + 1] = val;
  554. }
  555. /*
  556. */
  557. #define aureon_mono_bool_info snd_ctl_boolean_mono_info
  558. /*
  559. * AC'97 master playback mute controls (Mute on WM8770 chip)
  560. */
  561. #define aureon_ac97_mmute_info snd_ctl_boolean_mono_info
  562. static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  563. {
  564. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  565. mutex_lock(&ice->gpio_mutex);
  566. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
  567. mutex_unlock(&ice->gpio_mutex);
  568. return 0;
  569. }
  570. static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  571. {
  572. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  573. unsigned short ovol, nvol;
  574. int change;
  575. snd_ice1712_save_gpio_status(ice);
  576. ovol = wm_get(ice, WM_OUT_MUX1);
  577. nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
  578. change = (ovol != nvol);
  579. if (change)
  580. wm_put(ice, WM_OUT_MUX1, nvol);
  581. snd_ice1712_restore_gpio_status(ice);
  582. return change;
  583. }
  584. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -10000, 100, 1);
  585. static const DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
  586. static const DECLARE_TLV_DB_SCALE(db_scale_wm_adc, -1200, 100, 0);
  587. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_master, -4650, 150, 0);
  588. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_gain, -3450, 150, 0);
  589. #define WM_VOL_MAX 100
  590. #define WM_VOL_CNT 101 /* 0dB .. -100dB */
  591. #define WM_VOL_MUTE 0x8000
  592. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  593. {
  594. unsigned char nvol;
  595. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE)) {
  596. nvol = 0;
  597. } else {
  598. nvol = ((vol % WM_VOL_CNT) * (master % WM_VOL_CNT)) /
  599. WM_VOL_MAX;
  600. nvol += 0x1b;
  601. }
  602. wm_put(ice, index, nvol);
  603. wm_put_nocache(ice, index, 0x180 | nvol);
  604. }
  605. /*
  606. * DAC mute control
  607. */
  608. #define wm_pcm_mute_info snd_ctl_boolean_mono_info
  609. static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  610. {
  611. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  612. mutex_lock(&ice->gpio_mutex);
  613. ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
  614. mutex_unlock(&ice->gpio_mutex);
  615. return 0;
  616. }
  617. static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  618. {
  619. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  620. unsigned short nval, oval;
  621. int change;
  622. snd_ice1712_save_gpio_status(ice);
  623. oval = wm_get(ice, WM_MUTE);
  624. nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
  625. change = (oval != nval);
  626. if (change)
  627. wm_put(ice, WM_MUTE, nval);
  628. snd_ice1712_restore_gpio_status(ice);
  629. return change;
  630. }
  631. /*
  632. * Master volume attenuation mixer control
  633. */
  634. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  635. {
  636. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  637. uinfo->count = 2;
  638. uinfo->value.integer.min = 0;
  639. uinfo->value.integer.max = WM_VOL_MAX;
  640. return 0;
  641. }
  642. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  643. {
  644. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  645. struct aureon_spec *spec = ice->spec;
  646. int i;
  647. for (i = 0; i < 2; i++)
  648. ucontrol->value.integer.value[i] =
  649. spec->master[i] & ~WM_VOL_MUTE;
  650. return 0;
  651. }
  652. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  653. {
  654. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  655. struct aureon_spec *spec = ice->spec;
  656. int ch, change = 0;
  657. snd_ice1712_save_gpio_status(ice);
  658. for (ch = 0; ch < 2; ch++) {
  659. unsigned int vol = ucontrol->value.integer.value[ch];
  660. if (vol > WM_VOL_MAX)
  661. vol = WM_VOL_MAX;
  662. vol |= spec->master[ch] & WM_VOL_MUTE;
  663. if (vol != spec->master[ch]) {
  664. int dac;
  665. spec->master[ch] = vol;
  666. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  667. wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
  668. spec->vol[dac + ch],
  669. spec->master[ch]);
  670. change = 1;
  671. }
  672. }
  673. snd_ice1712_restore_gpio_status(ice);
  674. return change;
  675. }
  676. /*
  677. * DAC volume attenuation mixer control
  678. */
  679. static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  680. {
  681. int voices = kcontrol->private_value >> 8;
  682. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  683. uinfo->count = voices;
  684. uinfo->value.integer.min = 0; /* mute (-101dB) */
  685. uinfo->value.integer.max = WM_VOL_MAX; /* 0dB */
  686. return 0;
  687. }
  688. static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  689. {
  690. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  691. struct aureon_spec *spec = ice->spec;
  692. int i, ofs, voices;
  693. voices = kcontrol->private_value >> 8;
  694. ofs = kcontrol->private_value & 0xff;
  695. for (i = 0; i < voices; i++)
  696. ucontrol->value.integer.value[i] =
  697. spec->vol[ofs+i] & ~WM_VOL_MUTE;
  698. return 0;
  699. }
  700. static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  701. {
  702. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  703. struct aureon_spec *spec = ice->spec;
  704. int i, idx, ofs, voices;
  705. int change = 0;
  706. voices = kcontrol->private_value >> 8;
  707. ofs = kcontrol->private_value & 0xff;
  708. snd_ice1712_save_gpio_status(ice);
  709. for (i = 0; i < voices; i++) {
  710. unsigned int vol = ucontrol->value.integer.value[i];
  711. if (vol > WM_VOL_MAX)
  712. vol = WM_VOL_MAX;
  713. vol |= spec->vol[ofs+i] & WM_VOL_MUTE;
  714. if (vol != spec->vol[ofs+i]) {
  715. spec->vol[ofs+i] = vol;
  716. idx = WM_DAC_ATTEN + ofs + i;
  717. wm_set_vol(ice, idx, spec->vol[ofs + i],
  718. spec->master[i]);
  719. change = 1;
  720. }
  721. }
  722. snd_ice1712_restore_gpio_status(ice);
  723. return change;
  724. }
  725. /*
  726. * WM8770 mute control
  727. */
  728. static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  729. {
  730. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  731. uinfo->count = kcontrol->private_value >> 8;
  732. uinfo->value.integer.min = 0;
  733. uinfo->value.integer.max = 1;
  734. return 0;
  735. }
  736. static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  737. {
  738. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  739. struct aureon_spec *spec = ice->spec;
  740. int voices, ofs, i;
  741. voices = kcontrol->private_value >> 8;
  742. ofs = kcontrol->private_value & 0xFF;
  743. for (i = 0; i < voices; i++)
  744. ucontrol->value.integer.value[i] =
  745. (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  746. return 0;
  747. }
  748. static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  749. {
  750. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  751. struct aureon_spec *spec = ice->spec;
  752. int change = 0, voices, ofs, i;
  753. voices = kcontrol->private_value >> 8;
  754. ofs = kcontrol->private_value & 0xFF;
  755. snd_ice1712_save_gpio_status(ice);
  756. for (i = 0; i < voices; i++) {
  757. int val = (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  758. if (ucontrol->value.integer.value[i] != val) {
  759. spec->vol[ofs + i] &= ~WM_VOL_MUTE;
  760. spec->vol[ofs + i] |=
  761. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  762. wm_set_vol(ice, ofs + i, spec->vol[ofs + i],
  763. spec->master[i]);
  764. change = 1;
  765. }
  766. }
  767. snd_ice1712_restore_gpio_status(ice);
  768. return change;
  769. }
  770. /*
  771. * WM8770 master mute control
  772. */
  773. #define wm_master_mute_info snd_ctl_boolean_stereo_info
  774. static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  775. {
  776. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  777. struct aureon_spec *spec = ice->spec;
  778. ucontrol->value.integer.value[0] =
  779. (spec->master[0] & WM_VOL_MUTE) ? 0 : 1;
  780. ucontrol->value.integer.value[1] =
  781. (spec->master[1] & WM_VOL_MUTE) ? 0 : 1;
  782. return 0;
  783. }
  784. static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  785. {
  786. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  787. struct aureon_spec *spec = ice->spec;
  788. int change = 0, i;
  789. snd_ice1712_save_gpio_status(ice);
  790. for (i = 0; i < 2; i++) {
  791. int val = (spec->master[i] & WM_VOL_MUTE) ? 0 : 1;
  792. if (ucontrol->value.integer.value[i] != val) {
  793. int dac;
  794. spec->master[i] &= ~WM_VOL_MUTE;
  795. spec->master[i] |=
  796. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  797. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  798. wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
  799. spec->vol[dac + i],
  800. spec->master[i]);
  801. change = 1;
  802. }
  803. }
  804. snd_ice1712_restore_gpio_status(ice);
  805. return change;
  806. }
  807. /* digital master volume */
  808. #define PCM_0dB 0xff
  809. #define PCM_RES 128 /* -64dB */
  810. #define PCM_MIN (PCM_0dB - PCM_RES)
  811. static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  812. {
  813. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  814. uinfo->count = 1;
  815. uinfo->value.integer.min = 0; /* mute (-64dB) */
  816. uinfo->value.integer.max = PCM_RES; /* 0dB */
  817. return 0;
  818. }
  819. static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  820. {
  821. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  822. unsigned short val;
  823. mutex_lock(&ice->gpio_mutex);
  824. val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  825. val = val > PCM_MIN ? (val - PCM_MIN) : 0;
  826. ucontrol->value.integer.value[0] = val;
  827. mutex_unlock(&ice->gpio_mutex);
  828. return 0;
  829. }
  830. static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  831. {
  832. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  833. unsigned short ovol, nvol;
  834. int change = 0;
  835. nvol = ucontrol->value.integer.value[0];
  836. if (nvol > PCM_RES)
  837. return -EINVAL;
  838. snd_ice1712_save_gpio_status(ice);
  839. nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
  840. ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  841. if (ovol != nvol) {
  842. wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
  843. wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
  844. change = 1;
  845. }
  846. snd_ice1712_restore_gpio_status(ice);
  847. return change;
  848. }
  849. /*
  850. * ADC mute control
  851. */
  852. #define wm_adc_mute_info snd_ctl_boolean_stereo_info
  853. static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  854. {
  855. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  856. unsigned short val;
  857. int i;
  858. mutex_lock(&ice->gpio_mutex);
  859. for (i = 0; i < 2; i++) {
  860. val = wm_get(ice, WM_ADC_GAIN + i);
  861. ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
  862. }
  863. mutex_unlock(&ice->gpio_mutex);
  864. return 0;
  865. }
  866. static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  867. {
  868. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  869. unsigned short new, old;
  870. int i, change = 0;
  871. snd_ice1712_save_gpio_status(ice);
  872. for (i = 0; i < 2; i++) {
  873. old = wm_get(ice, WM_ADC_GAIN + i);
  874. new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
  875. if (new != old) {
  876. wm_put(ice, WM_ADC_GAIN + i, new);
  877. change = 1;
  878. }
  879. }
  880. snd_ice1712_restore_gpio_status(ice);
  881. return change;
  882. }
  883. /*
  884. * ADC gain mixer control
  885. */
  886. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  887. {
  888. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  889. uinfo->count = 2;
  890. uinfo->value.integer.min = 0; /* -12dB */
  891. uinfo->value.integer.max = 0x1f; /* 19dB */
  892. return 0;
  893. }
  894. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  895. {
  896. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  897. int i, idx;
  898. unsigned short vol;
  899. mutex_lock(&ice->gpio_mutex);
  900. for (i = 0; i < 2; i++) {
  901. idx = WM_ADC_GAIN + i;
  902. vol = wm_get(ice, idx) & 0x1f;
  903. ucontrol->value.integer.value[i] = vol;
  904. }
  905. mutex_unlock(&ice->gpio_mutex);
  906. return 0;
  907. }
  908. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  909. {
  910. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  911. int i, idx;
  912. unsigned short ovol, nvol;
  913. int change = 0;
  914. snd_ice1712_save_gpio_status(ice);
  915. for (i = 0; i < 2; i++) {
  916. idx = WM_ADC_GAIN + i;
  917. nvol = ucontrol->value.integer.value[i] & 0x1f;
  918. ovol = wm_get(ice, idx);
  919. if ((ovol & 0x1f) != nvol) {
  920. wm_put(ice, idx, nvol | (ovol & ~0x1f));
  921. change = 1;
  922. }
  923. }
  924. snd_ice1712_restore_gpio_status(ice);
  925. return change;
  926. }
  927. /*
  928. * ADC input mux mixer control
  929. */
  930. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  931. {
  932. static const char * const texts[] = {
  933. "CD", /* AIN1 */
  934. "Aux", /* AIN2 */
  935. "Line", /* AIN3 */
  936. "Mic", /* AIN4 */
  937. "AC97" /* AIN5 */
  938. };
  939. static const char * const universe_texts[] = {
  940. "Aux1", /* AIN1 */
  941. "CD", /* AIN2 */
  942. "Phono", /* AIN3 */
  943. "Line", /* AIN4 */
  944. "Aux2", /* AIN5 */
  945. "Mic", /* AIN6 */
  946. "Aux3", /* AIN7 */
  947. "AC97" /* AIN8 */
  948. };
  949. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  950. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE)
  951. return snd_ctl_enum_info(uinfo, 2, 8, universe_texts);
  952. else
  953. return snd_ctl_enum_info(uinfo, 2, 5, texts);
  954. }
  955. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  956. {
  957. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  958. unsigned short val;
  959. mutex_lock(&ice->gpio_mutex);
  960. val = wm_get(ice, WM_ADC_MUX);
  961. ucontrol->value.enumerated.item[0] = val & 7;
  962. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  963. mutex_unlock(&ice->gpio_mutex);
  964. return 0;
  965. }
  966. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  967. {
  968. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  969. unsigned short oval, nval;
  970. int change;
  971. snd_ice1712_save_gpio_status(ice);
  972. oval = wm_get(ice, WM_ADC_MUX);
  973. nval = oval & ~0x77;
  974. nval |= ucontrol->value.enumerated.item[0] & 7;
  975. nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
  976. change = (oval != nval);
  977. if (change)
  978. wm_put(ice, WM_ADC_MUX, nval);
  979. snd_ice1712_restore_gpio_status(ice);
  980. return change;
  981. }
  982. /*
  983. * CS8415 Input mux
  984. */
  985. static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  986. {
  987. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  988. static const char * const aureon_texts[] = {
  989. "CD", /* RXP0 */
  990. "Optical" /* RXP1 */
  991. };
  992. static const char * const prodigy_texts[] = {
  993. "CD",
  994. "Coax"
  995. };
  996. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
  997. return snd_ctl_enum_info(uinfo, 1, 2, prodigy_texts);
  998. else
  999. return snd_ctl_enum_info(uinfo, 1, 2, aureon_texts);
  1000. }
  1001. static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1002. {
  1003. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1004. struct aureon_spec *spec = ice->spec;
  1005. /* snd_ice1712_save_gpio_status(ice); */
  1006. /* val = aureon_cs8415_get(ice, CS8415_CTRL2); */
  1007. ucontrol->value.enumerated.item[0] = spec->cs8415_mux;
  1008. /* snd_ice1712_restore_gpio_status(ice); */
  1009. return 0;
  1010. }
  1011. static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1012. {
  1013. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1014. struct aureon_spec *spec = ice->spec;
  1015. unsigned short oval, nval;
  1016. int change;
  1017. snd_ice1712_save_gpio_status(ice);
  1018. oval = aureon_cs8415_get(ice, CS8415_CTRL2);
  1019. nval = oval & ~0x07;
  1020. nval |= ucontrol->value.enumerated.item[0] & 7;
  1021. change = (oval != nval);
  1022. if (change)
  1023. aureon_cs8415_put(ice, CS8415_CTRL2, nval);
  1024. snd_ice1712_restore_gpio_status(ice);
  1025. spec->cs8415_mux = ucontrol->value.enumerated.item[0];
  1026. return change;
  1027. }
  1028. static int aureon_cs8415_rate_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1029. {
  1030. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1031. uinfo->count = 1;
  1032. uinfo->value.integer.min = 0;
  1033. uinfo->value.integer.max = 192000;
  1034. return 0;
  1035. }
  1036. static int aureon_cs8415_rate_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1037. {
  1038. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1039. unsigned char ratio;
  1040. ratio = aureon_cs8415_get(ice, CS8415_RATIO);
  1041. ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
  1042. return 0;
  1043. }
  1044. /*
  1045. * CS8415A Mute
  1046. */
  1047. #define aureon_cs8415_mute_info snd_ctl_boolean_mono_info
  1048. static int aureon_cs8415_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1049. {
  1050. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1051. snd_ice1712_save_gpio_status(ice);
  1052. ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
  1053. snd_ice1712_restore_gpio_status(ice);
  1054. return 0;
  1055. }
  1056. static int aureon_cs8415_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1057. {
  1058. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1059. unsigned char oval, nval;
  1060. int change;
  1061. snd_ice1712_save_gpio_status(ice);
  1062. oval = aureon_cs8415_get(ice, CS8415_CTRL1);
  1063. if (ucontrol->value.integer.value[0])
  1064. nval = oval & ~0x20;
  1065. else
  1066. nval = oval | 0x20;
  1067. change = (oval != nval);
  1068. if (change)
  1069. aureon_cs8415_put(ice, CS8415_CTRL1, nval);
  1070. snd_ice1712_restore_gpio_status(ice);
  1071. return change;
  1072. }
  1073. /*
  1074. * CS8415A Q-Sub info
  1075. */
  1076. static int aureon_cs8415_qsub_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1077. {
  1078. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1079. uinfo->count = 10;
  1080. return 0;
  1081. }
  1082. static int aureon_cs8415_qsub_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1083. {
  1084. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1085. snd_ice1712_save_gpio_status(ice);
  1086. aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
  1087. snd_ice1712_restore_gpio_status(ice);
  1088. return 0;
  1089. }
  1090. static int aureon_cs8415_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1091. {
  1092. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1093. uinfo->count = 1;
  1094. return 0;
  1095. }
  1096. static int aureon_cs8415_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1097. {
  1098. memset(ucontrol->value.iec958.status, 0xFF, 24);
  1099. return 0;
  1100. }
  1101. static int aureon_cs8415_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1102. {
  1103. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1104. snd_ice1712_save_gpio_status(ice);
  1105. aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
  1106. snd_ice1712_restore_gpio_status(ice);
  1107. return 0;
  1108. }
  1109. /*
  1110. * Headphone Amplifier
  1111. */
  1112. static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
  1113. {
  1114. unsigned int tmp, tmp2;
  1115. tmp2 = tmp = snd_ice1712_gpio_read(ice);
  1116. if (enable)
  1117. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1118. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1119. tmp |= AUREON_HP_SEL;
  1120. else
  1121. tmp |= PRODIGY_HP_SEL;
  1122. else
  1123. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1124. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1125. tmp &= ~AUREON_HP_SEL;
  1126. else
  1127. tmp &= ~PRODIGY_HP_SEL;
  1128. if (tmp != tmp2) {
  1129. snd_ice1712_gpio_write(ice, tmp);
  1130. return 1;
  1131. }
  1132. return 0;
  1133. }
  1134. static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
  1135. {
  1136. unsigned int tmp = snd_ice1712_gpio_read(ice);
  1137. return (tmp & AUREON_HP_SEL) != 0;
  1138. }
  1139. #define aureon_hpamp_info snd_ctl_boolean_mono_info
  1140. static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1141. {
  1142. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1143. ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
  1144. return 0;
  1145. }
  1146. static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1147. {
  1148. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1149. return aureon_set_headphone_amp(ice, ucontrol->value.integer.value[0]);
  1150. }
  1151. /*
  1152. * Deemphasis
  1153. */
  1154. #define aureon_deemp_info snd_ctl_boolean_mono_info
  1155. static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1156. {
  1157. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1158. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
  1159. return 0;
  1160. }
  1161. static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1162. {
  1163. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1164. int temp, temp2;
  1165. temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
  1166. if (ucontrol->value.integer.value[0])
  1167. temp |= 0xf;
  1168. else
  1169. temp &= ~0xf;
  1170. if (temp != temp2) {
  1171. wm_put(ice, WM_DAC_CTRL2, temp);
  1172. return 1;
  1173. }
  1174. return 0;
  1175. }
  1176. /*
  1177. * ADC Oversampling
  1178. */
  1179. static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  1180. {
  1181. static const char * const texts[2] = { "128x", "64x" };
  1182. return snd_ctl_enum_info(uinfo, 1, 2, texts);
  1183. }
  1184. static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1185. {
  1186. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1187. ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
  1188. return 0;
  1189. }
  1190. static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1191. {
  1192. int temp, temp2;
  1193. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1194. temp2 = temp = wm_get(ice, WM_MASTER);
  1195. if (ucontrol->value.enumerated.item[0])
  1196. temp |= 0x8;
  1197. else
  1198. temp &= ~0x8;
  1199. if (temp != temp2) {
  1200. wm_put(ice, WM_MASTER, temp);
  1201. return 1;
  1202. }
  1203. return 0;
  1204. }
  1205. /*
  1206. * mixers
  1207. */
  1208. static struct snd_kcontrol_new aureon_dac_controls[] = {
  1209. {
  1210. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1211. .name = "Master Playback Switch",
  1212. .info = wm_master_mute_info,
  1213. .get = wm_master_mute_get,
  1214. .put = wm_master_mute_put
  1215. },
  1216. {
  1217. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1218. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1219. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1220. .name = "Master Playback Volume",
  1221. .info = wm_master_vol_info,
  1222. .get = wm_master_vol_get,
  1223. .put = wm_master_vol_put,
  1224. .tlv = { .p = db_scale_wm_dac }
  1225. },
  1226. {
  1227. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1228. .name = "Front Playback Switch",
  1229. .info = wm_mute_info,
  1230. .get = wm_mute_get,
  1231. .put = wm_mute_put,
  1232. .private_value = (2 << 8) | 0
  1233. },
  1234. {
  1235. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1236. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1237. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1238. .name = "Front Playback Volume",
  1239. .info = wm_vol_info,
  1240. .get = wm_vol_get,
  1241. .put = wm_vol_put,
  1242. .private_value = (2 << 8) | 0,
  1243. .tlv = { .p = db_scale_wm_dac }
  1244. },
  1245. {
  1246. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1247. .name = "Rear Playback Switch",
  1248. .info = wm_mute_info,
  1249. .get = wm_mute_get,
  1250. .put = wm_mute_put,
  1251. .private_value = (2 << 8) | 2
  1252. },
  1253. {
  1254. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1255. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1256. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1257. .name = "Rear Playback Volume",
  1258. .info = wm_vol_info,
  1259. .get = wm_vol_get,
  1260. .put = wm_vol_put,
  1261. .private_value = (2 << 8) | 2,
  1262. .tlv = { .p = db_scale_wm_dac }
  1263. },
  1264. {
  1265. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1266. .name = "Center Playback Switch",
  1267. .info = wm_mute_info,
  1268. .get = wm_mute_get,
  1269. .put = wm_mute_put,
  1270. .private_value = (1 << 8) | 4
  1271. },
  1272. {
  1273. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1274. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1275. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1276. .name = "Center Playback Volume",
  1277. .info = wm_vol_info,
  1278. .get = wm_vol_get,
  1279. .put = wm_vol_put,
  1280. .private_value = (1 << 8) | 4,
  1281. .tlv = { .p = db_scale_wm_dac }
  1282. },
  1283. {
  1284. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1285. .name = "LFE Playback Switch",
  1286. .info = wm_mute_info,
  1287. .get = wm_mute_get,
  1288. .put = wm_mute_put,
  1289. .private_value = (1 << 8) | 5
  1290. },
  1291. {
  1292. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1293. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1294. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1295. .name = "LFE Playback Volume",
  1296. .info = wm_vol_info,
  1297. .get = wm_vol_get,
  1298. .put = wm_vol_put,
  1299. .private_value = (1 << 8) | 5,
  1300. .tlv = { .p = db_scale_wm_dac }
  1301. },
  1302. {
  1303. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1304. .name = "Side Playback Switch",
  1305. .info = wm_mute_info,
  1306. .get = wm_mute_get,
  1307. .put = wm_mute_put,
  1308. .private_value = (2 << 8) | 6
  1309. },
  1310. {
  1311. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1312. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1313. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1314. .name = "Side Playback Volume",
  1315. .info = wm_vol_info,
  1316. .get = wm_vol_get,
  1317. .put = wm_vol_put,
  1318. .private_value = (2 << 8) | 6,
  1319. .tlv = { .p = db_scale_wm_dac }
  1320. }
  1321. };
  1322. static struct snd_kcontrol_new wm_controls[] = {
  1323. {
  1324. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1325. .name = "PCM Playback Switch",
  1326. .info = wm_pcm_mute_info,
  1327. .get = wm_pcm_mute_get,
  1328. .put = wm_pcm_mute_put
  1329. },
  1330. {
  1331. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1332. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1333. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1334. .name = "PCM Playback Volume",
  1335. .info = wm_pcm_vol_info,
  1336. .get = wm_pcm_vol_get,
  1337. .put = wm_pcm_vol_put,
  1338. .tlv = { .p = db_scale_wm_pcm }
  1339. },
  1340. {
  1341. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1342. .name = "Capture Switch",
  1343. .info = wm_adc_mute_info,
  1344. .get = wm_adc_mute_get,
  1345. .put = wm_adc_mute_put,
  1346. },
  1347. {
  1348. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1349. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1350. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1351. .name = "Capture Volume",
  1352. .info = wm_adc_vol_info,
  1353. .get = wm_adc_vol_get,
  1354. .put = wm_adc_vol_put,
  1355. .tlv = { .p = db_scale_wm_adc }
  1356. },
  1357. {
  1358. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1359. .name = "Capture Source",
  1360. .info = wm_adc_mux_info,
  1361. .get = wm_adc_mux_get,
  1362. .put = wm_adc_mux_put,
  1363. .private_value = 5
  1364. },
  1365. {
  1366. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1367. .name = "External Amplifier",
  1368. .info = aureon_hpamp_info,
  1369. .get = aureon_hpamp_get,
  1370. .put = aureon_hpamp_put
  1371. },
  1372. {
  1373. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1374. .name = "DAC Deemphasis Switch",
  1375. .info = aureon_deemp_info,
  1376. .get = aureon_deemp_get,
  1377. .put = aureon_deemp_put
  1378. },
  1379. {
  1380. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1381. .name = "ADC Oversampling",
  1382. .info = aureon_oversampling_info,
  1383. .get = aureon_oversampling_get,
  1384. .put = aureon_oversampling_put
  1385. }
  1386. };
  1387. static struct snd_kcontrol_new ac97_controls[] = {
  1388. {
  1389. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1390. .name = "AC97 Playback Switch",
  1391. .info = aureon_ac97_mmute_info,
  1392. .get = aureon_ac97_mmute_get,
  1393. .put = aureon_ac97_mmute_put,
  1394. .private_value = AC97_MASTER
  1395. },
  1396. {
  1397. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1398. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1399. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1400. .name = "AC97 Playback Volume",
  1401. .info = aureon_ac97_vol_info,
  1402. .get = aureon_ac97_vol_get,
  1403. .put = aureon_ac97_vol_put,
  1404. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1405. .tlv = { .p = db_scale_ac97_master }
  1406. },
  1407. {
  1408. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1409. .name = "CD Playback Switch",
  1410. .info = aureon_ac97_mute_info,
  1411. .get = aureon_ac97_mute_get,
  1412. .put = aureon_ac97_mute_put,
  1413. .private_value = AC97_CD
  1414. },
  1415. {
  1416. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1417. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1418. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1419. .name = "CD Playback Volume",
  1420. .info = aureon_ac97_vol_info,
  1421. .get = aureon_ac97_vol_get,
  1422. .put = aureon_ac97_vol_put,
  1423. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1424. .tlv = { .p = db_scale_ac97_gain }
  1425. },
  1426. {
  1427. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1428. .name = "Aux Playback Switch",
  1429. .info = aureon_ac97_mute_info,
  1430. .get = aureon_ac97_mute_get,
  1431. .put = aureon_ac97_mute_put,
  1432. .private_value = AC97_AUX,
  1433. },
  1434. {
  1435. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1436. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1437. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1438. .name = "Aux Playback Volume",
  1439. .info = aureon_ac97_vol_info,
  1440. .get = aureon_ac97_vol_get,
  1441. .put = aureon_ac97_vol_put,
  1442. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1443. .tlv = { .p = db_scale_ac97_gain }
  1444. },
  1445. {
  1446. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1447. .name = "Line Playback Switch",
  1448. .info = aureon_ac97_mute_info,
  1449. .get = aureon_ac97_mute_get,
  1450. .put = aureon_ac97_mute_put,
  1451. .private_value = AC97_LINE
  1452. },
  1453. {
  1454. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1455. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1456. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1457. .name = "Line Playback Volume",
  1458. .info = aureon_ac97_vol_info,
  1459. .get = aureon_ac97_vol_get,
  1460. .put = aureon_ac97_vol_put,
  1461. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1462. .tlv = { .p = db_scale_ac97_gain }
  1463. },
  1464. {
  1465. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1466. .name = "Mic Playback Switch",
  1467. .info = aureon_ac97_mute_info,
  1468. .get = aureon_ac97_mute_get,
  1469. .put = aureon_ac97_mute_put,
  1470. .private_value = AC97_MIC
  1471. },
  1472. {
  1473. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1474. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1475. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1476. .name = "Mic Playback Volume",
  1477. .info = aureon_ac97_vol_info,
  1478. .get = aureon_ac97_vol_get,
  1479. .put = aureon_ac97_vol_put,
  1480. .private_value = AC97_MIC,
  1481. .tlv = { .p = db_scale_ac97_gain }
  1482. },
  1483. {
  1484. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1485. .name = "Mic Boost (+20dB)",
  1486. .info = aureon_ac97_micboost_info,
  1487. .get = aureon_ac97_micboost_get,
  1488. .put = aureon_ac97_micboost_put
  1489. }
  1490. };
  1491. static struct snd_kcontrol_new universe_ac97_controls[] = {
  1492. {
  1493. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1494. .name = "AC97 Playback Switch",
  1495. .info = aureon_ac97_mmute_info,
  1496. .get = aureon_ac97_mmute_get,
  1497. .put = aureon_ac97_mmute_put,
  1498. .private_value = AC97_MASTER
  1499. },
  1500. {
  1501. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1502. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1503. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1504. .name = "AC97 Playback Volume",
  1505. .info = aureon_ac97_vol_info,
  1506. .get = aureon_ac97_vol_get,
  1507. .put = aureon_ac97_vol_put,
  1508. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1509. .tlv = { .p = db_scale_ac97_master }
  1510. },
  1511. {
  1512. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1513. .name = "CD Playback Switch",
  1514. .info = aureon_ac97_mute_info,
  1515. .get = aureon_ac97_mute_get,
  1516. .put = aureon_ac97_mute_put,
  1517. .private_value = AC97_AUX
  1518. },
  1519. {
  1520. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1521. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1522. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1523. .name = "CD Playback Volume",
  1524. .info = aureon_ac97_vol_info,
  1525. .get = aureon_ac97_vol_get,
  1526. .put = aureon_ac97_vol_put,
  1527. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1528. .tlv = { .p = db_scale_ac97_gain }
  1529. },
  1530. {
  1531. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1532. .name = "Phono Playback Switch",
  1533. .info = aureon_ac97_mute_info,
  1534. .get = aureon_ac97_mute_get,
  1535. .put = aureon_ac97_mute_put,
  1536. .private_value = AC97_CD
  1537. },
  1538. {
  1539. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1540. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1541. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1542. .name = "Phono Playback Volume",
  1543. .info = aureon_ac97_vol_info,
  1544. .get = aureon_ac97_vol_get,
  1545. .put = aureon_ac97_vol_put,
  1546. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1547. .tlv = { .p = db_scale_ac97_gain }
  1548. },
  1549. {
  1550. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1551. .name = "Line Playback Switch",
  1552. .info = aureon_ac97_mute_info,
  1553. .get = aureon_ac97_mute_get,
  1554. .put = aureon_ac97_mute_put,
  1555. .private_value = AC97_LINE
  1556. },
  1557. {
  1558. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1559. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1560. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1561. .name = "Line Playback Volume",
  1562. .info = aureon_ac97_vol_info,
  1563. .get = aureon_ac97_vol_get,
  1564. .put = aureon_ac97_vol_put,
  1565. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1566. .tlv = { .p = db_scale_ac97_gain }
  1567. },
  1568. {
  1569. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1570. .name = "Mic Playback Switch",
  1571. .info = aureon_ac97_mute_info,
  1572. .get = aureon_ac97_mute_get,
  1573. .put = aureon_ac97_mute_put,
  1574. .private_value = AC97_MIC
  1575. },
  1576. {
  1577. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1578. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1579. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1580. .name = "Mic Playback Volume",
  1581. .info = aureon_ac97_vol_info,
  1582. .get = aureon_ac97_vol_get,
  1583. .put = aureon_ac97_vol_put,
  1584. .private_value = AC97_MIC,
  1585. .tlv = { .p = db_scale_ac97_gain }
  1586. },
  1587. {
  1588. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1589. .name = "Mic Boost (+20dB)",
  1590. .info = aureon_ac97_micboost_info,
  1591. .get = aureon_ac97_micboost_get,
  1592. .put = aureon_ac97_micboost_put
  1593. },
  1594. {
  1595. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1596. .name = "Aux Playback Switch",
  1597. .info = aureon_ac97_mute_info,
  1598. .get = aureon_ac97_mute_get,
  1599. .put = aureon_ac97_mute_put,
  1600. .private_value = AC97_VIDEO,
  1601. },
  1602. {
  1603. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1604. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1605. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1606. .name = "Aux Playback Volume",
  1607. .info = aureon_ac97_vol_info,
  1608. .get = aureon_ac97_vol_get,
  1609. .put = aureon_ac97_vol_put,
  1610. .private_value = AC97_VIDEO|AUREON_AC97_STEREO,
  1611. .tlv = { .p = db_scale_ac97_gain }
  1612. },
  1613. {
  1614. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1615. .name = "Aux Source",
  1616. .info = aureon_universe_inmux_info,
  1617. .get = aureon_universe_inmux_get,
  1618. .put = aureon_universe_inmux_put
  1619. }
  1620. };
  1621. static struct snd_kcontrol_new cs8415_controls[] = {
  1622. {
  1623. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1624. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, SWITCH),
  1625. .info = aureon_cs8415_mute_info,
  1626. .get = aureon_cs8415_mute_get,
  1627. .put = aureon_cs8415_mute_put
  1628. },
  1629. {
  1630. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1631. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Source",
  1632. .info = aureon_cs8415_mux_info,
  1633. .get = aureon_cs8415_mux_get,
  1634. .put = aureon_cs8415_mux_put,
  1635. },
  1636. {
  1637. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1638. .name = SNDRV_CTL_NAME_IEC958("Q-subcode ", CAPTURE, DEFAULT),
  1639. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1640. .info = aureon_cs8415_qsub_info,
  1641. .get = aureon_cs8415_qsub_get,
  1642. },
  1643. {
  1644. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1645. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
  1646. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1647. .info = aureon_cs8415_spdif_info,
  1648. .get = aureon_cs8415_mask_get
  1649. },
  1650. {
  1651. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1652. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
  1653. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1654. .info = aureon_cs8415_spdif_info,
  1655. .get = aureon_cs8415_spdif_get
  1656. },
  1657. {
  1658. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1659. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Rate",
  1660. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1661. .info = aureon_cs8415_rate_info,
  1662. .get = aureon_cs8415_rate_get
  1663. }
  1664. };
  1665. static int aureon_add_controls(struct snd_ice1712 *ice)
  1666. {
  1667. unsigned int i, counts;
  1668. int err;
  1669. counts = ARRAY_SIZE(aureon_dac_controls);
  1670. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
  1671. counts -= 2; /* no side */
  1672. for (i = 0; i < counts; i++) {
  1673. err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
  1674. if (err < 0)
  1675. return err;
  1676. }
  1677. for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
  1678. err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
  1679. if (err < 0)
  1680. return err;
  1681. }
  1682. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  1683. for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
  1684. err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
  1685. if (err < 0)
  1686. return err;
  1687. }
  1688. } else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1689. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1690. for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
  1691. err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
  1692. if (err < 0)
  1693. return err;
  1694. }
  1695. }
  1696. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1697. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1698. unsigned char id;
  1699. snd_ice1712_save_gpio_status(ice);
  1700. id = aureon_cs8415_get(ice, CS8415_ID);
  1701. if (id != 0x41)
  1702. dev_info(ice->card->dev,
  1703. "No CS8415 chip. Skipping CS8415 controls.\n");
  1704. else if ((id & 0x0F) != 0x01)
  1705. dev_info(ice->card->dev,
  1706. "Detected unsupported CS8415 rev. (%c)\n",
  1707. (char)((id & 0x0F) + 'A' - 1));
  1708. else {
  1709. for (i = 0; i < ARRAY_SIZE(cs8415_controls); i++) {
  1710. struct snd_kcontrol *kctl;
  1711. err = snd_ctl_add(ice->card, (kctl = snd_ctl_new1(&cs8415_controls[i], ice)));
  1712. if (err < 0)
  1713. return err;
  1714. if (i > 1)
  1715. kctl->id.device = ice->pcm->device;
  1716. }
  1717. }
  1718. snd_ice1712_restore_gpio_status(ice);
  1719. }
  1720. return 0;
  1721. }
  1722. /*
  1723. * reset the chip
  1724. */
  1725. static int aureon_reset(struct snd_ice1712 *ice)
  1726. {
  1727. static const unsigned short wm_inits_aureon[] = {
  1728. /* These come first to reduce init pop noise */
  1729. 0x1b, 0x044, /* ADC Mux (AC'97 source) */
  1730. 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
  1731. 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
  1732. 0x18, 0x000, /* All power-up */
  1733. 0x16, 0x122, /* I2S, normal polarity, 24bit */
  1734. 0x17, 0x022, /* 256fs, slave mode */
  1735. 0x00, 0, /* DAC1 analog mute */
  1736. 0x01, 0, /* DAC2 analog mute */
  1737. 0x02, 0, /* DAC3 analog mute */
  1738. 0x03, 0, /* DAC4 analog mute */
  1739. 0x04, 0, /* DAC5 analog mute */
  1740. 0x05, 0, /* DAC6 analog mute */
  1741. 0x06, 0, /* DAC7 analog mute */
  1742. 0x07, 0, /* DAC8 analog mute */
  1743. 0x08, 0x100, /* master analog mute */
  1744. 0x09, 0xff, /* DAC1 digital full */
  1745. 0x0a, 0xff, /* DAC2 digital full */
  1746. 0x0b, 0xff, /* DAC3 digital full */
  1747. 0x0c, 0xff, /* DAC4 digital full */
  1748. 0x0d, 0xff, /* DAC5 digital full */
  1749. 0x0e, 0xff, /* DAC6 digital full */
  1750. 0x0f, 0xff, /* DAC7 digital full */
  1751. 0x10, 0xff, /* DAC8 digital full */
  1752. 0x11, 0x1ff, /* master digital full */
  1753. 0x12, 0x000, /* phase normal */
  1754. 0x13, 0x090, /* unmute DAC L/R */
  1755. 0x14, 0x000, /* all unmute */
  1756. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1757. 0x19, 0x000, /* -12dB ADC/L */
  1758. 0x1a, 0x000, /* -12dB ADC/R */
  1759. (unsigned short)-1
  1760. };
  1761. static const unsigned short wm_inits_prodigy[] = {
  1762. /* These come first to reduce init pop noise */
  1763. 0x1b, 0x000, /* ADC Mux */
  1764. 0x1c, 0x009, /* Out Mux1 */
  1765. 0x1d, 0x009, /* Out Mux2 */
  1766. 0x18, 0x000, /* All power-up */
  1767. 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
  1768. 0x17, 0x006, /* 128fs, slave mode */
  1769. 0x00, 0, /* DAC1 analog mute */
  1770. 0x01, 0, /* DAC2 analog mute */
  1771. 0x02, 0, /* DAC3 analog mute */
  1772. 0x03, 0, /* DAC4 analog mute */
  1773. 0x04, 0, /* DAC5 analog mute */
  1774. 0x05, 0, /* DAC6 analog mute */
  1775. 0x06, 0, /* DAC7 analog mute */
  1776. 0x07, 0, /* DAC8 analog mute */
  1777. 0x08, 0x100, /* master analog mute */
  1778. 0x09, 0x7f, /* DAC1 digital full */
  1779. 0x0a, 0x7f, /* DAC2 digital full */
  1780. 0x0b, 0x7f, /* DAC3 digital full */
  1781. 0x0c, 0x7f, /* DAC4 digital full */
  1782. 0x0d, 0x7f, /* DAC5 digital full */
  1783. 0x0e, 0x7f, /* DAC6 digital full */
  1784. 0x0f, 0x7f, /* DAC7 digital full */
  1785. 0x10, 0x7f, /* DAC8 digital full */
  1786. 0x11, 0x1FF, /* master digital full */
  1787. 0x12, 0x000, /* phase normal */
  1788. 0x13, 0x090, /* unmute DAC L/R */
  1789. 0x14, 0x000, /* all unmute */
  1790. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1791. 0x19, 0x000, /* -12dB ADC/L */
  1792. 0x1a, 0x000, /* -12dB ADC/R */
  1793. (unsigned short)-1
  1794. };
  1795. static const unsigned short cs_inits[] = {
  1796. 0x0441, /* RUN */
  1797. 0x0180, /* no mute, OMCK output on RMCK pin */
  1798. 0x0201, /* S/PDIF source on RXP1 */
  1799. 0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
  1800. (unsigned short)-1
  1801. };
  1802. unsigned int tmp;
  1803. const unsigned short *p;
  1804. int err;
  1805. struct aureon_spec *spec = ice->spec;
  1806. err = aureon_ac97_init(ice);
  1807. if (err != 0)
  1808. return err;
  1809. snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
  1810. /* reset the wm codec as the SPI mode */
  1811. snd_ice1712_save_gpio_status(ice);
  1812. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
  1813. tmp = snd_ice1712_gpio_read(ice);
  1814. tmp &= ~AUREON_WM_RESET;
  1815. snd_ice1712_gpio_write(ice, tmp);
  1816. udelay(1);
  1817. tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
  1818. snd_ice1712_gpio_write(ice, tmp);
  1819. udelay(1);
  1820. tmp |= AUREON_WM_RESET;
  1821. snd_ice1712_gpio_write(ice, tmp);
  1822. udelay(1);
  1823. /* initialize WM8770 codec */
  1824. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
  1825. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  1826. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT)
  1827. p = wm_inits_prodigy;
  1828. else
  1829. p = wm_inits_aureon;
  1830. for (; *p != (unsigned short)-1; p += 2)
  1831. wm_put(ice, p[0], p[1]);
  1832. /* initialize CS8415A codec */
  1833. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1834. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1835. for (p = cs_inits; *p != (unsigned short)-1; p++)
  1836. aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
  1837. spec->cs8415_mux = 1;
  1838. aureon_set_headphone_amp(ice, 1);
  1839. }
  1840. snd_ice1712_restore_gpio_status(ice);
  1841. /* initialize PCA9554 pin directions & set default input */
  1842. aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
  1843. aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
  1844. return 0;
  1845. }
  1846. /*
  1847. * suspend/resume
  1848. */
  1849. #ifdef CONFIG_PM_SLEEP
  1850. static int aureon_resume(struct snd_ice1712 *ice)
  1851. {
  1852. struct aureon_spec *spec = ice->spec;
  1853. int err, i;
  1854. err = aureon_reset(ice);
  1855. if (err != 0)
  1856. return err;
  1857. /* workaround for poking volume with alsamixer after resume:
  1858. * just set stored volume again */
  1859. for (i = 0; i < ice->num_total_dacs; i++)
  1860. wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
  1861. return 0;
  1862. }
  1863. #endif
  1864. /*
  1865. * initialize the chip
  1866. */
  1867. static int aureon_init(struct snd_ice1712 *ice)
  1868. {
  1869. struct aureon_spec *spec;
  1870. int i, err;
  1871. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1872. if (!spec)
  1873. return -ENOMEM;
  1874. ice->spec = spec;
  1875. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
  1876. ice->num_total_dacs = 6;
  1877. ice->num_total_adcs = 2;
  1878. } else {
  1879. /* aureon 7.1 and prodigy 7.1 */
  1880. ice->num_total_dacs = 8;
  1881. ice->num_total_adcs = 2;
  1882. }
  1883. /* to remember the register values of CS8415 */
  1884. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  1885. if (!ice->akm)
  1886. return -ENOMEM;
  1887. ice->akm_codecs = 1;
  1888. err = aureon_reset(ice);
  1889. if (err != 0)
  1890. return err;
  1891. spec->master[0] = WM_VOL_MUTE;
  1892. spec->master[1] = WM_VOL_MUTE;
  1893. for (i = 0; i < ice->num_total_dacs; i++) {
  1894. spec->vol[i] = WM_VOL_MUTE;
  1895. wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
  1896. }
  1897. #ifdef CONFIG_PM_SLEEP
  1898. ice->pm_resume = aureon_resume;
  1899. ice->pm_suspend_enabled = 1;
  1900. #endif
  1901. return 0;
  1902. }
  1903. /*
  1904. * Aureon boards don't provide the EEPROM data except for the vendor IDs.
  1905. * hence the driver needs to sets up it properly.
  1906. */
  1907. static unsigned char aureon51_eeprom[] = {
  1908. [ICE_EEP2_SYSCONF] = 0x0a, /* clock 512, spdif-in/ADC, 3DACs */
  1909. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1910. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1911. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1912. [ICE_EEP2_GPIO_DIR] = 0xff,
  1913. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1914. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1915. [ICE_EEP2_GPIO_MASK] = 0x00,
  1916. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1917. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1918. [ICE_EEP2_GPIO_STATE] = 0x00,
  1919. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1920. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1921. };
  1922. static unsigned char aureon71_eeprom[] = {
  1923. [ICE_EEP2_SYSCONF] = 0x0b, /* clock 512, spdif-in/ADC, 4DACs */
  1924. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1925. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1926. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1927. [ICE_EEP2_GPIO_DIR] = 0xff,
  1928. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1929. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1930. [ICE_EEP2_GPIO_MASK] = 0x00,
  1931. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1932. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1933. [ICE_EEP2_GPIO_STATE] = 0x00,
  1934. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1935. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1936. };
  1937. #define prodigy71_eeprom aureon71_eeprom
  1938. static unsigned char aureon71_universe_eeprom[] = {
  1939. [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, spdif-in/ADC,
  1940. * 4DACs
  1941. */
  1942. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1943. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1944. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1945. [ICE_EEP2_GPIO_DIR] = 0xff,
  1946. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1947. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1948. [ICE_EEP2_GPIO_MASK] = 0x00,
  1949. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1950. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1951. [ICE_EEP2_GPIO_STATE] = 0x00,
  1952. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1953. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1954. };
  1955. static unsigned char prodigy71lt_eeprom[] = {
  1956. [ICE_EEP2_SYSCONF] = 0x4b, /* clock 384, spdif-in/ADC, 4DACs */
  1957. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1958. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1959. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1960. [ICE_EEP2_GPIO_DIR] = 0xff,
  1961. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1962. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1963. [ICE_EEP2_GPIO_MASK] = 0x00,
  1964. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1965. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1966. [ICE_EEP2_GPIO_STATE] = 0x00,
  1967. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1968. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1969. };
  1970. #define prodigy71xt_eeprom prodigy71lt_eeprom
  1971. /* entry point */
  1972. struct snd_ice1712_card_info snd_vt1724_aureon_cards[] = {
  1973. {
  1974. .subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
  1975. .name = "Terratec Aureon 5.1-Sky",
  1976. .model = "aureon51",
  1977. .chip_init = aureon_init,
  1978. .build_controls = aureon_add_controls,
  1979. .eeprom_size = sizeof(aureon51_eeprom),
  1980. .eeprom_data = aureon51_eeprom,
  1981. .driver = "Aureon51",
  1982. },
  1983. {
  1984. .subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
  1985. .name = "Terratec Aureon 7.1-Space",
  1986. .model = "aureon71",
  1987. .chip_init = aureon_init,
  1988. .build_controls = aureon_add_controls,
  1989. .eeprom_size = sizeof(aureon71_eeprom),
  1990. .eeprom_data = aureon71_eeprom,
  1991. .driver = "Aureon71",
  1992. },
  1993. {
  1994. .subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
  1995. .name = "Terratec Aureon 7.1-Universe",
  1996. .model = "universe",
  1997. .chip_init = aureon_init,
  1998. .build_controls = aureon_add_controls,
  1999. .eeprom_size = sizeof(aureon71_universe_eeprom),
  2000. .eeprom_data = aureon71_universe_eeprom,
  2001. .driver = "Aureon71Univ", /* keep in 15 letters */
  2002. },
  2003. {
  2004. .subvendor = VT1724_SUBDEVICE_PRODIGY71,
  2005. .name = "Audiotrak Prodigy 7.1",
  2006. .model = "prodigy71",
  2007. .chip_init = aureon_init,
  2008. .build_controls = aureon_add_controls,
  2009. .eeprom_size = sizeof(prodigy71_eeprom),
  2010. .eeprom_data = prodigy71_eeprom,
  2011. .driver = "Prodigy71", /* should be identical with Aureon71 */
  2012. },
  2013. {
  2014. .subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
  2015. .name = "Audiotrak Prodigy 7.1 LT",
  2016. .model = "prodigy71lt",
  2017. .chip_init = aureon_init,
  2018. .build_controls = aureon_add_controls,
  2019. .eeprom_size = sizeof(prodigy71lt_eeprom),
  2020. .eeprom_data = prodigy71lt_eeprom,
  2021. .driver = "Prodigy71LT",
  2022. },
  2023. {
  2024. .subvendor = VT1724_SUBDEVICE_PRODIGY71XT,
  2025. .name = "Audiotrak Prodigy 7.1 XT",
  2026. .model = "prodigy71xt",
  2027. .chip_init = aureon_init,
  2028. .build_controls = aureon_add_controls,
  2029. .eeprom_size = sizeof(prodigy71xt_eeprom),
  2030. .eeprom_data = prodigy71xt_eeprom,
  2031. .driver = "Prodigy71LT",
  2032. },
  2033. { } /* terminator */
  2034. };