maya44.c 20 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for ESI Maya44 cards
  5. *
  6. * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
  7. * Based on the patches by Rainer Zimmermann <mail@lightshed.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <linux/init.h>
  25. #include <linux/slab.h>
  26. #include <sound/core.h>
  27. #include <sound/control.h>
  28. #include <sound/pcm.h>
  29. #include <sound/tlv.h>
  30. #include "ice1712.h"
  31. #include "envy24ht.h"
  32. #include "maya44.h"
  33. /* WM8776 register indexes */
  34. #define WM8776_REG_HEADPHONE_L 0x00
  35. #define WM8776_REG_HEADPHONE_R 0x01
  36. #define WM8776_REG_HEADPHONE_MASTER 0x02
  37. #define WM8776_REG_DAC_ATTEN_L 0x03
  38. #define WM8776_REG_DAC_ATTEN_R 0x04
  39. #define WM8776_REG_DAC_ATTEN_MASTER 0x05
  40. #define WM8776_REG_DAC_PHASE 0x06
  41. #define WM8776_REG_DAC_CONTROL 0x07
  42. #define WM8776_REG_DAC_MUTE 0x08
  43. #define WM8776_REG_DAC_DEEMPH 0x09
  44. #define WM8776_REG_DAC_IF_CONTROL 0x0a
  45. #define WM8776_REG_ADC_IF_CONTROL 0x0b
  46. #define WM8776_REG_MASTER_MODE_CONTROL 0x0c
  47. #define WM8776_REG_POWERDOWN 0x0d
  48. #define WM8776_REG_ADC_ATTEN_L 0x0e
  49. #define WM8776_REG_ADC_ATTEN_R 0x0f
  50. #define WM8776_REG_ADC_ALC1 0x10
  51. #define WM8776_REG_ADC_ALC2 0x11
  52. #define WM8776_REG_ADC_ALC3 0x12
  53. #define WM8776_REG_ADC_NOISE_GATE 0x13
  54. #define WM8776_REG_ADC_LIMITER 0x14
  55. #define WM8776_REG_ADC_MUX 0x15
  56. #define WM8776_REG_OUTPUT_MUX 0x16
  57. #define WM8776_REG_RESET 0x17
  58. #define WM8776_NUM_REGS 0x18
  59. /* clock ratio identifiers for snd_wm8776_set_rate() */
  60. #define WM8776_CLOCK_RATIO_128FS 0
  61. #define WM8776_CLOCK_RATIO_192FS 1
  62. #define WM8776_CLOCK_RATIO_256FS 2
  63. #define WM8776_CLOCK_RATIO_384FS 3
  64. #define WM8776_CLOCK_RATIO_512FS 4
  65. #define WM8776_CLOCK_RATIO_768FS 5
  66. enum { WM_VOL_HP, WM_VOL_DAC, WM_VOL_ADC, WM_NUM_VOLS };
  67. enum { WM_SW_DAC, WM_SW_BYPASS, WM_NUM_SWITCHES };
  68. struct snd_wm8776 {
  69. unsigned char addr;
  70. unsigned short regs[WM8776_NUM_REGS];
  71. unsigned char volumes[WM_NUM_VOLS][2];
  72. unsigned int switch_bits;
  73. };
  74. struct snd_maya44 {
  75. struct snd_ice1712 *ice;
  76. struct snd_wm8776 wm[2];
  77. struct mutex mutex;
  78. };
  79. /* write the given register and save the data to the cache */
  80. static void wm8776_write(struct snd_ice1712 *ice, struct snd_wm8776 *wm,
  81. unsigned char reg, unsigned short val)
  82. {
  83. /*
  84. * WM8776 registers are up to 9 bits wide, bit 8 is placed in the LSB
  85. * of the address field
  86. */
  87. snd_vt1724_write_i2c(ice, wm->addr,
  88. (reg << 1) | ((val >> 8) & 1),
  89. val & 0xff);
  90. wm->regs[reg] = val;
  91. }
  92. /*
  93. * update the given register with and/or mask and save the data to the cache
  94. */
  95. static int wm8776_write_bits(struct snd_ice1712 *ice, struct snd_wm8776 *wm,
  96. unsigned char reg,
  97. unsigned short mask, unsigned short val)
  98. {
  99. val |= wm->regs[reg] & ~mask;
  100. if (val != wm->regs[reg]) {
  101. wm8776_write(ice, wm, reg, val);
  102. return 1;
  103. }
  104. return 0;
  105. }
  106. /*
  107. * WM8776 volume controls
  108. */
  109. struct maya_vol_info {
  110. unsigned int maxval; /* volume range: 0..maxval */
  111. unsigned char regs[2]; /* left and right registers */
  112. unsigned short mask; /* value mask */
  113. unsigned short offset; /* zero-value offset */
  114. unsigned short mute; /* mute bit */
  115. unsigned short update; /* update bits */
  116. unsigned char mux_bits[2]; /* extra bits for ADC mute */
  117. };
  118. static struct maya_vol_info vol_info[WM_NUM_VOLS] = {
  119. [WM_VOL_HP] = {
  120. .maxval = 80,
  121. .regs = { WM8776_REG_HEADPHONE_L, WM8776_REG_HEADPHONE_R },
  122. .mask = 0x7f,
  123. .offset = 0x30,
  124. .mute = 0x00,
  125. .update = 0x180, /* update and zero-cross enable */
  126. },
  127. [WM_VOL_DAC] = {
  128. .maxval = 255,
  129. .regs = { WM8776_REG_DAC_ATTEN_L, WM8776_REG_DAC_ATTEN_R },
  130. .mask = 0xff,
  131. .offset = 0x01,
  132. .mute = 0x00,
  133. .update = 0x100, /* zero-cross enable */
  134. },
  135. [WM_VOL_ADC] = {
  136. .maxval = 91,
  137. .regs = { WM8776_REG_ADC_ATTEN_L, WM8776_REG_ADC_ATTEN_R },
  138. .mask = 0xff,
  139. .offset = 0xa5,
  140. .mute = 0xa5,
  141. .update = 0x100, /* update */
  142. .mux_bits = { 0x80, 0x40 }, /* ADCMUX bits */
  143. },
  144. };
  145. /*
  146. * dB tables
  147. */
  148. /* headphone output: mute, -73..+6db (1db step) */
  149. static const DECLARE_TLV_DB_SCALE(db_scale_hp, -7400, 100, 1);
  150. /* DAC output: mute, -127..0db (0.5db step) */
  151. static const DECLARE_TLV_DB_SCALE(db_scale_dac, -12750, 50, 1);
  152. /* ADC gain: mute, -21..+24db (0.5db step) */
  153. static const DECLARE_TLV_DB_SCALE(db_scale_adc, -2100, 50, 1);
  154. static int maya_vol_info(struct snd_kcontrol *kcontrol,
  155. struct snd_ctl_elem_info *uinfo)
  156. {
  157. unsigned int idx = kcontrol->private_value;
  158. struct maya_vol_info *vol = &vol_info[idx];
  159. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  160. uinfo->count = 2;
  161. uinfo->value.integer.min = 0;
  162. uinfo->value.integer.max = vol->maxval;
  163. return 0;
  164. }
  165. static int maya_vol_get(struct snd_kcontrol *kcontrol,
  166. struct snd_ctl_elem_value *ucontrol)
  167. {
  168. struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
  169. struct snd_wm8776 *wm =
  170. &chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
  171. unsigned int idx = kcontrol->private_value;
  172. mutex_lock(&chip->mutex);
  173. ucontrol->value.integer.value[0] = wm->volumes[idx][0];
  174. ucontrol->value.integer.value[1] = wm->volumes[idx][1];
  175. mutex_unlock(&chip->mutex);
  176. return 0;
  177. }
  178. static int maya_vol_put(struct snd_kcontrol *kcontrol,
  179. struct snd_ctl_elem_value *ucontrol)
  180. {
  181. struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
  182. struct snd_wm8776 *wm =
  183. &chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
  184. unsigned int idx = kcontrol->private_value;
  185. struct maya_vol_info *vol = &vol_info[idx];
  186. unsigned int val, data;
  187. int ch, changed = 0;
  188. mutex_lock(&chip->mutex);
  189. for (ch = 0; ch < 2; ch++) {
  190. val = ucontrol->value.integer.value[ch];
  191. if (val > vol->maxval)
  192. val = vol->maxval;
  193. if (val == wm->volumes[idx][ch])
  194. continue;
  195. if (!val)
  196. data = vol->mute;
  197. else
  198. data = (val - 1) + vol->offset;
  199. data |= vol->update;
  200. changed |= wm8776_write_bits(chip->ice, wm, vol->regs[ch],
  201. vol->mask | vol->update, data);
  202. if (vol->mux_bits[ch])
  203. wm8776_write_bits(chip->ice, wm, WM8776_REG_ADC_MUX,
  204. vol->mux_bits[ch],
  205. val ? 0 : vol->mux_bits[ch]);
  206. wm->volumes[idx][ch] = val;
  207. }
  208. mutex_unlock(&chip->mutex);
  209. return changed;
  210. }
  211. /*
  212. * WM8776 switch controls
  213. */
  214. #define COMPOSE_SW_VAL(idx, reg, mask) ((idx) | ((reg) << 8) | ((mask) << 16))
  215. #define GET_SW_VAL_IDX(val) ((val) & 0xff)
  216. #define GET_SW_VAL_REG(val) (((val) >> 8) & 0xff)
  217. #define GET_SW_VAL_MASK(val) (((val) >> 16) & 0xff)
  218. #define maya_sw_info snd_ctl_boolean_mono_info
  219. static int maya_sw_get(struct snd_kcontrol *kcontrol,
  220. struct snd_ctl_elem_value *ucontrol)
  221. {
  222. struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
  223. struct snd_wm8776 *wm =
  224. &chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
  225. unsigned int idx = GET_SW_VAL_IDX(kcontrol->private_value);
  226. ucontrol->value.integer.value[0] = (wm->switch_bits >> idx) & 1;
  227. return 0;
  228. }
  229. static int maya_sw_put(struct snd_kcontrol *kcontrol,
  230. struct snd_ctl_elem_value *ucontrol)
  231. {
  232. struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
  233. struct snd_wm8776 *wm =
  234. &chip->wm[snd_ctl_get_ioff(kcontrol, &ucontrol->id)];
  235. unsigned int idx = GET_SW_VAL_IDX(kcontrol->private_value);
  236. unsigned int mask, val;
  237. int changed;
  238. mutex_lock(&chip->mutex);
  239. mask = 1 << idx;
  240. wm->switch_bits &= ~mask;
  241. val = ucontrol->value.integer.value[0];
  242. if (val)
  243. wm->switch_bits |= mask;
  244. mask = GET_SW_VAL_MASK(kcontrol->private_value);
  245. changed = wm8776_write_bits(chip->ice, wm,
  246. GET_SW_VAL_REG(kcontrol->private_value),
  247. mask, val ? mask : 0);
  248. mutex_unlock(&chip->mutex);
  249. return changed;
  250. }
  251. /*
  252. * GPIO pins (known ones for maya44)
  253. */
  254. #define GPIO_PHANTOM_OFF 2
  255. #define GPIO_MIC_RELAY 4
  256. #define GPIO_SPDIF_IN_INV 5
  257. #define GPIO_MUST_BE_0 7
  258. /*
  259. * GPIO switch controls
  260. */
  261. #define COMPOSE_GPIO_VAL(shift, inv) ((shift) | ((inv) << 8))
  262. #define GET_GPIO_VAL_SHIFT(val) ((val) & 0xff)
  263. #define GET_GPIO_VAL_INV(val) (((val) >> 8) & 1)
  264. static int maya_set_gpio_bits(struct snd_ice1712 *ice, unsigned int mask,
  265. unsigned int bits)
  266. {
  267. unsigned int data;
  268. data = snd_ice1712_gpio_read(ice);
  269. if ((data & mask) == bits)
  270. return 0;
  271. snd_ice1712_gpio_write(ice, (data & ~mask) | bits);
  272. return 1;
  273. }
  274. #define maya_gpio_sw_info snd_ctl_boolean_mono_info
  275. static int maya_gpio_sw_get(struct snd_kcontrol *kcontrol,
  276. struct snd_ctl_elem_value *ucontrol)
  277. {
  278. struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
  279. unsigned int shift = GET_GPIO_VAL_SHIFT(kcontrol->private_value);
  280. unsigned int val;
  281. val = (snd_ice1712_gpio_read(chip->ice) >> shift) & 1;
  282. if (GET_GPIO_VAL_INV(kcontrol->private_value))
  283. val = !val;
  284. ucontrol->value.integer.value[0] = val;
  285. return 0;
  286. }
  287. static int maya_gpio_sw_put(struct snd_kcontrol *kcontrol,
  288. struct snd_ctl_elem_value *ucontrol)
  289. {
  290. struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
  291. unsigned int shift = GET_GPIO_VAL_SHIFT(kcontrol->private_value);
  292. unsigned int val, mask;
  293. int changed;
  294. mutex_lock(&chip->mutex);
  295. mask = 1 << shift;
  296. val = ucontrol->value.integer.value[0];
  297. if (GET_GPIO_VAL_INV(kcontrol->private_value))
  298. val = !val;
  299. val = val ? mask : 0;
  300. changed = maya_set_gpio_bits(chip->ice, mask, val);
  301. mutex_unlock(&chip->mutex);
  302. return changed;
  303. }
  304. /*
  305. * capture source selection
  306. */
  307. /* known working input slots (0-4) */
  308. #define MAYA_LINE_IN 1 /* in-2 */
  309. #define MAYA_MIC_IN 3 /* in-4 */
  310. static void wm8776_select_input(struct snd_maya44 *chip, int idx, int line)
  311. {
  312. wm8776_write_bits(chip->ice, &chip->wm[idx], WM8776_REG_ADC_MUX,
  313. 0x1f, 1 << line);
  314. }
  315. static int maya_rec_src_info(struct snd_kcontrol *kcontrol,
  316. struct snd_ctl_elem_info *uinfo)
  317. {
  318. static const char * const texts[] = { "Line", "Mic" };
  319. return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(texts), texts);
  320. }
  321. static int maya_rec_src_get(struct snd_kcontrol *kcontrol,
  322. struct snd_ctl_elem_value *ucontrol)
  323. {
  324. struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
  325. int sel;
  326. if (snd_ice1712_gpio_read(chip->ice) & (1 << GPIO_MIC_RELAY))
  327. sel = 1;
  328. else
  329. sel = 0;
  330. ucontrol->value.enumerated.item[0] = sel;
  331. return 0;
  332. }
  333. static int maya_rec_src_put(struct snd_kcontrol *kcontrol,
  334. struct snd_ctl_elem_value *ucontrol)
  335. {
  336. struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
  337. int sel = ucontrol->value.enumerated.item[0];
  338. int changed;
  339. mutex_lock(&chip->mutex);
  340. changed = maya_set_gpio_bits(chip->ice, 1 << GPIO_MIC_RELAY,
  341. sel ? (1 << GPIO_MIC_RELAY) : 0);
  342. wm8776_select_input(chip, 0, sel ? MAYA_MIC_IN : MAYA_LINE_IN);
  343. mutex_unlock(&chip->mutex);
  344. return changed;
  345. }
  346. /*
  347. * Maya44 routing switch settings have different meanings than the standard
  348. * ice1724 switches as defined in snd_vt1724_pro_route_info (ice1724.c).
  349. */
  350. static int maya_pb_route_info(struct snd_kcontrol *kcontrol,
  351. struct snd_ctl_elem_info *uinfo)
  352. {
  353. static const char * const texts[] = {
  354. "PCM Out", /* 0 */
  355. "Input 1", "Input 2", "Input 3", "Input 4"
  356. };
  357. return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(texts), texts);
  358. }
  359. static int maya_pb_route_shift(int idx)
  360. {
  361. static const unsigned char shift[10] =
  362. { 8, 20, 0, 3, 11, 23, 14, 26, 17, 29 };
  363. return shift[idx % 10];
  364. }
  365. static int maya_pb_route_get(struct snd_kcontrol *kcontrol,
  366. struct snd_ctl_elem_value *ucontrol)
  367. {
  368. struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
  369. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  370. ucontrol->value.enumerated.item[0] =
  371. snd_ice1724_get_route_val(chip->ice, maya_pb_route_shift(idx));
  372. return 0;
  373. }
  374. static int maya_pb_route_put(struct snd_kcontrol *kcontrol,
  375. struct snd_ctl_elem_value *ucontrol)
  376. {
  377. struct snd_maya44 *chip = snd_kcontrol_chip(kcontrol);
  378. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  379. return snd_ice1724_put_route_val(chip->ice,
  380. ucontrol->value.enumerated.item[0],
  381. maya_pb_route_shift(idx));
  382. }
  383. /*
  384. * controls to be added
  385. */
  386. static struct snd_kcontrol_new maya_controls[] = {
  387. {
  388. .name = "Crossmix Playback Volume",
  389. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  390. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  391. SNDRV_CTL_ELEM_ACCESS_TLV_READ,
  392. .info = maya_vol_info,
  393. .get = maya_vol_get,
  394. .put = maya_vol_put,
  395. .tlv = { .p = db_scale_hp },
  396. .private_value = WM_VOL_HP,
  397. .count = 2,
  398. },
  399. {
  400. .name = "PCM Playback Volume",
  401. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  402. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  403. SNDRV_CTL_ELEM_ACCESS_TLV_READ,
  404. .info = maya_vol_info,
  405. .get = maya_vol_get,
  406. .put = maya_vol_put,
  407. .tlv = { .p = db_scale_dac },
  408. .private_value = WM_VOL_DAC,
  409. .count = 2,
  410. },
  411. {
  412. .name = "Line Capture Volume",
  413. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  414. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  415. SNDRV_CTL_ELEM_ACCESS_TLV_READ,
  416. .info = maya_vol_info,
  417. .get = maya_vol_get,
  418. .put = maya_vol_put,
  419. .tlv = { .p = db_scale_adc },
  420. .private_value = WM_VOL_ADC,
  421. .count = 2,
  422. },
  423. {
  424. .name = "PCM Playback Switch",
  425. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  426. .info = maya_sw_info,
  427. .get = maya_sw_get,
  428. .put = maya_sw_put,
  429. .private_value = COMPOSE_SW_VAL(WM_SW_DAC,
  430. WM8776_REG_OUTPUT_MUX, 0x01),
  431. .count = 2,
  432. },
  433. {
  434. .name = "Bypass Playback Switch",
  435. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  436. .info = maya_sw_info,
  437. .get = maya_sw_get,
  438. .put = maya_sw_put,
  439. .private_value = COMPOSE_SW_VAL(WM_SW_BYPASS,
  440. WM8776_REG_OUTPUT_MUX, 0x04),
  441. .count = 2,
  442. },
  443. {
  444. .name = "Capture Source",
  445. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  446. .info = maya_rec_src_info,
  447. .get = maya_rec_src_get,
  448. .put = maya_rec_src_put,
  449. },
  450. {
  451. .name = "Mic Phantom Power Switch",
  452. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  453. .info = maya_gpio_sw_info,
  454. .get = maya_gpio_sw_get,
  455. .put = maya_gpio_sw_put,
  456. .private_value = COMPOSE_GPIO_VAL(GPIO_PHANTOM_OFF, 1),
  457. },
  458. {
  459. .name = "SPDIF Capture Switch",
  460. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  461. .info = maya_gpio_sw_info,
  462. .get = maya_gpio_sw_get,
  463. .put = maya_gpio_sw_put,
  464. .private_value = COMPOSE_GPIO_VAL(GPIO_SPDIF_IN_INV, 1),
  465. },
  466. {
  467. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  468. .name = "H/W Playback Route",
  469. .info = maya_pb_route_info,
  470. .get = maya_pb_route_get,
  471. .put = maya_pb_route_put,
  472. .count = 4, /* FIXME: do controls 5-9 have any meaning? */
  473. },
  474. };
  475. static int maya44_add_controls(struct snd_ice1712 *ice)
  476. {
  477. int err, i;
  478. for (i = 0; i < ARRAY_SIZE(maya_controls); i++) {
  479. err = snd_ctl_add(ice->card, snd_ctl_new1(&maya_controls[i],
  480. ice->spec));
  481. if (err < 0)
  482. return err;
  483. }
  484. return 0;
  485. }
  486. /*
  487. * initialize a wm8776 chip
  488. */
  489. static void wm8776_init(struct snd_ice1712 *ice,
  490. struct snd_wm8776 *wm, unsigned int addr)
  491. {
  492. static const unsigned short inits_wm8776[] = {
  493. 0x02, 0x100, /* R2: headphone L+R muted + update */
  494. 0x05, 0x100, /* R5: DAC output L+R muted + update */
  495. 0x06, 0x000, /* R6: DAC output phase normal */
  496. 0x07, 0x091, /* R7: DAC enable zero cross detection,
  497. normal output */
  498. 0x08, 0x000, /* R8: DAC soft mute off */
  499. 0x09, 0x000, /* R9: no deemph, DAC zero detect disabled */
  500. 0x0a, 0x022, /* R10: DAC I2C mode, std polarities, 24bit */
  501. 0x0b, 0x022, /* R11: ADC I2C mode, std polarities, 24bit,
  502. highpass filter enabled */
  503. 0x0c, 0x042, /* R12: ADC+DAC slave, ADC+DAC 44,1kHz */
  504. 0x0d, 0x000, /* R13: all power up */
  505. 0x0e, 0x100, /* R14: ADC left muted,
  506. enable zero cross detection */
  507. 0x0f, 0x100, /* R15: ADC right muted,
  508. enable zero cross detection */
  509. /* R16: ALC...*/
  510. 0x11, 0x000, /* R17: disable ALC */
  511. /* R18: ALC...*/
  512. /* R19: noise gate...*/
  513. 0x15, 0x000, /* R21: ADC input mux init, mute all inputs */
  514. 0x16, 0x001, /* R22: output mux, select DAC */
  515. 0xff, 0xff
  516. };
  517. const unsigned short *ptr;
  518. unsigned char reg;
  519. unsigned short data;
  520. wm->addr = addr;
  521. /* enable DAC output; mute bypass, aux & all inputs */
  522. wm->switch_bits = (1 << WM_SW_DAC);
  523. ptr = inits_wm8776;
  524. while (*ptr != 0xff) {
  525. reg = *ptr++;
  526. data = *ptr++;
  527. wm8776_write(ice, wm, reg, data);
  528. }
  529. }
  530. /*
  531. * change the rate on the WM8776 codecs.
  532. * this assumes that the VT17xx's rate is changed by the calling function.
  533. * NOTE: even though the WM8776's are running in slave mode and rate
  534. * selection is automatic, we need to call snd_wm8776_set_rate() here
  535. * to make sure some flags are set correctly.
  536. */
  537. static void set_rate(struct snd_ice1712 *ice, unsigned int rate)
  538. {
  539. struct snd_maya44 *chip = ice->spec;
  540. unsigned int ratio, adc_ratio, val;
  541. int i;
  542. switch (rate) {
  543. case 192000:
  544. ratio = WM8776_CLOCK_RATIO_128FS;
  545. break;
  546. case 176400:
  547. ratio = WM8776_CLOCK_RATIO_128FS;
  548. break;
  549. case 96000:
  550. ratio = WM8776_CLOCK_RATIO_256FS;
  551. break;
  552. case 88200:
  553. ratio = WM8776_CLOCK_RATIO_384FS;
  554. break;
  555. case 48000:
  556. ratio = WM8776_CLOCK_RATIO_512FS;
  557. break;
  558. case 44100:
  559. ratio = WM8776_CLOCK_RATIO_512FS;
  560. break;
  561. case 32000:
  562. ratio = WM8776_CLOCK_RATIO_768FS;
  563. break;
  564. case 0:
  565. /* no hint - S/PDIF input is master, simply return */
  566. return;
  567. default:
  568. snd_BUG();
  569. return;
  570. }
  571. /*
  572. * this currently sets the same rate for ADC and DAC, but limits
  573. * ADC rate to 256X (96kHz). For 256X mode (96kHz), this sets ADC
  574. * oversampling to 64x, as recommended by WM8776 datasheet.
  575. * Setting the rate is not really necessary in slave mode.
  576. */
  577. adc_ratio = ratio;
  578. if (adc_ratio < WM8776_CLOCK_RATIO_256FS)
  579. adc_ratio = WM8776_CLOCK_RATIO_256FS;
  580. val = adc_ratio;
  581. if (adc_ratio == WM8776_CLOCK_RATIO_256FS)
  582. val |= 8;
  583. val |= ratio << 4;
  584. mutex_lock(&chip->mutex);
  585. for (i = 0; i < 2; i++)
  586. wm8776_write_bits(ice, &chip->wm[i],
  587. WM8776_REG_MASTER_MODE_CONTROL,
  588. 0x180, val);
  589. mutex_unlock(&chip->mutex);
  590. }
  591. /*
  592. * supported sample rates (to override the default one)
  593. */
  594. static unsigned int rates[] = {
  595. 32000, 44100, 48000, 64000, 88200, 96000, 176400, 192000
  596. };
  597. /* playback rates: 32..192 kHz */
  598. static struct snd_pcm_hw_constraint_list dac_rates = {
  599. .count = ARRAY_SIZE(rates),
  600. .list = rates,
  601. .mask = 0
  602. };
  603. /*
  604. * chip addresses on I2C bus
  605. */
  606. static unsigned char wm8776_addr[2] = {
  607. 0x34, 0x36, /* codec 0 & 1 */
  608. };
  609. /*
  610. * initialize the chip
  611. */
  612. static int maya44_init(struct snd_ice1712 *ice)
  613. {
  614. int i;
  615. struct snd_maya44 *chip;
  616. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  617. if (!chip)
  618. return -ENOMEM;
  619. mutex_init(&chip->mutex);
  620. chip->ice = ice;
  621. ice->spec = chip;
  622. /* initialise codecs */
  623. ice->num_total_dacs = 4;
  624. ice->num_total_adcs = 4;
  625. ice->akm_codecs = 0;
  626. for (i = 0; i < 2; i++) {
  627. wm8776_init(ice, &chip->wm[i], wm8776_addr[i]);
  628. wm8776_select_input(chip, i, MAYA_LINE_IN);
  629. }
  630. /* set card specific rates */
  631. ice->hw_rates = &dac_rates;
  632. /* register change rate notifier */
  633. ice->gpio.set_pro_rate = set_rate;
  634. /* RDMA1 (2nd input channel) is used for ADC by default */
  635. ice->force_rdma1 = 1;
  636. /* have an own routing control */
  637. ice->own_routing = 1;
  638. return 0;
  639. }
  640. /*
  641. * Maya44 boards don't provide the EEPROM data except for the vendor IDs.
  642. * hence the driver needs to sets up it properly.
  643. */
  644. static unsigned char maya44_eeprom[] = {
  645. [ICE_EEP2_SYSCONF] = 0x45,
  646. /* clock xin1=49.152MHz, mpu401, 2 stereo ADCs+DACs */
  647. [ICE_EEP2_ACLINK] = 0x80,
  648. /* I2S */
  649. [ICE_EEP2_I2S] = 0xf8,
  650. /* vol, 96k, 24bit, 192k */
  651. [ICE_EEP2_SPDIF] = 0xc3,
  652. /* enable spdif out, spdif out supp, spdif-in, ext spdif out */
  653. [ICE_EEP2_GPIO_DIR] = 0xff,
  654. [ICE_EEP2_GPIO_DIR1] = 0xff,
  655. [ICE_EEP2_GPIO_DIR2] = 0xff,
  656. [ICE_EEP2_GPIO_MASK] = 0/*0x9f*/,
  657. [ICE_EEP2_GPIO_MASK1] = 0/*0xff*/,
  658. [ICE_EEP2_GPIO_MASK2] = 0/*0x7f*/,
  659. [ICE_EEP2_GPIO_STATE] = (1 << GPIO_PHANTOM_OFF) |
  660. (1 << GPIO_SPDIF_IN_INV),
  661. [ICE_EEP2_GPIO_STATE1] = 0x00,
  662. [ICE_EEP2_GPIO_STATE2] = 0x00,
  663. };
  664. /* entry point */
  665. struct snd_ice1712_card_info snd_vt1724_maya44_cards[] = {
  666. {
  667. .subvendor = VT1724_SUBDEVICE_MAYA44,
  668. .name = "ESI Maya44",
  669. .model = "maya44",
  670. .chip_init = maya44_init,
  671. .build_controls = maya44_add_controls,
  672. .eeprom_size = sizeof(maya44_eeprom),
  673. .eeprom_data = maya44_eeprom,
  674. },
  675. { } /* terminator */
  676. };