prodigy_hifi.c 31 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Audiotrak Prodigy 7.1 Hifi
  5. * based on pontis.c
  6. *
  7. * Copyright (c) 2007 Julian Scheel <julian@jusst.de>
  8. * Copyright (c) 2007 allank
  9. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. */
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/init.h>
  29. #include <linux/slab.h>
  30. #include <linux/mutex.h>
  31. #include <sound/core.h>
  32. #include <sound/info.h>
  33. #include <sound/tlv.h>
  34. #include "ice1712.h"
  35. #include "envy24ht.h"
  36. #include "prodigy_hifi.h"
  37. struct prodigy_hifi_spec {
  38. unsigned short master[2];
  39. unsigned short vol[8];
  40. };
  41. /* I2C addresses */
  42. #define WM_DEV 0x34
  43. /* WM8776 registers */
  44. #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
  45. #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
  46. #define WM_HP_MASTER 0x02 /* headphone master (both channels),
  47. override LLR */
  48. #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
  49. #define WM_DAC_ATTEN_R 0x04
  50. #define WM_DAC_MASTER 0x05
  51. #define WM_PHASE_SWAP 0x06 /* DAC phase swap */
  52. #define WM_DAC_CTRL1 0x07
  53. #define WM_DAC_MUTE 0x08
  54. #define WM_DAC_CTRL2 0x09
  55. #define WM_DAC_INT 0x0a
  56. #define WM_ADC_INT 0x0b
  57. #define WM_MASTER_CTRL 0x0c
  58. #define WM_POWERDOWN 0x0d
  59. #define WM_ADC_ATTEN_L 0x0e
  60. #define WM_ADC_ATTEN_R 0x0f
  61. #define WM_ALC_CTRL1 0x10
  62. #define WM_ALC_CTRL2 0x11
  63. #define WM_ALC_CTRL3 0x12
  64. #define WM_NOISE_GATE 0x13
  65. #define WM_LIMITER 0x14
  66. #define WM_ADC_MUX 0x15
  67. #define WM_OUT_MUX 0x16
  68. #define WM_RESET 0x17
  69. /* Analog Recording Source :- Mic, LineIn, CD/Video, */
  70. /* implement capture source select control for WM8776 */
  71. #define WM_AIN1 "AIN1"
  72. #define WM_AIN2 "AIN2"
  73. #define WM_AIN3 "AIN3"
  74. #define WM_AIN4 "AIN4"
  75. #define WM_AIN5 "AIN5"
  76. /* GPIO pins of envy24ht connected to wm8766 */
  77. #define WM8766_SPI_CLK (1<<17) /* CLK, Pin97 on ICE1724 */
  78. #define WM8766_SPI_MD (1<<16) /* DATA VT1724 -> WM8766, Pin96 */
  79. #define WM8766_SPI_ML (1<<18) /* Latch, Pin98 */
  80. /* WM8766 registers */
  81. #define WM8766_DAC_CTRL 0x02 /* DAC Control */
  82. #define WM8766_INT_CTRL 0x03 /* Interface Control */
  83. #define WM8766_DAC_CTRL2 0x09
  84. #define WM8766_DAC_CTRL3 0x0a
  85. #define WM8766_RESET 0x1f
  86. #define WM8766_LDA1 0x00
  87. #define WM8766_LDA2 0x04
  88. #define WM8766_LDA3 0x06
  89. #define WM8766_RDA1 0x01
  90. #define WM8766_RDA2 0x05
  91. #define WM8766_RDA3 0x07
  92. #define WM8766_MUTE1 0x0C
  93. #define WM8766_MUTE2 0x0F
  94. /*
  95. * Prodigy HD2
  96. */
  97. #define AK4396_ADDR 0x00
  98. #define AK4396_CSN (1 << 8) /* CSN->GPIO8, pin 75 */
  99. #define AK4396_CCLK (1 << 9) /* CCLK->GPIO9, pin 76 */
  100. #define AK4396_CDTI (1 << 10) /* CDTI->GPIO10, pin 77 */
  101. /* ak4396 registers */
  102. #define AK4396_CTRL1 0x00
  103. #define AK4396_CTRL2 0x01
  104. #define AK4396_CTRL3 0x02
  105. #define AK4396_LCH_ATT 0x03
  106. #define AK4396_RCH_ATT 0x04
  107. /*
  108. * get the current register value of WM codec
  109. */
  110. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  111. {
  112. reg <<= 1;
  113. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  114. ice->akm[0].images[reg + 1];
  115. }
  116. /*
  117. * set the register value of WM codec and remember it
  118. */
  119. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  120. {
  121. unsigned short cval;
  122. cval = (reg << 9) | val;
  123. snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
  124. }
  125. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  126. {
  127. wm_put_nocache(ice, reg, val);
  128. reg <<= 1;
  129. ice->akm[0].images[reg] = val >> 8;
  130. ice->akm[0].images[reg + 1] = val;
  131. }
  132. /*
  133. * write data in the SPI mode
  134. */
  135. static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
  136. {
  137. unsigned int tmp = snd_ice1712_gpio_read(ice);
  138. if (val)
  139. tmp |= bit;
  140. else
  141. tmp &= ~bit;
  142. snd_ice1712_gpio_write(ice, tmp);
  143. }
  144. /*
  145. * SPI implementation for WM8766 codec - only writing supported, no readback
  146. */
  147. static void wm8766_spi_send_word(struct snd_ice1712 *ice, unsigned int data)
  148. {
  149. int i;
  150. for (i = 0; i < 16; i++) {
  151. set_gpio_bit(ice, WM8766_SPI_CLK, 0);
  152. udelay(1);
  153. set_gpio_bit(ice, WM8766_SPI_MD, data & 0x8000);
  154. udelay(1);
  155. set_gpio_bit(ice, WM8766_SPI_CLK, 1);
  156. udelay(1);
  157. data <<= 1;
  158. }
  159. }
  160. static void wm8766_spi_write(struct snd_ice1712 *ice, unsigned int reg,
  161. unsigned int data)
  162. {
  163. unsigned int block;
  164. snd_ice1712_gpio_set_dir(ice, WM8766_SPI_MD|
  165. WM8766_SPI_CLK|WM8766_SPI_ML);
  166. snd_ice1712_gpio_set_mask(ice, ~(WM8766_SPI_MD|
  167. WM8766_SPI_CLK|WM8766_SPI_ML));
  168. /* latch must be low when writing */
  169. set_gpio_bit(ice, WM8766_SPI_ML, 0);
  170. block = (reg << 9) | (data & 0x1ff);
  171. wm8766_spi_send_word(ice, block); /* REGISTER ADDRESS */
  172. /* release latch */
  173. set_gpio_bit(ice, WM8766_SPI_ML, 1);
  174. udelay(1);
  175. /* restore */
  176. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  177. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  178. }
  179. /*
  180. * serial interface for ak4396 - only writing supported, no readback
  181. */
  182. static void ak4396_send_word(struct snd_ice1712 *ice, unsigned int data)
  183. {
  184. int i;
  185. for (i = 0; i < 16; i++) {
  186. set_gpio_bit(ice, AK4396_CCLK, 0);
  187. udelay(1);
  188. set_gpio_bit(ice, AK4396_CDTI, data & 0x8000);
  189. udelay(1);
  190. set_gpio_bit(ice, AK4396_CCLK, 1);
  191. udelay(1);
  192. data <<= 1;
  193. }
  194. }
  195. static void ak4396_write(struct snd_ice1712 *ice, unsigned int reg,
  196. unsigned int data)
  197. {
  198. unsigned int block;
  199. snd_ice1712_gpio_set_dir(ice, AK4396_CSN|AK4396_CCLK|AK4396_CDTI);
  200. snd_ice1712_gpio_set_mask(ice, ~(AK4396_CSN|AK4396_CCLK|AK4396_CDTI));
  201. /* latch must be low when writing */
  202. set_gpio_bit(ice, AK4396_CSN, 0);
  203. block = ((AK4396_ADDR & 0x03) << 14) | (1 << 13) |
  204. ((reg & 0x1f) << 8) | (data & 0xff);
  205. ak4396_send_word(ice, block); /* REGISTER ADDRESS */
  206. /* release latch */
  207. set_gpio_bit(ice, AK4396_CSN, 1);
  208. udelay(1);
  209. /* restore */
  210. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  211. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  212. }
  213. /*
  214. * ak4396 mixers
  215. */
  216. /*
  217. * DAC volume attenuation mixer control (-64dB to 0dB)
  218. */
  219. static int ak4396_dac_vol_info(struct snd_kcontrol *kcontrol,
  220. struct snd_ctl_elem_info *uinfo)
  221. {
  222. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  223. uinfo->count = 2;
  224. uinfo->value.integer.min = 0; /* mute */
  225. uinfo->value.integer.max = 0xFF; /* linear */
  226. return 0;
  227. }
  228. static int ak4396_dac_vol_get(struct snd_kcontrol *kcontrol,
  229. struct snd_ctl_elem_value *ucontrol)
  230. {
  231. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  232. struct prodigy_hifi_spec *spec = ice->spec;
  233. int i;
  234. for (i = 0; i < 2; i++)
  235. ucontrol->value.integer.value[i] = spec->vol[i];
  236. return 0;
  237. }
  238. static int ak4396_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  239. {
  240. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  241. struct prodigy_hifi_spec *spec = ice->spec;
  242. int i;
  243. int change = 0;
  244. mutex_lock(&ice->gpio_mutex);
  245. for (i = 0; i < 2; i++) {
  246. if (ucontrol->value.integer.value[i] != spec->vol[i]) {
  247. spec->vol[i] = ucontrol->value.integer.value[i];
  248. ak4396_write(ice, AK4396_LCH_ATT + i,
  249. spec->vol[i] & 0xff);
  250. change = 1;
  251. }
  252. }
  253. mutex_unlock(&ice->gpio_mutex);
  254. return change;
  255. }
  256. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1);
  257. static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
  258. static struct snd_kcontrol_new prodigy_hd2_controls[] = {
  259. {
  260. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  261. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  262. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  263. .name = "Front Playback Volume",
  264. .info = ak4396_dac_vol_info,
  265. .get = ak4396_dac_vol_get,
  266. .put = ak4396_dac_vol_put,
  267. .tlv = { .p = ak4396_db_scale },
  268. },
  269. };
  270. /* --------------- */
  271. /*
  272. * Logarithmic volume values for WM87*6
  273. * Computed as 20 * Log10(255 / x)
  274. */
  275. static const unsigned char wm_vol[256] = {
  276. 127, 48, 42, 39, 36, 34, 33, 31, 30, 29, 28, 27, 27, 26, 25, 25, 24, 24, 23,
  277. 23, 22, 22, 21, 21, 21, 20, 20, 20, 19, 19, 19, 18, 18, 18, 18, 17, 17, 17,
  278. 17, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 13, 13, 13,
  279. 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11,
  280. 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8,
  281. 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6,
  282. 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
  283. 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3,
  284. 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
  285. 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
  286. 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  287. 0, 0
  288. };
  289. #define WM_VOL_MAX (sizeof(wm_vol) - 1)
  290. #define WM_VOL_MUTE 0x8000
  291. #define DAC_0dB 0xff
  292. #define DAC_RES 128
  293. #define DAC_MIN (DAC_0dB - DAC_RES)
  294. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index,
  295. unsigned short vol, unsigned short master)
  296. {
  297. unsigned char nvol;
  298. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  299. nvol = 0;
  300. else {
  301. nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128)
  302. & WM_VOL_MAX;
  303. nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff;
  304. }
  305. wm_put(ice, index, nvol);
  306. wm_put_nocache(ice, index, 0x100 | nvol);
  307. }
  308. static void wm8766_set_vol(struct snd_ice1712 *ice, unsigned int index,
  309. unsigned short vol, unsigned short master)
  310. {
  311. unsigned char nvol;
  312. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  313. nvol = 0;
  314. else {
  315. nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128)
  316. & WM_VOL_MAX;
  317. nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff;
  318. }
  319. wm8766_spi_write(ice, index, (0x0100 | nvol));
  320. }
  321. /*
  322. * DAC volume attenuation mixer control (-64dB to 0dB)
  323. */
  324. static int wm_dac_vol_info(struct snd_kcontrol *kcontrol,
  325. struct snd_ctl_elem_info *uinfo)
  326. {
  327. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  328. uinfo->count = 2;
  329. uinfo->value.integer.min = 0; /* mute */
  330. uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
  331. return 0;
  332. }
  333. static int wm_dac_vol_get(struct snd_kcontrol *kcontrol,
  334. struct snd_ctl_elem_value *ucontrol)
  335. {
  336. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  337. struct prodigy_hifi_spec *spec = ice->spec;
  338. int i;
  339. for (i = 0; i < 2; i++)
  340. ucontrol->value.integer.value[i] =
  341. spec->vol[2 + i] & ~WM_VOL_MUTE;
  342. return 0;
  343. }
  344. static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  345. {
  346. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  347. struct prodigy_hifi_spec *spec = ice->spec;
  348. int i, idx, change = 0;
  349. mutex_lock(&ice->gpio_mutex);
  350. for (i = 0; i < 2; i++) {
  351. if (ucontrol->value.integer.value[i] != spec->vol[2 + i]) {
  352. idx = WM_DAC_ATTEN_L + i;
  353. spec->vol[2 + i] &= WM_VOL_MUTE;
  354. spec->vol[2 + i] |= ucontrol->value.integer.value[i];
  355. wm_set_vol(ice, idx, spec->vol[2 + i], spec->master[i]);
  356. change = 1;
  357. }
  358. }
  359. mutex_unlock(&ice->gpio_mutex);
  360. return change;
  361. }
  362. /*
  363. * WM8766 DAC volume attenuation mixer control
  364. */
  365. static int wm8766_vol_info(struct snd_kcontrol *kcontrol,
  366. struct snd_ctl_elem_info *uinfo)
  367. {
  368. int voices = kcontrol->private_value >> 8;
  369. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  370. uinfo->count = voices;
  371. uinfo->value.integer.min = 0; /* mute */
  372. uinfo->value.integer.max = DAC_RES; /* 0dB */
  373. return 0;
  374. }
  375. static int wm8766_vol_get(struct snd_kcontrol *kcontrol,
  376. struct snd_ctl_elem_value *ucontrol)
  377. {
  378. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  379. struct prodigy_hifi_spec *spec = ice->spec;
  380. int i, ofs, voices;
  381. voices = kcontrol->private_value >> 8;
  382. ofs = kcontrol->private_value & 0xff;
  383. for (i = 0; i < voices; i++)
  384. ucontrol->value.integer.value[i] = spec->vol[ofs + i];
  385. return 0;
  386. }
  387. static int wm8766_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  388. {
  389. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  390. struct prodigy_hifi_spec *spec = ice->spec;
  391. int i, idx, ofs, voices;
  392. int change = 0;
  393. voices = kcontrol->private_value >> 8;
  394. ofs = kcontrol->private_value & 0xff;
  395. mutex_lock(&ice->gpio_mutex);
  396. for (i = 0; i < voices; i++) {
  397. if (ucontrol->value.integer.value[i] != spec->vol[ofs + i]) {
  398. idx = WM8766_LDA1 + ofs + i;
  399. spec->vol[ofs + i] &= WM_VOL_MUTE;
  400. spec->vol[ofs + i] |= ucontrol->value.integer.value[i];
  401. wm8766_set_vol(ice, idx,
  402. spec->vol[ofs + i], spec->master[i]);
  403. change = 1;
  404. }
  405. }
  406. mutex_unlock(&ice->gpio_mutex);
  407. return change;
  408. }
  409. /*
  410. * Master volume attenuation mixer control / applied to WM8776+WM8766
  411. */
  412. static int wm_master_vol_info(struct snd_kcontrol *kcontrol,
  413. struct snd_ctl_elem_info *uinfo)
  414. {
  415. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  416. uinfo->count = 2;
  417. uinfo->value.integer.min = 0;
  418. uinfo->value.integer.max = DAC_RES;
  419. return 0;
  420. }
  421. static int wm_master_vol_get(struct snd_kcontrol *kcontrol,
  422. struct snd_ctl_elem_value *ucontrol)
  423. {
  424. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  425. struct prodigy_hifi_spec *spec = ice->spec;
  426. int i;
  427. for (i = 0; i < 2; i++)
  428. ucontrol->value.integer.value[i] = spec->master[i];
  429. return 0;
  430. }
  431. static int wm_master_vol_put(struct snd_kcontrol *kcontrol,
  432. struct snd_ctl_elem_value *ucontrol)
  433. {
  434. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  435. struct prodigy_hifi_spec *spec = ice->spec;
  436. int ch, change = 0;
  437. mutex_lock(&ice->gpio_mutex);
  438. for (ch = 0; ch < 2; ch++) {
  439. if (ucontrol->value.integer.value[ch] != spec->master[ch]) {
  440. spec->master[ch] = ucontrol->value.integer.value[ch];
  441. /* Apply to front DAC */
  442. wm_set_vol(ice, WM_DAC_ATTEN_L + ch,
  443. spec->vol[2 + ch], spec->master[ch]);
  444. wm8766_set_vol(ice, WM8766_LDA1 + ch,
  445. spec->vol[0 + ch], spec->master[ch]);
  446. wm8766_set_vol(ice, WM8766_LDA2 + ch,
  447. spec->vol[4 + ch], spec->master[ch]);
  448. wm8766_set_vol(ice, WM8766_LDA3 + ch,
  449. spec->vol[6 + ch], spec->master[ch]);
  450. change = 1;
  451. }
  452. }
  453. mutex_unlock(&ice->gpio_mutex);
  454. return change;
  455. }
  456. /* KONSTI */
  457. static int wm_adc_mux_enum_info(struct snd_kcontrol *kcontrol,
  458. struct snd_ctl_elem_info *uinfo)
  459. {
  460. static const char * const texts[32] = {
  461. "NULL", WM_AIN1, WM_AIN2, WM_AIN1 "+" WM_AIN2,
  462. WM_AIN3, WM_AIN1 "+" WM_AIN3, WM_AIN2 "+" WM_AIN3,
  463. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3,
  464. WM_AIN4, WM_AIN1 "+" WM_AIN4, WM_AIN2 "+" WM_AIN4,
  465. WM_AIN1 "+" WM_AIN2 "+" WM_AIN4,
  466. WM_AIN3 "+" WM_AIN4, WM_AIN1 "+" WM_AIN3 "+" WM_AIN4,
  467. WM_AIN2 "+" WM_AIN3 "+" WM_AIN4,
  468. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4,
  469. WM_AIN5, WM_AIN1 "+" WM_AIN5, WM_AIN2 "+" WM_AIN5,
  470. WM_AIN1 "+" WM_AIN2 "+" WM_AIN5,
  471. WM_AIN3 "+" WM_AIN5, WM_AIN1 "+" WM_AIN3 "+" WM_AIN5,
  472. WM_AIN2 "+" WM_AIN3 "+" WM_AIN5,
  473. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN5,
  474. WM_AIN4 "+" WM_AIN5, WM_AIN1 "+" WM_AIN4 "+" WM_AIN5,
  475. WM_AIN2 "+" WM_AIN4 "+" WM_AIN5,
  476. WM_AIN1 "+" WM_AIN2 "+" WM_AIN4 "+" WM_AIN5,
  477. WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
  478. WM_AIN1 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
  479. WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
  480. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5
  481. };
  482. return snd_ctl_enum_info(uinfo, 1, 32, texts);
  483. }
  484. static int wm_adc_mux_enum_get(struct snd_kcontrol *kcontrol,
  485. struct snd_ctl_elem_value *ucontrol)
  486. {
  487. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  488. mutex_lock(&ice->gpio_mutex);
  489. ucontrol->value.integer.value[0] = wm_get(ice, WM_ADC_MUX) & 0x1f;
  490. mutex_unlock(&ice->gpio_mutex);
  491. return 0;
  492. }
  493. static int wm_adc_mux_enum_put(struct snd_kcontrol *kcontrol,
  494. struct snd_ctl_elem_value *ucontrol)
  495. {
  496. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  497. unsigned short oval, nval;
  498. int change = 0;
  499. mutex_lock(&ice->gpio_mutex);
  500. oval = wm_get(ice, WM_ADC_MUX);
  501. nval = (oval & 0xe0) | ucontrol->value.integer.value[0];
  502. if (nval != oval) {
  503. wm_put(ice, WM_ADC_MUX, nval);
  504. change = 1;
  505. }
  506. mutex_unlock(&ice->gpio_mutex);
  507. return change;
  508. }
  509. /* KONSTI */
  510. /*
  511. * ADC gain mixer control (-64dB to 0dB)
  512. */
  513. #define ADC_0dB 0xcf
  514. #define ADC_RES 128
  515. #define ADC_MIN (ADC_0dB - ADC_RES)
  516. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol,
  517. struct snd_ctl_elem_info *uinfo)
  518. {
  519. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  520. uinfo->count = 2;
  521. uinfo->value.integer.min = 0; /* mute (-64dB) */
  522. uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
  523. return 0;
  524. }
  525. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol,
  526. struct snd_ctl_elem_value *ucontrol)
  527. {
  528. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  529. unsigned short val;
  530. int i;
  531. mutex_lock(&ice->gpio_mutex);
  532. for (i = 0; i < 2; i++) {
  533. val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
  534. val = val > ADC_MIN ? (val - ADC_MIN) : 0;
  535. ucontrol->value.integer.value[i] = val;
  536. }
  537. mutex_unlock(&ice->gpio_mutex);
  538. return 0;
  539. }
  540. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol,
  541. struct snd_ctl_elem_value *ucontrol)
  542. {
  543. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  544. unsigned short ovol, nvol;
  545. int i, idx, change = 0;
  546. mutex_lock(&ice->gpio_mutex);
  547. for (i = 0; i < 2; i++) {
  548. nvol = ucontrol->value.integer.value[i];
  549. nvol = nvol ? (nvol + ADC_MIN) : 0;
  550. idx = WM_ADC_ATTEN_L + i;
  551. ovol = wm_get(ice, idx) & 0xff;
  552. if (ovol != nvol) {
  553. wm_put(ice, idx, nvol);
  554. change = 1;
  555. }
  556. }
  557. mutex_unlock(&ice->gpio_mutex);
  558. return change;
  559. }
  560. /*
  561. * ADC input mux mixer control
  562. */
  563. #define wm_adc_mux_info snd_ctl_boolean_mono_info
  564. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol,
  565. struct snd_ctl_elem_value *ucontrol)
  566. {
  567. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  568. int bit = kcontrol->private_value;
  569. mutex_lock(&ice->gpio_mutex);
  570. ucontrol->value.integer.value[0] =
  571. (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
  572. mutex_unlock(&ice->gpio_mutex);
  573. return 0;
  574. }
  575. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol,
  576. struct snd_ctl_elem_value *ucontrol)
  577. {
  578. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  579. int bit = kcontrol->private_value;
  580. unsigned short oval, nval;
  581. int change;
  582. mutex_lock(&ice->gpio_mutex);
  583. nval = oval = wm_get(ice, WM_ADC_MUX);
  584. if (ucontrol->value.integer.value[0])
  585. nval |= (1 << bit);
  586. else
  587. nval &= ~(1 << bit);
  588. change = nval != oval;
  589. if (change) {
  590. wm_put(ice, WM_ADC_MUX, nval);
  591. }
  592. mutex_unlock(&ice->gpio_mutex);
  593. return 0;
  594. }
  595. /*
  596. * Analog bypass (In -> Out)
  597. */
  598. #define wm_bypass_info snd_ctl_boolean_mono_info
  599. static int wm_bypass_get(struct snd_kcontrol *kcontrol,
  600. struct snd_ctl_elem_value *ucontrol)
  601. {
  602. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  603. mutex_lock(&ice->gpio_mutex);
  604. ucontrol->value.integer.value[0] =
  605. (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
  606. mutex_unlock(&ice->gpio_mutex);
  607. return 0;
  608. }
  609. static int wm_bypass_put(struct snd_kcontrol *kcontrol,
  610. struct snd_ctl_elem_value *ucontrol)
  611. {
  612. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  613. unsigned short val, oval;
  614. int change = 0;
  615. mutex_lock(&ice->gpio_mutex);
  616. val = oval = wm_get(ice, WM_OUT_MUX);
  617. if (ucontrol->value.integer.value[0])
  618. val |= 0x04;
  619. else
  620. val &= ~0x04;
  621. if (val != oval) {
  622. wm_put(ice, WM_OUT_MUX, val);
  623. change = 1;
  624. }
  625. mutex_unlock(&ice->gpio_mutex);
  626. return change;
  627. }
  628. /*
  629. * Left/Right swap
  630. */
  631. #define wm_chswap_info snd_ctl_boolean_mono_info
  632. static int wm_chswap_get(struct snd_kcontrol *kcontrol,
  633. struct snd_ctl_elem_value *ucontrol)
  634. {
  635. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  636. mutex_lock(&ice->gpio_mutex);
  637. ucontrol->value.integer.value[0] =
  638. (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
  639. mutex_unlock(&ice->gpio_mutex);
  640. return 0;
  641. }
  642. static int wm_chswap_put(struct snd_kcontrol *kcontrol,
  643. struct snd_ctl_elem_value *ucontrol)
  644. {
  645. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  646. unsigned short val, oval;
  647. int change = 0;
  648. mutex_lock(&ice->gpio_mutex);
  649. oval = wm_get(ice, WM_DAC_CTRL1);
  650. val = oval & 0x0f;
  651. if (ucontrol->value.integer.value[0])
  652. val |= 0x60;
  653. else
  654. val |= 0x90;
  655. if (val != oval) {
  656. wm_put(ice, WM_DAC_CTRL1, val);
  657. wm_put_nocache(ice, WM_DAC_CTRL1, val);
  658. change = 1;
  659. }
  660. mutex_unlock(&ice->gpio_mutex);
  661. return change;
  662. }
  663. /*
  664. * mixers
  665. */
  666. static struct snd_kcontrol_new prodigy_hifi_controls[] = {
  667. {
  668. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  669. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  670. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  671. .name = "Master Playback Volume",
  672. .info = wm_master_vol_info,
  673. .get = wm_master_vol_get,
  674. .put = wm_master_vol_put,
  675. .tlv = { .p = db_scale_wm_dac }
  676. },
  677. {
  678. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  679. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  680. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  681. .name = "Front Playback Volume",
  682. .info = wm_dac_vol_info,
  683. .get = wm_dac_vol_get,
  684. .put = wm_dac_vol_put,
  685. .tlv = { .p = db_scale_wm_dac },
  686. },
  687. {
  688. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  689. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  690. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  691. .name = "Rear Playback Volume",
  692. .info = wm8766_vol_info,
  693. .get = wm8766_vol_get,
  694. .put = wm8766_vol_put,
  695. .private_value = (2 << 8) | 0,
  696. .tlv = { .p = db_scale_wm_dac },
  697. },
  698. {
  699. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  700. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  701. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  702. .name = "Center Playback Volume",
  703. .info = wm8766_vol_info,
  704. .get = wm8766_vol_get,
  705. .put = wm8766_vol_put,
  706. .private_value = (1 << 8) | 4,
  707. .tlv = { .p = db_scale_wm_dac }
  708. },
  709. {
  710. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  711. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  712. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  713. .name = "LFE Playback Volume",
  714. .info = wm8766_vol_info,
  715. .get = wm8766_vol_get,
  716. .put = wm8766_vol_put,
  717. .private_value = (1 << 8) | 5,
  718. .tlv = { .p = db_scale_wm_dac }
  719. },
  720. {
  721. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  722. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  723. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  724. .name = "Side Playback Volume",
  725. .info = wm8766_vol_info,
  726. .get = wm8766_vol_get,
  727. .put = wm8766_vol_put,
  728. .private_value = (2 << 8) | 6,
  729. .tlv = { .p = db_scale_wm_dac },
  730. },
  731. {
  732. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  733. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  734. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  735. .name = "Capture Volume",
  736. .info = wm_adc_vol_info,
  737. .get = wm_adc_vol_get,
  738. .put = wm_adc_vol_put,
  739. .tlv = { .p = db_scale_wm_dac },
  740. },
  741. {
  742. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  743. .name = "CD Capture Switch",
  744. .info = wm_adc_mux_info,
  745. .get = wm_adc_mux_get,
  746. .put = wm_adc_mux_put,
  747. .private_value = 0,
  748. },
  749. {
  750. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  751. .name = "Line Capture Switch",
  752. .info = wm_adc_mux_info,
  753. .get = wm_adc_mux_get,
  754. .put = wm_adc_mux_put,
  755. .private_value = 1,
  756. },
  757. {
  758. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  759. .name = "Analog Bypass Switch",
  760. .info = wm_bypass_info,
  761. .get = wm_bypass_get,
  762. .put = wm_bypass_put,
  763. },
  764. {
  765. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  766. .name = "Swap Output Channels",
  767. .info = wm_chswap_info,
  768. .get = wm_chswap_get,
  769. .put = wm_chswap_put,
  770. },
  771. {
  772. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  773. .name = "Analog Capture Source",
  774. .info = wm_adc_mux_enum_info,
  775. .get = wm_adc_mux_enum_get,
  776. .put = wm_adc_mux_enum_put,
  777. },
  778. };
  779. /*
  780. * WM codec registers
  781. */
  782. static void wm_proc_regs_write(struct snd_info_entry *entry,
  783. struct snd_info_buffer *buffer)
  784. {
  785. struct snd_ice1712 *ice = entry->private_data;
  786. char line[64];
  787. unsigned int reg, val;
  788. mutex_lock(&ice->gpio_mutex);
  789. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  790. if (sscanf(line, "%x %x", &reg, &val) != 2)
  791. continue;
  792. if (reg <= 0x17 && val <= 0xffff)
  793. wm_put(ice, reg, val);
  794. }
  795. mutex_unlock(&ice->gpio_mutex);
  796. }
  797. static void wm_proc_regs_read(struct snd_info_entry *entry,
  798. struct snd_info_buffer *buffer)
  799. {
  800. struct snd_ice1712 *ice = entry->private_data;
  801. int reg, val;
  802. mutex_lock(&ice->gpio_mutex);
  803. for (reg = 0; reg <= 0x17; reg++) {
  804. val = wm_get(ice, reg);
  805. snd_iprintf(buffer, "%02x = %04x\n", reg, val);
  806. }
  807. mutex_unlock(&ice->gpio_mutex);
  808. }
  809. static void wm_proc_init(struct snd_ice1712 *ice)
  810. {
  811. struct snd_info_entry *entry;
  812. if (!snd_card_proc_new(ice->card, "wm_codec", &entry)) {
  813. snd_info_set_text_ops(entry, ice, wm_proc_regs_read);
  814. entry->mode |= S_IWUSR;
  815. entry->c.text.write = wm_proc_regs_write;
  816. }
  817. }
  818. static int prodigy_hifi_add_controls(struct snd_ice1712 *ice)
  819. {
  820. unsigned int i;
  821. int err;
  822. for (i = 0; i < ARRAY_SIZE(prodigy_hifi_controls); i++) {
  823. err = snd_ctl_add(ice->card,
  824. snd_ctl_new1(&prodigy_hifi_controls[i], ice));
  825. if (err < 0)
  826. return err;
  827. }
  828. wm_proc_init(ice);
  829. return 0;
  830. }
  831. static int prodigy_hd2_add_controls(struct snd_ice1712 *ice)
  832. {
  833. unsigned int i;
  834. int err;
  835. for (i = 0; i < ARRAY_SIZE(prodigy_hd2_controls); i++) {
  836. err = snd_ctl_add(ice->card,
  837. snd_ctl_new1(&prodigy_hd2_controls[i], ice));
  838. if (err < 0)
  839. return err;
  840. }
  841. wm_proc_init(ice);
  842. return 0;
  843. }
  844. /*
  845. * initialize the chip
  846. */
  847. static int prodigy_hifi_init(struct snd_ice1712 *ice)
  848. {
  849. static unsigned short wm_inits[] = {
  850. /* These come first to reduce init pop noise */
  851. WM_ADC_MUX, 0x0003, /* ADC mute */
  852. /* 0x00c0 replaced by 0x0003 */
  853. WM_DAC_MUTE, 0x0001, /* DAC softmute */
  854. WM_DAC_CTRL1, 0x0000, /* DAC mute */
  855. WM_POWERDOWN, 0x0008, /* All power-up except HP */
  856. WM_RESET, 0x0000, /* reset */
  857. };
  858. static unsigned short wm_inits2[] = {
  859. WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
  860. WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  861. WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  862. WM_DAC_CTRL1, 0x0090, /* DAC L/R */
  863. WM_OUT_MUX, 0x0001, /* OUT DAC */
  864. WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
  865. WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
  866. WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
  867. WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
  868. WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
  869. WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
  870. WM_PHASE_SWAP, 0x0000, /* phase normal */
  871. #if 0
  872. WM_DAC_MASTER, 0x0100, /* DAC master muted */
  873. #endif
  874. WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
  875. WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
  876. WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
  877. #if 1
  878. WM_ALC_CTRL1, 0x007b, /* */
  879. WM_ALC_CTRL2, 0x0000, /* */
  880. WM_ALC_CTRL3, 0x0000, /* */
  881. WM_NOISE_GATE, 0x0000, /* */
  882. #endif
  883. WM_DAC_MUTE, 0x0000, /* DAC unmute */
  884. WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
  885. };
  886. static unsigned short wm8766_inits[] = {
  887. WM8766_RESET, 0x0000,
  888. WM8766_DAC_CTRL, 0x0120,
  889. WM8766_INT_CTRL, 0x0022, /* I2S Normal Mode, 24 bit */
  890. WM8766_DAC_CTRL2, 0x0001,
  891. WM8766_DAC_CTRL3, 0x0080,
  892. WM8766_LDA1, 0x0100,
  893. WM8766_LDA2, 0x0100,
  894. WM8766_LDA3, 0x0100,
  895. WM8766_RDA1, 0x0100,
  896. WM8766_RDA2, 0x0100,
  897. WM8766_RDA3, 0x0100,
  898. WM8766_MUTE1, 0x0000,
  899. WM8766_MUTE2, 0x0000,
  900. };
  901. struct prodigy_hifi_spec *spec;
  902. unsigned int i;
  903. ice->vt1720 = 0;
  904. ice->vt1724 = 1;
  905. ice->num_total_dacs = 8;
  906. ice->num_total_adcs = 1;
  907. /* HACK - use this as the SPDIF source.
  908. * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
  909. */
  910. ice->gpio.saved[0] = 0;
  911. /* to remember the register values */
  912. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  913. if (! ice->akm)
  914. return -ENOMEM;
  915. ice->akm_codecs = 1;
  916. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  917. if (!spec)
  918. return -ENOMEM;
  919. ice->spec = spec;
  920. /* initialize WM8776 codec */
  921. for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
  922. wm_put(ice, wm_inits[i], wm_inits[i+1]);
  923. schedule_timeout_uninterruptible(1);
  924. for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
  925. wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
  926. /* initialize WM8766 codec */
  927. for (i = 0; i < ARRAY_SIZE(wm8766_inits); i += 2)
  928. wm8766_spi_write(ice, wm8766_inits[i], wm8766_inits[i+1]);
  929. return 0;
  930. }
  931. /*
  932. * initialize the chip
  933. */
  934. static void ak4396_init(struct snd_ice1712 *ice)
  935. {
  936. static unsigned short ak4396_inits[] = {
  937. AK4396_CTRL1, 0x87, /* I2S Normal Mode, 24 bit */
  938. AK4396_CTRL2, 0x02,
  939. AK4396_CTRL3, 0x00,
  940. AK4396_LCH_ATT, 0x00,
  941. AK4396_RCH_ATT, 0x00,
  942. };
  943. unsigned int i;
  944. /* initialize ak4396 codec */
  945. /* reset codec */
  946. ak4396_write(ice, AK4396_CTRL1, 0x86);
  947. msleep(100);
  948. ak4396_write(ice, AK4396_CTRL1, 0x87);
  949. for (i = 0; i < ARRAY_SIZE(ak4396_inits); i += 2)
  950. ak4396_write(ice, ak4396_inits[i], ak4396_inits[i+1]);
  951. }
  952. #ifdef CONFIG_PM_SLEEP
  953. static int prodigy_hd2_resume(struct snd_ice1712 *ice)
  954. {
  955. /* initialize ak4396 codec and restore previous mixer volumes */
  956. struct prodigy_hifi_spec *spec = ice->spec;
  957. int i;
  958. mutex_lock(&ice->gpio_mutex);
  959. ak4396_init(ice);
  960. for (i = 0; i < 2; i++)
  961. ak4396_write(ice, AK4396_LCH_ATT + i, spec->vol[i] & 0xff);
  962. mutex_unlock(&ice->gpio_mutex);
  963. return 0;
  964. }
  965. #endif
  966. static int prodigy_hd2_init(struct snd_ice1712 *ice)
  967. {
  968. struct prodigy_hifi_spec *spec;
  969. ice->vt1720 = 0;
  970. ice->vt1724 = 1;
  971. ice->num_total_dacs = 1;
  972. ice->num_total_adcs = 1;
  973. /* HACK - use this as the SPDIF source.
  974. * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
  975. */
  976. ice->gpio.saved[0] = 0;
  977. /* to remember the register values */
  978. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  979. if (! ice->akm)
  980. return -ENOMEM;
  981. ice->akm_codecs = 1;
  982. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  983. if (!spec)
  984. return -ENOMEM;
  985. ice->spec = spec;
  986. #ifdef CONFIG_PM_SLEEP
  987. ice->pm_resume = &prodigy_hd2_resume;
  988. ice->pm_suspend_enabled = 1;
  989. #endif
  990. ak4396_init(ice);
  991. return 0;
  992. }
  993. static unsigned char prodigy71hifi_eeprom[] = {
  994. 0x4b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
  995. 0x80, /* ACLINK: I2S */
  996. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  997. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  998. 0xff, /* GPIO_DIR */
  999. 0xff, /* GPIO_DIR1 */
  1000. 0x5f, /* GPIO_DIR2 */
  1001. 0x00, /* GPIO_MASK */
  1002. 0x00, /* GPIO_MASK1 */
  1003. 0x00, /* GPIO_MASK2 */
  1004. 0x00, /* GPIO_STATE */
  1005. 0x00, /* GPIO_STATE1 */
  1006. 0x00, /* GPIO_STATE2 */
  1007. };
  1008. static unsigned char prodigyhd2_eeprom[] = {
  1009. 0x4b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
  1010. 0x80, /* ACLINK: I2S */
  1011. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1012. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  1013. 0xff, /* GPIO_DIR */
  1014. 0xff, /* GPIO_DIR1 */
  1015. 0x5f, /* GPIO_DIR2 */
  1016. 0x00, /* GPIO_MASK */
  1017. 0x00, /* GPIO_MASK1 */
  1018. 0x00, /* GPIO_MASK2 */
  1019. 0x00, /* GPIO_STATE */
  1020. 0x00, /* GPIO_STATE1 */
  1021. 0x00, /* GPIO_STATE2 */
  1022. };
  1023. static unsigned char fortissimo4_eeprom[] = {
  1024. 0x43, /* SYSCONF: clock 512, ADC, 4DACs */
  1025. 0x80, /* ACLINK: I2S */
  1026. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1027. 0xc1, /* SPDIF: out-en, out-int */
  1028. 0xff, /* GPIO_DIR */
  1029. 0xff, /* GPIO_DIR1 */
  1030. 0x5f, /* GPIO_DIR2 */
  1031. 0x00, /* GPIO_MASK */
  1032. 0x00, /* GPIO_MASK1 */
  1033. 0x00, /* GPIO_MASK2 */
  1034. 0x00, /* GPIO_STATE */
  1035. 0x00, /* GPIO_STATE1 */
  1036. 0x00, /* GPIO_STATE2 */
  1037. };
  1038. /* entry point */
  1039. struct snd_ice1712_card_info snd_vt1724_prodigy_hifi_cards[] = {
  1040. {
  1041. .subvendor = VT1724_SUBDEVICE_PRODIGY_HIFI,
  1042. .name = "Audiotrak Prodigy 7.1 HiFi",
  1043. .model = "prodigy71hifi",
  1044. .chip_init = prodigy_hifi_init,
  1045. .build_controls = prodigy_hifi_add_controls,
  1046. .eeprom_size = sizeof(prodigy71hifi_eeprom),
  1047. .eeprom_data = prodigy71hifi_eeprom,
  1048. .driver = "Prodigy71HIFI",
  1049. },
  1050. {
  1051. .subvendor = VT1724_SUBDEVICE_PRODIGY_HD2,
  1052. .name = "Audiotrak Prodigy HD2",
  1053. .model = "prodigyhd2",
  1054. .chip_init = prodigy_hd2_init,
  1055. .build_controls = prodigy_hd2_add_controls,
  1056. .eeprom_size = sizeof(prodigyhd2_eeprom),
  1057. .eeprom_data = prodigyhd2_eeprom,
  1058. .driver = "Prodigy71HD2",
  1059. },
  1060. {
  1061. .subvendor = VT1724_SUBDEVICE_FORTISSIMO4,
  1062. .name = "Hercules Fortissimo IV",
  1063. .model = "fortissimo4",
  1064. .chip_init = prodigy_hifi_init,
  1065. .build_controls = prodigy_hifi_add_controls,
  1066. .eeprom_size = sizeof(fortissimo4_eeprom),
  1067. .eeprom_data = fortissimo4_eeprom,
  1068. .driver = "Fortissimo4",
  1069. },
  1070. { } /* terminator */
  1071. };