oxygen.c 23 KB

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  1. /*
  2. * C-Media CMI8788 driver for C-Media's reference design and similar models
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. /*
  20. * CMI8788:
  21. *
  22. * SPI 0 -> 1st AK4396 (front)
  23. * SPI 1 -> 2nd AK4396 (surround)
  24. * SPI 2 -> 3rd AK4396 (center/LFE)
  25. * SPI 3 -> WM8785
  26. * SPI 4 -> 4th AK4396 (back)
  27. *
  28. * GPIO 0 -> DFS0 of AK5385
  29. * GPIO 1 -> DFS1 of AK5385
  30. *
  31. * X-Meridian models:
  32. * GPIO 4 -> enable extension S/PDIF input
  33. * GPIO 6 -> enable on-board S/PDIF input
  34. *
  35. * Claro models:
  36. * GPIO 6 -> S/PDIF from optical (0) or coaxial (1) input
  37. * GPIO 8 -> enable headphone amplifier
  38. *
  39. * CM9780:
  40. *
  41. * LINE_OUT -> input of ADC
  42. *
  43. * AUX_IN <- aux
  44. * CD_IN <- CD
  45. * MIC_IN <- mic
  46. *
  47. * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
  48. */
  49. #include <linux/delay.h>
  50. #include <linux/mutex.h>
  51. #include <linux/pci.h>
  52. #include <linux/module.h>
  53. #include <sound/ac97_codec.h>
  54. #include <sound/control.h>
  55. #include <sound/core.h>
  56. #include <sound/info.h>
  57. #include <sound/initval.h>
  58. #include <sound/pcm.h>
  59. #include <sound/pcm_params.h>
  60. #include <sound/tlv.h>
  61. #include "oxygen.h"
  62. #include "xonar_dg.h"
  63. #include "ak4396.h"
  64. #include "wm8785.h"
  65. MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
  66. MODULE_DESCRIPTION("C-Media CMI8788 driver");
  67. MODULE_LICENSE("GPL v2");
  68. MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8786}"
  69. ",{C-Media,CMI8787}"
  70. ",{C-Media,CMI8788}}");
  71. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  72. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  73. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  74. module_param_array(index, int, NULL, 0444);
  75. MODULE_PARM_DESC(index, "card index");
  76. module_param_array(id, charp, NULL, 0444);
  77. MODULE_PARM_DESC(id, "ID string");
  78. module_param_array(enable, bool, NULL, 0444);
  79. MODULE_PARM_DESC(enable, "enable card");
  80. enum {
  81. MODEL_CMEDIA_REF,
  82. MODEL_MERIDIAN,
  83. MODEL_MERIDIAN_2G,
  84. MODEL_CLARO,
  85. MODEL_CLARO_HALO,
  86. MODEL_FANTASIA,
  87. MODEL_SERENADE,
  88. MODEL_2CH_OUTPUT,
  89. MODEL_HG2PCI,
  90. MODEL_XONAR_DG,
  91. MODEL_XONAR_DGX,
  92. };
  93. static const struct pci_device_id oxygen_ids[] = {
  94. /* C-Media's reference design */
  95. { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
  96. { OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
  97. { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
  98. { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
  99. { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
  100. { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
  101. { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
  102. { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
  103. { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
  104. /* Asus Xonar DG */
  105. { OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
  106. /* Asus Xonar DGX */
  107. { OXYGEN_PCI_SUBID(0x1043, 0x8521), .driver_data = MODEL_XONAR_DGX },
  108. /* PCI 2.0 HD Audio */
  109. { OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
  110. /* Kuroutoshikou CMI8787-HG2PCI */
  111. { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
  112. /* TempoTec HiFier Fantasia */
  113. { OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
  114. /* TempoTec HiFier Serenade */
  115. { OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
  116. /* AuzenTech X-Meridian */
  117. { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
  118. /* AuzenTech X-Meridian 2G */
  119. { OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
  120. /* HT-Omega Claro */
  121. { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
  122. /* HT-Omega Claro halo */
  123. { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
  124. { }
  125. };
  126. MODULE_DEVICE_TABLE(pci, oxygen_ids);
  127. #define GPIO_AK5385_DFS_MASK 0x0003
  128. #define GPIO_AK5385_DFS_NORMAL 0x0000
  129. #define GPIO_AK5385_DFS_DOUBLE 0x0001
  130. #define GPIO_AK5385_DFS_QUAD 0x0002
  131. #define GPIO_MERIDIAN_DIG_MASK 0x0050
  132. #define GPIO_MERIDIAN_DIG_EXT 0x0010
  133. #define GPIO_MERIDIAN_DIG_BOARD 0x0040
  134. #define GPIO_CLARO_DIG_COAX 0x0040
  135. #define GPIO_CLARO_HP 0x0100
  136. struct generic_data {
  137. unsigned int dacs;
  138. u8 ak4396_regs[4][5];
  139. u16 wm8785_regs[3];
  140. };
  141. static void ak4396_write(struct oxygen *chip, unsigned int codec,
  142. u8 reg, u8 value)
  143. {
  144. /* maps ALSA channel pair number to SPI output */
  145. static const u8 codec_spi_map[4] = {
  146. 0, 1, 2, 4
  147. };
  148. struct generic_data *data = chip->model_data;
  149. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  150. OXYGEN_SPI_DATA_LENGTH_2 |
  151. OXYGEN_SPI_CLOCK_160 |
  152. (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
  153. OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
  154. AK4396_WRITE | (reg << 8) | value);
  155. data->ak4396_regs[codec][reg] = value;
  156. }
  157. static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
  158. u8 reg, u8 value)
  159. {
  160. struct generic_data *data = chip->model_data;
  161. if (value != data->ak4396_regs[codec][reg])
  162. ak4396_write(chip, codec, reg, value);
  163. }
  164. static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
  165. {
  166. struct generic_data *data = chip->model_data;
  167. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  168. OXYGEN_SPI_DATA_LENGTH_2 |
  169. OXYGEN_SPI_CLOCK_160 |
  170. (3 << OXYGEN_SPI_CODEC_SHIFT) |
  171. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  172. (reg << 9) | value);
  173. if (reg < ARRAY_SIZE(data->wm8785_regs))
  174. data->wm8785_regs[reg] = value;
  175. }
  176. static void ak4396_registers_init(struct oxygen *chip)
  177. {
  178. struct generic_data *data = chip->model_data;
  179. unsigned int i;
  180. for (i = 0; i < data->dacs; ++i) {
  181. ak4396_write(chip, i, AK4396_CONTROL_1,
  182. AK4396_DIF_24_MSB | AK4396_RSTN);
  183. ak4396_write(chip, i, AK4396_CONTROL_2,
  184. data->ak4396_regs[0][AK4396_CONTROL_2]);
  185. ak4396_write(chip, i, AK4396_CONTROL_3,
  186. AK4396_PCM);
  187. ak4396_write(chip, i, AK4396_LCH_ATT,
  188. chip->dac_volume[i * 2]);
  189. ak4396_write(chip, i, AK4396_RCH_ATT,
  190. chip->dac_volume[i * 2 + 1]);
  191. }
  192. }
  193. static void ak4396_init(struct oxygen *chip)
  194. {
  195. struct generic_data *data = chip->model_data;
  196. data->dacs = chip->model.dac_channels_pcm / 2;
  197. data->ak4396_regs[0][AK4396_CONTROL_2] =
  198. AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
  199. ak4396_registers_init(chip);
  200. snd_component_add(chip->card, "AK4396");
  201. }
  202. static void ak5385_init(struct oxygen *chip)
  203. {
  204. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
  205. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
  206. snd_component_add(chip->card, "AK5385");
  207. }
  208. static void wm8785_registers_init(struct oxygen *chip)
  209. {
  210. struct generic_data *data = chip->model_data;
  211. wm8785_write(chip, WM8785_R7, 0);
  212. wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
  213. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  214. }
  215. static void wm8785_init(struct oxygen *chip)
  216. {
  217. struct generic_data *data = chip->model_data;
  218. data->wm8785_regs[0] =
  219. WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
  220. data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
  221. wm8785_registers_init(chip);
  222. snd_component_add(chip->card, "WM8785");
  223. }
  224. static void generic_init(struct oxygen *chip)
  225. {
  226. ak4396_init(chip);
  227. wm8785_init(chip);
  228. }
  229. static void meridian_init(struct oxygen *chip)
  230. {
  231. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  232. GPIO_MERIDIAN_DIG_MASK);
  233. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  234. GPIO_MERIDIAN_DIG_BOARD, GPIO_MERIDIAN_DIG_MASK);
  235. ak4396_init(chip);
  236. ak5385_init(chip);
  237. }
  238. static void claro_enable_hp(struct oxygen *chip)
  239. {
  240. msleep(300);
  241. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
  242. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  243. }
  244. static void claro_init(struct oxygen *chip)
  245. {
  246. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
  247. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
  248. ak4396_init(chip);
  249. wm8785_init(chip);
  250. claro_enable_hp(chip);
  251. }
  252. static void claro_halo_init(struct oxygen *chip)
  253. {
  254. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
  255. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
  256. ak4396_init(chip);
  257. ak5385_init(chip);
  258. claro_enable_hp(chip);
  259. }
  260. static void fantasia_init(struct oxygen *chip)
  261. {
  262. ak4396_init(chip);
  263. snd_component_add(chip->card, "CS5340");
  264. }
  265. static void stereo_output_init(struct oxygen *chip)
  266. {
  267. ak4396_init(chip);
  268. }
  269. static void generic_cleanup(struct oxygen *chip)
  270. {
  271. }
  272. static void claro_disable_hp(struct oxygen *chip)
  273. {
  274. oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
  275. }
  276. static void claro_cleanup(struct oxygen *chip)
  277. {
  278. claro_disable_hp(chip);
  279. }
  280. static void claro_suspend(struct oxygen *chip)
  281. {
  282. claro_disable_hp(chip);
  283. }
  284. static void generic_resume(struct oxygen *chip)
  285. {
  286. ak4396_registers_init(chip);
  287. wm8785_registers_init(chip);
  288. }
  289. static void meridian_resume(struct oxygen *chip)
  290. {
  291. ak4396_registers_init(chip);
  292. }
  293. static void claro_resume(struct oxygen *chip)
  294. {
  295. ak4396_registers_init(chip);
  296. claro_enable_hp(chip);
  297. }
  298. static void stereo_resume(struct oxygen *chip)
  299. {
  300. ak4396_registers_init(chip);
  301. }
  302. static void set_ak4396_params(struct oxygen *chip,
  303. struct snd_pcm_hw_params *params)
  304. {
  305. struct generic_data *data = chip->model_data;
  306. unsigned int i;
  307. u8 value;
  308. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
  309. if (params_rate(params) <= 54000)
  310. value |= AK4396_DFS_NORMAL;
  311. else if (params_rate(params) <= 108000)
  312. value |= AK4396_DFS_DOUBLE;
  313. else
  314. value |= AK4396_DFS_QUAD;
  315. msleep(1); /* wait for the new MCLK to become stable */
  316. if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
  317. for (i = 0; i < data->dacs; ++i) {
  318. ak4396_write(chip, i, AK4396_CONTROL_1,
  319. AK4396_DIF_24_MSB);
  320. ak4396_write(chip, i, AK4396_CONTROL_2, value);
  321. ak4396_write(chip, i, AK4396_CONTROL_1,
  322. AK4396_DIF_24_MSB | AK4396_RSTN);
  323. }
  324. }
  325. }
  326. static void update_ak4396_volume(struct oxygen *chip)
  327. {
  328. struct generic_data *data = chip->model_data;
  329. unsigned int i;
  330. for (i = 0; i < data->dacs; ++i) {
  331. ak4396_write_cached(chip, i, AK4396_LCH_ATT,
  332. chip->dac_volume[i * 2]);
  333. ak4396_write_cached(chip, i, AK4396_RCH_ATT,
  334. chip->dac_volume[i * 2 + 1]);
  335. }
  336. }
  337. static void update_ak4396_mute(struct oxygen *chip)
  338. {
  339. struct generic_data *data = chip->model_data;
  340. unsigned int i;
  341. u8 value;
  342. value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
  343. if (chip->dac_mute)
  344. value |= AK4396_SMUTE;
  345. for (i = 0; i < data->dacs; ++i)
  346. ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
  347. }
  348. static void set_wm8785_params(struct oxygen *chip,
  349. struct snd_pcm_hw_params *params)
  350. {
  351. struct generic_data *data = chip->model_data;
  352. unsigned int value;
  353. value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
  354. if (params_rate(params) <= 48000)
  355. value |= WM8785_OSR_SINGLE;
  356. else if (params_rate(params) <= 96000)
  357. value |= WM8785_OSR_DOUBLE;
  358. else
  359. value |= WM8785_OSR_QUAD;
  360. if (value != data->wm8785_regs[0]) {
  361. wm8785_write(chip, WM8785_R7, 0);
  362. wm8785_write(chip, WM8785_R0, value);
  363. wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
  364. }
  365. }
  366. static void set_ak5385_params(struct oxygen *chip,
  367. struct snd_pcm_hw_params *params)
  368. {
  369. unsigned int value;
  370. if (params_rate(params) <= 54000)
  371. value = GPIO_AK5385_DFS_NORMAL;
  372. else if (params_rate(params) <= 108000)
  373. value = GPIO_AK5385_DFS_DOUBLE;
  374. else
  375. value = GPIO_AK5385_DFS_QUAD;
  376. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  377. value, GPIO_AK5385_DFS_MASK);
  378. }
  379. static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
  380. {
  381. }
  382. static int rolloff_info(struct snd_kcontrol *ctl,
  383. struct snd_ctl_elem_info *info)
  384. {
  385. static const char *const names[2] = {
  386. "Sharp Roll-off", "Slow Roll-off"
  387. };
  388. return snd_ctl_enum_info(info, 1, 2, names);
  389. }
  390. static int rolloff_get(struct snd_kcontrol *ctl,
  391. struct snd_ctl_elem_value *value)
  392. {
  393. struct oxygen *chip = ctl->private_data;
  394. struct generic_data *data = chip->model_data;
  395. value->value.enumerated.item[0] =
  396. (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
  397. return 0;
  398. }
  399. static int rolloff_put(struct snd_kcontrol *ctl,
  400. struct snd_ctl_elem_value *value)
  401. {
  402. struct oxygen *chip = ctl->private_data;
  403. struct generic_data *data = chip->model_data;
  404. unsigned int i;
  405. int changed;
  406. u8 reg;
  407. mutex_lock(&chip->mutex);
  408. reg = data->ak4396_regs[0][AK4396_CONTROL_2];
  409. if (value->value.enumerated.item[0])
  410. reg |= AK4396_SLOW;
  411. else
  412. reg &= ~AK4396_SLOW;
  413. changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
  414. if (changed) {
  415. for (i = 0; i < data->dacs; ++i)
  416. ak4396_write(chip, i, AK4396_CONTROL_2, reg);
  417. }
  418. mutex_unlock(&chip->mutex);
  419. return changed;
  420. }
  421. static const struct snd_kcontrol_new rolloff_control = {
  422. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  423. .name = "DAC Filter Playback Enum",
  424. .info = rolloff_info,
  425. .get = rolloff_get,
  426. .put = rolloff_put,
  427. };
  428. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  429. {
  430. static const char *const names[2] = {
  431. "None", "High-pass Filter"
  432. };
  433. return snd_ctl_enum_info(info, 1, 2, names);
  434. }
  435. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  436. {
  437. struct oxygen *chip = ctl->private_data;
  438. struct generic_data *data = chip->model_data;
  439. value->value.enumerated.item[0] =
  440. (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
  441. return 0;
  442. }
  443. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  444. {
  445. struct oxygen *chip = ctl->private_data;
  446. struct generic_data *data = chip->model_data;
  447. unsigned int reg;
  448. int changed;
  449. mutex_lock(&chip->mutex);
  450. reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
  451. if (value->value.enumerated.item[0])
  452. reg |= WM8785_HPFR | WM8785_HPFL;
  453. changed = reg != data->wm8785_regs[WM8785_R2];
  454. if (changed)
  455. wm8785_write(chip, WM8785_R2, reg);
  456. mutex_unlock(&chip->mutex);
  457. return changed;
  458. }
  459. static const struct snd_kcontrol_new hpf_control = {
  460. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  461. .name = "ADC Filter Capture Enum",
  462. .info = hpf_info,
  463. .get = hpf_get,
  464. .put = hpf_put,
  465. };
  466. static int meridian_dig_source_info(struct snd_kcontrol *ctl,
  467. struct snd_ctl_elem_info *info)
  468. {
  469. static const char *const names[2] = { "On-board", "Extension" };
  470. return snd_ctl_enum_info(info, 1, 2, names);
  471. }
  472. static int claro_dig_source_info(struct snd_kcontrol *ctl,
  473. struct snd_ctl_elem_info *info)
  474. {
  475. static const char *const names[2] = { "Optical", "Coaxial" };
  476. return snd_ctl_enum_info(info, 1, 2, names);
  477. }
  478. static int meridian_dig_source_get(struct snd_kcontrol *ctl,
  479. struct snd_ctl_elem_value *value)
  480. {
  481. struct oxygen *chip = ctl->private_data;
  482. value->value.enumerated.item[0] =
  483. !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  484. GPIO_MERIDIAN_DIG_EXT);
  485. return 0;
  486. }
  487. static int claro_dig_source_get(struct snd_kcontrol *ctl,
  488. struct snd_ctl_elem_value *value)
  489. {
  490. struct oxygen *chip = ctl->private_data;
  491. value->value.enumerated.item[0] =
  492. !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  493. GPIO_CLARO_DIG_COAX);
  494. return 0;
  495. }
  496. static int meridian_dig_source_put(struct snd_kcontrol *ctl,
  497. struct snd_ctl_elem_value *value)
  498. {
  499. struct oxygen *chip = ctl->private_data;
  500. u16 old_reg, new_reg;
  501. int changed;
  502. mutex_lock(&chip->mutex);
  503. old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
  504. new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
  505. if (value->value.enumerated.item[0] == 0)
  506. new_reg |= GPIO_MERIDIAN_DIG_BOARD;
  507. else
  508. new_reg |= GPIO_MERIDIAN_DIG_EXT;
  509. changed = new_reg != old_reg;
  510. if (changed)
  511. oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
  512. mutex_unlock(&chip->mutex);
  513. return changed;
  514. }
  515. static int claro_dig_source_put(struct snd_kcontrol *ctl,
  516. struct snd_ctl_elem_value *value)
  517. {
  518. struct oxygen *chip = ctl->private_data;
  519. u16 old_reg, new_reg;
  520. int changed;
  521. mutex_lock(&chip->mutex);
  522. old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
  523. new_reg = old_reg & ~GPIO_CLARO_DIG_COAX;
  524. if (value->value.enumerated.item[0])
  525. new_reg |= GPIO_CLARO_DIG_COAX;
  526. changed = new_reg != old_reg;
  527. if (changed)
  528. oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
  529. mutex_unlock(&chip->mutex);
  530. return changed;
  531. }
  532. static const struct snd_kcontrol_new meridian_dig_source_control = {
  533. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  534. .name = "IEC958 Source Capture Enum",
  535. .info = meridian_dig_source_info,
  536. .get = meridian_dig_source_get,
  537. .put = meridian_dig_source_put,
  538. };
  539. static const struct snd_kcontrol_new claro_dig_source_control = {
  540. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  541. .name = "IEC958 Source Capture Enum",
  542. .info = claro_dig_source_info,
  543. .get = claro_dig_source_get,
  544. .put = claro_dig_source_put,
  545. };
  546. static int generic_mixer_init(struct oxygen *chip)
  547. {
  548. return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
  549. }
  550. static int generic_wm8785_mixer_init(struct oxygen *chip)
  551. {
  552. int err;
  553. err = generic_mixer_init(chip);
  554. if (err < 0)
  555. return err;
  556. err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
  557. if (err < 0)
  558. return err;
  559. return 0;
  560. }
  561. static int meridian_mixer_init(struct oxygen *chip)
  562. {
  563. int err;
  564. err = generic_mixer_init(chip);
  565. if (err < 0)
  566. return err;
  567. err = snd_ctl_add(chip->card,
  568. snd_ctl_new1(&meridian_dig_source_control, chip));
  569. if (err < 0)
  570. return err;
  571. return 0;
  572. }
  573. static int claro_mixer_init(struct oxygen *chip)
  574. {
  575. int err;
  576. err = generic_wm8785_mixer_init(chip);
  577. if (err < 0)
  578. return err;
  579. err = snd_ctl_add(chip->card,
  580. snd_ctl_new1(&claro_dig_source_control, chip));
  581. if (err < 0)
  582. return err;
  583. return 0;
  584. }
  585. static int claro_halo_mixer_init(struct oxygen *chip)
  586. {
  587. int err;
  588. err = generic_mixer_init(chip);
  589. if (err < 0)
  590. return err;
  591. err = snd_ctl_add(chip->card,
  592. snd_ctl_new1(&claro_dig_source_control, chip));
  593. if (err < 0)
  594. return err;
  595. return 0;
  596. }
  597. static void dump_ak4396_registers(struct oxygen *chip,
  598. struct snd_info_buffer *buffer)
  599. {
  600. struct generic_data *data = chip->model_data;
  601. unsigned int dac, i;
  602. for (dac = 0; dac < data->dacs; ++dac) {
  603. snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
  604. for (i = 0; i < 5; ++i)
  605. snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
  606. }
  607. snd_iprintf(buffer, "\n");
  608. }
  609. static void dump_wm8785_registers(struct oxygen *chip,
  610. struct snd_info_buffer *buffer)
  611. {
  612. struct generic_data *data = chip->model_data;
  613. unsigned int i;
  614. snd_iprintf(buffer, "\nWM8785:");
  615. for (i = 0; i < 3; ++i)
  616. snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
  617. snd_iprintf(buffer, "\n");
  618. }
  619. static void dump_oxygen_registers(struct oxygen *chip,
  620. struct snd_info_buffer *buffer)
  621. {
  622. dump_ak4396_registers(chip, buffer);
  623. dump_wm8785_registers(chip, buffer);
  624. }
  625. static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
  626. static const struct oxygen_model model_generic = {
  627. .shortname = "C-Media CMI8788",
  628. .longname = "C-Media Oxygen HD Audio",
  629. .chip = "CMI8788",
  630. .init = generic_init,
  631. .mixer_init = generic_wm8785_mixer_init,
  632. .cleanup = generic_cleanup,
  633. .resume = generic_resume,
  634. .set_dac_params = set_ak4396_params,
  635. .set_adc_params = set_wm8785_params,
  636. .update_dac_volume = update_ak4396_volume,
  637. .update_dac_mute = update_ak4396_mute,
  638. .dump_registers = dump_oxygen_registers,
  639. .dac_tlv = ak4396_db_scale,
  640. .model_data_size = sizeof(struct generic_data),
  641. .device_config = PLAYBACK_0_TO_I2S |
  642. PLAYBACK_1_TO_SPDIF |
  643. PLAYBACK_2_TO_AC97_1 |
  644. CAPTURE_0_FROM_I2S_1 |
  645. CAPTURE_1_FROM_SPDIF |
  646. CAPTURE_2_FROM_AC97_1 |
  647. AC97_CD_INPUT,
  648. .dac_channels_pcm = 8,
  649. .dac_channels_mixer = 8,
  650. .dac_volume_min = 0,
  651. .dac_volume_max = 255,
  652. .function_flags = OXYGEN_FUNCTION_SPI |
  653. OXYGEN_FUNCTION_ENABLE_SPI_4_5,
  654. .dac_mclks = OXYGEN_MCLKS(256, 128, 128),
  655. .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
  656. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  657. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  658. };
  659. static int get_oxygen_model(struct oxygen *chip,
  660. const struct pci_device_id *id)
  661. {
  662. static const char *const names[] = {
  663. [MODEL_MERIDIAN] = "AuzenTech X-Meridian",
  664. [MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
  665. [MODEL_CLARO] = "HT-Omega Claro",
  666. [MODEL_CLARO_HALO] = "HT-Omega Claro halo",
  667. [MODEL_FANTASIA] = "TempoTec HiFier Fantasia",
  668. [MODEL_SERENADE] = "TempoTec HiFier Serenade",
  669. [MODEL_HG2PCI] = "CMI8787-HG2PCI",
  670. };
  671. chip->model = model_generic;
  672. switch (id->driver_data) {
  673. case MODEL_MERIDIAN:
  674. case MODEL_MERIDIAN_2G:
  675. chip->model.init = meridian_init;
  676. chip->model.mixer_init = meridian_mixer_init;
  677. chip->model.resume = meridian_resume;
  678. chip->model.set_adc_params = set_ak5385_params;
  679. chip->model.dump_registers = dump_ak4396_registers;
  680. chip->model.device_config = PLAYBACK_0_TO_I2S |
  681. PLAYBACK_1_TO_SPDIF |
  682. CAPTURE_0_FROM_I2S_2 |
  683. CAPTURE_1_FROM_SPDIF;
  684. if (id->driver_data == MODEL_MERIDIAN)
  685. chip->model.device_config |= AC97_CD_INPUT;
  686. break;
  687. case MODEL_CLARO:
  688. chip->model.init = claro_init;
  689. chip->model.mixer_init = claro_mixer_init;
  690. chip->model.cleanup = claro_cleanup;
  691. chip->model.suspend = claro_suspend;
  692. chip->model.resume = claro_resume;
  693. break;
  694. case MODEL_CLARO_HALO:
  695. chip->model.init = claro_halo_init;
  696. chip->model.mixer_init = claro_halo_mixer_init;
  697. chip->model.cleanup = claro_cleanup;
  698. chip->model.suspend = claro_suspend;
  699. chip->model.resume = claro_resume;
  700. chip->model.set_adc_params = set_ak5385_params;
  701. chip->model.dump_registers = dump_ak4396_registers;
  702. chip->model.device_config = PLAYBACK_0_TO_I2S |
  703. PLAYBACK_1_TO_SPDIF |
  704. CAPTURE_0_FROM_I2S_2 |
  705. CAPTURE_1_FROM_SPDIF;
  706. break;
  707. case MODEL_FANTASIA:
  708. case MODEL_SERENADE:
  709. case MODEL_2CH_OUTPUT:
  710. case MODEL_HG2PCI:
  711. chip->model.shortname = "C-Media CMI8787";
  712. chip->model.chip = "CMI8787";
  713. if (id->driver_data == MODEL_FANTASIA)
  714. chip->model.init = fantasia_init;
  715. else
  716. chip->model.init = stereo_output_init;
  717. chip->model.resume = stereo_resume;
  718. chip->model.mixer_init = generic_mixer_init;
  719. chip->model.set_adc_params = set_no_params;
  720. chip->model.dump_registers = dump_ak4396_registers;
  721. chip->model.device_config = PLAYBACK_0_TO_I2S |
  722. PLAYBACK_1_TO_SPDIF;
  723. if (id->driver_data == MODEL_FANTASIA) {
  724. chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
  725. chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
  726. }
  727. chip->model.dac_channels_pcm = 2;
  728. chip->model.dac_channels_mixer = 2;
  729. break;
  730. case MODEL_XONAR_DG:
  731. chip->model = model_xonar_dg;
  732. chip->model.shortname = "Xonar DG";
  733. break;
  734. case MODEL_XONAR_DGX:
  735. chip->model = model_xonar_dg;
  736. chip->model.shortname = "Xonar DGX";
  737. break;
  738. }
  739. if (id->driver_data == MODEL_MERIDIAN ||
  740. id->driver_data == MODEL_MERIDIAN_2G ||
  741. id->driver_data == MODEL_CLARO_HALO) {
  742. chip->model.misc_flags = OXYGEN_MISC_MIDI;
  743. chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
  744. }
  745. if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
  746. chip->model.shortname = names[id->driver_data];
  747. return 0;
  748. }
  749. static int generic_oxygen_probe(struct pci_dev *pci,
  750. const struct pci_device_id *pci_id)
  751. {
  752. static int dev;
  753. int err;
  754. if (dev >= SNDRV_CARDS)
  755. return -ENODEV;
  756. if (!enable[dev]) {
  757. ++dev;
  758. return -ENOENT;
  759. }
  760. err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
  761. oxygen_ids, get_oxygen_model);
  762. if (err >= 0)
  763. ++dev;
  764. return err;
  765. }
  766. static struct pci_driver oxygen_driver = {
  767. .name = KBUILD_MODNAME,
  768. .id_table = oxygen_ids,
  769. .probe = generic_oxygen_probe,
  770. .remove = oxygen_pci_remove,
  771. #ifdef CONFIG_PM_SLEEP
  772. .driver = {
  773. .pm = &oxygen_pci_pm,
  774. },
  775. #endif
  776. };
  777. module_pci_driver(oxygen_driver);