atmel_ssc_dai.h 3.2 KB

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  1. /*
  2. * atmel_ssc_dai.h - ALSA SSC interface for the Atmel SoC
  3. *
  4. * Copyright (C) 2005 SAN People
  5. * Copyright (C) 2008 Atmel
  6. *
  7. * Author: Sedji Gaouaou <sedji.gaouaou@atmel.com>
  8. * ATMEL CORP.
  9. *
  10. * Based on at91-ssc.c by
  11. * Frank Mandarino <fmandarino@endrelia.com>
  12. * Based on pxa2xx Platform drivers by
  13. * Liam Girdwood <lrg@slimlogic.co.uk>
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  28. */
  29. #ifndef _ATMEL_SSC_DAI_H
  30. #define _ATMEL_SSC_DAI_H
  31. #include <linux/types.h>
  32. #include <linux/atmel-ssc.h>
  33. #include "atmel-pcm.h"
  34. /* SSC system clock ids */
  35. #define ATMEL_SYSCLK_MCK 0 /* SSC uses AT91 MCK as system clock */
  36. /* SSC divider ids */
  37. #define ATMEL_SSC_CMR_DIV 0 /* MCK divider for BCLK */
  38. #define ATMEL_SSC_TCMR_PERIOD 1 /* BCLK divider for transmit FS */
  39. #define ATMEL_SSC_RCMR_PERIOD 2 /* BCLK divider for receive FS */
  40. /*
  41. * SSC direction masks
  42. */
  43. #define SSC_DIR_MASK_UNUSED 0
  44. #define SSC_DIR_MASK_PLAYBACK 1
  45. #define SSC_DIR_MASK_CAPTURE 2
  46. /*
  47. * SSC register values that Atmel left out of <linux/atmel-ssc.h>. These
  48. * are expected to be used with SSC_BF
  49. */
  50. /* START bit field values */
  51. #define SSC_START_CONTINUOUS 0
  52. #define SSC_START_TX_RX 1
  53. #define SSC_START_LOW_RF 2
  54. #define SSC_START_HIGH_RF 3
  55. #define SSC_START_FALLING_RF 4
  56. #define SSC_START_RISING_RF 5
  57. #define SSC_START_LEVEL_RF 6
  58. #define SSC_START_EDGE_RF 7
  59. #define SSS_START_COMPARE_0 8
  60. /* CKI bit field values */
  61. #define SSC_CKI_FALLING 0
  62. #define SSC_CKI_RISING 1
  63. /* CKO bit field values */
  64. #define SSC_CKO_NONE 0
  65. #define SSC_CKO_CONTINUOUS 1
  66. #define SSC_CKO_TRANSFER 2
  67. /* CKS bit field values */
  68. #define SSC_CKS_DIV 0
  69. #define SSC_CKS_CLOCK 1
  70. #define SSC_CKS_PIN 2
  71. /* FSEDGE bit field values */
  72. #define SSC_FSEDGE_POSITIVE 0
  73. #define SSC_FSEDGE_NEGATIVE 1
  74. /* FSOS bit field values */
  75. #define SSC_FSOS_NONE 0
  76. #define SSC_FSOS_NEGATIVE 1
  77. #define SSC_FSOS_POSITIVE 2
  78. #define SSC_FSOS_LOW 3
  79. #define SSC_FSOS_HIGH 4
  80. #define SSC_FSOS_TOGGLE 5
  81. #define START_DELAY 1
  82. struct atmel_ssc_state {
  83. u32 ssc_cmr;
  84. u32 ssc_rcmr;
  85. u32 ssc_rfmr;
  86. u32 ssc_tcmr;
  87. u32 ssc_tfmr;
  88. u32 ssc_sr;
  89. u32 ssc_imr;
  90. };
  91. struct atmel_ssc_info {
  92. char *name;
  93. struct ssc_device *ssc;
  94. spinlock_t lock; /* lock for dir_mask */
  95. unsigned short dir_mask; /* 0=unused, 1=playback, 2=capture */
  96. unsigned short initialized; /* true if SSC has been initialized */
  97. unsigned short daifmt;
  98. unsigned short cmr_div;
  99. unsigned short tcmr_period;
  100. unsigned short rcmr_period;
  101. struct atmel_pcm_dma_params *dma_params[2];
  102. struct atmel_ssc_state ssc_state;
  103. unsigned long mck_rate;
  104. };
  105. int atmel_ssc_set_audio(int ssc_id);
  106. void atmel_ssc_put_audio(int ssc_id);
  107. #endif /* _AT91_SSC_DAI_H */