dbdma2.c 9.2 KB

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  1. /*
  2. * Au12x0/Au1550 PSC ALSA ASoC audio support.
  3. *
  4. * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
  5. * Manuel Lauss <manuel.lauss@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * DMA glue for Au1x-PSC audio.
  12. *
  13. */
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/slab.h>
  18. #include <linux/dma-mapping.h>
  19. #include <sound/core.h>
  20. #include <sound/pcm.h>
  21. #include <sound/pcm_params.h>
  22. #include <sound/soc.h>
  23. #include <asm/mach-au1x00/au1000.h>
  24. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  25. #include <asm/mach-au1x00/au1xxx_psc.h>
  26. #include "psc.h"
  27. /*#define PCM_DEBUG*/
  28. #define MSG(x...) printk(KERN_INFO "au1xpsc_pcm: " x)
  29. #ifdef PCM_DEBUG
  30. #define DBG MSG
  31. #else
  32. #define DBG(x...) do {} while (0)
  33. #endif
  34. struct au1xpsc_audio_dmadata {
  35. /* DDMA control data */
  36. unsigned int ddma_id; /* DDMA direction ID for this PSC */
  37. u32 ddma_chan; /* DDMA context */
  38. /* PCM context (for irq handlers) */
  39. struct snd_pcm_substream *substream;
  40. unsigned long curr_period; /* current segment DDMA is working on */
  41. unsigned long q_period; /* queue period(s) */
  42. dma_addr_t dma_area; /* address of queued DMA area */
  43. dma_addr_t dma_area_s; /* start address of DMA area */
  44. unsigned long pos; /* current byte position being played */
  45. unsigned long periods; /* number of SG segments in total */
  46. unsigned long period_bytes; /* size in bytes of one SG segment */
  47. /* runtime data */
  48. int msbits;
  49. };
  50. /*
  51. * These settings are somewhat okay, at least on my machine audio plays
  52. * almost skip-free. Especially the 64kB buffer seems to help a LOT.
  53. */
  54. #define AU1XPSC_PERIOD_MIN_BYTES 1024
  55. #define AU1XPSC_BUFFER_MIN_BYTES 65536
  56. /* PCM hardware DMA capabilities - platform specific */
  57. static const struct snd_pcm_hardware au1xpsc_pcm_hardware = {
  58. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  59. SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BATCH,
  60. .period_bytes_min = AU1XPSC_PERIOD_MIN_BYTES,
  61. .period_bytes_max = 4096 * 1024 - 1,
  62. .periods_min = 2,
  63. .periods_max = 4096, /* 2 to as-much-as-you-like */
  64. .buffer_bytes_max = 4096 * 1024 - 1,
  65. .fifo_size = 16, /* fifo entries of AC97/I2S PSC */
  66. };
  67. static void au1x_pcm_queue_tx(struct au1xpsc_audio_dmadata *cd)
  68. {
  69. au1xxx_dbdma_put_source(cd->ddma_chan, cd->dma_area,
  70. cd->period_bytes, DDMA_FLAGS_IE);
  71. /* update next-to-queue period */
  72. ++cd->q_period;
  73. cd->dma_area += cd->period_bytes;
  74. if (cd->q_period >= cd->periods) {
  75. cd->q_period = 0;
  76. cd->dma_area = cd->dma_area_s;
  77. }
  78. }
  79. static void au1x_pcm_queue_rx(struct au1xpsc_audio_dmadata *cd)
  80. {
  81. au1xxx_dbdma_put_dest(cd->ddma_chan, cd->dma_area,
  82. cd->period_bytes, DDMA_FLAGS_IE);
  83. /* update next-to-queue period */
  84. ++cd->q_period;
  85. cd->dma_area += cd->period_bytes;
  86. if (cd->q_period >= cd->periods) {
  87. cd->q_period = 0;
  88. cd->dma_area = cd->dma_area_s;
  89. }
  90. }
  91. static void au1x_pcm_dmatx_cb(int irq, void *dev_id)
  92. {
  93. struct au1xpsc_audio_dmadata *cd = dev_id;
  94. cd->pos += cd->period_bytes;
  95. if (++cd->curr_period >= cd->periods) {
  96. cd->pos = 0;
  97. cd->curr_period = 0;
  98. }
  99. snd_pcm_period_elapsed(cd->substream);
  100. au1x_pcm_queue_tx(cd);
  101. }
  102. static void au1x_pcm_dmarx_cb(int irq, void *dev_id)
  103. {
  104. struct au1xpsc_audio_dmadata *cd = dev_id;
  105. cd->pos += cd->period_bytes;
  106. if (++cd->curr_period >= cd->periods) {
  107. cd->pos = 0;
  108. cd->curr_period = 0;
  109. }
  110. snd_pcm_period_elapsed(cd->substream);
  111. au1x_pcm_queue_rx(cd);
  112. }
  113. static void au1x_pcm_dbdma_free(struct au1xpsc_audio_dmadata *pcd)
  114. {
  115. if (pcd->ddma_chan) {
  116. au1xxx_dbdma_stop(pcd->ddma_chan);
  117. au1xxx_dbdma_reset(pcd->ddma_chan);
  118. au1xxx_dbdma_chan_free(pcd->ddma_chan);
  119. pcd->ddma_chan = 0;
  120. pcd->msbits = 0;
  121. }
  122. }
  123. /* in case of missing DMA ring or changed TX-source / RX-dest bit widths,
  124. * allocate (or reallocate) a 2-descriptor DMA ring with bit depth according
  125. * to ALSA-supplied sample depth. This is due to limitations in the dbdma api
  126. * (cannot adjust source/dest widths of already allocated descriptor ring).
  127. */
  128. static int au1x_pcm_dbdma_realloc(struct au1xpsc_audio_dmadata *pcd,
  129. int stype, int msbits)
  130. {
  131. /* DMA only in 8/16/32 bit widths */
  132. if (msbits == 24)
  133. msbits = 32;
  134. /* check current config: correct bits and descriptors allocated? */
  135. if ((pcd->ddma_chan) && (msbits == pcd->msbits))
  136. goto out; /* all ok! */
  137. au1x_pcm_dbdma_free(pcd);
  138. if (stype == SNDRV_PCM_STREAM_CAPTURE)
  139. pcd->ddma_chan = au1xxx_dbdma_chan_alloc(pcd->ddma_id,
  140. DSCR_CMD0_ALWAYS,
  141. au1x_pcm_dmarx_cb, (void *)pcd);
  142. else
  143. pcd->ddma_chan = au1xxx_dbdma_chan_alloc(DSCR_CMD0_ALWAYS,
  144. pcd->ddma_id,
  145. au1x_pcm_dmatx_cb, (void *)pcd);
  146. if (!pcd->ddma_chan)
  147. return -ENOMEM;
  148. au1xxx_dbdma_set_devwidth(pcd->ddma_chan, msbits);
  149. au1xxx_dbdma_ring_alloc(pcd->ddma_chan, 2);
  150. pcd->msbits = msbits;
  151. au1xxx_dbdma_stop(pcd->ddma_chan);
  152. au1xxx_dbdma_reset(pcd->ddma_chan);
  153. out:
  154. return 0;
  155. }
  156. static inline struct au1xpsc_audio_dmadata *to_dmadata(struct snd_pcm_substream *ss)
  157. {
  158. struct snd_soc_pcm_runtime *rtd = ss->private_data;
  159. struct au1xpsc_audio_dmadata *pcd =
  160. snd_soc_platform_get_drvdata(rtd->platform);
  161. return &pcd[ss->stream];
  162. }
  163. static int au1xpsc_pcm_hw_params(struct snd_pcm_substream *substream,
  164. struct snd_pcm_hw_params *params)
  165. {
  166. struct snd_pcm_runtime *runtime = substream->runtime;
  167. struct au1xpsc_audio_dmadata *pcd;
  168. int stype, ret;
  169. ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
  170. if (ret < 0)
  171. goto out;
  172. stype = substream->stream;
  173. pcd = to_dmadata(substream);
  174. DBG("runtime->dma_area = 0x%08lx dma_addr_t = 0x%08lx dma_size = %d "
  175. "runtime->min_align %d\n",
  176. (unsigned long)runtime->dma_area,
  177. (unsigned long)runtime->dma_addr, runtime->dma_bytes,
  178. runtime->min_align);
  179. DBG("bits %d frags %d frag_bytes %d is_rx %d\n", params->msbits,
  180. params_periods(params), params_period_bytes(params), stype);
  181. ret = au1x_pcm_dbdma_realloc(pcd, stype, params->msbits);
  182. if (ret) {
  183. MSG("DDMA channel (re)alloc failed!\n");
  184. goto out;
  185. }
  186. pcd->substream = substream;
  187. pcd->period_bytes = params_period_bytes(params);
  188. pcd->periods = params_periods(params);
  189. pcd->dma_area_s = pcd->dma_area = runtime->dma_addr;
  190. pcd->q_period = 0;
  191. pcd->curr_period = 0;
  192. pcd->pos = 0;
  193. ret = 0;
  194. out:
  195. return ret;
  196. }
  197. static int au1xpsc_pcm_hw_free(struct snd_pcm_substream *substream)
  198. {
  199. snd_pcm_lib_free_pages(substream);
  200. return 0;
  201. }
  202. static int au1xpsc_pcm_prepare(struct snd_pcm_substream *substream)
  203. {
  204. struct au1xpsc_audio_dmadata *pcd = to_dmadata(substream);
  205. au1xxx_dbdma_reset(pcd->ddma_chan);
  206. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  207. au1x_pcm_queue_rx(pcd);
  208. au1x_pcm_queue_rx(pcd);
  209. } else {
  210. au1x_pcm_queue_tx(pcd);
  211. au1x_pcm_queue_tx(pcd);
  212. }
  213. return 0;
  214. }
  215. static int au1xpsc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  216. {
  217. u32 c = to_dmadata(substream)->ddma_chan;
  218. switch (cmd) {
  219. case SNDRV_PCM_TRIGGER_START:
  220. case SNDRV_PCM_TRIGGER_RESUME:
  221. au1xxx_dbdma_start(c);
  222. break;
  223. case SNDRV_PCM_TRIGGER_STOP:
  224. case SNDRV_PCM_TRIGGER_SUSPEND:
  225. au1xxx_dbdma_stop(c);
  226. break;
  227. default:
  228. return -EINVAL;
  229. }
  230. return 0;
  231. }
  232. static snd_pcm_uframes_t
  233. au1xpsc_pcm_pointer(struct snd_pcm_substream *substream)
  234. {
  235. return bytes_to_frames(substream->runtime, to_dmadata(substream)->pos);
  236. }
  237. static int au1xpsc_pcm_open(struct snd_pcm_substream *substream)
  238. {
  239. struct au1xpsc_audio_dmadata *pcd = to_dmadata(substream);
  240. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  241. int stype = substream->stream, *dmaids;
  242. dmaids = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  243. if (!dmaids)
  244. return -ENODEV; /* whoa, has ordering changed? */
  245. pcd->ddma_id = dmaids[stype];
  246. snd_soc_set_runtime_hwparams(substream, &au1xpsc_pcm_hardware);
  247. return 0;
  248. }
  249. static int au1xpsc_pcm_close(struct snd_pcm_substream *substream)
  250. {
  251. au1x_pcm_dbdma_free(to_dmadata(substream));
  252. return 0;
  253. }
  254. static struct snd_pcm_ops au1xpsc_pcm_ops = {
  255. .open = au1xpsc_pcm_open,
  256. .close = au1xpsc_pcm_close,
  257. .ioctl = snd_pcm_lib_ioctl,
  258. .hw_params = au1xpsc_pcm_hw_params,
  259. .hw_free = au1xpsc_pcm_hw_free,
  260. .prepare = au1xpsc_pcm_prepare,
  261. .trigger = au1xpsc_pcm_trigger,
  262. .pointer = au1xpsc_pcm_pointer,
  263. };
  264. static int au1xpsc_pcm_new(struct snd_soc_pcm_runtime *rtd)
  265. {
  266. struct snd_card *card = rtd->card->snd_card;
  267. struct snd_pcm *pcm = rtd->pcm;
  268. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  269. card->dev, AU1XPSC_BUFFER_MIN_BYTES, (4096 * 1024) - 1);
  270. return 0;
  271. }
  272. /* au1xpsc audio platform */
  273. static struct snd_soc_platform_driver au1xpsc_soc_platform = {
  274. .ops = &au1xpsc_pcm_ops,
  275. .pcm_new = au1xpsc_pcm_new,
  276. };
  277. static int au1xpsc_pcm_drvprobe(struct platform_device *pdev)
  278. {
  279. struct au1xpsc_audio_dmadata *dmadata;
  280. dmadata = devm_kzalloc(&pdev->dev,
  281. 2 * sizeof(struct au1xpsc_audio_dmadata),
  282. GFP_KERNEL);
  283. if (!dmadata)
  284. return -ENOMEM;
  285. platform_set_drvdata(pdev, dmadata);
  286. return devm_snd_soc_register_platform(&pdev->dev,
  287. &au1xpsc_soc_platform);
  288. }
  289. static struct platform_driver au1xpsc_pcm_driver = {
  290. .driver = {
  291. .name = "au1xpsc-pcm",
  292. },
  293. .probe = au1xpsc_pcm_drvprobe,
  294. };
  295. module_platform_driver(au1xpsc_pcm_driver);
  296. MODULE_LICENSE("GPL");
  297. MODULE_DESCRIPTION("Au12x0/Au1550 PSC Audio DMA driver");
  298. MODULE_AUTHOR("Manuel Lauss");