DMA-attributes.txt 4.5 KB

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  1. DMA attributes
  2. ==============
  3. This document describes the semantics of the DMA attributes that are
  4. defined in linux/dma-attrs.h.
  5. DMA_ATTR_WRITE_BARRIER
  6. ----------------------
  7. DMA_ATTR_WRITE_BARRIER is a (write) barrier attribute for DMA. DMA
  8. to a memory region with the DMA_ATTR_WRITE_BARRIER attribute forces
  9. all pending DMA writes to complete, and thus provides a mechanism to
  10. strictly order DMA from a device across all intervening busses and
  11. bridges. This barrier is not specific to a particular type of
  12. interconnect, it applies to the system as a whole, and so its
  13. implementation must account for the idiosyncrasies of the system all
  14. the way from the DMA device to memory.
  15. As an example of a situation where DMA_ATTR_WRITE_BARRIER would be
  16. useful, suppose that a device does a DMA write to indicate that data is
  17. ready and available in memory. The DMA of the "completion indication"
  18. could race with data DMA. Mapping the memory used for completion
  19. indications with DMA_ATTR_WRITE_BARRIER would prevent the race.
  20. DMA_ATTR_WEAK_ORDERING
  21. ----------------------
  22. DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping
  23. may be weakly ordered, that is that reads and writes may pass each other.
  24. Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
  25. those that do not will simply ignore the attribute and exhibit default
  26. behavior.
  27. DMA_ATTR_WRITE_COMBINE
  28. ----------------------
  29. DMA_ATTR_WRITE_COMBINE specifies that writes to the mapping may be
  30. buffered to improve performance.
  31. Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE,
  32. those that do not will simply ignore the attribute and exhibit default
  33. behavior.
  34. DMA_ATTR_NON_CONSISTENT
  35. -----------------------
  36. DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either
  37. consistent or non-consistent memory as it sees fit. By using this API,
  38. you are guaranteeing to the platform that you have all the correct and
  39. necessary sync points for this memory in the driver.
  40. DMA_ATTR_NO_KERNEL_MAPPING
  41. --------------------------
  42. DMA_ATTR_NO_KERNEL_MAPPING lets the platform to avoid creating a kernel
  43. virtual mapping for the allocated buffer. On some architectures creating
  44. such mapping is non-trivial task and consumes very limited resources
  45. (like kernel virtual address space or dma consistent address space).
  46. Buffers allocated with this attribute can be only passed to user space
  47. by calling dma_mmap_attrs(). By using this API, you are guaranteeing
  48. that you won't dereference the pointer returned by dma_alloc_attr(). You
  49. can treat it as a cookie that must be passed to dma_mmap_attrs() and
  50. dma_free_attrs(). Make sure that both of these also get this attribute
  51. set on each call.
  52. Since it is optional for platforms to implement
  53. DMA_ATTR_NO_KERNEL_MAPPING, those that do not will simply ignore the
  54. attribute and exhibit default behavior.
  55. DMA_ATTR_SKIP_CPU_SYNC
  56. ----------------------
  57. By default dma_map_{single,page,sg} functions family transfer a given
  58. buffer from CPU domain to device domain. Some advanced use cases might
  59. require sharing a buffer between more than one device. This requires
  60. having a mapping created separately for each device and is usually
  61. performed by calling dma_map_{single,page,sg} function more than once
  62. for the given buffer with device pointer to each device taking part in
  63. the buffer sharing. The first call transfers a buffer from 'CPU' domain
  64. to 'device' domain, what synchronizes CPU caches for the given region
  65. (usually it means that the cache has been flushed or invalidated
  66. depending on the dma direction). However, next calls to
  67. dma_map_{single,page,sg}() for other devices will perform exactly the
  68. same synchronization operation on the CPU cache. CPU cache synchronization
  69. might be a time consuming operation, especially if the buffers are
  70. large, so it is highly recommended to avoid it if possible.
  71. DMA_ATTR_SKIP_CPU_SYNC allows platform code to skip synchronization of
  72. the CPU cache for the given buffer assuming that it has been already
  73. transferred to 'device' domain. This attribute can be also used for
  74. dma_unmap_{single,page,sg} functions family to force buffer to stay in
  75. device domain after releasing a mapping for it. Use this attribute with
  76. care!
  77. DMA_ATTR_FORCE_CONTIGUOUS
  78. -------------------------
  79. By default DMA-mapping subsystem is allowed to assemble the buffer
  80. allocated by dma_alloc_attrs() function from individual pages if it can
  81. be mapped as contiguous chunk into device dma address space. By
  82. specifying this attribute the allocated buffer is forced to be contiguous
  83. also in physical memory.