IRQ-domain.txt 10 KB

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  1. irq_domain interrupt number mapping library
  2. The current design of the Linux kernel uses a single large number
  3. space where each separate IRQ source is assigned a different number.
  4. This is simple when there is only one interrupt controller, but in
  5. systems with multiple interrupt controllers the kernel must ensure
  6. that each one gets assigned non-overlapping allocations of Linux
  7. IRQ numbers.
  8. The number of interrupt controllers registered as unique irqchips
  9. show a rising tendency: for example subdrivers of different kinds
  10. such as GPIO controllers avoid reimplementing identical callback
  11. mechanisms as the IRQ core system by modelling their interrupt
  12. handlers as irqchips, i.e. in effect cascading interrupt controllers.
  13. Here the interrupt number loose all kind of correspondence to
  14. hardware interrupt numbers: whereas in the past, IRQ numbers could
  15. be chosen so they matched the hardware IRQ line into the root
  16. interrupt controller (i.e. the component actually fireing the
  17. interrupt line to the CPU) nowadays this number is just a number.
  18. For this reason we need a mechanism to separate controller-local
  19. interrupt numbers, called hardware irq's, from Linux IRQ numbers.
  20. The irq_alloc_desc*() and irq_free_desc*() APIs provide allocation of
  21. irq numbers, but they don't provide any support for reverse mapping of
  22. the controller-local IRQ (hwirq) number into the Linux IRQ number
  23. space.
  24. The irq_domain library adds mapping between hwirq and IRQ numbers on
  25. top of the irq_alloc_desc*() API. An irq_domain to manage mapping is
  26. preferred over interrupt controller drivers open coding their own
  27. reverse mapping scheme.
  28. irq_domain also implements translation from an abstract irq_fwspec
  29. structure to hwirq numbers (Device Tree and ACPI GSI so far), and can
  30. be easily extended to support other IRQ topology data sources.
  31. === irq_domain usage ===
  32. An interrupt controller driver creates and registers an irq_domain by
  33. calling one of the irq_domain_add_*() functions (each mapping method
  34. has a different allocator function, more on that later). The function
  35. will return a pointer to the irq_domain on success. The caller must
  36. provide the allocator function with an irq_domain_ops structure.
  37. In most cases, the irq_domain will begin empty without any mappings
  38. between hwirq and IRQ numbers. Mappings are added to the irq_domain
  39. by calling irq_create_mapping() which accepts the irq_domain and a
  40. hwirq number as arguments. If a mapping for the hwirq doesn't already
  41. exist then it will allocate a new Linux irq_desc, associate it with
  42. the hwirq, and call the .map() callback so the driver can perform any
  43. required hardware setup.
  44. When an interrupt is received, irq_find_mapping() function should
  45. be used to find the Linux IRQ number from the hwirq number.
  46. The irq_create_mapping() function must be called *atleast once*
  47. before any call to irq_find_mapping(), lest the descriptor will not
  48. be allocated.
  49. If the driver has the Linux IRQ number or the irq_data pointer, and
  50. needs to know the associated hwirq number (such as in the irq_chip
  51. callbacks) then it can be directly obtained from irq_data->hwirq.
  52. === Types of irq_domain mappings ===
  53. There are several mechanisms available for reverse mapping from hwirq
  54. to Linux irq, and each mechanism uses a different allocation function.
  55. Which reverse map type should be used depends on the use case. Each
  56. of the reverse map types are described below:
  57. ==== Linear ====
  58. irq_domain_add_linear()
  59. The linear reverse map maintains a fixed size table indexed by the
  60. hwirq number. When a hwirq is mapped, an irq_desc is allocated for
  61. the hwirq, and the IRQ number is stored in the table.
  62. The Linear map is a good choice when the maximum number of hwirqs is
  63. fixed and a relatively small number (~ < 256). The advantages of this
  64. map are fixed time lookup for IRQ numbers, and irq_descs are only
  65. allocated for in-use IRQs. The disadvantage is that the table must be
  66. as large as the largest possible hwirq number.
  67. The majority of drivers should use the linear map.
  68. ==== Tree ====
  69. irq_domain_add_tree()
  70. The irq_domain maintains a radix tree map from hwirq numbers to Linux
  71. IRQs. When an hwirq is mapped, an irq_desc is allocated and the
  72. hwirq is used as the lookup key for the radix tree.
  73. The tree map is a good choice if the hwirq number can be very large
  74. since it doesn't need to allocate a table as large as the largest
  75. hwirq number. The disadvantage is that hwirq to IRQ number lookup is
  76. dependent on how many entries are in the table.
  77. Very few drivers should need this mapping.
  78. ==== No Map ===-
  79. irq_domain_add_nomap()
  80. The No Map mapping is to be used when the hwirq number is
  81. programmable in the hardware. In this case it is best to program the
  82. Linux IRQ number into the hardware itself so that no mapping is
  83. required. Calling irq_create_direct_mapping() will allocate a Linux
  84. IRQ number and call the .map() callback so that driver can program the
  85. Linux IRQ number into the hardware.
  86. Most drivers cannot use this mapping.
  87. ==== Legacy ====
  88. irq_domain_add_simple()
  89. irq_domain_add_legacy()
  90. irq_domain_add_legacy_isa()
  91. The Legacy mapping is a special case for drivers that already have a
  92. range of irq_descs allocated for the hwirqs. It is used when the
  93. driver cannot be immediately converted to use the linear mapping. For
  94. example, many embedded system board support files use a set of #defines
  95. for IRQ numbers that are passed to struct device registrations. In that
  96. case the Linux IRQ numbers cannot be dynamically assigned and the legacy
  97. mapping should be used.
  98. The legacy map assumes a contiguous range of IRQ numbers has already
  99. been allocated for the controller and that the IRQ number can be
  100. calculated by adding a fixed offset to the hwirq number, and
  101. visa-versa. The disadvantage is that it requires the interrupt
  102. controller to manage IRQ allocations and it requires an irq_desc to be
  103. allocated for every hwirq, even if it is unused.
  104. The legacy map should only be used if fixed IRQ mappings must be
  105. supported. For example, ISA controllers would use the legacy map for
  106. mapping Linux IRQs 0-15 so that existing ISA drivers get the correct IRQ
  107. numbers.
  108. Most users of legacy mappings should use irq_domain_add_simple() which
  109. will use a legacy domain only if an IRQ range is supplied by the
  110. system and will otherwise use a linear domain mapping. The semantics
  111. of this call are such that if an IRQ range is specified then
  112. descriptors will be allocated on-the-fly for it, and if no range is
  113. specified it will fall through to irq_domain_add_linear() which means
  114. *no* irq descriptors will be allocated.
  115. A typical use case for simple domains is where an irqchip provider
  116. is supporting both dynamic and static IRQ assignments.
  117. In order to avoid ending up in a situation where a linear domain is
  118. used and no descriptor gets allocated it is very important to make sure
  119. that the driver using the simple domain call irq_create_mapping()
  120. before any irq_find_mapping() since the latter will actually work
  121. for the static IRQ assignment case.
  122. ==== Hierarchy IRQ domain ====
  123. On some architectures, there may be multiple interrupt controllers
  124. involved in delivering an interrupt from the device to the target CPU.
  125. Let's look at a typical interrupt delivering path on x86 platforms:
  126. Device --> IOAPIC -> Interrupt remapping Controller -> Local APIC -> CPU
  127. There are three interrupt controllers involved:
  128. 1) IOAPIC controller
  129. 2) Interrupt remapping controller
  130. 3) Local APIC controller
  131. To support such a hardware topology and make software architecture match
  132. hardware architecture, an irq_domain data structure is built for each
  133. interrupt controller and those irq_domains are organized into hierarchy.
  134. When building irq_domain hierarchy, the irq_domain near to the device is
  135. child and the irq_domain near to CPU is parent. So a hierarchy structure
  136. as below will be built for the example above.
  137. CPU Vector irq_domain (root irq_domain to manage CPU vectors)
  138. ^
  139. |
  140. Interrupt Remapping irq_domain (manage irq_remapping entries)
  141. ^
  142. |
  143. IOAPIC irq_domain (manage IOAPIC delivery entries/pins)
  144. There are four major interfaces to use hierarchy irq_domain:
  145. 1) irq_domain_alloc_irqs(): allocate IRQ descriptors and interrupt
  146. controller related resources to deliver these interrupts.
  147. 2) irq_domain_free_irqs(): free IRQ descriptors and interrupt controller
  148. related resources associated with these interrupts.
  149. 3) irq_domain_activate_irq(): activate interrupt controller hardware to
  150. deliver the interrupt.
  151. 4) irq_domain_deactivate_irq(): deactivate interrupt controller hardware
  152. to stop delivering the interrupt.
  153. Following changes are needed to support hierarchy irq_domain.
  154. 1) a new field 'parent' is added to struct irq_domain; it's used to
  155. maintain irq_domain hierarchy information.
  156. 2) a new field 'parent_data' is added to struct irq_data; it's used to
  157. build hierarchy irq_data to match hierarchy irq_domains. The irq_data
  158. is used to store irq_domain pointer and hardware irq number.
  159. 3) new callbacks are added to struct irq_domain_ops to support hierarchy
  160. irq_domain operations.
  161. With support of hierarchy irq_domain and hierarchy irq_data ready, an
  162. irq_domain structure is built for each interrupt controller, and an
  163. irq_data structure is allocated for each irq_domain associated with an
  164. IRQ. Now we could go one step further to support stacked(hierarchy)
  165. irq_chip. That is, an irq_chip is associated with each irq_data along
  166. the hierarchy. A child irq_chip may implement a required action by
  167. itself or by cooperating with its parent irq_chip.
  168. With stacked irq_chip, interrupt controller driver only needs to deal
  169. with the hardware managed by itself and may ask for services from its
  170. parent irq_chip when needed. So we could achieve a much cleaner
  171. software architecture.
  172. For an interrupt controller driver to support hierarchy irq_domain, it
  173. needs to:
  174. 1) Implement irq_domain_ops.alloc and irq_domain_ops.free
  175. 2) Optionally implement irq_domain_ops.activate and
  176. irq_domain_ops.deactivate.
  177. 3) Optionally implement an irq_chip to manage the interrupt controller
  178. hardware.
  179. 4) No need to implement irq_domain_ops.map and irq_domain_ops.unmap,
  180. they are unused with hierarchy irq_domain.
  181. Hierarchy irq_domain may also be used to support other architectures,
  182. such as ARM, ARM64 etc.