MSI-HOWTO.txt 22 KB

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  1. The MSI Driver Guide HOWTO
  2. Tom L Nguyen tom.l.nguyen@intel.com
  3. 10/03/2003
  4. Revised Feb 12, 2004 by Martine Silbermann
  5. email: Martine.Silbermann@hp.com
  6. Revised Jun 25, 2004 by Tom L Nguyen
  7. Revised Jul 9, 2008 by Matthew Wilcox <willy@linux.intel.com>
  8. Copyright 2003, 2008 Intel Corporation
  9. 1. About this guide
  10. This guide describes the basics of Message Signaled Interrupts (MSIs),
  11. the advantages of using MSI over traditional interrupt mechanisms, how
  12. to change your driver to use MSI or MSI-X and some basic diagnostics to
  13. try if a device doesn't support MSIs.
  14. 2. What are MSIs?
  15. A Message Signaled Interrupt is a write from the device to a special
  16. address which causes an interrupt to be received by the CPU.
  17. The MSI capability was first specified in PCI 2.2 and was later enhanced
  18. in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
  19. capability was also introduced with PCI 3.0. It supports more interrupts
  20. per device than MSI and allows interrupts to be independently configured.
  21. Devices may support both MSI and MSI-X, but only one can be enabled at
  22. a time.
  23. 3. Why use MSIs?
  24. There are three reasons why using MSIs can give an advantage over
  25. traditional pin-based interrupts.
  26. Pin-based PCI interrupts are often shared amongst several devices.
  27. To support this, the kernel must call each interrupt handler associated
  28. with an interrupt, which leads to reduced performance for the system as
  29. a whole. MSIs are never shared, so this problem cannot arise.
  30. When a device writes data to memory, then raises a pin-based interrupt,
  31. it is possible that the interrupt may arrive before all the data has
  32. arrived in memory (this becomes more likely with devices behind PCI-PCI
  33. bridges). In order to ensure that all the data has arrived in memory,
  34. the interrupt handler must read a register on the device which raised
  35. the interrupt. PCI transaction ordering rules require that all the data
  36. arrive in memory before the value may be returned from the register.
  37. Using MSIs avoids this problem as the interrupt-generating write cannot
  38. pass the data writes, so by the time the interrupt is raised, the driver
  39. knows that all the data has arrived in memory.
  40. PCI devices can only support a single pin-based interrupt per function.
  41. Often drivers have to query the device to find out what event has
  42. occurred, slowing down interrupt handling for the common case. With
  43. MSIs, a device can support more interrupts, allowing each interrupt
  44. to be specialised to a different purpose. One possible design gives
  45. infrequent conditions (such as errors) their own interrupt which allows
  46. the driver to handle the normal interrupt handling path more efficiently.
  47. Other possible designs include giving one interrupt to each packet queue
  48. in a network card or each port in a storage controller.
  49. 4. How to use MSIs
  50. PCI devices are initialised to use pin-based interrupts. The device
  51. driver has to set up the device to use MSI or MSI-X. Not all machines
  52. support MSIs correctly, and for those machines, the APIs described below
  53. will simply fail and the device will continue to use pin-based interrupts.
  54. 4.1 Include kernel support for MSIs
  55. To support MSI or MSI-X, the kernel must be built with the CONFIG_PCI_MSI
  56. option enabled. This option is only available on some architectures,
  57. and it may depend on some other options also being set. For example,
  58. on x86, you must also enable X86_UP_APIC or SMP in order to see the
  59. CONFIG_PCI_MSI option.
  60. 4.2 Using MSI
  61. Most of the hard work is done for the driver in the PCI layer. It simply
  62. has to request that the PCI layer set up the MSI capability for this
  63. device.
  64. 4.2.1 pci_enable_msi
  65. int pci_enable_msi(struct pci_dev *dev)
  66. A successful call allocates ONE interrupt to the device, regardless
  67. of how many MSIs the device supports. The device is switched from
  68. pin-based interrupt mode to MSI mode. The dev->irq number is changed
  69. to a new number which represents the message signaled interrupt;
  70. consequently, this function should be called before the driver calls
  71. request_irq(), because an MSI is delivered via a vector that is
  72. different from the vector of a pin-based interrupt.
  73. 4.2.2 pci_enable_msi_range
  74. int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
  75. This function allows a device driver to request any number of MSI
  76. interrupts within specified range from 'minvec' to 'maxvec'.
  77. If this function returns a positive number it indicates the number of
  78. MSI interrupts that have been successfully allocated. In this case
  79. the device is switched from pin-based interrupt mode to MSI mode and
  80. updates dev->irq to be the lowest of the new interrupts assigned to it.
  81. The other interrupts assigned to the device are in the range dev->irq
  82. to dev->irq + returned value - 1. Device driver can use the returned
  83. number of successfully allocated MSI interrupts to further allocate
  84. and initialize device resources.
  85. If this function returns a negative number, it indicates an error and
  86. the driver should not attempt to request any more MSI interrupts for
  87. this device.
  88. This function should be called before the driver calls request_irq(),
  89. because MSI interrupts are delivered via vectors that are different
  90. from the vector of a pin-based interrupt.
  91. It is ideal if drivers can cope with a variable number of MSI interrupts;
  92. there are many reasons why the platform may not be able to provide the
  93. exact number that a driver asks for.
  94. There could be devices that can not operate with just any number of MSI
  95. interrupts within a range. See chapter 4.3.1.3 to get the idea how to
  96. handle such devices for MSI-X - the same logic applies to MSI.
  97. 4.2.1.1 Maximum possible number of MSI interrupts
  98. The typical usage of MSI interrupts is to allocate as many vectors as
  99. possible, likely up to the limit returned by pci_msi_vec_count() function:
  100. static int foo_driver_enable_msi(struct pci_dev *pdev, int nvec)
  101. {
  102. return pci_enable_msi_range(pdev, 1, nvec);
  103. }
  104. Note the value of 'minvec' parameter is 1. As 'minvec' is inclusive,
  105. the value of 0 would be meaningless and could result in error.
  106. Some devices have a minimal limit on number of MSI interrupts.
  107. In this case the function could look like this:
  108. static int foo_driver_enable_msi(struct pci_dev *pdev, int nvec)
  109. {
  110. return pci_enable_msi_range(pdev, FOO_DRIVER_MINIMUM_NVEC, nvec);
  111. }
  112. 4.2.1.2 Exact number of MSI interrupts
  113. If a driver is unable or unwilling to deal with a variable number of MSI
  114. interrupts it could request a particular number of interrupts by passing
  115. that number to pci_enable_msi_range() function as both 'minvec' and 'maxvec'
  116. parameters:
  117. static int foo_driver_enable_msi(struct pci_dev *pdev, int nvec)
  118. {
  119. return pci_enable_msi_range(pdev, nvec, nvec);
  120. }
  121. Note, unlike pci_enable_msi_exact() function, which could be also used to
  122. enable a particular number of MSI-X interrupts, pci_enable_msi_range()
  123. returns either a negative errno or 'nvec' (not negative errno or 0 - as
  124. pci_enable_msi_exact() does).
  125. 4.2.1.3 Single MSI mode
  126. The most notorious example of the request type described above is
  127. enabling the single MSI mode for a device. It could be done by passing
  128. two 1s as 'minvec' and 'maxvec':
  129. static int foo_driver_enable_single_msi(struct pci_dev *pdev)
  130. {
  131. return pci_enable_msi_range(pdev, 1, 1);
  132. }
  133. Note, unlike pci_enable_msi() function, which could be also used to
  134. enable the single MSI mode, pci_enable_msi_range() returns either a
  135. negative errno or 1 (not negative errno or 0 - as pci_enable_msi()
  136. does).
  137. 4.2.3 pci_enable_msi_exact
  138. int pci_enable_msi_exact(struct pci_dev *dev, int nvec)
  139. This variation on pci_enable_msi_range() call allows a device driver to
  140. request exactly 'nvec' MSIs.
  141. If this function returns a negative number, it indicates an error and
  142. the driver should not attempt to request any more MSI interrupts for
  143. this device.
  144. By contrast with pci_enable_msi_range() function, pci_enable_msi_exact()
  145. returns zero in case of success, which indicates MSI interrupts have been
  146. successfully allocated.
  147. 4.2.4 pci_disable_msi
  148. void pci_disable_msi(struct pci_dev *dev)
  149. This function should be used to undo the effect of pci_enable_msi_range().
  150. Calling it restores dev->irq to the pin-based interrupt number and frees
  151. the previously allocated MSIs. The interrupts may subsequently be assigned
  152. to another device, so drivers should not cache the value of dev->irq.
  153. Before calling this function, a device driver must always call free_irq()
  154. on any interrupt for which it previously called request_irq().
  155. Failure to do so results in a BUG_ON(), leaving the device with
  156. MSI enabled and thus leaking its vector.
  157. 4.2.4 pci_msi_vec_count
  158. int pci_msi_vec_count(struct pci_dev *dev)
  159. This function could be used to retrieve the number of MSI vectors the
  160. device requested (via the Multiple Message Capable register). The MSI
  161. specification only allows the returned value to be a power of two,
  162. up to a maximum of 2^5 (32).
  163. If this function returns a negative number, it indicates the device is
  164. not capable of sending MSIs.
  165. If this function returns a positive number, it indicates the maximum
  166. number of MSI interrupt vectors that could be allocated.
  167. 4.3 Using MSI-X
  168. The MSI-X capability is much more flexible than the MSI capability.
  169. It supports up to 2048 interrupts, each of which can be controlled
  170. independently. To support this flexibility, drivers must use an array of
  171. `struct msix_entry':
  172. struct msix_entry {
  173. u16 vector; /* kernel uses to write alloc vector */
  174. u16 entry; /* driver uses to specify entry */
  175. };
  176. This allows for the device to use these interrupts in a sparse fashion;
  177. for example, it could use interrupts 3 and 1027 and yet allocate only a
  178. two-element array. The driver is expected to fill in the 'entry' value
  179. in each element of the array to indicate for which entries the kernel
  180. should assign interrupts; it is invalid to fill in two entries with the
  181. same number.
  182. 4.3.1 pci_enable_msix_range
  183. int pci_enable_msix_range(struct pci_dev *dev, struct msix_entry *entries,
  184. int minvec, int maxvec)
  185. Calling this function asks the PCI subsystem to allocate any number of
  186. MSI-X interrupts within specified range from 'minvec' to 'maxvec'.
  187. The 'entries' argument is a pointer to an array of msix_entry structs
  188. which should be at least 'maxvec' entries in size.
  189. On success, the device is switched into MSI-X mode and the function
  190. returns the number of MSI-X interrupts that have been successfully
  191. allocated. In this case the 'vector' member in entries numbered from
  192. 0 to the returned value - 1 is populated with the interrupt number;
  193. the driver should then call request_irq() for each 'vector' that it
  194. decides to use. The device driver is responsible for keeping track of the
  195. interrupts assigned to the MSI-X vectors so it can free them again later.
  196. Device driver can use the returned number of successfully allocated MSI-X
  197. interrupts to further allocate and initialize device resources.
  198. If this function returns a negative number, it indicates an error and
  199. the driver should not attempt to allocate any more MSI-X interrupts for
  200. this device.
  201. This function, in contrast with pci_enable_msi_range(), does not adjust
  202. dev->irq. The device will not generate interrupts for this interrupt
  203. number once MSI-X is enabled.
  204. Device drivers should normally call this function once per device
  205. during the initialization phase.
  206. It is ideal if drivers can cope with a variable number of MSI-X interrupts;
  207. there are many reasons why the platform may not be able to provide the
  208. exact number that a driver asks for.
  209. There could be devices that can not operate with just any number of MSI-X
  210. interrupts within a range. E.g., an network adapter might need let's say
  211. four vectors per each queue it provides. Therefore, a number of MSI-X
  212. interrupts allocated should be a multiple of four. In this case interface
  213. pci_enable_msix_range() can not be used alone to request MSI-X interrupts
  214. (since it can allocate any number within the range, without any notion of
  215. the multiple of four) and the device driver should master a custom logic
  216. to request the required number of MSI-X interrupts.
  217. 4.3.1.1 Maximum possible number of MSI-X interrupts
  218. The typical usage of MSI-X interrupts is to allocate as many vectors as
  219. possible, likely up to the limit returned by pci_msix_vec_count() function:
  220. static int foo_driver_enable_msix(struct foo_adapter *adapter, int nvec)
  221. {
  222. return pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
  223. 1, nvec);
  224. }
  225. Note the value of 'minvec' parameter is 1. As 'minvec' is inclusive,
  226. the value of 0 would be meaningless and could result in error.
  227. Some devices have a minimal limit on number of MSI-X interrupts.
  228. In this case the function could look like this:
  229. static int foo_driver_enable_msix(struct foo_adapter *adapter, int nvec)
  230. {
  231. return pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
  232. FOO_DRIVER_MINIMUM_NVEC, nvec);
  233. }
  234. 4.3.1.2 Exact number of MSI-X interrupts
  235. If a driver is unable or unwilling to deal with a variable number of MSI-X
  236. interrupts it could request a particular number of interrupts by passing
  237. that number to pci_enable_msix_range() function as both 'minvec' and 'maxvec'
  238. parameters:
  239. static int foo_driver_enable_msix(struct foo_adapter *adapter, int nvec)
  240. {
  241. return pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
  242. nvec, nvec);
  243. }
  244. Note, unlike pci_enable_msix_exact() function, which could be also used to
  245. enable a particular number of MSI-X interrupts, pci_enable_msix_range()
  246. returns either a negative errno or 'nvec' (not negative errno or 0 - as
  247. pci_enable_msix_exact() does).
  248. 4.3.1.3 Specific requirements to the number of MSI-X interrupts
  249. As noted above, there could be devices that can not operate with just any
  250. number of MSI-X interrupts within a range. E.g., let's assume a device that
  251. is only capable sending the number of MSI-X interrupts which is a power of
  252. two. A routine that enables MSI-X mode for such device might look like this:
  253. /*
  254. * Assume 'minvec' and 'maxvec' are non-zero
  255. */
  256. static int foo_driver_enable_msix(struct foo_adapter *adapter,
  257. int minvec, int maxvec)
  258. {
  259. int rc;
  260. minvec = roundup_pow_of_two(minvec);
  261. maxvec = rounddown_pow_of_two(maxvec);
  262. if (minvec > maxvec)
  263. return -ERANGE;
  264. retry:
  265. rc = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
  266. maxvec, maxvec);
  267. /*
  268. * -ENOSPC is the only error code allowed to be analyzed
  269. */
  270. if (rc == -ENOSPC) {
  271. if (maxvec == 1)
  272. return -ENOSPC;
  273. maxvec /= 2;
  274. if (minvec > maxvec)
  275. return -ENOSPC;
  276. goto retry;
  277. }
  278. return rc;
  279. }
  280. Note how pci_enable_msix_range() return value is analyzed for a fallback -
  281. any error code other than -ENOSPC indicates a fatal error and should not
  282. be retried.
  283. 4.3.2 pci_enable_msix_exact
  284. int pci_enable_msix_exact(struct pci_dev *dev,
  285. struct msix_entry *entries, int nvec)
  286. This variation on pci_enable_msix_range() call allows a device driver to
  287. request exactly 'nvec' MSI-Xs.
  288. If this function returns a negative number, it indicates an error and
  289. the driver should not attempt to allocate any more MSI-X interrupts for
  290. this device.
  291. By contrast with pci_enable_msix_range() function, pci_enable_msix_exact()
  292. returns zero in case of success, which indicates MSI-X interrupts have been
  293. successfully allocated.
  294. Another version of a routine that enables MSI-X mode for a device with
  295. specific requirements described in chapter 4.3.1.3 might look like this:
  296. /*
  297. * Assume 'minvec' and 'maxvec' are non-zero
  298. */
  299. static int foo_driver_enable_msix(struct foo_adapter *adapter,
  300. int minvec, int maxvec)
  301. {
  302. int rc;
  303. minvec = roundup_pow_of_two(minvec);
  304. maxvec = rounddown_pow_of_two(maxvec);
  305. if (minvec > maxvec)
  306. return -ERANGE;
  307. retry:
  308. rc = pci_enable_msix_exact(adapter->pdev,
  309. adapter->msix_entries, maxvec);
  310. /*
  311. * -ENOSPC is the only error code allowed to be analyzed
  312. */
  313. if (rc == -ENOSPC) {
  314. if (maxvec == 1)
  315. return -ENOSPC;
  316. maxvec /= 2;
  317. if (minvec > maxvec)
  318. return -ENOSPC;
  319. goto retry;
  320. } else if (rc < 0) {
  321. return rc;
  322. }
  323. return maxvec;
  324. }
  325. 4.3.3 pci_disable_msix
  326. void pci_disable_msix(struct pci_dev *dev)
  327. This function should be used to undo the effect of pci_enable_msix_range().
  328. It frees the previously allocated MSI-X interrupts. The interrupts may
  329. subsequently be assigned to another device, so drivers should not cache
  330. the value of the 'vector' elements over a call to pci_disable_msix().
  331. Before calling this function, a device driver must always call free_irq()
  332. on any interrupt for which it previously called request_irq().
  333. Failure to do so results in a BUG_ON(), leaving the device with
  334. MSI-X enabled and thus leaking its vector.
  335. 4.3.3 The MSI-X Table
  336. The MSI-X capability specifies a BAR and offset within that BAR for the
  337. MSI-X Table. This address is mapped by the PCI subsystem, and should not
  338. be accessed directly by the device driver. If the driver wishes to
  339. mask or unmask an interrupt, it should call disable_irq() / enable_irq().
  340. 4.3.4 pci_msix_vec_count
  341. int pci_msix_vec_count(struct pci_dev *dev)
  342. This function could be used to retrieve number of entries in the device
  343. MSI-X table.
  344. If this function returns a negative number, it indicates the device is
  345. not capable of sending MSI-Xs.
  346. If this function returns a positive number, it indicates the maximum
  347. number of MSI-X interrupt vectors that could be allocated.
  348. 4.4 Handling devices implementing both MSI and MSI-X capabilities
  349. If a device implements both MSI and MSI-X capabilities, it can
  350. run in either MSI mode or MSI-X mode, but not both simultaneously.
  351. This is a requirement of the PCI spec, and it is enforced by the
  352. PCI layer. Calling pci_enable_msi_range() when MSI-X is already
  353. enabled or pci_enable_msix_range() when MSI is already enabled
  354. results in an error. If a device driver wishes to switch between MSI
  355. and MSI-X at runtime, it must first quiesce the device, then switch
  356. it back to pin-interrupt mode, before calling pci_enable_msi_range()
  357. or pci_enable_msix_range() and resuming operation. This is not expected
  358. to be a common operation but may be useful for debugging or testing
  359. during development.
  360. 4.5 Considerations when using MSIs
  361. 4.5.1 Choosing between MSI-X and MSI
  362. If your device supports both MSI-X and MSI capabilities, you should use
  363. the MSI-X facilities in preference to the MSI facilities. As mentioned
  364. above, MSI-X supports any number of interrupts between 1 and 2048.
  365. In contrast, MSI is restricted to a maximum of 32 interrupts (and
  366. must be a power of two). In addition, the MSI interrupt vectors must
  367. be allocated consecutively, so the system might not be able to allocate
  368. as many vectors for MSI as it could for MSI-X. On some platforms, MSI
  369. interrupts must all be targeted at the same set of CPUs whereas MSI-X
  370. interrupts can all be targeted at different CPUs.
  371. 4.5.2 Spinlocks
  372. Most device drivers have a per-device spinlock which is taken in the
  373. interrupt handler. With pin-based interrupts or a single MSI, it is not
  374. necessary to disable interrupts (Linux guarantees the same interrupt will
  375. not be re-entered). If a device uses multiple interrupts, the driver
  376. must disable interrupts while the lock is held. If the device sends
  377. a different interrupt, the driver will deadlock trying to recursively
  378. acquire the spinlock. Such deadlocks can be avoided by using
  379. spin_lock_irqsave() or spin_lock_irq() which disable local interrupts
  380. and acquire the lock (see Documentation/DocBook/kernel-locking).
  381. 4.6 How to tell whether MSI/MSI-X is enabled on a device
  382. Using 'lspci -v' (as root) may show some devices with "MSI", "Message
  383. Signalled Interrupts" or "MSI-X" capabilities. Each of these capabilities
  384. has an 'Enable' flag which is followed with either "+" (enabled)
  385. or "-" (disabled).
  386. 5. MSI quirks
  387. Several PCI chipsets or devices are known not to support MSIs.
  388. The PCI stack provides three ways to disable MSIs:
  389. 1. globally
  390. 2. on all devices behind a specific bridge
  391. 3. on a single device
  392. 5.1. Disabling MSIs globally
  393. Some host chipsets simply don't support MSIs properly. If we're
  394. lucky, the manufacturer knows this and has indicated it in the ACPI
  395. FADT table. In this case, Linux automatically disables MSIs.
  396. Some boards don't include this information in the table and so we have
  397. to detect them ourselves. The complete list of these is found near the
  398. quirk_disable_all_msi() function in drivers/pci/quirks.c.
  399. If you have a board which has problems with MSIs, you can pass pci=nomsi
  400. on the kernel command line to disable MSIs on all devices. It would be
  401. in your best interests to report the problem to linux-pci@vger.kernel.org
  402. including a full 'lspci -v' so we can add the quirks to the kernel.
  403. 5.2. Disabling MSIs below a bridge
  404. Some PCI bridges are not able to route MSIs between busses properly.
  405. In this case, MSIs must be disabled on all devices behind the bridge.
  406. Some bridges allow you to enable MSIs by changing some bits in their
  407. PCI configuration space (especially the Hypertransport chipsets such
  408. as the nVidia nForce and Serverworks HT2000). As with host chipsets,
  409. Linux mostly knows about them and automatically enables MSIs if it can.
  410. If you have a bridge unknown to Linux, you can enable
  411. MSIs in configuration space using whatever method you know works, then
  412. enable MSIs on that bridge by doing:
  413. echo 1 > /sys/bus/pci/devices/$bridge/msi_bus
  414. where $bridge is the PCI address of the bridge you've enabled (eg
  415. 0000:00:0e.0).
  416. To disable MSIs, echo 0 instead of 1. Changing this value should be
  417. done with caution as it could break interrupt handling for all devices
  418. below this bridge.
  419. Again, please notify linux-pci@vger.kernel.org of any bridges that need
  420. special handling.
  421. 5.3. Disabling MSIs on a single device
  422. Some devices are known to have faulty MSI implementations. Usually this
  423. is handled in the individual device driver, but occasionally it's necessary
  424. to handle this with a quirk. Some drivers have an option to disable use
  425. of MSI. While this is a convenient workaround for the driver author,
  426. it is not good practice, and should not be emulated.
  427. 5.4. Finding why MSIs are disabled on a device
  428. From the above three sections, you can see that there are many reasons
  429. why MSIs may not be enabled for a given device. Your first step should
  430. be to examine your dmesg carefully to determine whether MSIs are enabled
  431. for your machine. You should also check your .config to be sure you
  432. have enabled CONFIG_PCI_MSI.
  433. Then, 'lspci -t' gives the list of bridges above a device. Reading
  434. /sys/bus/pci/devices/*/msi_bus will tell you whether MSIs are enabled (1)
  435. or disabled (0). If 0 is found in any of the msi_bus files belonging
  436. to bridges between the PCI root and the device, MSIs are disabled.
  437. It is also worth checking the device driver to see whether it supports MSIs.
  438. For example, it may contain calls to pci_enable_msi_range() or
  439. pci_enable_msix_range().