i2c-muxes.txt 1.5 KB

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  1. ACPI I2C Muxes
  2. --------------
  3. Describing an I2C device hierarchy that includes I2C muxes requires an ACPI
  4. Device () scope per mux channel.
  5. Consider this topology:
  6. +------+ +------+
  7. | SMB1 |-->| MUX0 |--CH00--> i2c client A (0x50)
  8. | | | 0x70 |--CH01--> i2c client B (0x50)
  9. +------+ +------+
  10. which corresponds to the following ASL:
  11. Device (SMB1)
  12. {
  13. Name (_HID, ...)
  14. Device (MUX0)
  15. {
  16. Name (_HID, ...)
  17. Name (_CRS, ResourceTemplate () {
  18. I2cSerialBus (0x70, ControllerInitiated, I2C_SPEED,
  19. AddressingMode7Bit, "^SMB1", 0x00,
  20. ResourceConsumer,,)
  21. }
  22. Device (CH00)
  23. {
  24. Name (_ADR, 0)
  25. Device (CLIA)
  26. {
  27. Name (_HID, ...)
  28. Name (_CRS, ResourceTemplate () {
  29. I2cSerialBus (0x50, ControllerInitiated, I2C_SPEED,
  30. AddressingMode7Bit, "^CH00", 0x00,
  31. ResourceConsumer,,)
  32. }
  33. }
  34. }
  35. Device (CH01)
  36. {
  37. Name (_ADR, 1)
  38. Device (CLIB)
  39. {
  40. Name (_HID, ...)
  41. Name (_CRS, ResourceTemplate () {
  42. I2cSerialBus (0x50, ControllerInitiated, I2C_SPEED,
  43. AddressingMode7Bit, "^CH01", 0x00,
  44. ResourceConsumer,,)
  45. }
  46. }
  47. }
  48. }
  49. }