qcom-sata.txt 1.4 KB

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  1. * Qualcomm AHCI SATA Controller
  2. SATA nodes are defined to describe on-chip Serial ATA controllers.
  3. Each SATA controller should have its own node.
  4. Required properties:
  5. - compatible : compatible list, must contain "generic-ahci"
  6. - interrupts : <interrupt mapping for SATA IRQ>
  7. - reg : <registers mapping>
  8. - phys : Must contain exactly one entry as specified
  9. in phy-bindings.txt
  10. - phy-names : Must be "sata-phy"
  11. Required properties for "qcom,ipq806x-ahci" compatible:
  12. - clocks : Must contain an entry for each entry in clock-names.
  13. - clock-names : Shall be:
  14. "slave_iface" - Fabric port AHB clock for SATA
  15. "iface" - AHB clock
  16. "core" - core clock
  17. "rxoob" - RX out-of-band clock
  18. "pmalive" - Power Module Alive clock
  19. - assigned-clocks : Shall be:
  20. SATA_RXOOB_CLK
  21. SATA_PMALIVE_CLK
  22. - assigned-clock-rates : Shall be:
  23. 100Mhz (100000000) for SATA_RXOOB_CLK
  24. 100Mhz (100000000) for SATA_PMALIVE_CLK
  25. Example:
  26. sata@29000000 {
  27. compatible = "qcom,ipq806x-ahci", "generic-ahci";
  28. reg = <0x29000000 0x180>;
  29. interrupts = <0 209 0x0>;
  30. clocks = <&gcc SFAB_SATA_S_H_CLK>,
  31. <&gcc SATA_H_CLK>,
  32. <&gcc SATA_A_CLK>,
  33. <&gcc SATA_RXOOB_CLK>,
  34. <&gcc SATA_PMALIVE_CLK>;
  35. clock-names = "slave_iface", "iface", "core",
  36. "rxoob", "pmalive";
  37. assigned-clocks = <&gcc SATA_RXOOB_CLK>, <&gcc SATA_PMALIVE_CLK>;
  38. assigned-clock-rates = <100000000>, <100000000>;
  39. phys = <&sata_phy>;
  40. phy-names = "sata-phy";
  41. };