sata_highbank.txt 1.7 KB

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  1. * Calxeda AHCI SATA Controller
  2. SATA nodes are defined to describe on-chip Serial ATA controllers.
  3. The Calxeda SATA controller mostly conforms to the AHCI interface
  4. with some special extensions to add functionality.
  5. Each SATA controller should have its own node.
  6. Required properties:
  7. - compatible : compatible list, contains "calxeda,hb-ahci"
  8. - interrupts : <interrupt mapping for SATA IRQ>
  9. - reg : <registers mapping>
  10. Optional properties:
  11. - dma-coherent : Present if dma operations are coherent
  12. - calxeda,port-phys : phandle-combophy and lane assignment, which maps each
  13. SATA port to a combophy and a lane within that
  14. combophy
  15. - calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
  16. which indicates that the driver supports SGPIO
  17. indicator lights using the indicated GPIOs
  18. - calxeda,led-order : a u32 array that map port numbers to offsets within the
  19. SGPIO bitstream.
  20. - calxeda,tx-atten : a u32 array that contains TX attenuation override
  21. codes, one per port. The upper 3 bytes are always
  22. 0 and thus ignored.
  23. - calxeda,pre-clocks : a u32 that indicates the number of additional clock
  24. cycles to transmit before sending an SGPIO pattern
  25. - calxeda,post-clocks: a u32 that indicates the number of additional clock
  26. cycles to transmit after sending an SGPIO pattern
  27. Example:
  28. sata@ffe08000 {
  29. compatible = "calxeda,hb-ahci";
  30. reg = <0xffe08000 0x1000>;
  31. interrupts = <115>;
  32. dma-coherent;
  33. calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1
  34. &combophy0 2 &combophy0 3>;
  35. calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
  36. calxeda,led-order = <4 0 1 2 3>;
  37. calxeda,tx-atten = <0xff 22 0xff 0xff 23>;
  38. calxeda,pre-clocks = <10>;
  39. calxeda,post-clocks = <0>;
  40. };