dscr.txt 5.1 KB

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  1. Device State Configuration Registers
  2. ------------------------------------
  3. TI C6X SoCs contain a region of miscellaneous registers which provide various
  4. function for SoC control or status. Details vary considerably among from SoC
  5. to SoC with no two being alike.
  6. In general, the Device State Configuration Registers (DSCR) will provide one or
  7. more configuration registers often protected by a lock register where one or
  8. more key values must be written to a lock register in order to unlock the
  9. configuration register for writes. These configuration register may be used to
  10. enable (and disable in some cases) SoC pin drivers, select peripheral clock
  11. sources (internal or pin), etc. In some cases, a configuration register is
  12. write once or the individual bits are write once. In addition to device config,
  13. the DSCR block may provide registers which are used to reset peripherals,
  14. provide device ID information, provide ethernet MAC addresses, as well as other
  15. miscellaneous functions.
  16. For device state control (enable/disable), each device control is assigned an
  17. id which is used by individual device drivers to control the state as needed.
  18. Required properties:
  19. - compatible: must be "ti,c64x+dscr"
  20. - reg: register area base and size
  21. Optional properties:
  22. NOTE: These are optional in that not all SoCs will have all properties. For
  23. SoCs which do support a given property, leaving the property out of the
  24. device tree will result in reduced functionality or possibly driver
  25. failure.
  26. - ti,dscr-devstat
  27. offset of the devstat register
  28. - ti,dscr-silicon-rev
  29. offset, start bit, and bitsize of silicon revision field
  30. - ti,dscr-rmii-resets
  31. offset and bitmask of RMII reset field. May have multiple tuples if more
  32. than one ethernet port is available.
  33. - ti,dscr-locked-regs
  34. possibly multiple tuples describing registers which are write protected by
  35. a lock register. Each tuple consists of the register offset, lock register
  36. offsset, and the key value used to unlock the register.
  37. - ti,dscr-kick-regs
  38. offset and key values of two "kick" registers used to write protect other
  39. registers in DSCR. On SoCs using kick registers, the first key must be
  40. written to the first kick register and the second key must be written to
  41. the second register before other registers in the area are write-enabled.
  42. - ti,dscr-mac-fuse-regs
  43. MAC addresses are contained in two registers. Each element of a MAC address
  44. is contained in a single byte. This property has two tuples. Each tuple has
  45. a register offset and four cells representing bytes in the register from
  46. most significant to least. The value of these four cells is the MAC byte
  47. index (1-6) of the byte within the register. A value of 0 means the byte
  48. is unused in the MAC address.
  49. - ti,dscr-devstate-ctl-regs
  50. This property describes the bitfields used to control the state of devices.
  51. Each tuple describes a range of identical bitfields used to control one or
  52. more devices (one bitfield per device). The layout of each tuple is:
  53. start_id num_ids reg enable disable start_bit nbits
  54. Where:
  55. start_id is device id for the first device control in the range
  56. num_ids is the number of device controls in the range
  57. reg is the offset of the register holding the control bits
  58. enable is the value to enable a device
  59. disable is the value to disable a device (0xffffffff if cannot disable)
  60. start_bit is the bit number of the first bit in the range
  61. nbits is the number of bits per device control
  62. - ti,dscr-devstate-stat-regs
  63. This property describes the bitfields used to provide device state status
  64. for device states controlled by the DSCR. Each tuple describes a range of
  65. identical bitfields used to provide status for one or more devices (one
  66. bitfield per device). The layout of each tuple is:
  67. start_id num_ids reg enable disable start_bit nbits
  68. Where:
  69. start_id is device id for the first device status in the range
  70. num_ids is the number of devices covered by the range
  71. reg is the offset of the register holding the status bits
  72. enable is the value indicating device is enabled
  73. disable is the value indicating device is disabled
  74. start_bit is the bit number of the first bit in the range
  75. nbits is the number of bits per device status
  76. - ti,dscr-privperm
  77. Offset and default value for register used to set access privilege for
  78. some SoC devices.
  79. Example:
  80. device-state-config-regs@2a80000 {
  81. compatible = "ti,c64x+dscr";
  82. reg = <0x02a80000 0x41000>;
  83. ti,dscr-devstat = <0>;
  84. ti,dscr-silicon-rev = <8 28 0xf>;
  85. ti,dscr-rmii-resets = <0x40020 0x00040000>;
  86. ti,dscr-locked-regs = <0x40008 0x40004 0x0f0a0b00>;
  87. ti,dscr-devstate-ctl-regs =
  88. <0 12 0x40008 1 0 0 2
  89. 12 1 0x40008 3 0 30 2
  90. 13 2 0x4002c 1 0xffffffff 0 1>;
  91. ti,dscr-devstate-stat-regs =
  92. <0 10 0x40014 1 0 0 3
  93. 10 2 0x40018 1 0 0 3>;
  94. ti,dscr-mac-fuse-regs = <0x700 1 2 3 4
  95. 0x704 5 6 0 0>;
  96. ti,dscr-privperm = <0x41c 0xaaaaaaaa>;
  97. ti,dscr-kick-regs = <0x38 0x83E70B13
  98. 0x3c 0x95A4F1E0>;
  99. };